diff options
Diffstat (limited to 'zephyr')
246 files changed, 4650 insertions, 883 deletions
diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 5fd91e2335..e3c5780a4c 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -358,6 +358,9 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP "${PLATFORM_EC}/power/host_sleep.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_MT8186 "${PLATFORM_EC}/power/mt8186.c") +# Re-use mt8186.c code +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_MT8188 + "${PLATFORM_EC}/power/mt8186.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_MT8192 "${PLATFORM_EC}/power/mt8192.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_SC7180 @@ -433,6 +436,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB "${PLATFORM_EC}/driver/retimer/bb_retimer.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_PS8818 "${PLATFORM_EC}/driver/retimer/ps8818.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_PS8811 + "${PLATFORM_EC}/driver/retimer/ps8811.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7451 "${PLATFORM_EC}/driver/usb_mux/anx7451.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_SS_MUX @@ -468,6 +473,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_OCP zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_ALT_MODE_DFP "${PLATFORM_EC}/common/usb_pd_alt_mode_dfp.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_DISCOVERY + "${PLATFORM_EC}/common/usb_pd_discovery.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_ALT_MODE_UFP "${PLATFORM_EC}/common/usb_pd_alt_mode_ufp.c") @@ -487,7 +494,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC "${PLATFORM_EC}/common/usbc/usb_tc_drp_acc_trysrc_sm.c" "${PLATFORM_EC}/common/usbc/usb_pe_drp_sm.c" "${PLATFORM_EC}/common/usbc/usb_pd_dpm.c" - "${PLATFORM_EC}/common/usbc/usbc_pd_policy.c" + "${PLATFORM_EC}/common/usbc/usbc_pd_policy.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_DP_MODE "${PLATFORM_EC}/common/usbc/dp_alt_mode.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PRL_SM diff --git a/zephyr/Kconfig.flash b/zephyr/Kconfig.flash index c8fa606bde..8f3c77499a 100644 --- a/zephyr/Kconfig.flash +++ b/zephyr/Kconfig.flash @@ -56,6 +56,7 @@ choice PLATFORM_EC_STORAGE_TYPE default PLATFORM_EC_EXTERNAL_STORAGE if SOC_FAMILY_NPCX default PLATFORM_EC_EXTERNAL_STORAGE if SOC_FAMILY_MEC default PLATFORM_EC_INTERNAL_STORAGE if SOC_FAMILY_RISCV_ITE + default PLATFORM_EC_INTERNAL_STORAGE if SOC_FAMILY_STM32 help Sets the EC code storage type. diff --git a/zephyr/Kconfig.i2c b/zephyr/Kconfig.i2c index 9fa1d274aa..fa65ec8f9d 100644 --- a/zephyr/Kconfig.i2c +++ b/zephyr/Kconfig.i2c @@ -77,4 +77,11 @@ config PLATFORM_EC_SMBUS_PEC This option also enables error checking function on smart batteries. +config PLATFORM_EC_I2C_NACK_RETRY_COUNT + int "I2C operation retry count when transaction error" + default 0 + help + Defines I2C operation retry count when transaction general input/output + error (-EIO) and also when the I2C is busy. + endif # PLATFORM_EC_I2C diff --git a/zephyr/Kconfig.pd b/zephyr/Kconfig.pd index bd50d64c43..68ecfe78e6 100644 --- a/zephyr/Kconfig.pd +++ b/zephyr/Kconfig.pd @@ -32,6 +32,7 @@ config PLATFORM_EC_USB_PD_HOST_CMD config PLATFORM_EC_CONSOLE_CMD_MFALLOW bool "Console command: mfallow" default y + depends on CONFIG_USB_PD_DP_MODE help Controls whether multi-function support is allowed for DP (Display Port) connections. Default setting allows multi-function support when @@ -224,6 +225,7 @@ config PLATFORM_EC_USB_PD_VDM_AP_CONTROL config PLATFORM_EC_USB_PD_ALT_MODE_DFP bool "Downward Facing Port support" default y + depends on PLATFORM_EC_USB_PD_DISCOVERY help Enable support for USB Power Delivery alternate mode of Downward Facing Port. @@ -242,6 +244,14 @@ config PLATFORM_EC_USB_PD_ALT_MODE_UFP USB4 and ThunderBolt operation when the Chromium OS data role resolves to the UFP role. +config PLATFORM_EC_USB_PD_DISCOVERY + bool "Enable EC to direct Discover VDMs" + default y + help + This enables support for the EC probing and storing the various + partner discovery messages (DiscoverIdentity, DiscoverModes, + DiscoverSVIDs). + config PLATFORM_EC_USB_PD_USB32_DRD bool "Port is capable of operating as a USB3.2 device" default n @@ -376,6 +386,15 @@ config PLATFORM_EC_USB_PD_TRY_SRC for laptops, for example, since when attaching to a cellphone we want the laptop to charge the phone, not vice versa. +config PLATFORM_EC_USB_PD_DP_MODE + bool "EC-driven DP support" + depends on !PLATFORM_EC_USB_PD_VDM_AP_CONTROL + default y + help + This enables support for entering DisplayPort alternate mode as a + DFP from the Embedded Controller directly. This flag gates all the + on-EC logic for determining specifics such as VDM contents. + config PLATFORM_EC_USB_PD_USB4 bool "USB4 support" depends on PLATFORM_EC_USB_PD_REV30 diff --git a/zephyr/Kconfig.powerseq b/zephyr/Kconfig.powerseq index 4b438f0bce..7865a6b8e2 100644 --- a/zephyr/Kconfig.powerseq +++ b/zephyr/Kconfig.powerseq @@ -217,6 +217,14 @@ config PLATFORM_EC_POWERSEQ_MT8186 help Use the MT8186 code for power sequencing. +config PLATFORM_EC_POWERSEQ_MT8188 + bool "Use common MT8188 code for power sequencing" + default y + depends on AP_ARM_MTK_MT8188 + help + Use the MT8188 code for power sequencing. Re-use MT8186 common + code. + config PLATFORM_EC_POWERSEQ_SC7180 bool "SC7180 power sequencing" depends on AP_ARM_QUALCOMM_SC7180 diff --git a/zephyr/Kconfig.retimer b/zephyr/Kconfig.retimer index a5c37d7ecb..8c5390eb31 100644 --- a/zephyr/Kconfig.retimer +++ b/zephyr/Kconfig.retimer @@ -11,6 +11,7 @@ config PLATFORM_EC_USBC_RETIMER_INTEL_BB depends on DT_HAS_INTEL_JHL8040R_ENABLED select PLATFORM_EC_USB_PD_USB4 select PLATFORM_EC_USB_PD_TBT_COMPAT_MODE + select PLATFORM_EC_USBC_RETIMER_FW_UPDATE help Enable this to support the Intel Burnside Bridge Thunderbolt / USB / DisplayPort retimer. @@ -37,6 +38,7 @@ config PLATFORM_EC_USBC_RETIMER_INTEL_HB depends on DT_HAS_INTEL_JHL9040R_ENABLED select PLATFORM_EC_USB_PD_USB4 select PLATFORM_EC_USB_PD_TBT_COMPAT_MODE + select PLATFORM_EC_USBC_RETIMER_FW_UPDATE help Enable this to support the Intel Hayden Bridge Thunderbolt / USB / DisplayPort retimer. diff --git a/zephyr/Kconfig.usbc b/zephyr/Kconfig.usbc index 53c918816c..13fc8c653e 100644 --- a/zephyr/Kconfig.usbc +++ b/zephyr/Kconfig.usbc @@ -31,6 +31,15 @@ rsource "Kconfig.usb_charger" if PLATFORM_EC_USBC +config PLATFORM_EC_TCPC_INTERRUPT + bool "Enables tcpc driver" + default y + help + By default, the tcpc driver is automatically enabled and will + initialize using the devicetree configs. Disable to stop tcpc + interrupt callbacks from being generated and save space on flash if a + custom driver is used instead. + config PLATFORM_EC_CHARGER_DEFAULT_CURRENT_LIMIT int "Charger input current in mA" depends on PLATFORM_EC_CHARGE_MANAGER diff --git a/zephyr/Kconfig.usbc_ss_mux b/zephyr/Kconfig.usbc_ss_mux index a5832a2375..6b8b689816 100644 --- a/zephyr/Kconfig.usbc_ss_mux +++ b/zephyr/Kconfig.usbc_ss_mux @@ -48,7 +48,6 @@ config PLATFORM_EC_USB_MUX_VIRTUAL config PLATFORM_EC_USBC_RETIMER_FW_UPDATE bool "Support firmware update of USB Type-C retimers" - default y depends on PLATFORM_EC_USBC_SS_MUX help Enable this to support USB Type-C retimer firmware update. Each diff --git a/zephyr/Makefile.cq b/zephyr/Makefile.cq index ae12f5604e..3f02dea325 100644 --- a/zephyr/Makefile.cq +++ b/zephyr/Makefile.cq @@ -39,9 +39,12 @@ TEST_PATTERNS='$(PLATFORM_EC)/test/**' \ '$(PLATFORM_EC)/zephyr/mock/**' \ '$(THIRD_PARTY)/zephyr/main/subsys/emul/**' \ '$(THIRD_PARTY)/zephyr/main/arch/posix/**' \ + '**/*_benchmark.cc' \ '**/*_test.c' \ + '**/*_test.cc' \ '**/*_test.h' \ '**/*_emul.c' \ + '**/*_emul.cc' \ '**/*_emul.h' \ '$(PLATFORM_EC)/include/test_util.h' \ '$(PLATFORM_EC)/common/test_util.c' \ @@ -119,7 +122,6 @@ $(BUILD)/zephyr/%_final.info: $(BUILD)/zephyr/%_stenciled.info '$(THIRD_PARTY)/**' \ '$(PLATFORM_EC)/zephyr/drivers/**' \ '$(PLATFORM_EC)/zephyr/include/drivers/**' \ - '$(PLATFORM_EC)/zephyr/program/**' \ '$(PLATFORM_EC)/zephyr/shim/chip/**' \ '$(PLATFORM_EC)/zephyr/shim/chip/npcx/npcx_monitor/**' \ '$(PLATFORM_EC)/zephyr/shim/core/**' \ diff --git a/zephyr/app/ec/Kconfig b/zephyr/app/ec/Kconfig index 72c80f5d3a..d0962d4c7f 100644 --- a/zephyr/app/ec/Kconfig +++ b/zephyr/app/ec/Kconfig @@ -135,6 +135,7 @@ config CROS_EC_RO_MEM_OFF config CROS_EC_RO_SIZE hex "The size of the RO region." default 0xb000 if ARCH_POSIX + default $(dt_node_int_prop_hex,/binman/wp-ro,size) help This will be used (along with SYSTEM_RO_MEM_OFF) to determine if the current PC is in the RO section. @@ -148,6 +149,7 @@ config CROS_EC_RW_MEM_OFF config CROS_EC_RW_SIZE hex "The size of the RW region." default 0x75000 if ARCH_POSIX + default $(dt_node_int_prop_hex,/binman/ec-rw,size) help This will be used (along with SYSTEM_RW_MEM_OFF) to determine if the current PC is in the RW section. diff --git a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x index bfcfeb8235..ba4b795ca9 100644 --- a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x +++ b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x @@ -33,13 +33,11 @@ config CROS_EC_DATA_RAM_SIZE config CROS_EC_RAM_SIZE default 0x00f800 -config FLASH_SIZE - default 512 - config CROS_EC_RO_MEM_OFF default 0x0 # was 0x40000 +# TODO(b/268254046): mchp Zephyr: MEC172x: verify RO flash size. config CROS_EC_RO_SIZE default 0x3F000 @@ -48,7 +46,4 @@ config CROS_EC_RO_SIZE config CROS_EC_RW_MEM_OFF default 0x0 -config CROS_EC_RW_SIZE - default 0x40000 - endif # SOC_SERIES_MEC172X diff --git a/zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 b/zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 new file mode 100644 index 0000000000..17f712028e --- /dev/null +++ b/zephyr/app/ec/chip/arm/st_stm32/Kconfig.stm32 @@ -0,0 +1,32 @@ +# Copyright 2023 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +if SOC_FAMILY_STM32 + +DT_CHOSEN_Z_SRAM := zephyr,sram + +config CROS_EC_PROGRAM_MEMORY_BASE + default FLASH_BASE_ADDRESS + +config CROS_EC_RAM_BASE + default SRAM_BASE_ADDRESS + +config CROS_EC_DATA_RAM_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_SRAM)) + +config CROS_EC_RAM_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_SRAM)) + +config CROS_EC_RO_MEM_OFF + default $(dt_node_int_prop_hex,/binman/wp-ro,offset) + +config CROS_EC_RW_MEM_OFF + default $(dt_node_int_prop_hex,/binman/ec-rw,offset) + +# Tell the linker where the RO/RW part is. +config FLASH_LOAD_OFFSET + default CROS_EC_RO_MEM_OFF if CROS_EC_RO + default CROS_EC_RW_MEM_OFF if CROS_EC_RW + +endif # SOC_FAMILY_STM32 diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 index e0ea15c5b7..d559c8378c 100644 --- a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 +++ b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 @@ -20,21 +20,14 @@ config CROS_EC_DATA_RAM_SIZE config CROS_EC_RAM_SIZE default 0x0000e000 -# The 768KB flash space layout are as the below: -# - RO image starts at the first 384k of flash. -# - RW image starts at the second 384k of flash. +# Image size is configured with binman's property. +# (CROS_EC_RO_SIZE and CROS_EC_RW_SIZE) config CROS_EC_RO_MEM_OFF default 0x0 -config CROS_EC_RO_SIZE - default 0x60000 - config CROS_EC_RW_MEM_OFF default 0x60000 -config CROS_EC_RW_SIZE - default 0x60000 - config FLASH_LOAD_OFFSET default CROS_EC_RW_MEM_OFF if CROS_EC_RW diff --git a/zephyr/app/ec/ec_app_main.c b/zephyr/app/ec/ec_app_main.c index 160156f7bb..120003b7bc 100644 --- a/zephyr/app/ec/ec_app_main.c +++ b/zephyr/app/ec/ec_app_main.c @@ -22,8 +22,8 @@ #include <zephyr/shell/shell_uart.h> #include <zephyr/sys/printk.h> -static struct k_timer timer; -static void console_allow_sleep(struct k_timer *timer) +static struct k_timer no_sleep_boot_timer; +static void boot_allow_sleep(struct k_timer *timer) { pm_policy_state_lock_put(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES); } @@ -53,8 +53,8 @@ void ec_app_main(void) k_timeout_t duration = K_MSEC(CONFIG_PLATFORM_EC_BOOT_NO_SLEEP_MS); - k_timer_init(&timer, console_allow_sleep, NULL); - k_timer_start(&timer, duration, K_NO_WAIT); + k_timer_init(&no_sleep_boot_timer, boot_allow_sleep, NULL); + k_timer_start(&no_sleep_boot_timer, duration, K_NO_WAIT); pm_policy_state_lock_get(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES); diff --git a/zephyr/app/ec/soc/Kconfig b/zephyr/app/ec/soc/Kconfig index 3dccfa3a2a..f3da740ccf 100644 --- a/zephyr/app/ec/soc/Kconfig +++ b/zephyr/app/ec/soc/Kconfig @@ -56,6 +56,12 @@ config AP_ARM_MTK_MT8186 help The application processor is a MediaTek MT8186 processor. +config AP_ARM_MTK_MT8188 + bool "MediaTek MT8188" + select AP_AARCH64 + help + The application processor is a MediaTek MT8188 processor. + config AP_ARM_QUALCOMM_SC7180 bool "Qualcomm Snapdragon SC7180" select AP_AARCH64 diff --git a/zephyr/boards/arm/mec1727/mec1727.dts b/zephyr/boards/arm/mec1727/mec1727.dts index f0861e4b61..7c8c3b5d36 100644 --- a/zephyr/boards/arm/mec1727/mec1727.dts +++ b/zephyr/boards/arm/mec1727/mec1727.dts @@ -24,6 +24,11 @@ zephyr,flash-controller = &int_flash; }; + /* MEC172x Chrome design - 256KB code size */ + flash0: flash@c0000 { + reg = <0x000C0000 0x40000>; + }; + named-pwms { compatible = "named-pwms"; }; diff --git a/zephyr/boards/arm/npcx7/npcx7.dts b/zephyr/boards/arm/npcx7/npcx7.dts index cfe67a1b66..a4f0646001 100644 --- a/zephyr/boards/arm/npcx7/npcx7.dts +++ b/zephyr/boards/arm/npcx7/npcx7.dts @@ -45,19 +45,6 @@ /* Override keyboard scanning */ soc { /delete-node/ kscan@400a3000; - /* TODO(b/265198571): Migrate Zephyr EC builds to upstream SHI - * drivers. - */ - /delete-node/ shi@4000f000; - shi: shi@4000f000 { - compatible = "nuvoton,npcx-cros-shi"; - reg = <0x4000f000 0x120>; - interrupts = <18 1>; - clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>; - shi-cs-wui =<&wui_io53>; - label = "SHI"; - status = "disabled"; - }; }; }; diff --git a/zephyr/boards/arm/npcx9/npcx9.dtsi b/zephyr/boards/arm/npcx9/npcx9.dtsi index 8f630ae86b..113cecc173 100644 --- a/zephyr/boards/arm/npcx9/npcx9.dtsi +++ b/zephyr/boards/arm/npcx9/npcx9.dtsi @@ -40,19 +40,6 @@ /* Override keyboard scanning */ soc { /delete-node/ kscan@400a3000; - /* TODO(b/265198571): Migrate Zephyr EC builds to upstream SHI - * drivers. - */ - /delete-node/ shi@4000f000; - shi: shi@4000f000 { - compatible = "nuvoton,npcx-cros-shi"; - reg = <0x4000f000 0x120>; - interrupts = <18 1>; - clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>; - shi-cs-wui =<&wui_io53>; - label = "SHI"; - status = "disabled"; - }; }; }; diff --git a/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi index 1f7eb98356..5debb86381 100644 --- a/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi +++ b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi @@ -70,19 +70,6 @@ /* Override keyboard scanning */ soc { /delete-node/ kscan@400a3000; - /* TODO(b/265198571): Migrate Zephyr EC builds to upstream SHI - * drivers. - */ - /delete-node/ shi@4000f000; - shi: shi@4000f000 { - compatible = "nuvoton,npcx-cros-shi"; - reg = <0x4000f000 0x120>; - interrupts = <18 1>; - clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>; - shi-cs-wui =<&wui_io53>; - label = "SHI"; - status = "disabled"; - }; }; }; diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts index 9567ffaad3..422821d478 100644 --- a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts +++ b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts @@ -40,10 +40,6 @@ pinctrl-names = "default"; }; -&cros_kb_raw { - status = "okay"; /* Override in project dts if not required */ -}; - &espi0 { status = "okay"; }; diff --git a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c index 2d34a21523..ee687c8f61 100644 --- a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c +++ b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c @@ -209,7 +209,7 @@ static int cros_flash_it8xxx2_erase(const struct device *dev, int offset, */ if (IS_ENABLED(HAS_TASK_HOSTCMD) && IS_ENABLED(CONFIG_HOST_COMMAND_STATUS)) { - irq_enable(DT_IRQN(DT_NODELABEL(shi))); + irq_enable(DT_IRQN(DT_NODELABEL(shi0))); } /* Always use sector erase command */ for (; size > 0; size -= CONFIG_FLASH_ERASE_SIZE) { diff --git a/zephyr/drivers/cros_flash/cros_flash_xec.c b/zephyr/drivers/cros_flash/cros_flash_xec.c index 610a79c971..6cb36bce66 100644 --- a/zephyr/drivers/cros_flash/cros_flash_xec.c +++ b/zephyr/drivers/cros_flash/cros_flash_xec.c @@ -32,7 +32,11 @@ struct cros_flash_xec_data { const struct device *spi_ctrl_dev; }; -static struct spi_config spi_cfg; +/* initialize spi_cfg, SPI driver checks "SPI word size" field */ +static struct spi_config spi_cfg = { + .operation = SPI_WORD_SET(8) | SPI_LINES_SINGLE, + .frequency = DT_PROP(DT_NODELABEL(int_flash), spi_max_frequency) +}; #define FLASH_DEV DT_NODELABEL(int_flash) #define SPI_CONTROLLER_DEV DT_NODELABEL(spi0) diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c index f824d1d90c..7de488b059 100644 --- a/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c +++ b/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c @@ -14,6 +14,7 @@ #include <zephyr/drivers/clock_control.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/interrupt_controller/wuc_ite_it8xxx2.h> +#include <zephyr/drivers/pinctrl.h> #include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h> #include <zephyr/kernel.h> #include <zephyr/logging/log.h> @@ -42,6 +43,8 @@ struct cros_kb_raw_ite_config { int irq; /* KSI[7:0] wake-up input source configuration list */ const struct cros_kb_raw_wuc_map_cfg *wuc_map_list; + /* KSI/KSO keyboard scan alternate configuration */ + const struct pinctrl_dev_config *pcfg; }; struct cros_kb_raw_ite_data { @@ -128,6 +131,33 @@ static int cros_kb_raw_ite_drive_column(const struct device *dev, int col) return 0; } +#ifdef CONFIG_PLATFORM_EC_KEYBOARD_FACTORY_TEST +static int cros_kb_raw_ite_config_alt(const struct device *dev, bool enable) +{ + const struct cros_kb_raw_ite_config *config = dev->config; + int status = 0; + + if (enable) { + /* Set KSI/KSO pins of cros_kb_raw node to kbs mode */ + status = pinctrl_apply_state(config->pcfg, + PINCTRL_STATE_DEFAULT); + if (status < 0) { + LOG_ERR("Failed to enable KSI and KSO kbs mode"); + return status; + } + } else { + /* Set KSI/KSO pins of cros_kb_raw node to gpio mode */ + status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP); + if (status < 0) { + LOG_ERR("Failed to enable KSI and KSO gpio mode"); + return status; + } + } + + return 0; +} +#endif + static void cros_kb_raw_ite_ksi_isr(const struct device *dev) { const struct cros_kb_raw_ite_config *config = dev->config; @@ -156,19 +186,22 @@ static int cros_kb_raw_ite_init(const struct device *dev) const struct cros_kb_raw_ite_config *config = dev->config; struct cros_kb_raw_ite_data *data = dev->data; struct kscan_it8xxx2_regs *const inst = config->base; + int status; /* Ensure top-level interrupt is disabled */ cros_kb_raw_ite_enable_interrupt(dev, 0); /* - * bit2, Setting 1 enables the internal pull-up of the KSO[15:0] pins. - * To pull up KSO[17:16], set the GPCR registers of their - * corresponding GPIO ports. - * bit0, Setting 1 enables the open-drain mode of the KSO[17:0] pins. + * Enable the internal pull-up and kbs mode of the KSI[7:0] pins. + * Enable the internal pull-up and kbs mode of the KSO[15:0] pins. + * Enable the open-drain mode of the KSO[17:0] pins. */ - inst->KBS_KSOCTRL = (IT8XXX2_KBS_KSOPU | IT8XXX2_KBS_KSOOD); - /* bit2, 1 enables the internal pull-up of the KSI[7:0] pins. */ - inst->KBS_KSICTRL = IT8XXX2_KBS_KSIPU; + status = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); + if (status < 0) { + LOG_ERR("Failed to configure KSI[7:0] and KSO[15:0] pins"); + return status; + } + #ifdef CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED /* KSO[2] output high, others output low. */ inst->KBS_KSOL = BIT(2); @@ -231,15 +264,21 @@ static const struct cros_kb_raw_driver_api cros_kb_raw_ite_driver_api = { .drive_colum = cros_kb_raw_ite_drive_column, .read_rows = cros_kb_raw_ite_read_row, .enable_interrupt = cros_kb_raw_ite_enable_interrupt, +#ifdef CONFIG_PLATFORM_EC_KEYBOARD_FACTORY_TEST + .config_alt = cros_kb_raw_ite_config_alt, +#endif }; static const struct cros_kb_raw_wuc_map_cfg cros_kb_raw_wuc_0[IT8XXX2_DT_INST_WUCCTRL_LEN(0)] = IT8XXX2_DT_WUC_ITEMS_LIST(0); +PINCTRL_DT_INST_DEFINE(0); + static const struct cros_kb_raw_ite_config cros_kb_raw_cfg = { .base = (struct kscan_it8xxx2_regs *)DT_INST_REG_ADDR(0), .irq = DT_INST_IRQN(0), .wuc_map_list = cros_kb_raw_wuc_0, + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0), }; static struct cros_kb_raw_ite_data cros_kb_raw_data; diff --git a/zephyr/drivers/cros_shi/Kconfig b/zephyr/drivers/cros_shi/Kconfig index 3b93ad48ee..8f9475ea6d 100644 --- a/zephyr/drivers/cros_shi/Kconfig +++ b/zephyr/drivers/cros_shi/Kconfig @@ -7,7 +7,7 @@ if PLATFORM_EC_HOST_INTERFACE_SHI config CROS_SHI_NPCX bool default y - depends on DT_HAS_NUVOTON_NPCX_CROS_SHI_ENABLED + depends on DT_HAS_NUVOTON_NPCX_SHI_ENABLED help This option enables Serial Host Interface driver for the NPCX family of processors. This is used for host-command communication on the @@ -41,7 +41,7 @@ endif # CROS_SHI_NPCX config CROS_SHI_IT8XXX2 bool default y - depends on DT_HAS_ITE_IT8XXX2_CROS_SHI_ENABLED + depends on DT_HAS_ITE_IT8XXX2_SHI_ENABLED help This option enables spi host interface driver which is required to communicate with the EC when the CPU is the ARM processor. diff --git a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c index 92c279037a..75d94f49d1 100644 --- a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c +++ b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c @@ -3,7 +3,7 @@ * found in the LICENSE file. */ -#define DT_DRV_COMPAT ite_it8xxx2_cros_shi +#define DT_DRV_COMPAT ite_it8xxx2_shi #include "chipset.h" #include "console.h" diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c index 8bddb7b85d..39485ecced 100644 --- a/zephyr/drivers/cros_shi/cros_shi_npcx.c +++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c @@ -3,7 +3,7 @@ * found in the LICENSE file. */ -#define DT_DRV_COMPAT nuvoton_npcx_cros_shi +#define DT_DRV_COMPAT nuvoton_npcx_shi #include "host_command.h" #include "soc_miwu.h" @@ -33,7 +33,7 @@ LOG_MODULE_REGISTER(cros_shi, LOG_LEVEL_DBG); -#define SHI_NODE DT_NODELABEL(shi) +#define SHI_NODE DT_NODELABEL(shi0) #define SHI_VER_CTRL_PH DT_PHANDLE_BY_IDX(SHI_NODE, ver_ctrl, 0) #define SHI_VER_CTRL_ALT_FILED(f) DT_PHA_BY_IDX(SHI_VER_CTRL_PH, alts, 0, f) @@ -175,13 +175,13 @@ struct cros_shi_npcx_data { /* Driver convenience defines */ #define DRV_CONFIG(dev) ((const struct cros_shi_npcx_config *)(dev)->config) #define DRV_DATA(dev) ((struct cros_shi_npcx_data *)(dev)->data) -#define HAL_INSTANCE(dev) (struct cros_shi_reg *)(DRV_CONFIG(dev)->base) +#define HAL_INSTANCE(dev) (struct shi_reg *)(DRV_CONFIG(dev)->base) /* Forward declaration */ -static void cros_shi_npcx_reset_prepare(struct cros_shi_reg *const inst); +static void cros_shi_npcx_reset_prepare(struct shi_reg *const inst); /* Read pointer of input or output buffer by consecutive reading */ -static uint32_t shi_read_buf_pointer(struct cros_shi_reg *const inst) +static uint32_t shi_read_buf_pointer(struct shi_reg *const inst) { uint8_t stat; @@ -197,7 +197,7 @@ static uint32_t shi_read_buf_pointer(struct cros_shi_reg *const inst) * Valid offset of SHI output buffer to write. * When SIMUL bit is set, IBUFPTR can be used instead of OBUFPTR */ -static uint32_t shi_valid_obuf_offset(struct cros_shi_reg *const inst) +static uint32_t shi_valid_obuf_offset(struct shi_reg *const inst) { return (shi_read_buf_pointer(inst) + SHI_OUT_PREAMBLE_LENGTH) % SHI_OBUF_FULL_SIZE; @@ -228,8 +228,7 @@ static void shi_write_half_outbuf(void) * This routine read SHI input buffer to msg buffer until * we have received a certain number of bytes */ -static int shi_read_inbuf_wait(struct cros_shi_reg *const inst, - uint32_t szbytes) +static int shi_read_inbuf_wait(struct shi_reg *const inst, uint32_t szbytes) { /* Copy data to msg buffer from input buffer */ for (uint32_t i = 0; i < szbytes; i++, shi_params.sz_received++) { @@ -250,7 +249,7 @@ static int shi_read_inbuf_wait(struct cros_shi_reg *const inst, } /* This routine fills out all SHI output buffer with status byte */ -static void shi_fill_out_status(struct cros_shi_reg *const inst, uint8_t status) +static void shi_fill_out_status(struct shi_reg *const inst, uint8_t status) { uint8_t start, end; volatile uint8_t *fill_ptr; @@ -288,7 +287,7 @@ static void shi_fill_out_status(struct cros_shi_reg *const inst, uint8_t status) } /* This routine handles shi received unexpected data */ -static void shi_bad_received_data(struct cros_shi_reg *const inst) +static void shi_bad_received_data(struct shi_reg *const inst) { /* State machine mismatch, timeout, or protocol we can't handle. */ shi_fill_out_status(inst, EC_SPI_RX_BAD_DATA); @@ -310,7 +309,7 @@ static void shi_bad_received_data(struct cros_shi_reg *const inst) * This routine write SHI output buffer from msg buffer over halt of it. * It make sure we have enough time to handle next operations. */ -static void shi_write_first_pkg_outbuf(struct cros_shi_reg *const inst, +static void shi_write_first_pkg_outbuf(struct shi_reg *const inst, uint16_t szbytes) { uint8_t size, offset; @@ -359,8 +358,7 @@ static void shi_write_first_pkg_outbuf(struct cros_shi_reg *const inst, */ static void shi_send_response_packet(struct host_packet *pkt) { - struct cros_shi_reg *const inst = - (struct cros_shi_reg *)(cros_shi_cfg.base); + struct shi_reg *const inst = (struct shi_reg *)(cros_shi_cfg.base); /* * Disable interrupts. This routine is not called from interrupt @@ -399,7 +397,7 @@ static void shi_send_response_packet(struct host_packet *pkt) __enable_irq(); } -void shi_handle_host_package(struct cros_shi_reg *const inst) +void shi_handle_host_package(struct shi_reg *const inst) { uint32_t sz_inbuf_int = shi_params.sz_request / SHI_IBUF_HALF_SIZE; uint32_t cnt_inbuf_int = shi_params.sz_received / SHI_IBUF_HALF_SIZE; @@ -441,7 +439,7 @@ void shi_handle_host_package(struct cros_shi_reg *const inst) host_packet_receive(&shi_packet); } -static void shi_parse_header(struct cros_shi_reg *const inst) +static void shi_parse_header(struct shi_reg *const inst) { /* We're now inside a transaction */ state = SHI_STATE_RECEIVING; @@ -484,7 +482,7 @@ static void shi_parse_header(struct cros_shi_reg *const inst) } } -static void shi_sec_ibf_int_enable(struct cros_shi_reg *const inst, int enable) +static void shi_sec_ibf_int_enable(struct shi_reg *const inst, int enable) { if (enable) { /* Setup IBUFLVL2 threshold and enable it */ @@ -531,7 +529,7 @@ static void log_unexpected_state(char *isr_name) last_error_state = state; } -static void shi_handle_cs_assert(struct cros_shi_reg *const inst) +static void shi_handle_cs_assert(struct shi_reg *const inst) { /* If not enabled, ignore glitches on SHI_CS_L */ if (state == SHI_STATE_DISABLED) @@ -560,7 +558,7 @@ static void shi_handle_cs_assert(struct cros_shi_reg *const inst) disable_sleep(SLEEP_MASK_SPI); } -static void shi_handle_cs_deassert(struct cros_shi_reg *const inst) +static void shi_handle_cs_deassert(struct shi_reg *const inst) { /* * If the buffer is still used by the host command. @@ -598,7 +596,7 @@ static void shi_handle_cs_deassert(struct cros_shi_reg *const inst) DEBUG_CPRINTF("END\n"); } -static void shi_handle_input_buf_half_full(struct cros_shi_reg *const inst) +static void shi_handle_input_buf_half_full(struct shi_reg *const inst) { if (state == SHI_STATE_RECEIVING) { /* Read data from input to msg buffer */ @@ -620,7 +618,7 @@ static void shi_handle_input_buf_half_full(struct cros_shi_reg *const inst) } } -static void shi_handle_input_buf_full(struct cros_shi_reg *const inst) +static void shi_handle_input_buf_full(struct shi_reg *const inst) { if (state == SHI_STATE_RECEIVING) { /* read data from input to msg buffer */ @@ -646,7 +644,7 @@ static void cros_shi_npcx_isr(const struct device *dev) { uint8_t stat; uint8_t stat2; - struct cros_shi_reg *const inst = HAL_INSTANCE(dev); + struct shi_reg *const inst = HAL_INSTANCE(dev); /* Read status register and clear interrupt status early */ stat = inst->EVSTAT; @@ -719,7 +717,7 @@ static void cros_shi_npcx_isr(const struct device *dev) } } -static void cros_shi_npcx_reset_prepare(struct cros_shi_reg *const inst) +static void cros_shi_npcx_reset_prepare(struct shi_reg *const inst) { uint32_t i; @@ -768,7 +766,7 @@ static int cros_shi_npcx_enable(const struct device *dev) { const struct cros_shi_npcx_config *const config = DRV_CONFIG(dev); const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); - struct cros_shi_reg *const inst = HAL_INSTANCE(dev); + struct shi_reg *const inst = HAL_INSTANCE(dev); int ret; ret = clock_control_on(clk_dev, @@ -833,7 +831,7 @@ static int shi_npcx_init(const struct device *dev) { int ret; const struct cros_shi_npcx_config *const config = DRV_CONFIG(dev); - struct cros_shi_reg *const inst = HAL_INSTANCE(dev); + struct shi_reg *const inst = HAL_INSTANCE(dev); const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); /* Turn on shi device clock first */ @@ -920,10 +918,10 @@ DEVICE_DT_INST_DEFINE(0, shi_npcx_init, /* pm_control_fn= */ NULL, &cros_shi_npcx_driver_api); /* KBS register structure check */ -NPCX_REG_SIZE_CHECK(cros_shi_reg, 0x120); -NPCX_REG_OFFSET_CHECK(cros_shi_reg, SHICFG1, 0x001); -NPCX_REG_OFFSET_CHECK(cros_shi_reg, EVENABLE, 0x005); -NPCX_REG_OFFSET_CHECK(cros_shi_reg, IBUFSTAT, 0x00a); -NPCX_REG_OFFSET_CHECK(cros_shi_reg, EVENABLE2, 0x010); -NPCX_REG_OFFSET_CHECK(cros_shi_reg, OBUF, 0x020); -NPCX_REG_OFFSET_CHECK(cros_shi_reg, IBUF, 0x0A0); +NPCX_REG_SIZE_CHECK(shi_reg, 0x120); +NPCX_REG_OFFSET_CHECK(shi_reg, SHICFG1, 0x001); +NPCX_REG_OFFSET_CHECK(shi_reg, EVENABLE, 0x005); +NPCX_REG_OFFSET_CHECK(shi_reg, IBUFSTAT, 0x00a); +NPCX_REG_OFFSET_CHECK(shi_reg, EVENABLE2, 0x010); +NPCX_REG_OFFSET_CHECK(shi_reg, OBUF, 0x020); +NPCX_REG_OFFSET_CHECK(shi_reg, IBUF, 0x0A0); diff --git a/zephyr/drivers/cros_system/CMakeLists.txt b/zephyr/drivers/cros_system/CMakeLists.txt index 79d320f9a1..526255c370 100644 --- a/zephyr/drivers/cros_system/CMakeLists.txt +++ b/zephyr/drivers/cros_system/CMakeLists.txt @@ -6,3 +6,4 @@ zephyr_library_sources_ifdef(CONFIG_CROS_SYSTEM_IT8XXX2 cros_system_it8xxx2.c) zephyr_library_sources_ifdef(CONFIG_CROS_SYSTEM_NPCX cros_system_npcx.c) zephyr_library_sources_ifdef(CONFIG_CROS_SYSTEM_XEC cros_system_xec.c) zephyr_library_sources_ifdef(CONFIG_CROS_SYSTEM_NATIVE_POSIX cros_system_native_posix.c) +zephyr_library_sources_ifdef(CONFIG_CROS_SYSTEM_STM32 cros_system_stm32.c) diff --git a/zephyr/drivers/cros_system/Kconfig b/zephyr/drivers/cros_system/Kconfig index 79e1499b2c..254e870179 100644 --- a/zephyr/drivers/cros_system/Kconfig +++ b/zephyr/drivers/cros_system/Kconfig @@ -92,3 +92,26 @@ config CROS_SYSTEM_NATIVE_POSIX_INIT_PRIORITY than CONFIG_SYSTEM_PRE_INIT_PRIORITY. endif # CROS_SYSTEM_NATIVE_POSIX + +menuconfig CROS_SYSTEM_STM32 + bool "ST STM32 cros system driver" + depends on SOC_FAMILY_STM32 && IWDG_STM32 && HWINFO + select REBOOT + default y + help + This option enables the cros system driver for the STM32 family of + processors. The cros system driver provides the low-level driver + related to chromium ec system functionality. + +if CROS_SYSTEM_STM32 + +config CROS_SYSTEM_STM32_INIT_PRIORITY + int "cros_system STM32 initialization priority" + default 10 + help + This sets the STM32 cros_system driver initialization priority. + The cros_system driver provides access to the STM32 reset cause + and must be higher priority than + CONFIG_PLATFORM_EC_SYSTEM_PRE_INIT_PRIORITY. + +endif # CONFIG_CROS_SYSTEM_STM32 diff --git a/zephyr/drivers/cros_system/cros_system_stm32.c b/zephyr/drivers/cros_system/cros_system_stm32.c new file mode 100644 index 0000000000..bc42909666 --- /dev/null +++ b/zephyr/drivers/cros_system/cros_system_stm32.c @@ -0,0 +1,150 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define DT_DRV_COMPAT st_stm32_rcc + +#include "drivers/cros_system.h" +#include "system.h" + +#include <zephyr/device.h> +#include <zephyr/drivers/hwinfo.h> +#include <zephyr/drivers/watchdog.h> +#include <zephyr/sys/reboot.h> + +/* Driver data */ +struct cros_system_stm32_data { + int reset; /* reset cause */ +}; + +#define DRV_DATA(dev) ((struct cros_system_stm32_data *)(dev)->data) + +static const struct device *const watchdog = + DEVICE_DT_GET(DT_CHOSEN(cros_ec_watchdog)); + +static const char *cros_system_stm32_get_chip_vendor(const struct device *dev) +{ + ARG_UNUSED(dev); + + return "st"; +} + +static const char *cros_system_stm32_get_chip_name(const struct device *dev) +{ + ARG_UNUSED(dev); + + return CONFIG_SOC; +} + +static const char *cros_system_stm32_get_chip_revision(const struct device *dev) +{ + ARG_UNUSED(dev); + + return ""; +} + +static int cros_system_stm32_get_reset_cause(const struct device *dev) +{ + struct cros_system_stm32_data *data = DRV_DATA(dev); + + return data->reset; +} + +static int cros_system_stm32_soc_reset(const struct device *dev) +{ + ARG_UNUSED(dev); + + uint32_t chip_reset_flags = chip_read_reset_flags(); + + /* + * We are going to reboot MCU here, so we need to disable caches here. + * SCB_DisableDCache also flushes data cache lines. + */ +#ifdef CONFIG_DCACHE + SCB_DisableDCache(); +#endif + +#ifdef CONFIG_ICACHE + SCB_DisableICache(); +#endif + + if (chip_reset_flags & EC_RESET_FLAG_HARD) { + /* + * Set minimal watchdog timeout - 1 millisecond. + * STM32 IWDG can be set for lower value, but we are limited by + * Zephyr API. + */ + struct wdt_timeout_cfg minimal_timeout = { .window.max = 1 }; + + /* Setup watchdog */ + wdt_install_timeout(watchdog, &minimal_timeout); + + /* Apply the changes (the driver will reload watchdog) */ + wdt_setup(watchdog, 0); + + /* Spin and wait for reboot */ + while (1) + ; + } else { + /* Reset implementation for ARM ignores the reset type */ + sys_reboot(0); + } + + /* Should never return */ + return 0; +} + +static uint64_t cros_system_stm32_deep_sleep_ticks(const struct device *dev) +{ + /* Deep sleep is not supported for now */ + return 0; +} + +static int cros_system_stm32_init(const struct device *dev) +{ + struct cros_system_stm32_data *data = DRV_DATA(dev); + uint32_t reset_cause; + + data->reset = UNKNOWN_RST; + hwinfo_get_reset_cause(&reset_cause); + + /* Clear the hardware reset cause. */ + hwinfo_clear_reset_cause(); + + if (reset_cause & RESET_WATCHDOG) { + data->reset = WATCHDOG_RST; + } else if (reset_cause & RESET_SOFTWARE) { + /* Use DEBUG_RST because it maps to EC_RESET_FLAG_SOFT. */ + data->reset = DEBUG_RST; + } else if (reset_cause & RESET_POR) { + data->reset = POWERUP; + } else if (reset_cause & RESET_PIN) { + data->reset = VCC1_RST_PIN; + } + + return 0; +} + +static struct cros_system_stm32_data cros_system_stm32_dev_data; + +static const struct cros_system_driver_api cros_system_driver_stm32_api = { + .get_reset_cause = cros_system_stm32_get_reset_cause, + .soc_reset = cros_system_stm32_soc_reset, + .chip_vendor = cros_system_stm32_get_chip_vendor, + .chip_name = cros_system_stm32_get_chip_name, + .chip_revision = cros_system_stm32_get_chip_revision, +#ifdef CONFIG_PM + .deep_sleep_ticks = cros_system_stm32_deep_sleep_ticks, +#endif +}; + +DEVICE_DEFINE(cros_system_stm32_0, "CROS_SYSTEM", cros_system_stm32_init, NULL, + &cros_system_stm32_dev_data, NULL, PRE_KERNEL_1, + CONFIG_CROS_SYSTEM_STM32_INIT_PRIORITY, + &cros_system_driver_stm32_api); + +#if CONFIG_CROS_SYSTEM_STM32_INIT_PRIORITY >= \ + CONFIG_PLATFORM_EC_SYSTEM_PRE_INIT_PRIORITY +#error "CROS_SYSTEM must initialize before the SYSTEM_PRE initialization" +#endif diff --git a/zephyr/dts/bindings/battery/battery-smart.yaml b/zephyr/dts/bindings/battery/battery-smart.yaml index 60c7360460..74deb224b2 100644 --- a/zephyr/dts/bindings/battery/battery-smart.yaml +++ b/zephyr/dts/bindings/battery/battery-smart.yaml @@ -13,6 +13,7 @@ properties: enum: - "aec,5477109" - "atl,cfd72" + - "bms-gf,cr50" - "byd,l22b3pg0" - "byd,wv3k8" - "cdt,c340152" @@ -54,6 +55,7 @@ properties: - "smp,l20m3pg0" - "smp,l20m3pg1" - "smp,l20m3pg2" + - "smp,l21m4pg0" - "smp,l22m3pg0" - "smp,l22m3pg1" - "smp,pc-vp-bp153" diff --git a/zephyr/dts/bindings/battery/bms-gf,cr50.yaml b/zephyr/dts/bindings/battery/bms-gf,cr50.yaml new file mode 100644 index 0000000000..cd5cc8c05a --- /dev/null +++ b/zephyr/dts/bindings/battery/bms-gf,cr50.yaml @@ -0,0 +1,53 @@ +description: "BMS-GF CR50" +compatible: "bms-gf,cr50" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "bms-gf,cr50" + + # Fuel gauge + manuf_name: + default: "BMS-GF" + device_name: + default: "CR50" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [0x0010, 0x0010] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x43 + fet_reg_mask: + default: 0x0001 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0002 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17600 + voltage_normal: + default: 15000 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 diff --git a/zephyr/dts/bindings/battery/smp,l21m4pg0.yaml b/zephyr/dts/bindings/battery/smp,l21m4pg0.yaml new file mode 100644 index 0000000000..6f3f093fa8 --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,l21m4pg0.yaml @@ -0,0 +1,53 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SMP L21M4PG0" +compatible: "smp,l21m4pg0" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,l21m4pg0" + + # Fuel gauge + manuf_name: + default: "SMP" + device_name: + default: "L21M4PG0" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [0x0000, 0x1000] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x34 + fet_reg_mask: + default: 0x0100 + fet_disconnect_val: + default: 0x0100 + + # Battery info + voltage_max: + default: 8900 + voltage_normal: + default: 7720 + voltage_min: + default: 6000 + precharge_current: + default: 274 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 diff --git a/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml b/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml index 2b50f09474..134a036dbd 100644 --- a/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml +++ b/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml @@ -5,7 +5,7 @@ description: ITE, it8xxx2-cros-kb-raw node compatible: "ite,it8xxx2-cros-kb-raw" -include: base.yaml +include: [base.yaml, pinctrl-device.yaml] properties: reg: @@ -22,3 +22,9 @@ properties: EC or not. Via this controller, we set the wakeup trigger edge, enable, disable, and clear wakeup status for the specific pin which may be gpio pins or alternate pins. + + pinctrl-0: + required: true + + pinctrl-names: + required: true diff --git a/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml b/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml new file mode 100644 index 0000000000..9c782d13d3 --- /dev/null +++ b/zephyr/dts/bindings/cros_pwr_signal/mediatek,mt8188-power-signal-list.yaml @@ -0,0 +1,21 @@ +# Copyright 2023 Google LLC +# SPDX-License-Identifier: Apache-2.0 + +description: MediaTek MT8188, Power Signal List +compatible: "mediatek,mt8188-power-signal-list" + +include: power-signal-list.yaml + +properties: + power-signals-required: + default: 5 + +child-binding: + properties: + power-enum-name: + enum: + - AP_IN_RST + - AP_IN_S3 + - AP_WDT_ASSERTED + - AP_WARM_RST_REQ + - PG_PP4200_S5 diff --git a/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml deleted file mode 100644 index 6ac4c501f9..0000000000 --- a/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml +++ /dev/null @@ -1,19 +0,0 @@ -# Copyright 2021 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: ITE, IT8XXX2 Serial Host Interface (SHI) node - -compatible: "ite,it8xxx2-cros-shi" - -include: [base.yaml, pinctrl-device.yaml] - -properties: - reg: - required: true - - pinctrl-0: - required: true - - pinctrl-names: - required: true diff --git a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml deleted file mode 100644 index af7f98f9bb..0000000000 --- a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml +++ /dev/null @@ -1,35 +0,0 @@ -# Copyright 2021 Google LLC -# SPDX-License-Identifier: Apache-2.0 - -description: Nuvoton, NPCX Serial Host Interface (SHI) node - -compatible: "nuvoton,npcx-cros-shi" - -include: [base.yaml, pinctrl-device.yaml] - -properties: - reg: - description: mmio register space - required: true - - clocks: - required: true - description: configurations of device source clock controller - - pinctrl-0: - required: true - - pinctrl-1: - required: false - - pinctrl-names: - required: true - - shi-cs-wui: - type: phandle - required: true - description: | - Mapping table between Wake-Up Input (WUI) and SHI_CS signal. - - For example the WUI mapping on NPCX7 would be - shi-cs-wui = <&wui_io53>; diff --git a/zephyr/dts/bindings/emul/tcpci.yaml b/zephyr/dts/bindings/emul/tcpci.yaml index 899a6ebea4..2a10209fdd 100644 --- a/zephyr/dts/bindings/emul/tcpci.yaml +++ b/zephyr/dts/bindings/emul/tcpci.yaml @@ -7,8 +7,14 @@ description: Common TCPCI properties include: base.yaml properties: - alert_gpio: - type: phandle + irq-gpios: + type: phandle-array required: false - description: - Reference to Alert# GPIO. + description: | + Interrupt from TCPC using shim driver + + int-pin: + type: phandles + required: false + description: | + Interrupt from TCPC using gpio-int diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index 5041b0646a..74b40f2acc 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -72,6 +72,7 @@ properties: - GPIO_PG_EC_ALL_SYS_PWRGD - GPIO_PG_EC_DSW_PWROK - GPIO_PG_EC_RSMRST_ODL + - GPIO_PG_PP4200_S5_OD - GPIO_PMIC_EC_PWRGD - GPIO_PMIC_KPD_PWR_ODL - GPIO_PMIC_RESIN_L diff --git a/zephyr/dts/bindings/power/ap-pwrseq-sub-states.yaml b/zephyr/dts/bindings/power/ap-pwrseq-sub-states.yaml new file mode 100644 index 0000000000..8632b7e7b5 --- /dev/null +++ b/zephyr/dts/bindings/power/ap-pwrseq-sub-states.yaml @@ -0,0 +1,21 @@ +# Copyright 2022 Intel Corporation +# SPDX-License-Identifier: Apache-2.0 + +description: | + Define additional substates to be included in state machine. Use corresponding + macros to provide action handlers. +compatible: "ap-pwrseq-sub-states" + +properties: + chipset: + type: string-array + required: false + description: | + User defined power subtstates, use AP_POWER_CHIPSET_SUB_STATE_DEFINE, to define + substate action handler functions. + application: + type: string-array + required: false + description: | + User defined power subtstates, use AP_POWER_APP_SUB_STATE_DEFINE, to define + substate action handler functions. diff --git a/zephyr/dts/bindings/usbc/tcpc/analogix,anx7447-tcpc.yaml b/zephyr/dts/bindings/usbc/tcpc/analogix,anx7447-tcpc.yaml index 645ce7303b..ba25ccd683 100644 --- a/zephyr/dts/bindings/usbc/tcpc/analogix,anx7447-tcpc.yaml +++ b/zephyr/dts/bindings/usbc/tcpc/analogix,anx7447-tcpc.yaml @@ -10,7 +10,8 @@ properties: default: 0 description: | TCPC configuration flags - int-pin: - type: phandle + irq-gpios: + type: phandle-array required: false - description: Interrupt from TCPC + description: | + Interrupt from TCPC diff --git a/zephyr/dts/bindings/usbc/tcpc/cypress,ccgxxf.yaml b/zephyr/dts/bindings/usbc/tcpc/cypress,ccgxxf.yaml index 3e06ed38b6..89f1f78b63 100644 --- a/zephyr/dts/bindings/usbc/tcpc/cypress,ccgxxf.yaml +++ b/zephyr/dts/bindings/usbc/tcpc/cypress,ccgxxf.yaml @@ -14,7 +14,16 @@ properties: default: 0 description: | TCPC configuration flags + irq-gpios: + type: phandle-array + required: false + description: | + Interrupt from TCPC using shim driver int-pin: - type: phandle + type: phandles required: false - description: Interrupt from TCPC + deprecated: true + description: | + Interrupt from TCPC using gpio-int. This property should only be used when + CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n and should be removed when the chip + uses the common TCPC driver. diff --git a/zephyr/dts/bindings/usbc/tcpc/fairchild,fusb302.yaml b/zephyr/dts/bindings/usbc/tcpc/fairchild,fusb302.yaml index 79b0df470e..c3f353cbf2 100644 --- a/zephyr/dts/bindings/usbc/tcpc/fairchild,fusb302.yaml +++ b/zephyr/dts/bindings/usbc/tcpc/fairchild,fusb302.yaml @@ -10,7 +10,16 @@ properties: default: 0 description: | TCPC configuration flags + irq-gpios: + type: phandle-array + required: false + description: | + Interrupt from TCPC using shim driver int-pin: - type: phandle + type: phandles required: false - description: Interrupt from TCPC + deprecated: true + description: | + Interrupt from TCPC using gpio-int. This property should only be used when + CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n and should be removed when the chip + uses the common TCPC driver. diff --git a/zephyr/dts/bindings/usbc/tcpc/nuvoton,nct38xx.yaml b/zephyr/dts/bindings/usbc/tcpc/nuvoton,nct38xx.yaml index 78e1fbf7da..cfbe5a748f 100644 --- a/zephyr/dts/bindings/usbc/tcpc/nuvoton,nct38xx.yaml +++ b/zephyr/dts/bindings/usbc/tcpc/nuvoton,nct38xx.yaml @@ -21,7 +21,17 @@ properties: description: | TCPC configuration flags + irq-gpios: + type: phandle-array + required: false + description: | + Interrupt from TCPC using shim driver + int-pin: - type: phandle + type: phandles required: false - description: Interrupt from TCPC + deprecated: true + description: | + Interrupt from TCPC using gpio-int. This property should only be used when + CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n and should be removed when the chip + uses the common TCPC driver. diff --git a/zephyr/dts/bindings/usbc/tcpc/parade,ps8xxx.yaml b/zephyr/dts/bindings/usbc/tcpc/parade,ps8xxx.yaml index f77d4a0c28..e6c2a9bbcb 100644 --- a/zephyr/dts/bindings/usbc/tcpc/parade,ps8xxx.yaml +++ b/zephyr/dts/bindings/usbc/tcpc/parade,ps8xxx.yaml @@ -10,7 +10,8 @@ properties: default: 0 description: | TCPC configuration flags - int-pin: - type: phandle + irq-gpios: + type: phandle-array required: false - description: Interrupt from TCPC + description: | + Interrupt from TCPC diff --git a/zephyr/dts/bindings/usbc/tcpc/renesas,raa489000.yaml b/zephyr/dts/bindings/usbc/tcpc/renesas,raa489000.yaml index f8dd9807ed..de6402d4ee 100644 --- a/zephyr/dts/bindings/usbc/tcpc/renesas,raa489000.yaml +++ b/zephyr/dts/bindings/usbc/tcpc/renesas,raa489000.yaml @@ -14,3 +14,8 @@ properties: default: 0 description: | TCPC configuration flags + irq-gpios: + type: phandle-array + required: false + description: | + Interrupt from TCPC diff --git a/zephyr/dts/bindings/usbc/tcpc/richtek,rt1718s-tcpc.yaml b/zephyr/dts/bindings/usbc/tcpc/richtek,rt1718s-tcpc.yaml index 0fed6b6380..8baa3ee550 100644 --- a/zephyr/dts/bindings/usbc/tcpc/richtek,rt1718s-tcpc.yaml +++ b/zephyr/dts/bindings/usbc/tcpc/richtek,rt1718s-tcpc.yaml @@ -14,7 +14,8 @@ properties: default: 0 description: | TCPC configuration flags - int-pin: - type: phandle + irq-gpios: + type: phandle-array required: false - description: Interrupt from TCPC + description: | + Interrupt from TCPC diff --git a/zephyr/dts/bindings/vendor-prefixes.txt b/zephyr/dts/bindings/vendor-prefixes.txt index 53dd2d4cfc..c04ca3b546 100644 --- a/zephyr/dts/bindings/vendor-prefixes.txt +++ b/zephyr/dts/bindings/vendor-prefixes.txt @@ -19,4 +19,5 @@ celxpert Battery vendor sunwoda Battery vendor cosmx Battery vendor dynapack Battery vendor -atl Battery vendor
\ No newline at end of file +atl Battery vendor +bms-gf Battery vendor
\ No newline at end of file diff --git a/zephyr/emul/emul_isl923x.c b/zephyr/emul/emul_isl923x.c index 42401b94f9..92bff73656 100644 --- a/zephyr/emul/emul_isl923x.c +++ b/zephyr/emul/emul_isl923x.c @@ -200,6 +200,17 @@ void raa489000_emul_set_acok_pin(const struct emul *emulator, uint16_t value) data->info_2_reg &= ~RAA489000_INFO2_ACOK; } +void raa489000_emul_set_state_machine_state(const struct emul *emulator, + uint16_t value) +{ + struct isl923x_emul_data *data = emulator->data; + + data->info_2_reg &= + ~(RAA489000_INFO2_STATE_MASK << RAA489000_INFO2_STATE_SHIFT); + data->info_2_reg |= (value & RAA489000_INFO2_STATE_MASK) + << RAA489000_INFO2_STATE_SHIFT; +} + /** Convenience macro for reading 16-bit registers */ #define READ_REG_16(REG, BYTES, OUT) \ do { \ diff --git a/zephyr/emul/tcpc/emul_tcpci.c b/zephyr/emul/tcpc/emul_tcpci.c index e5dcf78bdc..0deb0c2727 100644 --- a/zephyr/emul/tcpc/emul_tcpci.c +++ b/zephyr/emul/tcpc/emul_tcpci.c @@ -221,11 +221,10 @@ static int tcpci_emul_alert_changed(const struct emul *emul) bool alert_is_active = tcpci_emul_check_int(ctx); /** Trigger GPIO. */ - if (ctx->alert_gpio_port != NULL) { + if (ctx->irq_gpio.port != NULL) { /* Triggers on edge falling, so set to 0 when there is an alert. */ - rc = gpio_emul_input_set(ctx->alert_gpio_port, - ctx->alert_gpio_pin, + rc = gpio_emul_input_set(ctx->irq_gpio.port, ctx->irq_gpio.pin, alert_is_active ? 0 : 1); if (rc != 0) return rc; diff --git a/zephyr/firmware_builder.py b/zephyr/firmware_builder.py index aa470ea583..d481487afa 100755 --- a/zephyr/firmware_builder.py +++ b/zephyr/firmware_builder.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python3 +#!/usr/bin/env python3.8 # -*- coding: utf-8 -*- # Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be @@ -16,15 +16,25 @@ import shlex import subprocess import sys +from google.protobuf import json_format # pylint: disable=import-error import zmake.project + from chromite.api.gen_sdk.chromite.api import firmware_pb2 -from google.protobuf import json_format # pylint: disable=import-error + DEFAULT_BUNDLE_DIRECTORY = "/tmp/artifact_bundles" DEFAULT_BUNDLE_METADATA_FILE = "/tmp/artifact_bundle_metadata" # Boards that we want to track the coverage of our own files specifically. -SPECIAL_BOARDS = ["herobrine", "krabby", "nivviks", "skyrim", "kingler", "rex"] +SPECIAL_BOARDS = [ + "herobrine", + "krabby", + "nivviks", + "skyrim", + "kingler", + "rex", + "geralt", +] BINARY_SIZE_REGIONS = [ "RO_FLASH", diff --git a/zephyr/include/ap_power/ap_pwrseq.h b/zephyr/include/ap_power/ap_pwrseq.h index 9e1ffd27e8..86c5f051e6 100644 --- a/zephyr/include/ap_power/ap_pwrseq.h +++ b/zephyr/include/ap_power/ap_pwrseq.h @@ -3,11 +3,202 @@ * found in the LICENSE file. */ -#ifndef __AP_POWER_AP_PWRSEQ_H__ -#define __AP_POWER_AP_PWRSEQ_H__ +#ifndef _AP_PWRSEQ_H_ +#define _AP_PWRSEQ_H_ +#include <zephyr/device.h> +#include <zephyr/kernel.h> /** Starts the AP power sequence thread */ void ap_pwrseq_task_start(void); void ap_pwrseq_wake(void); -#endif /* __AP_POWER_AP_PWRSEQ_H__ */ + +#ifdef __cplusplus +extern "C" { +#endif + +#define AP_POWER_SUB_STATE_ENUM_DEF_WITH_COMMA(node_id, prop, idx) \ + DT_CAT6(node_id, _P_, prop, _IDX_, idx, _STRING_UPPER_TOKEN), + +#define AP_PWRSEQ_EACH_SUB_STATE_ENUM_DEF(node_id) \ + COND_CODE_1( \ + DT_NODE_HAS_PROP(node_id, chipset), \ + (DT_FOREACH_PROP_ELEM(node_id, chipset, \ + AP_POWER_SUB_STATE_ENUM_DEF_WITH_COMMA)), \ + (COND_CODE_1(DT_NODE_HAS_PROP(node_id, application), \ + (DT_FOREACH_PROP_ELEM( \ + node_id, application, \ + AP_POWER_SUB_STATE_ENUM_DEF_WITH_COMMA)), \ + ()))) + +/** @brief AP power sequence valid power states. */ +enum ap_pwrseq_state { + AP_POWER_STATE_UNINIT, /* EC and AP are Uninitialized */ + AP_POWER_STATE_G3, /* AP is OFF */ + AP_POWER_STATE_S5, /* AP is on soft off state */ + AP_POWER_STATE_S4, /* AP is suspended to Non-volatile disk */ + AP_POWER_STATE_S3, /* AP is suspended to RAM */ + AP_POWER_STATE_S2, /* AP is low wake-latency sleep */ + AP_POWER_STATE_S1, /* AP is in suspend state */ + AP_POWER_STATE_S0, /* AP is in active state */ + DT_FOREACH_STATUS_OKAY(ap_pwrseq_sub_states, + AP_PWRSEQ_EACH_SUB_STATE_ENUM_DEF) + AP_POWER_STATE_COUNT, + AP_POWER_STATE_UNDEF = 0xFFFE, + AP_POWER_STATE_ERROR = 0xFFFF, +}; + +/** @brief AP power sequence events. */ +enum ap_pwrseq_event { + AP_PWRSEQ_EVENT_POWER_STARTUP, + AP_PWRSEQ_EVENT_POWER_SIGNAL, + AP_PWRSEQ_EVENT_POWER_TIMEOUT, + AP_PWRSEQ_EVENT_POWER_SHUTDOWN, + AP_PWRSEQ_EVENT_HOST, + AP_PWRSEQ_EVENT_COUNT, +}; + +/** @brief The signature for callback notification from AP power seqeuce driver. + * + * This function will be invoked by AP power sequence driver as configured by + * functions `ap_pwrseq_register_state_entry_callback` or + * `ap_pwrseq_register_state_entry_callback` for power state transitions. + * + * @param dev Pointer of AP power sequence device driver. + * + * @param entry Entering state in transition. + * + * @param exit Exiting state in transition. + * + * @retval None. + */ +typedef void (*ap_pwrseq_callback)(const struct device *dev, + enum ap_pwrseq_state entry, + enum ap_pwrseq_state exit); + +struct ap_pwrseq_state_callback { + /* Node used to link notifications. This is for internal use only */ + sys_snode_t node; + /** + * Callback function, this will be invoked when AP power sequence + * enters or exits states selected by `states_bit_mask`. + **/ + ap_pwrseq_callback cb; + /* Bitfield of states to invoke callback */ + uint32_t states_bit_mask; +}; + +/** + * @brief Get AP power sequence device driver pointer. + * + * @param None. + * + * @retval AP power sequence device driver pointer. + **/ +const struct device *ap_pwrseq_get_instance(void); + +/** + * @brief Starts AP power sequence driver thread execution. + * + * @param dev Pointer of AP power sequence device driver. + * + * @param init_state state that will be executed when staring. + * + * @retval SUCCESS Driver starts execution. + * @retval -EINVAL State provided is invalid. + * @retval -EPERM Driver is already started. + **/ +int ap_pwrseq_start(const struct device *dev, enum ap_pwrseq_state init_state); + +/** + * @brief Post event for AP power sequence driver. + * + * State machine is executed within AP power sequence thread, this thread goes + * to sleep when state machine is idle and state transition is completed. + * Events are posted to wake up AP power sequence thread and made available to + * state machine only for the following iteration. + * + * @param dev Pointer of AP power sequence device driver. + * + * @param event Event posted to AP power seuqence driver. + * + * @retval None. + **/ +void ap_pwrseq_post_event(const struct device *dev, enum ap_pwrseq_event event); + +/** + * @brief Get enumeration value of current state of AP power sequence driver. + * + * @param dev Pointer of AP power sequence device driver. + * + * @retval Valid state enumeration value. + * @retval AP_POWER_STATE_UNDEF if error. + **/ +enum ap_pwrseq_state ap_pwrseq_get_current_state(const struct device *dev); + +/** + * @brief Get null terminated string of selected state. + * + * @param state AP power sequence valid state. + * + * @retval String showing selected state name. + * @retval NULL if state is invalid. + **/ +const char *const ap_pwrseq_get_state_str(enum ap_pwrseq_state state); + +/** + * @brief Lock current AP power sequence state. + * + * Once state machine is locked, it will not change its state until unlocked. + * + * @param dev Pointer of AP power sequence device driver. + * + * @retval SUCCESS Driver has been successfully locked, non-zero otherwise. + **/ +int ap_pwrseq_state_lock(const struct device *dev); + +/** + * @brief Unlock AP power sequence state. + * + * @param dev Pointer of AP power sequence device driver. + * + * @retval SUCCESS Driver has been successfully unlocked, non-zero otherwise. + **/ +int ap_pwrseq_state_unlock(const struct device *dev); + +/** + * @brief Register callback into AP power sequence driver. + * + * Callback function will be called by AP power sequence driver when entering + * into selected states. + * + * @param dev Pointer of AP power sequence device driver. + * + * @param state_cb Pointer of `ap_pwrseq_state_callback` structure. + * + * @retval SUCCESS Callback was successfully registered. + * @retval -EINVAL On error. + **/ +int ap_pwrseq_register_state_entry_callback( + const struct device *dev, struct ap_pwrseq_state_callback *state_cb); + +/** + * @brief Register callback into AP power sequence driver. + * + * Callback function will be called by AP power sequence driver when exiting + * from selected states. + * + * @param dev Pointer of AP power sequence device driver. + * + * @param state_cb Pointer of `ap_pwrseq_state_callback` structure. + * + * @retval SUCCESS Callback was successfully registered. + * @retval -EINVAL On error. + **/ +int ap_pwrseq_register_state_exit_callback( + const struct device *dev, struct ap_pwrseq_state_callback *state_cb); + +#ifdef __cplusplus +} +#endif +#endif /* _AP_PWRSEQ_H_ */ diff --git a/zephyr/include/ap_power/ap_pwrseq_sm.h b/zephyr/include/ap_power/ap_pwrseq_sm.h new file mode 100644 index 0000000000..e1558ccd6f --- /dev/null +++ b/zephyr/include/ap_power/ap_pwrseq_sm.h @@ -0,0 +1,390 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef _AP_PWRSEQ_SM_H_ +#define _AP_PWRSEQ_SM_H_ +#include "ap_power/ap_pwrseq_sm_defs.h" + +/** + * AP power sequence state machine API + * ----------------------------------- + * + * State machine is integrated into the AP power sequence driver by wrapping + * Zephyr State Machine Framework (SMF), each SMF state is represented by three + * functions or action handlers that define operations performed on state entry, + * run and exit. + * + * ACPI’s global state (G3) and its six sleep power states (S0, S1, S2, S3, S4, + * S5) are present within this state machine domain. All these ACPI states are + * are divided in three levels, each level is a SMF state with a hierarchical + * relation with others action handlers of the same ACPI state, state handlers + * at higher levels performes the most common task of corresponding ACPI power + * states. + * + * Architecture is the highest level of the hierarchy, SMF states this level + * must do operations that are specific to AP CPU architecture, example: + * X86 (intel), ARM. + * + * Middle level is the chipset; these SMF action handlers carry out operations + * to drive power of components that are required for the AP chip. Any bus + * signal or internal power rail that is vital for chip execution is a good fit + * to be handled in these action handlers. Examples of chipsets are: Tiger Lake + * and Jasper Lake, these are Intel chipsets that use X86 architecture, and + * MT8186 and MT8192 are Mediatek chipsets using ARM architecture. + * + * Application is the bottom level of the hierarchy and these SMF action + * handlers are reserved to address board or application specific computations. + * + * Hierarchical SMF will coordinate execution of entry, run & exit functions + * accordingly. Given that implementation is responsible for doing state + * transitions, the following considerations should be taken when implementing + * action state handlers: + * + * - Higher level `entry` actions are executed before the lower level `entry` + * actions. + * - Transitioning from one substate to another with a shared upper level state + * does not re-execute the upper level `entry` action or execute the `exit` + * action. + * - Upper level `exit` actions are executed after the substate `exit` actions. + * - Lower level `run` actions are executed before upper level. + * - Upper level `run` actions only executes if no state transition has been + * made from lower level `run` action. + * + * Please refer to Zephyr SMF documentation. + * + * This file exports macros that help to provide action handlers implementation + * for all states, and any substate that is declared in devicetree. It also + * declares functions to do power state transitions. + * + * Macros AP_POWER_ACRH_STATE_DEFINE, AP_POWER_CHIPSET_STATE_DEFINE and + * AP_POWER_APP_STATE_DEFINE statically declare action handlers for each power + * state. + * + * State Machine Workflow + * ---------------------- + * + * State machine execution is done within AP power sequence driver thread + * context. Driver sets initial state upon initialization. + * + * On each driver thread loop ieration, current state `run` action handler is + * called following hierarchical order as set in zephyr SMF. + * + * State machine implements Ultimate Hook pattern, this allows upper level + * action handlers to finalize hierarchical execution flow by setting its + * returning value to anything different than zero. + * + * `ap_pwrseq_sm_set_state` must be used to do state transition, this will + * execute current state `exit` action handlers followed by next state `entry` + * action handlers, completing state transtion on next thread loop iteration + * when new state `run` action is called. + * + * State transitions are only permited to be done by implementation within + * corresponding AP power sequence driver context, and only one state transition + * is allowed per driver thread loop iteration. + * + * Example of wrong use of `ap_pwrseq_sm_set_state`: + * + * @code{.c} + * int arch_s0_run(void *data) + * { + * // Transition started `entry` and `exit` functions called + * ap_pwrseq_sm_set_state(data, AP_POWER_STATE_S5); + * ... + * // Nothing happens `ap_pwrseq_sm_set_state` returns -EINVAL. + * ap_pwrseq_sm_set_state(data, AP_POWER_STATE_G3); + * } + * @endcode + * + * Example of correct use of `ap_pwrseq_sm_set_state`: + * + * @code{.c} + * int arch_s0_run(void *data) + * { + * if (...) { + * return ap_pwrseq_sm_set_state(data, AP_POWER_STATE_S5); + * } else if (...) { + * return ap_pwrseq_sm_set_state(data, AP_POWER_STATE_G3); + * } + * return 0; + * } + * @endcod + * + * For this same reason, `ap_pwrseq_sm_set_state` should not be called within + * `entry` or `exit` action handler. + */ + +/* + * This is required to ensure macro AP_POWER_SM_DEF_STATE_HANDLER handles + * passing `NULL` properly. + */ +#ifdef NULL +#undef NULL +#define NULL 0 +#else +#define NULL 0 +#endif + +/* User define action handler, each action handler must follow this type. */ +typedef int (*ap_pwr_state_action_handler)(void *data); + +#define AP_POWER_SM_HANDLER_DECL(action) \ + void ap_pwrseq_sm_exec_##action##_handler( \ + void *const data, ap_pwr_state_action_handler handler) + +AP_POWER_SM_HANDLER_DECL(entry); +AP_POWER_SM_HANDLER_DECL(run); +AP_POWER_SM_HANDLER_DECL(exit); + +/** + * @brief Macro to define action handler wrapper function. + * + * @param name Valid enumaration value of state. + * + * @param level One of the three AP power sequence levels: arch, chipset or app. + * + * @param action One of the three SMF action handlers: entry, run or exit. + * + * @param handler Action handler function of type `ap_pwr_state_action_handler`. + * + * @retval Defines static wrapper function of handler to be called by AP power + * sequence state machine. + **/ +#define AP_POWER_SM_DEF_STATE_HANDLER(name, level, action, handler) \ + static void ap_pwr_##name##_##level##_##action##_##handler(void *data) \ + { \ + ap_pwrseq_sm_exec_##action##_handler(data, handler); \ + } + +/** + * @brief Macro to define action handler wrapper function for a single level. + * + * @param name Valid enumaration value of state. + * + * @param level One of the three AP power sequence levels: arch, chipset or app. + * + * @param _entry Function called when entering into this state. + * + * @param _run Action handler function called when run operation is invoked. + * + * @param _exit Function called when exiting this state. + * + * @param handler Action handler function of type `ap_pwr_state_action_handler`. + * + * @retval Defines static wrapper function of handler to be called by AP power + * sequence state machine. + **/ +#define AP_POWER_SM_DEF_STATE_HANDLERS(name, level, _entry, _run, _exit) \ + AP_POWER_SM_DEF_STATE_HANDLER(name, level, entry, _entry) \ + AP_POWER_SM_DEF_STATE_HANDLER(name, level, run, _run) \ + AP_POWER_SM_DEF_STATE_HANDLER(name, level, exit, _exit) + +/** + * @brief Macro to assemble action handler wrapper function name. + * + * @param name Valid enumaration value of state. + * + * @param level One of the three AP power sequence levels: arch, chipset or app. + * + * @param action One of the three SMF action handlers: entry, run or exit. + * + * @param handler Action handler function of type `ap_pwr_state_action_handler`. + * + * @retval Constructs static name of handler wrapper function to be called by + * AP power sequence state machine. + **/ +#define AP_POWER_SM_ACTION(name, level, action, handler) \ + ap_pwr_##name##_##level##_##action##_##handler + +/** + * @brief Macro to create SMF state following AP power sequence. + * + * @param name Valid enumaration value of state. + * + * @param level One of the three AP power sequence levels: arch, chipset or app. + * + * @param _entry Function to be called when entrying state. + * + * @param _run Function to be called when executing `run` operation. + * + * @param _exit Function to be called when exiting state. + * + * @retval Defines global structure with action handlers to be used by AP + * power sequence state machine. + **/ +#define AP_POWER_SM_CREATE_STATE(name, level, _entry, _run, _exit, parent) \ + SMF_CREATE_STATE(AP_POWER_SM_ACTION(name, level, entry, _entry), \ + AP_POWER_SM_ACTION(name, level, run, _run), \ + AP_POWER_SM_ACTION(name, level, exit, _exit), parent) + +/** + * @brief Define architecture level state action handlers. + * + * @param name Valid enumaration value of state. + * + * @param entry Function to be called when entrying state. + * + * @param run Function to be called when executing `run` operation. + * + * @param exit Function to be called when exiting state. + * + * @retval Defines global structure with action handlers to be used by AP + * power sequence state machine. + **/ +#define AP_POWER_ARCH_STATE_DEFINE(name, entry, run, exit) \ + AP_POWER_SM_DEF_STATE_HANDLERS(name, arch, entry, run, exit) \ + const struct smf_state arch_##name##_actions = \ + AP_POWER_SM_CREATE_STATE(name, arch, entry, run, exit, NULL) + +/** + * @brief Define chipset level state action handlers. + * + * @param name Valid enumaration value of state. + * + * @param entry Function to be called when entrying state. + * + * @param run Function to be called when executing `run` operation. + * + * @param exit Function to be called when exiting state. + * + * @retval Defines global structure with action handlers to be used by AP + * power sequence state machine. + **/ +#define AP_POWER_CHIPSET_STATE_DEFINE(name, entry, run, exit) \ + AP_POWER_SM_DEF_STATE_HANDLERS(name, chipset, entry, run, exit) \ + const struct smf_state chipset_##name##_actions = \ + AP_POWER_SM_CREATE_STATE(name, chipset, entry, run, exit, \ + &arch_##name##_actions) + +/** + * @brief Define application level state action handlers. + * + * @param name Valid enumaration value of state. + * + * @param entry Function to be called when entrying state. + * + * @param run Function to be called when executing `run` operation. + * + * @param exit Function to be called when exiting state. + * + * @retval Defines global structure with action handlers to be used by AP + * power sequence state machine. + **/ +#define AP_POWER_APP_STATE_DEFINE(name, entry, run, exit) \ + AP_POWER_SM_DEF_STATE_HANDLERS(name, app, entry, run, exit) \ + const struct ap_pwrseq_smf app_state_##name = { \ + .actions = \ + AP_POWER_SM_CREATE_STATE(name, app, entry, run, exit, \ + &chipset_##name##_actions), \ + .state = name \ + } + +/** + * @brief Define chipset level substate action handlers. + * + * @param name Valid enumaration value of state, as provided by devicetree + * compatible with "ap-pwrseq-sub-states". + * + * @param entry Function to be called when entrying state. + * + * @param run Function to be called when executing `run` operation. + * + * @param exit Function to be called when exiting state. + * + * @param parent Valid enumaration value of parent state, + * + * @retval Defines global structure with action handlers to be used by AP + * power sequence state machine. + **/ +#define AP_POWER_CHIPSET_SUB_STATE_DEFINE(name, entry, run, exit, parent) \ + AP_POWER_SM_DEF_STATE_HANDLERS(name, chipset, entry, run, exit) \ + const struct ap_pwrseq_smf chipset_##name##_actions = { \ + .actions = AP_POWER_SM_CREATE_STATE(name, chipset, entry, run, \ + exit, \ + &arch_##parent##_actions), \ + .state = name \ + } + +/** + * @brief Define application level substate action handlers. + * + * @param name Valid enumaration value of state, as provided by devicetree + * compatible with "ap-pwrseq-sub-states". + * + * @param entry Function to be called when entrying state. + * + * @param run Function to be called when executing `run` operation. + * + * @param exit Function to be called when exiting state. + * + * @param parent Valid enumaration value of parent state, + * + * @retval Defines global structure with action handlers to be used by AP + * power sequence state machine. + **/ +#define AP_POWER_APP_SUB_STATE_DEFINE(name, entry, run, exit, parent) \ + AP_POWER_SM_DEF_STATE_HANDLERS(name, app, entry, run, exit) \ + const struct ap_pwrseq_smf app_state_##name = { \ + .actions = \ + AP_POWER_SM_CREATE_STATE(name, app, entry, run, exit, \ + &chipset_##parent##_actions), \ + .state = name \ + } + +/** + * @brief Sets AP power sequence state machine to provided state. + * + * This function is meant to be executed only within AP power sequence driver + * thread context. `tid` was given in `ap_pwrseq_sm_init`. + * + * Only one state transition is permited within `run` iterations. + * + * @param data Pointer to AP power sequence state machine instance data. + * + * @param state Enum value of next state to be executed. + * + * @retval SUCCESS Upon success, current state `exit` action handler and next + * state `entry` action handler will be executed. + * @retval -EINVAL State provided is invalid. + **/ +int ap_pwrseq_sm_set_state(void *const data, enum ap_pwrseq_state state); + +/** + * @brief Check if events is set for current AP power sequence state machine + * `run` iteration. + * + * @param data Pointer to AP power sequence state machine instance data. + * + * @param event Enum of test to be tested. + * + * @retval True If event is set, False otherwise. + **/ +bool ap_pwrseq_sm_is_event_set(void *const data, enum ap_pwrseq_event event); + +/** + * @brief Get state machine is entering. + * + * This function is meant to be executed only within AP power sequence driver + * thread context. `tid` was given in `ap_pwrseq_sm_init`. + * + * @param data Pointer to AP power sequence state machine instance data. + * + * @retval Enum value Upon success. + * @retval AP_POWER_STATE_UNDEF If state machine is not doing state transition. + **/ +enum ap_pwrseq_state ap_pwrseq_sm_get_entry_state(void *const data); + +/** + * @brief Get state machine is exiting. + * + * This function is meant to be executed only within AP power sequence driver + * thread context. `tid` was given in `ap_pwrseq_sm_init`. + * + * @param data Pointer to AP power sequence state machine instance data. + * + * @retval Enum value Upon success. + * @retval AP_POWER_STATE_UNDEF If state machine is not doing state transition. + **/ +enum ap_pwrseq_state ap_pwrseq_sm_get_exit_state(void *const data); +#endif /* _AP_PWRSEQ_SM_H_ */ diff --git a/zephyr/include/ap_power/ap_pwrseq_sm_defs.h b/zephyr/include/ap_power/ap_pwrseq_sm_defs.h new file mode 100644 index 0000000000..b34a730801 --- /dev/null +++ b/zephyr/include/ap_power/ap_pwrseq_sm_defs.h @@ -0,0 +1,78 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef _AP_PWRSEQ_SM_DEFS_H_ +#define _AP_PWRSEQ_SM_DEFS_H_ +#include "ap_power/ap_pwrseq.h" + +#include <zephyr/smf.h> + +struct ap_pwrseq_smf { + /* Zephyr SMF state actions */ + const struct smf_state actions; + /* Enumeration value of power state */ + enum ap_pwrseq_state state; +}; + +/** + * Makes structures declarations of ACPI states for every level visible + * throughout state machine domain, definition will be completed by build system + * and appended to array `ap_pwrseq_states`. + **/ +#define AP_POWER_STATE_DECL(state) \ + extern const struct smf_state arch_##state##_actions; \ + extern const struct smf_state chipset_##state##_actions; \ + extern const struct ap_pwrseq_smf app_state_##name; + +AP_POWER_STATE_DECL(AP_POWER_STATE_G3) +AP_POWER_STATE_DECL(AP_POWER_STATE_S5) +AP_POWER_STATE_DECL(AP_POWER_STATE_S4) +AP_POWER_STATE_DECL(AP_POWER_STATE_S3) +AP_POWER_STATE_DECL(AP_POWER_STATE_S2) +AP_POWER_STATE_DECL(AP_POWER_STATE_S1) +AP_POWER_STATE_DECL(AP_POWER_STATE_S0) + +/** + * Makes visible `struct ap_pwrseq_smf` declarations for defined substates + * throughout the state machine domain, definition will be completed by build + * system and appended to array `ap_pwrseq_states`. + **/ +#define AP_PWRSEQ_CHIPSET_SUB_STATE_DECL(state, prefix) \ + extern const struct ap_pwrseq_smf chipset_##state##_actions; + +#define AP_PWRSEQ_CHIPSET_SUB_STATE_DECL_(state) \ + AP_PWRSEQ_CHIPSET_SUB_STATE_DECL(state, prefix) + +#define AP_PWRSEQ_CHIPSET_SUB_STATE_DECL__(node_id, prop, idx) \ + AP_PWRSEQ_CHIPSET_SUB_STATE_DECL_( \ + DT_CAT6(node_id, _P_, prop, _IDX_, idx, _STRING_UPPER_TOKEN)) + +#define AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_DECL(node_id) \ + COND_CODE_1( \ + DT_NODE_HAS_PROP(node_id, chipset), \ + (DT_FOREACH_PROP_ELEM(node_id, chipset, \ + AP_PWRSEQ_CHIPSET_SUB_STATE_DECL__)), \ + ()) + +#define AP_PWRSEQ_APP_SUB_STATE_DECL(state) \ + extern const struct ap_pwrseq_smf app_state_##state; + +#define AP_PWRSEQ_APP_SUB_STATE_DECL_(state) AP_PWRSEQ_APP_SUB_STATE_DECL(state) + +#define AP_PWRSEQ_APP_SUB_STATE_DECL__(node_id, prop, idx) \ + AP_PWRSEQ_APP_SUB_STATE_DECL_( \ + DT_CAT6(node_id, _P_, prop, _IDX_, idx, _STRING_UPPER_TOKEN)) + +#define AP_PWRSEQ_EACH_APP_SUB_STATE_DECL(node_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(node_id, application), \ + (DT_FOREACH_PROP_ELEM(node_id, application, \ + AP_PWRSEQ_APP_SUB_STATE_DECL__)), \ + ()) + +DT_FOREACH_STATUS_OKAY(ap_pwrseq_sub_states, + AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_DECL) +DT_FOREACH_STATUS_OKAY(ap_pwrseq_sub_states, AP_PWRSEQ_EACH_APP_SUB_STATE_DECL) + +#endif /* _AP_PWRSEQ_SM_DEFS_H_ */ diff --git a/zephyr/include/cros/ite/it8xxx2.dtsi b/zephyr/include/cros/ite/it8xxx2.dtsi index 05c81b6896..983bf46663 100644 --- a/zephyr/include/cros/ite/it8xxx2.dtsi +++ b/zephyr/include/cros/ite/it8xxx2.dtsi @@ -49,18 +49,6 @@ }; soc { - /* TODO(b/265198571): Migrate Zephyr EC builds to upstream SHI - * drivers. - */ - /delete-node/ shi@f03a00; - shi: shi@f03a00 { - compatible = "ite,it8xxx2-cros-shi"; - reg = <0x00f03a00 0x30>; - interrupts = <171 0>; - interrupt-parent = <&intc>; - status = "disabled"; - }; - fiu0: cros-flash@80000000 { compatible = "ite,it8xxx2-cros-flash"; reg = <0x80000000 0x100000>; diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi index 1237581158..46f719b03e 100644 --- a/zephyr/include/cros/nuvoton/npcx.dtsi +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -116,3 +116,7 @@ &mdc { status = "okay"; }; + +&shi0 { + shi-cs-wui =<&wui_io53>; +}; diff --git a/zephyr/include/emul/emul_isl923x.h b/zephyr/include/emul/emul_isl923x.h index 7d085658cf..96be6b6773 100644 --- a/zephyr/include/emul/emul_isl923x.h +++ b/zephyr/include/emul/emul_isl923x.h @@ -86,6 +86,14 @@ void isl923x_emul_set_adc_vbus(const struct emul *emulator, uint16_t vbus_mv); void raa489000_emul_set_acok_pin(const struct emul *emulator, uint16_t value); /** + * @brief Set the value of the state machine status bits in the INFO2 register. + * + * @param value State machine state, such as RAA489000_INFO2_STATE_OTG + */ +void raa489000_emul_set_state_machine_state(const struct emul *emulator, + uint16_t value); + +/** * @brief Peek at a register value. This function will assert if the requested * register does is unimplemented. * diff --git a/zephyr/include/emul/tcpc/emul_tcpci.h b/zephyr/include/emul/tcpc/emul_tcpci.h index 5a7777d6ad..1df40b2c1a 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci.h +++ b/zephyr/include/emul/tcpc/emul_tcpci.h @@ -80,8 +80,7 @@ struct tcpci_ctx { const struct tcpci_emul_partner_ops *partner; /** Reference to Alert# GPIO emulator. */ - const struct device *alert_gpio_port; - gpio_pin_t alert_gpio_pin; + struct gpio_dt_spec irq_gpio; }; /** Run-time data used by the emulator */ @@ -105,15 +104,7 @@ struct tcpc_emul_data { .tx_msg = &tcpci_emul_tx_msg_##n, \ .error_on_ro_write = true, \ .error_on_rsvd_write = true, \ - .alert_gpio_port = COND_CODE_1( \ - DT_INST_NODE_HAS_PROP(n, alert_gpio), \ - (DEVICE_DT_GET(DT_GPIO_CTLR( \ - DT_INST_PROP(n, alert_gpio), gpios))), \ - (NULL)), \ - .alert_gpio_pin = COND_CODE_1( \ - DT_INST_NODE_HAS_PROP(n, alert_gpio), \ - (DT_GPIO_PIN(DT_INST_PROP(n, alert_gpio), gpios)), \ - (0)), \ + .irq_gpio = GPIO_DT_SPEC_INST_GET_OR(n, irq_gpios, {}), \ }; \ static struct tcpc_emul_data tcpc_emul_data_##n = { \ .tcpci_ctx = &tcpci_ctx##n, \ diff --git a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h index ef3051e3de..16012c083e 100644 --- a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h +++ b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h @@ -25,87 +25,4 @@ struct mtc_reg { #define NPCX_WTC_PTO 30 #define NPCX_WTC_WIE 31 -/* SHI (Serial Host Interface) registers */ -struct cros_shi_reg { - volatile uint8_t reserved1; - /* 0x001: SHI Configuration 1 */ - volatile uint8_t SHICFG1; - /* 0x002: SHI Configuration 2 */ - volatile uint8_t SHICFG2; - volatile uint8_t reserved2[2]; - /* 0x005: Event Enable */ - volatile uint8_t EVENABLE; - /* 0x006: Event Status */ - volatile uint8_t EVSTAT; - /* 0x007: SHI Capabilities */ - volatile uint8_t CAPABILITY; - /* 0x008: Status */ - volatile uint8_t STATUS; - volatile uint8_t reserved3; - /* 0x00A: Input Buffer Status */ - volatile uint8_t IBUFSTAT; - /* 0x00B: Output Buffer Status */ - volatile uint8_t OBUFSTAT; - /* 0x00C: SHI Configuration 3 */ - volatile uint8_t SHICFG3; - /* 0x00D: SHI Configuration 4 */ - volatile uint8_t SHICFG4; - /* 0x00E: SHI Configuration 5 */ - volatile uint8_t SHICFG5; - /* 0x00F: Event Status 2 */ - volatile uint8_t EVSTAT2; - /* 0x010: Event Enable 2 */ - volatile uint8_t EVENABLE2; - volatile uint8_t reserved4[15]; - /* 0x20~0x9F: Output Buffer */ - volatile uint8_t OBUF[128]; - /* 0xA0~0x11F: Input Buffer */ - volatile uint8_t IBUF[128]; -}; - -/* SHI register fields */ -#define NPCX_SHICFG1_EN 0 -#define NPCX_SHICFG1_MODE 1 -#define NPCX_SHICFG1_WEN 2 -#define NPCX_SHICFG1_AUTIBF 3 -#define NPCX_SHICFG1_AUTOBE 4 -#define NPCX_SHICFG1_DAS 5 -#define NPCX_SHICFG1_CPOL 6 -#define NPCX_SHICFG1_IWRAP 7 -#define NPCX_SHICFG2_SIMUL 0 -#define NPCX_SHICFG2_BUSY 1 -#define NPCX_SHICFG2_ONESHOT 2 -#define NPCX_SHICFG2_SLWU 3 -#define NPCX_SHICFG2_REEN 4 -#define NPCX_SHICFG2_RESTART 5 -#define NPCX_SHICFG2_REEVEN 6 -#define NPCX_EVENABLE_OBEEN 0 -#define NPCX_EVENABLE_OBHEEN 1 -#define NPCX_EVENABLE_IBFEN 2 -#define NPCX_EVENABLE_IBHFEN 3 -#define NPCX_EVENABLE_EOREN 4 -#define NPCX_EVENABLE_EOWEN 5 -#define NPCX_EVENABLE_STSREN 6 -#define NPCX_EVENABLE_IBOREN 7 -#define NPCX_EVSTAT_OBE 0 -#define NPCX_EVSTAT_OBHE 1 -#define NPCX_EVSTAT_IBF 2 -#define NPCX_EVSTAT_IBHF 3 -#define NPCX_EVSTAT_EOR 4 -#define NPCX_EVSTAT_EOW 5 -#define NPCX_EVSTAT_STSR 6 -#define NPCX_EVSTAT_IBOR 7 -#define NPCX_STATUS_OBES 6 -#define NPCX_STATUS_IBFS 7 -#define NPCX_SHICFG3_OBUFLVLDIS 7 -#define NPCX_SHICFG4_IBUFLVLDIS 7 -#define NPCX_SHICFG5_IBUFLVL2 FIELD(0, 6) -#define NPCX_SHICFG5_IBUFLVL2DIS 7 -#define NPCX_EVSTAT2_IBHF2 0 -#define NPCX_EVSTAT2_CSNRE 1 -#define NPCX_EVSTAT2_CSNFE 2 -#define NPCX_EVENABLE2_IBHF2EN 0 -#define NPCX_EVENABLE2_CSNREEN 1 -#define NPCX_EVENABLE2_CSNFEEN 2 - #endif /* _NUVOTON_NPCX_REG_DEF_CROS_H */ diff --git a/zephyr/program/brya/i2c.dts b/zephyr/program/brya/i2c.dts index 1926fd61e3..b87a53f600 100644 --- a/zephyr/program/brya/i2c.dts +++ b/zephyr/program/brya/i2c.dts @@ -73,7 +73,11 @@ tcpc-flags = <( TCPC_FLAGS_TCPCI_REV2_0 | TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>; - int-pin = <&gpio_usb_c0_c2_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c0_c2_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; }; nct3808_0_P1: nct3808_0_P1@70 { @@ -100,7 +104,11 @@ reg = <0x74>; gpio-dev = <&nct3808_0_P2>; tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; - int-pin = <&gpio_usb_c0_c2_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c0_c2_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; }; nct3808_0_P2: nct3808_0_P2@74 { @@ -216,7 +224,11 @@ TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V | TCPC_FLAGS_CONTROL_VCONN | TCPC_FLAGS_CONTROL_FRS)>; - int-pin = <&gpio_usb_c1_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c1_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioa 2 GPIO_ACTIVE_LOW>; }; }; diff --git a/zephyr/program/brya/interrupts.dts b/zephyr/program/brya/interrupts.dts index 1adca3e035..ea5bcc542a 100644 --- a/zephyr/program/brya/interrupts.dts +++ b/zephyr/program/brya/interrupts.dts @@ -96,16 +96,6 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "throttle_ap_prochot_input_interrupt"; }; - int_usb_c0_c2_tcpc: usb_c0_c2_tcpc { - irq-pin = <&gpio_usb_c0_c2_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c1_tcpc: usb_c1_tcpc { - irq-pin = <&gpio_usb_c1_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c0_ppc: usb_c0_ppc { irq-pin = <&gpio_usb_c0_ppc_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; diff --git a/zephyr/program/corsola/ite_keyboard.dtsi b/zephyr/program/corsola/ite_keyboard.dtsi index 8d2a345ff0..0bd6887ddb 100644 --- a/zephyr/program/corsola/ite_keyboard.dtsi +++ b/zephyr/program/corsola/ite_keyboard.dtsi @@ -26,3 +26,29 @@ >; }; }; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&ksi0_default + &ksi1_default + &ksi2_default + &ksi3_default + &ksi4_default + &ksi5_default + &ksi6_default + &ksi7_default + &kso0_default + &kso1_default + &kso3_default + &kso4_default + &kso5_default + &kso6_default + &kso7_default + &kso8_default + &kso9_default + &kso10_default + &kso11_default + &kso12_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/corsola/ite_program.conf b/zephyr/program/corsola/ite_program.conf index e6851580db..3e981dee81 100644 --- a/zephyr/program/corsola/ite_program.conf +++ b/zephyr/program/corsola/ite_program.conf @@ -70,8 +70,6 @@ CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=n CONFIG_PLATFORM_EC_CONFIG_USB_PD_3A_PORTS=0 CONFIG_PLATFORM_EC_USB_PD_PULLUP=1 -CONFIG_PLATFORM_EC_SHA256_UNROLLED=y - # TODO(b/180980668): bring these features up CONFIG_LTO=n CONFIG_PLATFORM_EC_BACKLIGHT_LID=n diff --git a/zephyr/program/corsola/ite_shi.dtsi b/zephyr/program/corsola/ite_shi.dtsi index 12c0c6ca5b..cf531f7418 100644 --- a/zephyr/program/corsola/ite_shi.dtsi +++ b/zephyr/program/corsola/ite_shi.dtsi @@ -5,9 +5,10 @@ #include <ite/it8xxx2-pinctrl-map.dtsi> -&shi { +&shi0 { status = "okay"; pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default &shi_clk_gpm4_default &shi_cs_gpm5_default>; pinctrl-names = "default"; + cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */ }; diff --git a/zephyr/program/corsola/npcx_host_interface.dtsi b/zephyr/program/corsola/npcx_host_interface.dtsi index 14efa3c6b2..b691893854 100644 --- a/zephyr/program/corsola/npcx_host_interface.dtsi +++ b/zephyr/program/corsola/npcx_host_interface.dtsi @@ -4,7 +4,7 @@ */ /* host interface */ -&shi { +&shi0 { status = "okay"; pinctrl-0 = <&shi_gp46_47_53_55>; pinctrl-1 = <&shi_gpio_gp46_47_53_55>; diff --git a/zephyr/program/corsola/npcx_i2c.dtsi b/zephyr/program/corsola/npcx_i2c.dtsi index ce41937ed2..2fd56fab53 100644 --- a/zephyr/program/corsola/npcx_i2c.dtsi +++ b/zephyr/program/corsola/npcx_i2c.dtsi @@ -77,7 +77,11 @@ TCPC_FLAGS_ALERT_OD | TCPC_FLAGS_CONTROL_VCONN | TCPC_FLAGS_CONTROL_FRS)>; - int-pin = <&gpio_usb_c0_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c0_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; }; ppc_port0: nx20p348x@72 { @@ -111,7 +115,11 @@ TCPC_FLAGS_ALERT_OD | TCPC_FLAGS_CONTROL_VCONN | TCPC_FLAGS_CONTROL_FRS)>; - int-pin = <&gpio_usb_c1_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c1_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 1 GPIO_ACTIVE_LOW>; }; ppc_port1: nx20p348x@72 { diff --git a/zephyr/program/corsola/npcx_interrupts.dtsi b/zephyr/program/corsola/npcx_interrupts.dtsi index f3da785a60..130f4501dd 100644 --- a/zephyr/program/corsola/npcx_interrupts.dtsi +++ b/zephyr/program/corsola/npcx_interrupts.dtsi @@ -70,16 +70,6 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "switch_interrupt"; }; - int_usb_c0_tcpc: usb_c0_tcpc { - irq-pin = <&gpio_usb_c0_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c1_tcpc: usb_c1_tcpc { - irq-pin = <&gpio_usb_c1_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c0_ppc: usb_c0_ppc { irq-pin = <&gpio_usb_c0_ppc_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; diff --git a/zephyr/program/corsola/src/npcx_usbc.c b/zephyr/program/corsola/src/npcx_usbc.c index eead9fa528..b22f42897d 100644 --- a/zephyr/program/corsola/src/npcx_usbc.c +++ b/zephyr/program/corsola/src/npcx_usbc.c @@ -59,11 +59,9 @@ void board_tcpc_init(void) board_reset_pd_mcu(); } - /* Enable TCPC interrupts */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_tcpc)); - if (corsola_get_db_type() == CORSOLA_DB_TYPEC) { - gpio_enable_dt_interrupt( - GPIO_INT_FROM_NODELABEL(int_usb_c1_tcpc)); + /* Do not enable TCPC interrupt on port 1 if not type-c */ + if (corsola_get_db_type() != CORSOLA_DB_TYPEC) { + tcpc_config[USBC_PORT_C1].irq_gpio.port = NULL; } /* Enable BC1.2 interrupts. */ diff --git a/zephyr/program/corsola/tentacruel/project.conf b/zephyr/program/corsola/tentacruel/project.conf index 587e3932ba..8229e23f9f 100644 --- a/zephyr/program/corsola/tentacruel/project.conf +++ b/zephyr/program/corsola/tentacruel/project.conf @@ -20,6 +20,8 @@ CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y # Battery CONFIG_PLATFORM_EC_CHARGER_PROFILE_OVERRIDE=y +CONFIG_PLATFORM_EC_I2C_NACK_RETRY_COUNT=10 +CONFIG_PLATFORM_EC_SMBUS_PEC=y # Remove bring up options for FW QUAL CONFIG_PLATFORM_EC_BRINGUP=n diff --git a/zephyr/program/geralt/geralt/battery.dtsi b/zephyr/program/geralt/geralt/battery.dtsi index fc1e5268e1..7c194ca918 100644 --- a/zephyr/program/geralt/geralt/battery.dtsi +++ b/zephyr/program/geralt/geralt/battery.dtsi @@ -4,10 +4,9 @@ */ / { - /* TODO: update this after we got the real battery */ batteries { - default_battery: dynapack_c140254 { - compatible = "dynapack,c140254", "battery-smart"; + default_battery: smp_l21m4pg0 { + compatible = "smp,l21m4pg0", "battery-smart"; }; }; }; diff --git a/zephyr/program/geralt/geralt/project.overlay b/zephyr/program/geralt/geralt/project.overlay index b54d181c38..76ed8c0a6a 100644 --- a/zephyr/program/geralt/geralt/project.overlay +++ b/zephyr/program/geralt/geralt/project.overlay @@ -9,6 +9,7 @@ #include "../gpio.dtsi" #include "../i2c.dtsi" #include "../interrupts.dtsi" +#include "../keyboard.dtsi" #include "../mkbp.dtsi" #include "../motionsense.dtsi" #include "../power_signal.dtsi" diff --git a/zephyr/program/geralt/gpio.dtsi b/zephyr/program/geralt/gpio.dtsi index 2f9b7b9f35..4374b444c5 100644 --- a/zephyr/program/geralt/gpio.dtsi +++ b/zephyr/program/geralt/gpio.dtsi @@ -129,7 +129,11 @@ gpios = <&gpiog 0 GPIO_OUTPUT_HIGH>; }; en_pp4200_s5: en-pp4200-s5 { - gpios = <&gpiob 7 GPIO_OUTPUT_HIGH>; + gpios = <&gpiob 7 GPIO_OUTPUT_LOW>; + }; + pg_pp4200_s5_od: pg-pp4200-s5-od { + gpios = <&gpioc 5 GPIO_INPUT>; + enum-name = "GPIO_PG_PP4200_S5_OD"; }; sys_rst_odl: sys-rst-odl { gpios = <&gpiog 1 GPIO_ODR_LOW>; @@ -182,8 +186,6 @@ unused-gpios = /* pg_pp5000_z1_od */ <&gpiod 2 GPIO_INPUT>, - /* pg_pp4200_s5_od */ - <&gpioc 5 GPIO_INPUT>, /* charge_en */ <&gpioe 1 GPIO_INPUT>, /* unnamed nc pins */ diff --git a/zephyr/program/geralt/i2c.dtsi b/zephyr/program/geralt/i2c.dtsi index cc2e6f6bdf..cf36d68ef9 100644 --- a/zephyr/program/geralt/i2c.dtsi +++ b/zephyr/program/geralt/i2c.dtsi @@ -64,7 +64,6 @@ compatible = "richtek,rt9490"; status = "okay"; reg = <0x53>; - irq = <&int_usb_c1_bc12_charger>; }; }; diff --git a/zephyr/program/geralt/interrupts.dtsi b/zephyr/program/geralt/interrupts.dtsi index 99c3cb7e56..dd48aa8977 100644 --- a/zephyr/program/geralt/interrupts.dtsi +++ b/zephyr/program/geralt/interrupts.dtsi @@ -51,11 +51,6 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "extpower_interrupt"; }; - int_usb_c1_bc12_charger: usb-c1-bc12-charger { - irq-pin = <&usb_c1_bc12_charger_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "rt9490_bc12_dt_interrupt"; - }; int_lid_open: lid-open { irq-pin = <&lid_open>; flags = <GPIO_INT_EDGE_BOTH>; @@ -66,6 +61,11 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "power_button_interrupt"; }; + int_pg_pp4200_s5: pg-pp4200-s5 { + irq-pin = <&pg_pp4200_s5_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_signal_interrupt"; + }; int_warm_rst: warm-rst { irq-pin = <&ap_ec_warm_rst_req>; flags = <GPIO_INT_EDGE_RISING>; @@ -96,5 +96,10 @@ flags = <GPIO_INT_EDGE_FALLING>; handler = "ccd_interrupt"; }; + int_ap_xhci_init_done: ap-xhci-init-done { + irq-pin = <&ap_xhci_init_done>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "xhci_interrupt"; + }; }; }; diff --git a/zephyr/program/geralt/keyboard.dtsi b/zephyr/program/geralt/keyboard.dtsi new file mode 100644 index 0000000000..9541c4aa81 --- /dev/null +++ b/zephyr/program/geralt/keyboard.dtsi @@ -0,0 +1,30 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&ksi0_default + &ksi1_default + &ksi2_default + &ksi3_default + &ksi4_default + &ksi5_default + &ksi6_default + &ksi7_default + &kso0_default + &kso1_default + &kso3_default + &kso4_default + &kso5_default + &kso6_default + &kso7_default + &kso8_default + &kso9_default + &kso10_default + &kso11_default + &kso12_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/geralt/power_signal.dtsi b/zephyr/program/geralt/power_signal.dtsi index 268b068a21..38ec8a19a2 100644 --- a/zephyr/program/geralt/power_signal.dtsi +++ b/zephyr/program/geralt/power_signal.dtsi @@ -5,7 +5,7 @@ / { power_signal_list: power-signal-list { - compatible = "mediatek,mt8186-power-signal-list"; + compatible = "mediatek,mt8188-power-signal-list"; ap_in_rst { power-enum-name = "AP_IN_RST"; @@ -23,5 +23,9 @@ power-enum-name = "AP_WARM_RST_REQ"; power-gpio-pin = <&ap_ec_warm_rst_req>; }; + pg_pp4200_s5 { + power-enum-name = "PG_PP4200_S5"; + power-gpio-pin = <&pg_pp4200_s5_od>; + }; }; }; diff --git a/zephyr/program/geralt/program.conf b/zephyr/program/geralt/program.conf index 501afdee7c..3394f85b82 100644 --- a/zephyr/program/geralt/program.conf +++ b/zephyr/program/geralt/program.conf @@ -20,7 +20,7 @@ CONFIG_SHIMMED_TASKS=y # AP SoC configuration CONFIG_AP=y -CONFIG_AP_ARM_MTK_MT8186=y +CONFIG_AP_ARM_MTK_MT8188=y # Shell features CONFIG_KERNEL_SHELL=y @@ -87,6 +87,8 @@ CONFIG_PLATFORM_EC_BATTERY_SMART=y CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV=9000 CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY=y +CONFIG_PLATFORM_EC_I2C_NACK_RETRY_COUNT=5 +CONFIG_PLATFORM_EC_SMBUS_PEC=y # Charger CONFIG_PLATFORM_EC_CHARGE_MANAGER=y @@ -125,7 +127,6 @@ CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y CONFIG_PWM=y # Sensors -CONFIG_PLATFORM_EC_MOTIONSENSE=y CONFIG_PLATFORM_EC_ACCEL_FIFO=y CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y @@ -144,7 +145,7 @@ CONFIG_TASK_MOTIONSENSE_STACK_SIZE=1024 CONFIG_TASK_PD_STACK_SIZE=1280 # USB-C -CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n +CONFIG_PLATFORM_EC_USB_CHARGER=n CONFIG_PLATFORM_EC_USBC_PPC_SYV682C=y CONFIG_PLATFORM_EC_USB_MUX_TUSB546=y CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y diff --git a/zephyr/program/geralt/shi.dtsi b/zephyr/program/geralt/shi.dtsi index 12c0c6ca5b..cf531f7418 100644 --- a/zephyr/program/geralt/shi.dtsi +++ b/zephyr/program/geralt/shi.dtsi @@ -5,9 +5,10 @@ #include <ite/it8xxx2-pinctrl-map.dtsi> -&shi { +&shi0 { status = "okay"; pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default &shi_clk_gpm4_default &shi_cs_gpm5_default>; pinctrl-names = "default"; + cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */ }; diff --git a/zephyr/program/geralt/src/hibernate.c b/zephyr/program/geralt/src/hibernate.c index c83d37cc91..fb70248338 100644 --- a/zephyr/program/geralt/src/hibernate.c +++ b/zephyr/program/geralt/src/hibernate.c @@ -9,5 +9,8 @@ /* Geralt board specific hibernate implementation */ __override void board_hibernate_late(void) { + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp5000_z1_l), 1); + /* It takes around 30ms to release the PP5000 capacitance. */ + udelay(30 * MSEC); gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_ulp), 1); } diff --git a/zephyr/program/geralt/src/hooks.c b/zephyr/program/geralt/src/hooks.c index 628ecdd0f8..bc21babe66 100644 --- a/zephyr/program/geralt/src/hooks.c +++ b/zephyr/program/geralt/src/hooks.c @@ -3,6 +3,7 @@ * found in the LICENSE file. */ +#include "gpio/gpio_int.h" #include "gpio_signal.h" #include "hooks.h" @@ -31,6 +32,13 @@ static void board_i2c3_ctrl(bool enable) } } +static void geralt_common_init(void) +{ + gpio_enable_dt_interrupt( + GPIO_INT_FROM_NODELABEL(int_ap_xhci_init_done)); +} +DECLARE_HOOK(HOOK_INIT, geralt_common_init, HOOK_PRIO_PRE_DEFAULT); + static void board_enable_i2c3(void) { board_i2c3_ctrl(1); diff --git a/zephyr/program/geralt/src/usb_pd_policy.c b/zephyr/program/geralt/src/usb_pd_policy.c index c445fc0e22..72558b50d6 100644 --- a/zephyr/program/geralt/src/usb_pd_policy.c +++ b/zephyr/program/geralt/src/usb_pd_policy.c @@ -18,7 +18,7 @@ int pd_check_vconn_swap(int port) int pd_snk_is_vbus_provided(int port) { - static atomic_t vbus_prev[CONFIG_USB_PD_PORT_MAX_COUNT]; + __maybe_unused static atomic_t vbus_prev[CONFIG_USB_PD_PORT_MAX_COUNT]; int vbus; /* diff --git a/zephyr/program/geralt/src/usbc_config.c b/zephyr/program/geralt/src/usbc_config.c index 7c49f58237..21a6f88d0b 100644 --- a/zephyr/program/geralt/src/usbc_config.c +++ b/zephyr/program/geralt/src/usbc_config.c @@ -9,10 +9,16 @@ #include "charge_state_v2.h" #include "console.h" #include "driver/tcpm/it83xx_pd.h" +#include "gpio.h" +#include "gpio_signal.h" +#include "usb_charge.h" #include "usb_pd.h" +#include "usb_tc_sm.h" #include "usbc_ppc.h" #include "zephyr_adc.h" +#include <zephyr/drivers/gpio.h> + #include <ap_power/ap_power.h> #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) @@ -129,3 +135,43 @@ enum adc_channel board_get_vbus_adc(int port) return ADC_VBUS_C0; } #endif /* CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT */ + +/* USB-A */ +void xhci_interrupt(enum gpio_signal signal) +{ + enum usb_charge_mode mode = + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(ap_xhci_init_done)) ? + USB_CHARGE_MODE_ENABLED : + USB_CHARGE_MODE_DISABLED; + + const int xhci_stat = gpio_get_level(signal); + + for (int i = 0; i < USB_PORT_COUNT; i++) { + usb_charge_set_mode(i, mode, USB_ALLOW_SUSPEND_CHARGE); + } + + for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + /* + * Enable DRP toggle after XHCI inited. This is used to follow + * USB 3.2 spec 10.3.1.1. + */ + if (xhci_stat) { + pd_set_dual_role(i, PD_DRP_TOGGLE_ON); + } else if (tc_is_attached_src(i)) { + /* + * This is a AP reset S0->S0 transition. + * We should set the role back to sink. + */ + pd_set_dual_role(i, PD_DRP_FORCE_SINK); + } + } +} + +__override enum pd_dual_role_states pd_get_drp_state_in_s0(void) +{ + if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(ap_xhci_init_done))) { + return PD_DRP_TOGGLE_ON; + } else { + return PD_DRP_FORCE_SINK; + } +} diff --git a/zephyr/program/geralt/usbc.dtsi b/zephyr/program/geralt/usbc.dtsi index 88e29a6b27..fd26638873 100644 --- a/zephyr/program/geralt/usbc.dtsi +++ b/zephyr/program/geralt/usbc.dtsi @@ -11,7 +11,6 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 = <&bc12_ppc_port0>; ppc = <&bc12_ppc_port0>; tcpc = <&usbpd0>; chg = <&charger_bc12_port1>; @@ -29,7 +28,6 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 = <&charger_bc12_port1>; ppc = <&ppc_port1>; tcpc = <&usbpd1>; usb-mux-chain-1 { diff --git a/zephyr/program/herobrine/common.dtsi b/zephyr/program/herobrine/common.dtsi index d4e92830bb..0fbde24a54 100644 --- a/zephyr/program/herobrine/common.dtsi +++ b/zephyr/program/herobrine/common.dtsi @@ -36,7 +36,7 @@ }; }; -&shi { +&shi0 { status = "okay"; pinctrl-0 = <&shi_gp46_47_53_55>; pinctrl-1 = <&shi_gpio_gp46_47_53_55>; diff --git a/zephyr/program/herobrine/hoglin/project.overlay b/zephyr/program/herobrine/hoglin/project.overlay index cabc9cbeda..dd192d22f9 100644 --- a/zephyr/program/herobrine/hoglin/project.overlay +++ b/zephyr/program/herobrine/hoglin/project.overlay @@ -42,7 +42,11 @@ tcpc_port0: ps8xxx@1b { compatible = "parade,ps8xxx"; reg = <0x1b>; - int-pin = <&gpio_usb_c0_pd_int_odl>; + /* a duplicate of the <&gpio_usb_c0_pd_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; }; }; @@ -51,6 +55,10 @@ tcpc_port1: ps8xxx@1b { compatible = "parade,ps8xxx"; reg = <0x1b>; - int-pin = <&gpio_usb_c1_pd_int_odl>; + /* a duplicate of the <&gpio_usb_c1_pd_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpiof 5 GPIO_ACTIVE_LOW>; }; }; diff --git a/zephyr/program/herobrine/i2c.dtsi b/zephyr/program/herobrine/i2c.dtsi index c5526afa9f..fa4c1c2960 100644 --- a/zephyr/program/herobrine/i2c.dtsi +++ b/zephyr/program/herobrine/i2c.dtsi @@ -95,7 +95,11 @@ tcpc_port0: ps8xxx@b { compatible = "parade,ps8xxx"; reg = <0xb>; - int-pin = <&gpio_usb_c0_pd_int_odl>; + /* a duplicate of the <&gpio_usb_c0_pd_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; }; }; @@ -120,7 +124,11 @@ tcpc_port1: ps8xxx@b { compatible = "parade,ps8xxx"; reg = <0xb>; - int-pin = <&gpio_usb_c1_pd_int_odl>; + /* a duplicate of the <&gpio_usb_c1_pd_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpiof 5 GPIO_ACTIVE_LOW>; }; }; diff --git a/zephyr/program/herobrine/interrupts.dtsi b/zephyr/program/herobrine/interrupts.dtsi index 82650bfc51..36d31cfffe 100644 --- a/zephyr/program/herobrine/interrupts.dtsi +++ b/zephyr/program/herobrine/interrupts.dtsi @@ -66,16 +66,6 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "power_signal_interrupt"; }; - int_usb_c0_pd: usb_c0_pd { - irq-pin = <&gpio_usb_c0_pd_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c1_pd: usb_c1_pd { - irq-pin = <&gpio_usb_c1_pd_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c0_swctl: usb_c0_swctl { irq-pin = <&gpio_usb_c0_swctl_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; diff --git a/zephyr/program/herobrine/program.conf b/zephyr/program/herobrine/program.conf index b18dd9bed1..0bdfde796d 100644 --- a/zephyr/program/herobrine/program.conf +++ b/zephyr/program/herobrine/program.conf @@ -77,7 +77,6 @@ CONFIG_PLATFORM_EC_USB_PD_FRS=y CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=n CONFIG_PLATFORM_EC_USBC_PPC_SYV682C=y CONFIG_PLATFORM_EC_USB_PD_FRS_PPC=y -CONFIG_PLATFORM_EC_USBC_RETIMER_FW_UPDATE=n CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY=y CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y diff --git a/zephyr/program/herobrine/src/usbc_config.c b/zephyr/program/herobrine/src/usbc_config.c index 40c603d304..69620a02b4 100644 --- a/zephyr/program/herobrine/src/usbc_config.c +++ b/zephyr/program/herobrine/src/usbc_config.c @@ -130,10 +130,6 @@ void board_tcpc_init(void) gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_swctl)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_swctl)); - /* Enable TCPC interrupts */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_pd)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_pd)); - /* * Initialize HPD to low; after sysjump SOC needs to see * HPD pulse to enable video path diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/prj.conf b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/prj.conf index 2dee48d99f..bf170e0594 100644 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/prj.conf +++ b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/prj.conf @@ -19,9 +19,6 @@ CONFIG_ESPI_PERIPHERAL_KBC_IBF_EVT_DATA=y CONFIG_MCHP_MEC_UNSIGNED_HEADER=y CONFIG_MCHP_MEC_HEADER_FLASH_SIZE_256K=y -# Support Zephyr SPI NOR driver to work with MCHP SPI driver -CONFIG_SPI_XEC_QMSPI_FULL_DUPLEX=y - # Sensors - MCHP TACH driver under sensor CONFIG_SENSOR=n diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/prj.conf b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/prj.conf index eef09c8277..d04abada31 100644 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/prj.conf +++ b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/prj.conf @@ -11,6 +11,3 @@ CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y # RTC CONFIG_PLATFORM_EC_RTC=y - -# Keyboard -CONFIG_CROS_KB_RAW_NPCX=y diff --git a/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/prj.conf b/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/prj.conf index 88ae4248df..7a83dd61fc 100644 --- a/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/prj.conf +++ b/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/prj.conf @@ -24,9 +24,6 @@ CONFIG_EEPROM=n CONFIG_MCHP_MEC_UNSIGNED_HEADER=y CONFIG_MCHP_MEC_HEADER_FLASH_SIZE_256K=y -# Support Zephyr SPI NOR driver to work with MCHP SPI driver -CONFIG_SPI_XEC_QMSPI_FULL_DUPLEX=y - # PWM CONFIG_PWM=y CONFIG_PWM_SHELL=n diff --git a/zephyr/program/intelrvp/prj.conf b/zephyr/program/intelrvp/prj.conf index 6b90fcebc1..859567736d 100644 --- a/zephyr/program/intelrvp/prj.conf +++ b/zephyr/program/intelrvp/prj.conf @@ -32,6 +32,7 @@ CONFIG_PLATFORM_EC_PORT80=y CONFIG_PLATFORM_EC_USB_VID=0x18d1 CONFIG_PLATFORM_EC_USB_PID=0x8086 CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=y +CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n # eSPI CONFIG_ESPI=y diff --git a/zephyr/program/it8xxx2_evb/shi.dts b/zephyr/program/it8xxx2_evb/shi.dts index 12c0c6ca5b..cf531f7418 100644 --- a/zephyr/program/it8xxx2_evb/shi.dts +++ b/zephyr/program/it8xxx2_evb/shi.dts @@ -5,9 +5,10 @@ #include <ite/it8xxx2-pinctrl-map.dtsi> -&shi { +&shi0 { status = "okay"; pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default &shi_clk_gpm4_default &shi_cs_gpm5_default>; pinctrl-names = "default"; + cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */ }; diff --git a/zephyr/program/nissa/craask/project.conf b/zephyr/program/nissa/craask/project.conf index f530f0f54e..7bcc64e6a5 100644 --- a/zephyr/program/nissa/craask/project.conf +++ b/zephyr/program/nissa/craask/project.conf @@ -14,6 +14,11 @@ CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y CONFIG_PLATFORM_EC_BUTTONS_RUNTIME_CONFIG=y +# Increase PD max power from default +CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=65000 +CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV=20000 +CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=3250 + # Flash space saving # Turning off extended console help saves ~3500 bytes CONFIG_SHELL_HELP=n diff --git a/zephyr/program/nissa/craask/src/usbc.c b/zephyr/program/nissa/craask/src/usbc.c index 8655bde95b..1304ae03bb 100644 --- a/zephyr/program/nissa/craask/src/usbc.c +++ b/zephyr/program/nissa/craask/src/usbc.c @@ -208,6 +208,10 @@ static void usbc_interrupt_trigger(int port) static inline void poll_usb_gpio(int port, const struct gpio_dt_spec *gpio, const struct deferred_data *ud) { + /* + * TODO(b/267537103): Migrate named-gpios to Zephyr's GPIO hogs. Verify + * the active high/active low setting once GPIO hogs are used. + */ if (!gpio_pin_get_dt(gpio)) { usbc_interrupt_trigger(port); hook_call_deferred(ud, USBC_INT_POLL_DELAY_US); diff --git a/zephyr/program/nissa/joxer/keyboard.dtsi b/zephyr/program/nissa/joxer/keyboard.dtsi index 04a620767a..1742e1a50f 100644 --- a/zephyr/program/nissa/joxer/keyboard.dtsi +++ b/zephyr/program/nissa/joxer/keyboard.dtsi @@ -20,3 +20,29 @@ pinctrl-0 = <&pwm0_gpa0_default>; pinctrl-names = "default"; }; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&ksi0_default + &ksi1_default + &ksi2_default + &ksi3_default + &ksi4_default + &ksi5_default + &ksi6_default + &ksi7_default + &kso0_default + &kso1_default + &kso3_default + &kso4_default + &kso5_default + &kso6_default + &kso7_default + &kso8_default + &kso9_default + &kso10_default + &kso11_default + &kso12_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/nissa/nereid/keyboard.dtsi b/zephyr/program/nissa/nereid/keyboard.dtsi index 04a620767a..1742e1a50f 100644 --- a/zephyr/program/nissa/nereid/keyboard.dtsi +++ b/zephyr/program/nissa/nereid/keyboard.dtsi @@ -20,3 +20,29 @@ pinctrl-0 = <&pwm0_gpa0_default>; pinctrl-names = "default"; }; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&ksi0_default + &ksi1_default + &ksi2_default + &ksi3_default + &ksi4_default + &ksi5_default + &ksi6_default + &ksi7_default + &kso0_default + &kso1_default + &kso3_default + &kso4_default + &kso5_default + &kso6_default + &kso7_default + &kso8_default + &kso9_default + &kso10_default + &kso11_default + &kso12_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/nissa/program.conf b/zephyr/program/nissa/program.conf index e22cbb4c0c..d773f4f690 100644 --- a/zephyr/program/nissa/program.conf +++ b/zephyr/program/nissa/program.conf @@ -94,6 +94,9 @@ CONFIG_PLATFORM_EC_USB_PID=0x505a CONFIG_PLATFORM_EC_USB_PD_USB4=n CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=n +# TCPC interrupts are shared with BC1.2 and require additional processing +# to ensure interrupts can't be lost due to shared use. +CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=y # ADL integrated muxes are slow: unblock PD diff --git a/zephyr/program/nissa/shi.dtsi b/zephyr/program/nissa/shi.dtsi index 12c0c6ca5b..cf531f7418 100644 --- a/zephyr/program/nissa/shi.dtsi +++ b/zephyr/program/nissa/shi.dtsi @@ -5,9 +5,10 @@ #include <ite/it8xxx2-pinctrl-map.dtsi> -&shi { +&shi0 { status = "okay"; pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default &shi_clk_gpm4_default &shi_cs_gpm5_default>; pinctrl-names = "default"; + cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */ }; diff --git a/zephyr/program/nissa/src/common.c b/zephyr/program/nissa/src/common.c index e03b82bca3..435ef95e29 100644 --- a/zephyr/program/nissa/src/common.c +++ b/zephyr/program/nissa/src/common.c @@ -131,3 +131,14 @@ __override void board_hibernate_late(void) * a small delay, so return. */ } + +#ifdef CONFIG_OCPC +__override void board_ocpc_init(struct ocpc_data *ocpc) +{ + /* Ensure board has at least 2 charger chips. */ + if (board_get_charger_chip_count() > 1) { + /* There's no provision to measure Isys */ + ocpc->chg_flags[CHARGER_SECONDARY] |= OCPC_NO_ISYS_MEAS_CAP; + } +} +#endif diff --git a/zephyr/program/nissa/xivur/project.conf b/zephyr/program/nissa/xivur/project.conf index 1cc6230d06..f6e1adf93c 100644 --- a/zephyr/program/nissa/xivur/project.conf +++ b/zephyr/program/nissa/xivur/project.conf @@ -4,7 +4,6 @@ CONFIG_BOARD_XIVUR=y CONFIG_PLATFORM_EC_OCPC=y -CONFIG_PLATFORM_EC_FAN=y CONFIG_NISSA_SUB_BOARD=n # Battery Configuration diff --git a/zephyr/program/nissa/yaviks/fan.dtsi b/zephyr/program/nissa/yaviks/fan.dtsi index 24e551f43b..6a3fc0288a 100644 --- a/zephyr/program/nissa/yaviks/fan.dtsi +++ b/zephyr/program/nissa/yaviks/fan.dtsi @@ -23,33 +23,33 @@ rpm_target = <0>; }; level_1 { - temp_on = <45 48 0>; - temp_off = <34 45 99>; + temp_on = <46 48 0>; + temp_off = <40 45 99>; rpm_target = <2600>; }; level_2 { - temp_on = <47 49 0>; - temp_off = <41 46 99>; + temp_on = <49 49 0>; + temp_off = <44 46 99>; rpm_target = <2800>; }; level_3 { - temp_on = <49 50 54>; - temp_off = <44 47 51>; + temp_on = <53 50 54>; + temp_off = <47 47 51>; rpm_target = <3100>; }; level_4 { - temp_on = <50 56 60>; - temp_off = <46 48 52>; + temp_on = <56 56 60>; + temp_off = <51 48 52>; rpm_target = <3300>; }; level_5 { - temp_on = <52 60 64>; - temp_off = <48 52 56>; + temp_on = <60 60 64>; + temp_off = <54 52 56>; rpm_target = <3600>; }; level_6 { temp_on = <100 100 100>; - temp_off = <49 54 58>; + temp_off = <58 54 58>; rpm_target = <4000>; }; }; diff --git a/zephyr/program/nissa/yaviks/gpio.dtsi b/zephyr/program/nissa/yaviks/gpio.dtsi index 1ce123b42f..d063b897d9 100644 --- a/zephyr/program/nissa/yaviks/gpio.dtsi +++ b/zephyr/program/nissa/yaviks/gpio.dtsi @@ -209,6 +209,10 @@ gpio_c0_charger_led_amber_l: c0_charger_led_amber_l { gpios = <&gpioj 7 GPIO_OUTPUT_HIGH>; }; + gpio_ec_kso_02_inv: ec_kso_02_inv { + gpios = <&gpioksol 2 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_KBD_KSO2"; + }; }; named-i2c-ports { diff --git a/zephyr/program/nissa/yaviks/keyboard.dtsi b/zephyr/program/nissa/yaviks/keyboard.dtsi index 04a620767a..87d7d718fa 100644 --- a/zephyr/program/nissa/yaviks/keyboard.dtsi +++ b/zephyr/program/nissa/yaviks/keyboard.dtsi @@ -20,3 +20,53 @@ pinctrl-0 = <&pwm0_gpa0_default>; pinctrl-names = "default"; }; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&ksi0_default + &ksi1_default + &ksi2_default + &ksi3_default + &ksi4_default + &ksi5_default + &ksi6_default + &ksi7_default + &kso0_default + &kso1_default + &kso3_default + &kso4_default + &kso5_default + &kso6_default + &kso7_default + &kso8_default + &kso9_default + &kso10_default + &kso11_default + &kso12_default + &kso13_default + &kso14_default>; + pinctrl-1 = <&ksi0_sleep + &ksi1_sleep + &ksi2_sleep + &ksi3_sleep + &ksi4_sleep + &ksi5_sleep + &ksi6_sleep + &ksi7_sleep + &kso0_sleep + &kso1_sleep + &kso3_sleep + &kso4_sleep + &kso5_sleep + &kso6_sleep + &kso7_sleep + &kso8_sleep + &kso9_sleep + &kso10_sleep + &kso11_sleep + &kso12_sleep + &kso13_sleep + &kso14_sleep>; + pinctrl-names = "default", "sleep"; +}; diff --git a/zephyr/program/nissa/yaviks/overlay.dtsi b/zephyr/program/nissa/yaviks/overlay.dtsi index 00fb132fab..663b538953 100644 --- a/zephyr/program/nissa/yaviks/overlay.dtsi +++ b/zephyr/program/nissa/yaviks/overlay.dtsi @@ -213,6 +213,24 @@ }; }; }; + + binman { + ec-rw { + size = <0x50000>; + rw-fw { + rw-fwid { + /* Fix the lcoation of the FWID to the + * last 32 bytes of the flash. This + * ensures the RW entries in the FMAP + * stored in the RO section of flash + * are always correct. + */ + offset = <(0x50000 - 32)>; + }; + }; + }; + pad-after = <0x50000>; + }; }; &thermistor_3V3_51K1_47K_4050B { diff --git a/zephyr/program/nissa/yaviks/project.conf b/zephyr/program/nissa/yaviks/project.conf index 4c83972b8c..2e52005cad 100644 --- a/zephyr/program/nissa/yaviks/project.conf +++ b/zephyr/program/nissa/yaviks/project.conf @@ -4,6 +4,11 @@ CONFIG_BOARD_YAVIKS=y +# FW image +# TODO: Once this configuration is configured with binman's size property +# by default, it can be removed. +CONFIG_CROS_EC_RW_SIZE=0x50000 + # Ensure recovery key combination (esc+refresh+power) is reliable: b/236580049 CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y @@ -24,6 +29,7 @@ CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ=100000 # Keyboard CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD=y CONFIG_PLATFORM_EC_KBLIGHT_ENABLE_PIN=n +CONFIG_PLATFORM_EC_KEYBOARD_FACTORY_TEST=y # Fan CONFIG_PLATFORM_EC_CUSTOM_FAN_CONTROL=y diff --git a/zephyr/program/nissa/yaviks/src/keyboard.c b/zephyr/program/nissa/yaviks/src/keyboard.c index 54f8750e98..22fa2df996 100644 --- a/zephyr/program/nissa/yaviks/src/keyboard.c +++ b/zephyr/program/nissa/yaviks/src/keyboard.c @@ -4,6 +4,7 @@ */ #include "cros_cbi.h" #include "ec_commands.h" +#include "gpio_it8xxx2.h" #include "hooks.h" #include "keyboard_8042_sharedlib.h" #include "keyboard_scan.h" @@ -104,3 +105,21 @@ static void kb_layout_init(void) set_scancode_set2(4, 0, get_scancode_set2(2, 7)); } DECLARE_HOOK(HOOK_INIT, kb_layout_init, HOOK_PRIO_POST_FIRST); + +/* + * Map keyboard connector pins to EC GPIO pins for factory test. + * Pins mapped to {-1, -1} are skipped. + * The connector has 30 pins total, and there is no pin 0. + */ +const int keyboard_factory_scan_pins[][2] = { + { -1, -1 }, { GPIO_KSOH, 4 }, { GPIO_KSOH, 0 }, { GPIO_KSOH, 1 }, + { GPIO_KSOH, 3 }, { GPIO_KSOH, 2 }, { -1, -1 }, { -1, -1 }, + { GPIO_KSOL, 5 }, { GPIO_KSOL, 6 }, { -1, -1 }, { GPIO_KSOL, 3 }, + { GPIO_KSOL, 2 }, { GPIO_KSI, 0 }, { GPIO_KSOL, 1 }, { GPIO_KSOL, 4 }, + { GPIO_KSI, 3 }, { GPIO_KSI, 2 }, { GPIO_KSOL, 0 }, { GPIO_KSI, 5 }, + { GPIO_KSI, 4 }, { GPIO_KSOL, 7 }, { GPIO_KSI, 6 }, { GPIO_KSI, 7 }, + { GPIO_KSI, 1 }, { -1, -1 }, { GPIO_KSOH, 5 }, { -1, -1 }, + { GPIO_KSOH, 6 }, { -1, -1 }, { -1, -1 }, +}; +const int keyboard_factory_scan_pins_used = + ARRAY_SIZE(keyboard_factory_scan_pins); diff --git a/zephyr/program/rex/interrupts.dtsi b/zephyr/program/rex/interrupts.dtsi index a4532c3e95..f8cd156720 100644 --- a/zephyr/program/rex/interrupts.dtsi +++ b/zephyr/program/rex/interrupts.dtsi @@ -27,11 +27,6 @@ flags = <GPIO_INT_EDGE_FALLING>; handler = "sbu_fault_interrupt"; }; - int_usb_c0_tcpc: usb_c0_tcpc { - irq-pin = <&gpio_usb_c0_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c0_ppc: usb_c0_ppc { irq-pin = <&gpio_usb_c0_ppc_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; @@ -42,11 +37,6 @@ flags = <GPIO_INT_EDGE_FALLING>; handler = "bc12_interrupt"; }; - int_usb_c1_tcpc: usb_c1_tcpc { - irq-pin = <&gpio_usb_c1_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c1_ppc: usb_c1_ppc { irq-pin = <&gpio_usb_c1_ppc_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; @@ -87,4 +77,3 @@ /* Required node label that doesn't is named differently on Rex */ gpio_ec_pch_wake_odl: &gpio_ec_soc_wake_r_odl {}; - diff --git a/zephyr/program/rex/rex.dtsi b/zephyr/program/rex/rex.dtsi index 3c3df257ea..0bb7bebced 100644 --- a/zephyr/program/rex/rex.dtsi +++ b/zephyr/program/rex/rex.dtsi @@ -115,7 +115,11 @@ gpio-dev = <&nct3807_C0>; reg = <0x70>; tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; - int-pin = <&gpio_usb_c0_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c0_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; }; nct3807_C0: nct3807_C0@70 { @@ -207,7 +211,11 @@ TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V | TCPC_FLAGS_CONTROL_VCONN | TCPC_FLAGS_CONTROL_FRS)>; - int-pin = <&gpio_usb_c1_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c1_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; }; }; diff --git a/zephyr/program/rex/src/usbc_config.c b/zephyr/program/rex/src/usbc_config.c index 795ffc4db4..0401b6892b 100644 --- a/zephyr/program/rex/src/usbc_config.c +++ b/zephyr/program/rex/src/usbc_config.c @@ -48,10 +48,6 @@ static void usbc_interrupt_init(void) gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_ppc)); - /* Enable TCPC interrupts. */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_tcpc)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_tcpc)); - /* Enable BC 1.2 interrupts */ gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_bc12)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_bc12)); diff --git a/zephyr/program/skyrim/crystaldrift/CMakeLists.txt b/zephyr/program/skyrim/crystaldrift/CMakeLists.txt index 6e50c3d40e..f097c85c9b 100644 --- a/zephyr/program/skyrim/crystaldrift/CMakeLists.txt +++ b/zephyr/program/skyrim/crystaldrift/CMakeLists.txt @@ -8,5 +8,6 @@ zephyr_library_sources( "src/ppc_config.c" "src/form_factor.c" "src/alt_charger.c" + "src/keyboard.c" ) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "src/fan.c") diff --git a/zephyr/program/skyrim/crystaldrift/project.overlay b/zephyr/program/skyrim/crystaldrift/project.overlay index ba4d5ea549..e39c18c5a6 100644 --- a/zephyr/program/skyrim/crystaldrift/project.overlay +++ b/zephyr/program/skyrim/crystaldrift/project.overlay @@ -21,11 +21,8 @@ / { /* battery overrides */ batteries { - default_battery: aec_5477109 { - compatible = "aec,5477109", "battery-smart"; - }; - smp_l20m3pg1 { - compatible = "smp,l20m3pg1", "battery-smart"; + default_battery: bms-gf_cr50 { + compatible = "bms-gf,cr50", "battery-smart"; }; }; @@ -168,4 +165,14 @@ /* i2c overrides */ &i2c0_0 { /delete-node/ nx20p348x@71; + /delete-node/ anx7483@3e; +}; +&amd_fp6_port0 { + board-set = "board_c0_amd_fp6_mux_set"; +}; +/* usbc overrides */ +&usbc_port0 { + usb-mux-chain-0 { + usb-muxes = <&amd_fp6_port0>; + }; }; diff --git a/zephyr/program/skyrim/crystaldrift/src/alt_charger.c b/zephyr/program/skyrim/crystaldrift/src/alt_charger.c index a429457136..83e827ca5f 100644 --- a/zephyr/program/skyrim/crystaldrift/src/alt_charger.c +++ b/zephyr/program/skyrim/crystaldrift/src/alt_charger.c @@ -12,9 +12,15 @@ #include <zephyr/devicetree.h> #include <zephyr/logging/log.h> +#ifdef CONFIG_ZTEST +#undef CHG_ENABLE_ALTERNATE +void chg_enable_alternate_test(int port); +#define CHG_ENABLE_ALTERNATE(x) chg_enable_alternate_test(x) +#endif /* CONFIG_ZTEST */ + LOG_MODULE_DECLARE(crystaldrift, CONFIG_SKYRIM_LOG_LEVEL); -static void alt_charger_init(void) +test_export_static void alt_charger_init(void) { int ret; uint32_t val; diff --git a/zephyr/program/skyrim/crystaldrift/src/fan.c b/zephyr/program/skyrim/crystaldrift/src/fan.c index 6645e2a495..21f9d66daa 100644 --- a/zephyr/program/skyrim/crystaldrift/src/fan.c +++ b/zephyr/program/skyrim/crystaldrift/src/fan.c @@ -18,7 +18,7 @@ LOG_MODULE_DECLARE(crystaldrift, CONFIG_SKYRIM_LOG_LEVEL); /* * Skyrim fan support */ -static void fan_init(void) +test_export_static void fan_init(void) { int ret; uint32_t val; diff --git a/zephyr/program/skyrim/crystaldrift/src/keyboard.c b/zephyr/program/skyrim/crystaldrift/src/keyboard.c new file mode 100644 index 0000000000..fafdd40c0a --- /dev/null +++ b/zephyr/program/skyrim/crystaldrift/src/keyboard.c @@ -0,0 +1,29 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_commands.h" + +static const struct ec_response_keybd_config skyrim_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + return &skyrim_kb; +} diff --git a/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c b/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c index 0e08431360..9b6d5f9462 100644 --- a/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c +++ b/zephyr/program/skyrim/crystaldrift/src/usb_mux_config.c @@ -48,12 +48,12 @@ static int ioex_set_flip(int port, mux_state_t mux_state) return EC_SUCCESS; } -int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state) +int board_c0_amd_fp6_mux_set(const struct usb_mux *me, mux_state_t mux_state) { /* Set the SBU polarity mux */ RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); - return anx7483_set_default_tuning(me, mux_state); + return EC_SUCCESS; } int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) diff --git a/zephyr/program/skyrim/frostflow/project.conf b/zephyr/program/skyrim/frostflow/project.conf index 072cb8ddd0..7f06ff2ca4 100644 --- a/zephyr/program/skyrim/frostflow/project.conf +++ b/zephyr/program/skyrim/frostflow/project.conf @@ -6,8 +6,6 @@ CONFIG_BOARD_FROSTFLOW=y CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT_DERATE_PCT=10 -# TODO(b/215404321): Remove later in board development -CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=n # Frostflow is capable of sinking 45W diff --git a/zephyr/program/skyrim/frostflow/project.overlay b/zephyr/program/skyrim/frostflow/project.overlay index f43c789ce0..55aa7b69fa 100644 --- a/zephyr/program/skyrim/frostflow/project.overlay +++ b/zephyr/program/skyrim/frostflow/project.overlay @@ -76,33 +76,38 @@ fan_steps_clamshell: fan-steps-clamshell { compatible = "cros-ec,fan-steps"; level_0 { - temp_on = <(-1) (-1) (-1) (-1) 31>; - temp_off = <(-1) (-1) (-1) (-1) 99>; + temp_on = <(-1) 37 (-1) (-1) (-1)>; + temp_off = <(-1) 99 (-1) (-1) (-1)>; rpm_target = <0>; }; level_1 { - temp_on = <(-1) (-1) (-1) (-1) 32>; - temp_off = <(-1) (-1) (-1) (-1) 30>; + temp_on = <(-1) 38 (-1) (-1) (-1)>; + temp_off = <(-1) 36 (-1) (-1) (-1)>; rpm_target = <2600>; }; level_2 { - temp_on = <(-1) (-1) (-1) (-1) 34>; - temp_off = <(-1) (-1) (-1) (-1) 31>; - rpm_target = <2900>; + temp_on = <(-1) 42 (-1) (-1) (-1)>; + temp_off = <(-1) 37 (-1) (-1) (-1)>; + rpm_target = <3200>; }; level_3 { - temp_on = <(-1) (-1) (-1) (-1) 36>; - temp_off = <(-1) (-1) (-1) (-1) 33>; - rpm_target = <3600>; + temp_on = <(-1) 44 (-1) (-1) (-1)>; + temp_off = <(-1) 41 (-1) (-1) (-1)>; + rpm_target = <3500>; }; level_4 { - temp_on = <(-1) (-1) (-1) (-1) 38>; - temp_off = <(-1) (-1) (-1) (-1) 35>; - rpm_target = <4200>; + temp_on = <(-1) 47 (-1) (-1) (-1)>; + temp_off = <(-1) 43 (-1) (-1) (-1)>; + rpm_target = <3700>; }; level_5 { - temp_on = <(-1) (-1) (-1) (-1) 45>; - temp_off = <(-1) (-1) (-1) (-1) 37>; + temp_on = <(-1) 50 (-1) (-1) (-1)>; + temp_off = <(-1) 46 (-1) (-1) (-1)>; + rpm_target = <4200>; + }; + level_6 { + temp_on = <(-1) 56 (-1) (-1) (-1)>; + temp_off = <(-1) 49 (-1) (-1) (-1)>; rpm_target = <4600>; }; }; @@ -110,33 +115,38 @@ fan_steps_tablet: fan-steps-tablet { compatible = "cros-ec,fan-steps"; level_0 { - temp_on = <(-1) (-1) (-1) (-1) 31>; - temp_off = <(-1) (-1) (-1) (-1) 99>; + temp_on = <(-1) 38 (-1) (-1) (-1)>; + temp_off = <(-1) 99 (-1) (-1) (-1)>; rpm_target = <0>; }; level_1 { - temp_on = <(-1) (-1) (-1) (-1) 32>; - temp_off = <(-1) (-1) (-1) (-1) 30>; + temp_on = <(-1) 39 (-1) (-1) (-1)>; + temp_off = <(-1) 37 (-1) (-1) (-1)>; rpm_target = <2600>; }; level_2 { - temp_on = <(-1) (-1) (-1) (-1) 34>; - temp_off = <(-1) (-1) (-1) (-1) 31>; - rpm_target = <2900>; + temp_on = <(-1) 45 (-1) (-1) (-1)>; + temp_off = <(-1) 38 (-1) (-1) (-1)>; + rpm_target = <3200>; }; level_3 { - temp_on = <(-1) (-1) (-1) (-1) 36>; - temp_off = <(-1) (-1) (-1) (-1) 33>; - rpm_target = <3600>; + temp_on = <(-1) 48 (-1) (-1) (-1)>; + temp_off = <(-1) 44 (-1) (-1) (-1)>; + rpm_target = <3500>; }; level_4 { - temp_on = <(-1) (-1) (-1) (-1) 38>; - temp_off = <(-1) (-1) (-1) (-1) 35>; - rpm_target = <4200>; + temp_on = <(-1) 50 (-1) (-1) (-1)>; + temp_off = <(-1) 47 (-1) (-1) (-1)>; + rpm_target = <3700>; }; level_5 { - temp_on = <(-1) (-1) (-1) (-1) 45>; - temp_off = <(-1) (-1) (-1) (-1) 37>; + temp_on = <(-1) 53 (-1) (-1) (-1)>; + temp_off = <(-1) 49 (-1) (-1) (-1)>; + rpm_target = <4200>; + }; + level_6 { + temp_on = <(-1) 58 (-1) (-1) (-1)>; + temp_off = <(-1) 52 (-1) (-1) (-1)>; rpm_target = <4600>; }; }; @@ -280,4 +290,5 @@ rpm_min = <2400>; rpm_start = <2600>; rpm_max = <4600>; + rpm_deviation = <2>; }; diff --git a/zephyr/program/skyrim/frostflow/src/thermal.c b/zephyr/program/skyrim/frostflow/src/thermal.c index 59110dd35e..101823cc26 100644 --- a/zephyr/program/skyrim/frostflow/src/thermal.c +++ b/zephyr/program/skyrim/frostflow/src/thermal.c @@ -12,7 +12,7 @@ #include "thermal.h" #include "util.h" -#define TEMP_AMB TEMP_SENSOR_ID(DT_NODELABEL(temp_amb)) +#define TEMP_MEM TEMP_SENSOR_ID(DT_NODELABEL(temp_sensor_memory)) struct fan_step { /* @@ -68,17 +68,17 @@ int fan_table_to_rpm(int fan, int *temp) * 3. invariant path. (return the current RPM) */ - if (temp[TEMP_AMB] < prev_tmp[TEMP_AMB]) { + if (temp[TEMP_MEM] < prev_tmp[TEMP_MEM]) { for (i = current_level; i > 0; i--) { - if (temp[TEMP_AMB] < fan_step_table[i].off[TEMP_AMB]) + if (temp[TEMP_MEM] <= fan_step_table[i].off[TEMP_MEM]) current_level = i - 1; else break; } - } else if (temp[TEMP_AMB] > prev_tmp[TEMP_AMB]) { + } else if (temp[TEMP_MEM] > prev_tmp[TEMP_MEM]) { for (i = current_level; i < NUM_FAN_LEVELS; i++) { - if (temp[TEMP_AMB] > fan_step_table[i].on[TEMP_AMB]) - current_level = i + 1; + if (temp[TEMP_MEM] >= fan_step_table[i].on[TEMP_MEM]) + current_level = i; else break; } diff --git a/zephyr/program/skyrim/frostflow/src/usb_mux_config.c b/zephyr/program/skyrim/frostflow/src/usb_mux_config.c index 2ec1dda0be..f2c5bd2444 100644 --- a/zephyr/program/skyrim/frostflow/src/usb_mux_config.c +++ b/zephyr/program/skyrim/frostflow/src/usb_mux_config.c @@ -5,12 +5,26 @@ /* Frostflow board-specific USB-C mux configuration */ +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "driver/retimer/ps8811.h" +#include "hooks.h" +#include "i2c.h" #include "ioexpander.h" +#include "timer.h" +#include "usb_mux.h" #include "usbc/usb_muxes.h" +#include "util.h" #define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) #define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) +struct ps8811_reg_val { + uint8_t reg; + uint16_t val; +}; + /* * USB C0 (general) and C1 (just ps8815 DB) use IOEX pins to * indicate flipped polarity to a protection switch. @@ -60,3 +74,108 @@ int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state) return 0; } + +const static struct ps8811_reg_val equalizer_wwan_table[] = { + { + /* Set channel A EQ setting */ + .reg = PS8811_REG1_USB_AEQ_LEVEL, + .val = (PS8811_AEQ_I2C_LEVEL_UP_13DB + << PS8811_AEQ_I2C_LEVEL_UP_SHIFT) | + (PS8811_AEQ_PIN_LEVEL_UP_18DB + << PS8811_AEQ_PIN_LEVEL_UP_SHIFT), + }, + { + /* Set ADE pin setting */ + .reg = PS8811_REG1_USB_ADE_CONFIG, + .val = (PS8811_ADE_PIN_MID_LEVEL_3DB + << PS8811_ADE_PIN_MID_LEVEL_SHIFT) | + PS8811_AEQ_CONFIG_REG_ENABLE, + }, + { + /* Set channel B EQ setting */ + .reg = PS8811_REG1_USB_BEQ_LEVEL, + .val = (PS8811_BEQ_I2C_LEVEL_UP_10P5DB + << PS8811_BEQ_I2C_LEVEL_UP_SHIFT) | + (PS8811_BEQ_PIN_LEVEL_UP_18DB + << PS8811_BEQ_PIN_LEVEL_UP_SHIFT), + }, + { + /* Set BDE pin setting */ + .reg = PS8811_REG1_USB_BDE_CONFIG, + .val = (PS8811_BDE_PIN_MID_LEVEL_3DB + << PS8811_BDE_PIN_MID_LEVEL_SHIFT) | + PS8811_BEQ_CONFIG_REG_ENABLE, + }, +}; + +#define NUM_EQ_WWAN_ARRAY ARRAY_SIZE(equalizer_wwan_table) + +const static struct ps8811_reg_val equalizer_wlan_table[] = { + { + /* Set 50ohm adjust for B channel */ + .reg = PS8811_REG1_50OHM_ADJUST_CHAN_B, + .val = (PS8811_50OHM_ADJUST_CHAN_B_MINUS_14PCT + << PS8811_50OHM_ADJUST_CHAN_B_SHIFT), + }, +}; + +#define NUM_EQ_WLAN_ARRAY ARRAY_SIZE(equalizer_wlan_table) +/* USB-A ports */ +enum usba_port { USBA_PORT_A1, USBA_PORT_COUNT }; +const struct usb_mux usba_ps8811[] = { + [USBA_PORT_A1] = { + .usb_port = USBA_PORT_A1, + .i2c_port = I2C_PORT_NODELABEL(i2c1_0), + .i2c_addr_flags = PS8811_I2C_ADDR_FLAGS3, + }, +}; + +static int usba_retimer_init(int port) +{ + int rv; + int val; + int i; + const struct usb_mux *me = &usba_ps8811[port]; + + rv = ps8811_i2c_read(me, PS8811_REG_PAGE1, PS8811_REG1_USB_BEQ_LEVEL, + &val); + + if (rv) { + CPRINTSUSB("A1: PS8811 retimer response fail!"); + return rv; + } + CPRINTSUSB("A1: PS8811 retimer detected"); + + if (chipset_in_state(CHIPSET_STATE_ON)) { + /* Set channel A output swing */ + rv = ps8811_i2c_field_update(me, PS8811_REG_PAGE1, + PS8811_REG1_USB_CHAN_A_SWING, + PS8811_CHAN_A_SWING_MASK, + 0x3 << PS8811_CHAN_A_SWING_SHIFT); + + for (i = 0; i < NUM_EQ_WWAN_ARRAY; i++) + rv |= ps8811_i2c_write(me, PS8811_REG_PAGE1, + equalizer_wwan_table[i].reg, + equalizer_wwan_table[i].val); + for (i = 0; i < NUM_EQ_WLAN_ARRAY; i++) + rv |= ps8811_i2c_write(me, PS8811_REG_PAGE1, + equalizer_wlan_table[i].reg, + equalizer_wlan_table[i].val); + } + return rv; +} + +void baseboard_a1_retimer_setup(void) +{ + int i; + + for (i = 0; i < USBA_PORT_COUNT; ++i) + usba_retimer_init(i); +} +DECLARE_DEFERRED(baseboard_a1_retimer_setup); + +void board_chipset_startup(void) +{ + hook_call_deferred(&baseboard_a1_retimer_setup_data, 500 * MSEC); +} +DECLARE_HOOK(HOOK_INIT, board_chipset_startup, HOOK_PRIO_DEFAULT); diff --git a/zephyr/program/skyrim/i2c.dtsi b/zephyr/program/skyrim/i2c.dtsi index 8568ff5f49..c1f3d2d0f6 100644 --- a/zephyr/program/skyrim/i2c.dtsi +++ b/zephyr/program/skyrim/i2c.dtsi @@ -84,7 +84,11 @@ reg = <0x70>; gpio-dev = <&nct3807_C0>; tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; - int-pin = <&gpio_usb_c0_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c0_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; }; nct3807_C0: nct3807_C0@70 { @@ -159,7 +163,11 @@ reg = <0x70>; gpio-dev = <&nct3807_C1>; tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; - int-pin = <&gpio_usb_c1_tcpc_int_odl>; + /* a duplicate of the <&gpio_usb_c1_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioc 7 GPIO_ACTIVE_LOW>; }; nct3807_C1: nct3807_C1@70 { diff --git a/zephyr/program/skyrim/interrupts.dtsi b/zephyr/program/skyrim/interrupts.dtsi index 03af135e8b..0e25a147f7 100644 --- a/zephyr/program/skyrim/interrupts.dtsi +++ b/zephyr/program/skyrim/interrupts.dtsi @@ -97,16 +97,6 @@ flags = <GPIO_INT_EDGE_FALLING>; handler = "sbu_fault_interrupt"; }; - int_usb_c0_tcpc: usb_c0_tcpc { - irq-pin = <&gpio_usb_c0_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c1_tcpc: usb_c1_tcpc { - irq-pin = <&gpio_usb_c1_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c0_ppc: usb_c0_ppc { irq-pin = <&gpio_usb_c0_ppc_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; diff --git a/zephyr/program/skyrim/markarth/CMakeLists.txt b/zephyr/program/skyrim/markarth/CMakeLists.txt index 37907d80d4..de0269c5f0 100644 --- a/zephyr/program/skyrim/markarth/CMakeLists.txt +++ b/zephyr/program/skyrim/markarth/CMakeLists.txt @@ -10,3 +10,7 @@ zephyr_library_sources( "src/keyboard.c" ) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "src/fan.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD_CUSTOMIZATION + "src/keyboard.c" + "src/keyboard_customization.c" +) diff --git a/zephyr/program/skyrim/markarth/include/keyboard_customization.h b/zephyr/program/skyrim/markarth/include/keyboard_customization.h new file mode 100644 index 0000000000..8e7e3ee2c1 --- /dev/null +++ b/zephyr/program/skyrim/markarth/include/keyboard_customization.h @@ -0,0 +1,80 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Keyboard configuration */ + +#ifndef __KEYBOARD_CUSTOMIZATION_H +#define __KEYBOARD_CUSTOMIZATION_H + +#define KEYBOARD_MASK_PWRBTN KEYBOARD_ROW_TO_MASK(3) + +/* + * KEYBOARD_COLS_MAX has the build time column size. It's used to allocate + * exact spaces for arrays. Actual keyboard scanning is done using + * keyboard_cols, which holds a runtime column size. + */ +#ifdef CONFIG_KEYBOARD_CUSTOMIZATION +#undef KEYBOARD_COLS_MAX +#undef KEYBOARD_ROWS + +#define KEYBOARD_COLS_MAX 13 +#define KEYBOARD_ROWS 8 +#endif + +/* + * WARNING: Do not directly modify it. You should call keyboard_raw_set_cols, + * instead. It checks whether you're eligible or not. + */ +extern uint8_t keyboard_cols; + +#define KEYBOARD_ROW_TO_MASK(r) (1 << (r)) + +/* Columns and masks for keys we particularly care about */ +#define KEYBOARD_COL_DOWN 11 +#define KEYBOARD_ROW_DOWN 6 +#define KEYBOARD_MASK_DOWN KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_DOWN) +#define KEYBOARD_COL_ESC 1 +#define KEYBOARD_ROW_ESC 1 +#define KEYBOARD_MASK_ESC KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_ESC) +#define KEYBOARD_COL_KEY_H 6 +#define KEYBOARD_ROW_KEY_H 1 +#define KEYBOARD_MASK_KEY_H KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_KEY_H) +#define KEYBOARD_COL_KEY_R 3 +#define KEYBOARD_ROW_KEY_R 7 +#define KEYBOARD_MASK_KEY_R KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_KEY_R) +#define KEYBOARD_COL_LEFT_ALT 10 +#define KEYBOARD_ROW_LEFT_ALT 6 +#define KEYBOARD_MASK_LEFT_ALT KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_LEFT_ALT) +#define KEYBOARD_COL_REFRESH 2 +#define KEYBOARD_ROW_REFRESH 3 +#define KEYBOARD_MASK_REFRESH KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_REFRESH) +#define KEYBOARD_COL_RIGHT_ALT 10 +#define KEYBOARD_ROW_RIGHT_ALT 0 +#define KEYBOARD_MASK_RIGHT_ALT KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_RIGHT_ALT) +#define KEYBOARD_DEFAULT_COL_VOL_UP 4 +#define KEYBOARD_DEFAULT_ROW_VOL_UP 0 +#define KEYBOARD_COL_LEFT_CTRL 0 +#define KEYBOARD_ROW_LEFT_CTRL 2 +#define KEYBOARD_MASK_LEFT_CTRL KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_LEFT_CTRL) +#define KEYBOARD_COL_RIGHT_CTRL 0 +#define KEYBOARD_ROW_RIGHT_CTRL 4 +#define KEYBOARD_MASK_RIGHT_CTRL KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_RIGHT_CTRL) +#define KEYBOARD_COL_SEARCH 1 +#define KEYBOARD_ROW_SEARCH 0 +#define KEYBOARD_MASK_SEARCH KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_SEARCH) +#define KEYBOARD_COL_KEY_0 8 +#define KEYBOARD_ROW_KEY_0 6 +#define KEYBOARD_MASK_KEY_0 KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_KEY_0) +#define KEYBOARD_COL_KEY_1 1 +#define KEYBOARD_ROW_KEY_1 6 +#define KEYBOARD_MASK_KEY_1 KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_KEY_1) +#define KEYBOARD_COL_KEY_2 4 +#define KEYBOARD_ROW_KEY_2 6 +#define KEYBOARD_MASK_KEY_2 KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_KEY_2) +#define KEYBOARD_COL_LEFT_SHIFT 7 +#define KEYBOARD_ROW_LEFT_SHIFT 5 +#define KEYBOARD_MASK_LEFT_SHIFT KEYBOARD_ROW_TO_MASK(KEYBOARD_ROW_LEFT_SHIFT) + +#endif /* __KEYBOARD_CUSTOMIZATION_H */ diff --git a/zephyr/program/skyrim/markarth/project.conf b/zephyr/program/skyrim/markarth/project.conf index a3f67befd0..cf6c391ffc 100644 --- a/zephyr/program/skyrim/markarth/project.conf +++ b/zephyr/program/skyrim/markarth/project.conf @@ -8,9 +8,9 @@ CONFIG_BOARD_MARKARTH=y # CBI WP pin present CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y -# Markarth is capable of sinking 100W -CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=100000 -CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=5000 +# Markarth is capable of sinking 65W +CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=65000 +CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=3250 CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV=20000 # Battery @@ -18,3 +18,6 @@ CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y #Disable BC12 CONFIG_PLATFORM_EC_USB_CHARGER=n + +# Keyboard +CONFIG_PLATFORM_EC_KEYBOARD_CUSTOMIZATION=y diff --git a/zephyr/program/skyrim/markarth/project.overlay b/zephyr/program/skyrim/markarth/project.overlay index 4f4ce9fd7a..89c49fa8c1 100644 --- a/zephyr/program/skyrim/markarth/project.overlay +++ b/zephyr/program/skyrim/markarth/project.overlay @@ -202,4 +202,30 @@ &i2c_sensor { /delete-node/ enum-names; enum-names = "I2C_PORT_THERMAL"; -};
\ No newline at end of file +}; + +&cros_kb_raw { + status = "okay"; + pinctrl-0 = < + &ksi0_gp31 + &ksi1_gp30 + &ksi2_gp27 + &ksi3_gp26 + &ksi4_gp25 + &ksi5_gp24 + &ksi6_gp23 + &ksi7_gp22 + &kso00_gp21 + &kso01_gp20 + &kso03_gp16 + &kso04_gp15 + &kso05_gp14 + &kso06_gp13 + &kso07_gp12 + &kso08_gp11 + &kso09_gp10 + &kso10_gp07 + &kso11_gp06 + &kso12_gp05 + >; +}; diff --git a/zephyr/program/skyrim/markarth/src/fan.c b/zephyr/program/skyrim/markarth/src/fan.c index 182463f846..7dc667a6fc 100644 --- a/zephyr/program/skyrim/markarth/src/fan.c +++ b/zephyr/program/skyrim/markarth/src/fan.c @@ -18,7 +18,7 @@ LOG_MODULE_DECLARE(markarth, CONFIG_SKYRIM_LOG_LEVEL); /* * Skyrim fan support */ -static void fan_init(void) +test_export_static void fan_init(void) { int ret; uint32_t val; diff --git a/zephyr/program/skyrim/markarth/src/keyboard.c b/zephyr/program/skyrim/markarth/src/keyboard.c index db9e5d3b69..9a3baaaebe 100644 --- a/zephyr/program/skyrim/markarth/src/keyboard.c +++ b/zephyr/program/skyrim/markarth/src/keyboard.c @@ -4,6 +4,24 @@ */ #include "ec_commands.h" +#include "keyboard_scan.h" +#include "timer.h" + +/* Keyboard scan setting */ +__override struct keyboard_scan_config keyscan_config = { + /* Increase from 50 us, because KSO_02 passes through the H1. */ + .output_settle_us = 80, + /* Other values should be the same as the default configuration. */ + .debounce_down_us = 9 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, + .actual_key_mask = { + 0x1c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xa4, 0xff, 0xf7, 0x55, 0xfb, 0xca, + }, +}; static const struct ec_response_keybd_config markarth_kb = { .num_top_row_keys = 10, @@ -27,3 +45,30 @@ board_vivaldi_keybd_config(void) { return &markarth_kb; } + +/* + * Row Column info for Top row keys T1 - T10. + * on markarth_kb keyboard Row Column is customization + * need define row col to mapping matrix layout. + */ +__override const struct key { + uint8_t row; + uint8_t col; +} vivaldi_keys[] = { + { .row = 0, .col = 2 }, /* T1 */ + { .row = 3, .col = 2 }, /* T2 */ + { .row = 2, .col = 2 }, /* T3 */ + { .row = 1, .col = 2 }, /* T4 */ + { .row = 3, .col = 4 }, /* T5 */ + { .row = 2, .col = 4 }, /* T6 */ + { .row = 1, .col = 4 }, /* T7 */ + { .row = 2, .col = 9 }, /* T8 */ + { .row = 1, .col = 9 }, /* T9 */ + { .row = 0, .col = 4 }, /* T10 */ + { .row = 3, .col = 0 }, /* T11 */ + { .row = 1, .col = 5 }, /* T12 */ + { .row = 3, .col = 5 }, /* T13 */ + { .row = 0, .col = 9 }, /* T14 */ + { .row = 0, .col = 11 }, /* T15 */ +}; +BUILD_ASSERT(ARRAY_SIZE(vivaldi_keys) == MAX_TOP_ROW_KEYS); diff --git a/zephyr/program/skyrim/markarth/src/keyboard_customization.c b/zephyr/program/skyrim/markarth/src/keyboard_customization.c new file mode 100644 index 0000000000..6ba279666f --- /dev/null +++ b/zephyr/program/skyrim/markarth/src/keyboard_customization.c @@ -0,0 +1,83 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "gpio.h" +#include "keyboard_customization.h" +#include "keyboard_protocol.h" +#include "keyboard_raw.h" + +#include <zephyr/drivers/gpio.h> + +static uint16_t scancode_set2[KEYBOARD_COLS_MAX][KEYBOARD_ROWS] = { + { 0x0000, 0x0000, 0x0014, 0x0000, 0xe014, 0x0000, 0x0000, 0x0000 }, + { 0x0058, 0x0076, 0x000d, 0x000e, 0x001c, 0x001a, 0x0016, 0x0015 }, + { 0x0005, 0x000c, 0x0004, 0x0006, 0x0023, 0x0021, 0x0026, 0x0024 }, + { 0x0032, 0x0034, 0x002c, 0x002e, 0x002b, 0x002a, 0x0025, 0x002d }, + { 0x000a, 0x0083, 0x000b, 0x0003, 0x001b, 0x0022, 0x001e, 0x001d }, + { 0x0051, 0x0000, 0x005b, 0x0000, 0x0042, 0x0041, 0x003e, 0x0043 }, + { 0x0031, 0x0033, 0x0035, 0x0036, 0x003b, 0x003a, 0x003d, 0x003c }, + { 0x0000, 0x0000, 0x0061, 0x0000, 0x0000, 0x0012, 0x0000, 0x0059 }, + { 0x0055, 0x0052, 0x0054, 0x004e, 0x004c, 0x004a, 0x0045, 0x004d }, + { 0x0000, 0x0078, 0x0009, 0x0000, 0x004b, 0x0049, 0x0046, 0x0044 }, + { 0xe011, 0x0000, 0x006a, 0x0000, 0x005d, 0x0000, 0x0011, 0x0000 }, + { 0x0000, 0x0066, 0x0000, 0x005d, 0x005a, 0x0029, 0xe072, 0xe075 }, + { 0x0000, 0xe064, 0x0000, 0x0067, 0x0000, 0x0000, 0xe074, 0xe06b }, +}; + +uint16_t get_scancode_set2(uint8_t row, uint8_t col) +{ + if (col < KEYBOARD_COLS_MAX && row < KEYBOARD_ROWS) + return scancode_set2[col][row]; + return 0; +} + +void set_scancode_set2(uint8_t row, uint8_t col, uint16_t val) +{ + if (col < KEYBOARD_COLS_MAX && row < KEYBOARD_ROWS) + scancode_set2[col][row] = val; +} + +#ifdef CONFIG_KEYBOARD_DEBUG +static uint8_t keycap_label[KEYBOARD_COLS_MAX][KEYBOARD_ROWS] = { + { 'c', KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, + KLLI_UNKNO, KLLI_UNKNO }, + { KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, + KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO }, + { 'q', KLLI_UNKNO, KLLI_UNKNO, KLLI_TAB, '`', '1', KLLI_UNKNO, 'a' }, + { KLLI_R_ALT, KLLI_L_ALT, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, + KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO }, + { KLLI_UNKNO, KLLI_SPACE, 'e', KLLI_F4, KLLI_SEARC, '3', KLLI_F3, + KLLI_UNKNO }, + { 'x', 'z', KLLI_F2, KLLI_F1, 's', '2', 'w', KLLI_ESC }, + { 'v', 'b', 'g', 't', '5', '4', 'r', 'f' }, + { 'm', 'n', 'h', 'y', '6', '7', 'u', 'j' }, + { '.', KLLI_DOWN, '\\', 'o', KLLI_F10, '9', KLLI_UNKNO, 'l' }, + { KLLI_R_SHT, KLLI_L_SHT, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, + KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO }, + { ',', KLLI_UNKNO, KLLI_F7, KLLI_F6, KLLI_F5, '8', 'i', 'k' }, + { KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, KLLI_F9, KLLI_UNKNO, KLLI_UNKNO, + KLLI_LEFT, KLLI_UNKNO }, + { KLLI_R_CTR, KLLI_L_CTR, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, + KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO }, + { '/', KLLI_UP, '-', KLLI_UNKNO, '0', 'p', '[', ';' }, + { '\'', KLLI_ENTER, KLLI_UNKNO, KLLI_UNKNO, '=', KLLI_B_SPC, ']', 'd' }, + { KLLI_UNKNO, KLLI_F8, KLLI_RIGHT, KLLI_UNKNO, KLLI_UNKNO, KLLI_UNKNO, + KLLI_UNKNO, KLLI_UNKNO }, +}; + +uint8_t get_keycap_label(uint8_t row, uint8_t col) +{ + if (col < KEYBOARD_COLS_MAX && row < KEYBOARD_ROWS) + return keycap_label[col][row]; + return KLLI_UNKNO; +} + +void set_keycap_label(uint8_t row, uint8_t col, uint8_t val) +{ + if (col < KEYBOARD_COLS_MAX && row < KEYBOARD_ROWS) + keycap_label[col][row] = val; +} +#endif diff --git a/zephyr/program/skyrim/skyrim/src/alt_charger.c b/zephyr/program/skyrim/skyrim/src/alt_charger.c index 91e5af8426..e6e5076c09 100644 --- a/zephyr/program/skyrim/skyrim/src/alt_charger.c +++ b/zephyr/program/skyrim/skyrim/src/alt_charger.c @@ -12,9 +12,15 @@ #include <zephyr/devicetree.h> #include <zephyr/logging/log.h> +#ifdef CONFIG_ZTEST +#undef CHG_ENABLE_ALTERNATE +void chg_enable_alternate_test(int port); +#define CHG_ENABLE_ALTERNATE(x) chg_enable_alternate_test(x) +#endif /* CONFIG_ZTEST */ + LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); -static void alt_charger_init(void) +test_export_static void alt_charger_init(void) { int ret; uint32_t val; diff --git a/zephyr/program/skyrim/skyrim/src/fan.c b/zephyr/program/skyrim/skyrim/src/fan.c index c584022a92..a33a2dc151 100644 --- a/zephyr/program/skyrim/skyrim/src/fan.c +++ b/zephyr/program/skyrim/skyrim/src/fan.c @@ -18,7 +18,7 @@ LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); /* * Skyrim fan support */ -static void fan_init(void) +test_export_static void fan_init(void) { int ret; uint32_t val; diff --git a/zephyr/program/skyrim/src/usbc_config.c b/zephyr/program/skyrim/src/usbc_config.c index 14502cc670..c8f56c455f 100644 --- a/zephyr/program/skyrim/src/usbc_config.c +++ b/zephyr/program/skyrim/src/usbc_config.c @@ -51,10 +51,6 @@ static void usbc_interrupt_init(void) gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_ppc)); - /* Enable TCPC interrupts. */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_tcpc)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_tcpc)); - #ifdef CONFIG_PLATFORM_EC_USB_CHARGER /* Enable BC 1.2 interrupts */ gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_bc12)); diff --git a/zephyr/program/skyrim/winterhold/project.conf b/zephyr/program/skyrim/winterhold/project.conf index 9938196f0c..dda21dba09 100644 --- a/zephyr/program/skyrim/winterhold/project.conf +++ b/zephyr/program/skyrim/winterhold/project.conf @@ -5,10 +5,6 @@ # Winterhold reference-board-specific Kconfig settings. CONFIG_BOARD_WINTERHOLD=y -# TODO(b/215404321): Remove later in board development -CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y -CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y - # Enable charger chip CONFIG_PLATFORM_EC_CHARGER_ISL9238=y CONFIG_PLATFORM_EC_CHARGER_ISL9241=n diff --git a/zephyr/program/skyrim/winterhold/project.overlay b/zephyr/program/skyrim/winterhold/project.overlay index fbbc1f2b88..447c9587f9 100644 --- a/zephyr/program/skyrim/winterhold/project.overlay +++ b/zephyr/program/skyrim/winterhold/project.overlay @@ -59,7 +59,7 @@ temp_host_release_high = <95>; temp_host_release_halt = <100>; temp_fan_off = <55>; - temp_fan_max = <75>; + temp_fan_max = <72>; power-good-pin = <&gpio_pg_pwr_s5>; sensor = <&soc_pct2075>; }; @@ -213,8 +213,8 @@ /delete-property/ temp_host_high; /delete-property/ temp_host_halt; /delete-property/ temp_host_release_high; - temp_fan_off = <62>; - temp_fan_max = <72>; + temp_fan_off = <76>; + temp_fan_max = <82>; }; /* handler overrides */ diff --git a/zephyr/program/skyrim/winterhold/src/sensor.c b/zephyr/program/skyrim/winterhold/src/sensor.c index a0d89e56ce..e609d806b0 100644 --- a/zephyr/program/skyrim/winterhold/src/sensor.c +++ b/zephyr/program/skyrim/winterhold/src/sensor.c @@ -24,7 +24,7 @@ void base_accel_interrupt(enum gpio_signal signal) bmi3xx_interrupt(signal); else if (val == 1) lis2dw12_interrupt(signal); - else if (val == 2) { + else if (val >= 2) { if (fw_val == FW_BASE_BMI323) bmi3xx_interrupt(signal); else if (fw_val == FW_BASE_LIS2DW12) @@ -43,7 +43,7 @@ static void motionsense_init(void) if (ret == EC_SUCCESS && val < 1) { MOTIONSENSE_ENABLE_ALTERNATE(alt_base_accel); - } else if (val == 2) { + } else if (val >= 2) { if (fw_val == FW_BASE_BMI323) { MOTIONSENSE_ENABLE_ALTERNATE(alt_base_accel); ccprints("BASE ACCEL is BMI323"); diff --git a/zephyr/program/skyrim/winterhold/src/thermal.c b/zephyr/program/skyrim/winterhold/src/thermal.c index e2c5e13298..9bbc85333c 100644 --- a/zephyr/program/skyrim/winterhold/src/thermal.c +++ b/zephyr/program/skyrim/winterhold/src/thermal.c @@ -25,12 +25,12 @@ #define THERMAL_DESKTOP_LID_OPEN \ { \ .temp_host = { \ - [EC_TEMP_THRESH_WARN] = C_TO_K(44), \ + [EC_TEMP_THRESH_WARN] = C_TO_K(43), \ [EC_TEMP_THRESH_HIGH] = C_TO_K(105), \ [EC_TEMP_THRESH_HALT] = C_TO_K(110), \ }, \ .temp_host_release = { \ - [EC_TEMP_THRESH_WARN] = C_TO_K(40), \ + [EC_TEMP_THRESH_WARN] = C_TO_K(39), \ [EC_TEMP_THRESH_HIGH] = C_TO_K(95), \ [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ }, \ @@ -90,7 +90,7 @@ __maybe_unused static const struct ec_thermal_config thermal_laptop = [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ }, \ .temp_fan_off = C_TO_K(55), \ - .temp_fan_max = C_TO_K(75), \ + .temp_fan_max = C_TO_K(72), \ } __maybe_unused static const struct ec_thermal_config fan_soc_desktop_lid_open = FAN_SOC_DESKTOP_LID_OPEN; @@ -109,7 +109,7 @@ __maybe_unused static const struct ec_thermal_config fan_soc_desktop_lid_open = [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ }, \ .temp_fan_off = C_TO_K(55), \ - .temp_fan_max = C_TO_K(75), \ + .temp_fan_max = C_TO_K(72), \ } __maybe_unused static const struct ec_thermal_config fan_soc_desktop_lid_close = FAN_SOC_DESKTOP_LID_CLOSE; @@ -128,7 +128,7 @@ __maybe_unused static const struct ec_thermal_config fan_soc_desktop_lid_close = [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ }, \ .temp_fan_off = C_TO_K(51), \ - .temp_fan_max = C_TO_K(71), \ + .temp_fan_max = C_TO_K(68), \ } __maybe_unused static const struct ec_thermal_config fan_soc_laptop = FAN_SOC_LAPTOP; @@ -138,7 +138,7 @@ __maybe_unused static const struct ec_thermal_config fan_soc_laptop = */ #define FAN_CPU_DESKTOP_LID_OPEN \ { \ - .temp_fan_off = C_TO_K(62), .temp_fan_max = C_TO_K(72), \ + .temp_fan_off = C_TO_K(76), .temp_fan_max = C_TO_K(82), \ } __maybe_unused static const struct ec_thermal_config fan_cpu_desktop_lid_open = FAN_CPU_DESKTOP_LID_OPEN; @@ -148,7 +148,7 @@ __maybe_unused static const struct ec_thermal_config fan_cpu_desktop_lid_open = */ #define FAN_CPU_DESKTOP_LID_CLOSE \ { \ - .temp_fan_off = C_TO_K(62), .temp_fan_max = C_TO_K(72), \ + .temp_fan_off = C_TO_K(76), .temp_fan_max = C_TO_K(82), \ } __maybe_unused static const struct ec_thermal_config fan_cpu_desktop_lid_close = FAN_CPU_DESKTOP_LID_CLOSE; @@ -158,7 +158,7 @@ __maybe_unused static const struct ec_thermal_config fan_cpu_desktop_lid_close = */ #define FAN_CPU_LAPTOP \ { \ - .temp_fan_off = C_TO_K(58), .temp_fan_max = C_TO_K(68), \ + .temp_fan_off = C_TO_K(76), .temp_fan_max = C_TO_K(82), \ } __maybe_unused static const struct ec_thermal_config fan_cpu_laptop = FAN_CPU_LAPTOP; diff --git a/zephyr/program/skyrim/winterhold/src/usb_mux_config.c b/zephyr/program/skyrim/winterhold/src/usb_mux_config.c index 2d834bcfdf..8a4bf861d1 100644 --- a/zephyr/program/skyrim/winterhold/src/usb_mux_config.c +++ b/zephyr/program/skyrim/winterhold/src/usb_mux_config.c @@ -149,7 +149,7 @@ int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) int charger_profile_override(struct charge_state_data *curr) { if (chipset_in_state(CHIPSET_STATE_ON)) { - curr->requested_current = MIN(curr->requested_current, 1000); + curr->requested_current = MIN(curr->requested_current, 1152); } return 0; diff --git a/zephyr/program/trogdor/lazor/host_interface_npcx.dts b/zephyr/program/trogdor/lazor/host_interface_npcx.dts index 14efa3c6b2..b691893854 100644 --- a/zephyr/program/trogdor/lazor/host_interface_npcx.dts +++ b/zephyr/program/trogdor/lazor/host_interface_npcx.dts @@ -4,7 +4,7 @@ */ /* host interface */ -&shi { +&shi0 { status = "okay"; pinctrl-0 = <&shi_gp46_47_53_55>; pinctrl-1 = <&shi_gpio_gp46_47_53_55>; diff --git a/zephyr/program/trogdor/lazor/i2c.dts b/zephyr/program/trogdor/lazor/i2c.dts index 8d11d4c90a..595bae59c7 100644 --- a/zephyr/program/trogdor/lazor/i2c.dts +++ b/zephyr/program/trogdor/lazor/i2c.dts @@ -76,7 +76,11 @@ compatible = "parade,ps8xxx"; status = "okay"; reg = <0xb>; - int-pin = <&gpio_usb_c0_pd_int_odl>; + /* a duplicate of the <&gpio_usb_c0_pd_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; }; }; @@ -100,7 +104,11 @@ compatible = "parade,ps8xxx"; status = "okay"; reg = <0xb>; - int-pin = <&gpio_usb_c1_pd_int_odl>; + /* a duplicate of the <&gpio_usb_c1_pd_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpiof 5 GPIO_ACTIVE_LOW>; }; }; diff --git a/zephyr/program/trogdor/lazor/interrupts.dts b/zephyr/program/trogdor/lazor/interrupts.dts index 5c2ed35e90..90e20b8e48 100644 --- a/zephyr/program/trogdor/lazor/interrupts.dts +++ b/zephyr/program/trogdor/lazor/interrupts.dts @@ -81,16 +81,6 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "chipset_warm_reset_interrupt"; }; - int_usb_c0_tcpc: usb_c0_tcpc { - irq-pin = <&gpio_usb_c0_pd_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c1_tcpc: usb_c1_tcpc { - irq-pin = <&gpio_usb_c1_pd_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c0_swctl: usb_c0_swctl { irq-pin = <&gpio_usb_c0_swctl_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; diff --git a/zephyr/program/trogdor/lazor/prj.conf b/zephyr/program/trogdor/lazor/prj.conf index 958c854bd9..9dd83cefe8 100644 --- a/zephyr/program/trogdor/lazor/prj.conf +++ b/zephyr/program/trogdor/lazor/prj.conf @@ -78,7 +78,6 @@ CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y # USB-C CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=n -CONFIG_PLATFORM_EC_USBC_RETIMER_FW_UPDATE=n CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY=y CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y diff --git a/zephyr/program/trogdor/lazor/src/usbc_config.c b/zephyr/program/trogdor/lazor/src/usbc_config.c index 5cb96be7eb..d8cafee7a3 100644 --- a/zephyr/program/trogdor/lazor/src/usbc_config.c +++ b/zephyr/program/trogdor/lazor/src/usbc_config.c @@ -176,10 +176,6 @@ void board_tcpc_init(void) /* Enable PPC interrupts */ gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_swctl)); - /* Enable TCPC interrupts */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_tcpc)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_tcpc)); - /* * Initialize HPD to low; after sysjump SOC needs to see * HPD pulse to enable video path diff --git a/zephyr/shim/chip/CMakeLists.txt b/zephyr/shim/chip/CMakeLists.txt index 1d58857c11..0236570ddd 100644 --- a/zephyr/shim/chip/CMakeLists.txt +++ b/zephyr/shim/chip/CMakeLists.txt @@ -8,5 +8,7 @@ elseif (DEFINED CONFIG_SOC_FAMILY_RISCV_ITE) add_subdirectory(it8xxx2) elseif (DEFINED CONFIG_SOC_FAMILY_MEC) add_subdirectory(mchp) +elseif (DEFINED CONFIG_SOC_FAMILY_STM32) + add_subdirectory(stm32) endif() diff --git a/zephyr/shim/chip/it8xxx2/gpio.c b/zephyr/shim/chip/it8xxx2/gpio.c index 16eb7a3963..78aa504140 100644 --- a/zephyr/shim/chip/it8xxx2/gpio.c +++ b/zephyr/shim/chip/it8xxx2/gpio.c @@ -4,6 +4,9 @@ */ #include "gpio/gpio.h" +#include "gpio_it8xxx2.h" + +#include <errno.h> #include <zephyr/device.h> #include <zephyr/drivers/gpio.h> @@ -52,3 +55,72 @@ int gpio_config_unused_pins(void) return 0; } + +int gpio_configure_port_pin(int port, int id, int flags) +{ + const struct device *dev; + + /* + * Port number mapping to node + * 0 gpioa + * ... ... + * 50 gpioksi + * 51 gpioksoh + * 52 gpioksol + */ + switch ((enum gpio_port_to_node)port) { + case GPIO_A: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioa)); + break; + case GPIO_B: + dev = DEVICE_DT_GET(DT_NODELABEL(gpiob)); + break; + case GPIO_C: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioc)); + break; + case GPIO_D: + dev = DEVICE_DT_GET(DT_NODELABEL(gpiod)); + break; + case GPIO_E: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioe)); + break; + case GPIO_F: + dev = DEVICE_DT_GET(DT_NODELABEL(gpiof)); + break; + case GPIO_G: + dev = DEVICE_DT_GET(DT_NODELABEL(gpiog)); + break; + case GPIO_H: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioh)); + break; + case GPIO_I: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioi)); + break; + case GPIO_J: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioj)); + break; + case GPIO_K: + dev = DEVICE_DT_GET(DT_NODELABEL(gpiok)); + break; + case GPIO_L: + dev = DEVICE_DT_GET(DT_NODELABEL(gpiol)); + break; + case GPIO_M: + dev = DEVICE_DT_GET(DT_NODELABEL(gpiom)); + break; + case GPIO_KSI: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioksi)); + break; + case GPIO_KSOH: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioksoh)); + break; + case GPIO_KSOL: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioksol)); + break; + default: + printk("Error port number %d\n", port); + return -EINVAL; + } + + return gpio_pin_configure(dev, id, flags); +} diff --git a/zephyr/shim/chip/it8xxx2/include/gpio_it8xxx2.h b/zephyr/shim/chip/it8xxx2/include/gpio_it8xxx2.h new file mode 100644 index 0000000000..7abf9f560a --- /dev/null +++ b/zephyr/shim/chip/it8xxx2/include/gpio_it8xxx2.h @@ -0,0 +1,28 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_GPIO_IT8XXX2_H +#define __CROS_EC_GPIO_IT8XXX2_H + +enum gpio_port_to_node { + GPIO_A, + GPIO_B, + GPIO_C, + GPIO_D, + GPIO_E, + GPIO_F, + GPIO_G, + GPIO_H, + GPIO_I, + GPIO_J, + GPIO_K, + GPIO_L, + GPIO_M, + GPIO_KSI = 50, + GPIO_KSOH = 51, + GPIO_KSOL = 52 +}; + +#endif /* __CROS_EC_GPIO_IT8XXX2_H */ diff --git a/zephyr/shim/chip/it8xxx2/keyboard_raw.c b/zephyr/shim/chip/it8xxx2/keyboard_raw.c index 5fe99b7efa..442b51a59a 100644 --- a/zephyr/shim/chip/it8xxx2/keyboard_raw.c +++ b/zephyr/shim/chip/it8xxx2/keyboard_raw.c @@ -6,6 +6,7 @@ /* Functions needed by keyboard scanner module for Chrome EC */ #include "drivers/cros_kb_raw.h" +#include "gpio_it8xxx2.h" #include "keyboard_raw.h" #include <zephyr/device.h> @@ -15,13 +16,27 @@ #include <soc.h> /** - * Return true if the current value of the given input GPIO port is zero + * Return true if the current value of the given gpioksi/gpioksoh/gpioksol + * port is zero */ int keyboard_raw_is_input_low(int port, int id) { - /* - * TODO: implement for factory testing KSI and KSO pin as GPIO - * function. - */ - return 0; + const struct device *dev; + + switch ((enum gpio_port_to_node)port) { + case GPIO_KSI: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioksi)); + break; + case GPIO_KSOH: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioksoh)); + break; + case GPIO_KSOL: + dev = DEVICE_DT_GET(DT_NODELABEL(gpioksol)); + break; + default: + printk("Error port number %d, return 0\n", port); + return 0; + } + + return (gpio_pin_get_raw(dev, id) == 0); } diff --git a/zephyr/shim/chip/npcx/shi.c b/zephyr/shim/chip/npcx/shi.c index 0cecc2c56e..4e0535b91f 100644 --- a/zephyr/shim/chip/npcx/shi.c +++ b/zephyr/shim/chip/npcx/shi.c @@ -21,7 +21,7 @@ LOG_MODULE_REGISTER(shim_cros_shi, LOG_LEVEL_DBG); -#define SHI_NODE DT_NODELABEL(shi) +#define SHI_NODE DT_NODELABEL(shi0) static void shi_enable(void) { diff --git a/zephyr/shim/chip/stm32/CMakeLists.txt b/zephyr/shim/chip/stm32/CMakeLists.txt new file mode 100644 index 0000000000..52787ce656 --- /dev/null +++ b/zephyr/shim/chip/stm32/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cros_ec_library_include_directories(include) diff --git a/zephyr/shim/chip/stm32/include/flash_chip.h b/zephyr/shim/chip/stm32/include/flash_chip.h new file mode 100644 index 0000000000..cd896eca9a --- /dev/null +++ b/zephyr/shim/chip/stm32/include/flash_chip.h @@ -0,0 +1,22 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_FLASH_CHIP_H +#define __CROS_EC_FLASH_CHIP_H + +/* Minimum write size */ +#define CONFIG_FLASH_WRITE_SIZE \ + DT_PROP(DT_INST(0, soc_nv_flash), write_block_size) + +/* No page mode, so use minimum write size */ +#define CONFIG_FLASH_WRITE_IDEAL_SIZE CONFIG_FLASH_WRITE_SIZE + +/* RO image offset inside protected storage (RO part) */ +#define CONFIG_RO_STORAGE_OFF 0x0 + +/* RW image offset inside writable storage (RW part) */ +#define CONFIG_RW_STORAGE_OFF 0x0 + +#endif /* __CROS_EC_FLASH_CHIP_H */ diff --git a/zephyr/shim/include/builtin/assert.h b/zephyr/shim/include/builtin/assert.h index 27dce8f2c4..e5e4a34b21 100644 --- a/zephyr/shim/include/builtin/assert.h +++ b/zephyr/shim/include/builtin/assert.h @@ -13,4 +13,9 @@ #define ASSERT __ASSERT_NO_MSG #define assert __ASSERT_NO_MSG +/* TODO(b/269175417): This should be handled in Zephyr __assert.h */ +#ifndef __ASSERT_UNREACHABLE +#define __ASSERT_UNREACHABLE CODE_UNREACHABLE +#endif + #endif /* __CROS_EC_ASSERT_H */ diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 7ecb3b0f13..fd97a9d72a 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -718,6 +718,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_SMBUS_PEC #endif +#undef CONFIG_I2C_NACK_RETRY_COUNT +#ifdef CONFIG_PLATFORM_EC_I2C_NACK_RETRY_COUNT +#define CONFIG_I2C_NACK_RETRY_COUNT CONFIG_PLATFORM_EC_I2C_NACK_RETRY_COUNT +#endif + #undef CONFIG_KEYBOARD_PROTOCOL_8042 #ifdef CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042 #define CONFIG_KEYBOARD_PROTOCOL_8042 @@ -1543,9 +1548,19 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #undef CONFIG_USB_PD_TCPM_DRIVER_IT8XXX2 #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2 #define CONFIG_USB_PD_TCPM_DRIVER_IT8XXX2 +#if defined(CONFIG_SOC_IT81202_CX) || defined(CONFIG_SOC_IT81302_CX) +/* CCGCR 04h bit[3,2,1] Rp 3A value is changed to 000b. */ +#define IT8XXX2_USBPD_RP_3A0_VALUE_IS_ZERO +/* + * CCGCR 04h bit[7] is reserved, so we control the power of cc analog module + * by CCCSR 05h bit[7,3]. + */ +#define IT8XXX2_USBPD_CCGCR_BIT7_RESERVED +#else /* Individual setting CC1 and CC2 resistance. */ #define IT83XX_USBPD_CC1_CC2_RESISTANCE_SEPARATE #endif +#endif #undef CONFIG_USB_PD_TCPM_DRIVER_IT83XX #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT83XX @@ -1722,6 +1737,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_USB_PD_ALT_MODE_UFP #endif +#undef CONFIG_USB_PD_DISCOVERY +#ifdef CONFIG_PLATFORM_EC_USB_PD_DISCOVERY +#define CONFIG_USB_PD_DISCOVERY +#endif + #undef CONFIG_USB_PD_DPS #ifdef CONFIG_PLATFORM_EC_USB_PD_DPS #define CONFIG_USB_PD_DPS @@ -1988,6 +2008,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_CMD_USB_PD_CABLE #endif +#undef CONFIG_USB_PD_DP_MODE +#ifdef CONFIG_PLATFORM_EC_USB_PD_DP_MODE +#define CONFIG_USB_PD_DP_MODE +#endif + #undef CONFIG_USB_PD_TBT_COMPAT_MODE #ifdef CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE #define CONFIG_USB_PD_TBT_COMPAT_MODE diff --git a/zephyr/shim/include/ec_tasks.h b/zephyr/shim/include/ec_tasks.h index 793beb25ae..2b65b4f056 100644 --- a/zephyr/shim/include/ec_tasks.h +++ b/zephyr/shim/include/ec_tasks.h @@ -6,9 +6,27 @@ #ifndef __CROS_EC_EC_TASKS_H #define __CROS_EC_EC_TASKS_H +#include "task.h" + +#include <zephyr/kernel.h> + /** Starts all of the shimmed EC tasks. Requires CONFIG_SHIMMED_TASKS=y. */ void start_ec_tasks(void); +/** + * Maps an EC task id to a Zephyr thread id. + * + * @returns Thread id OR NULL if mapping fails + */ +k_tid_t task_id_to_thread_id(task_id_t task_id); + +/** + * Maps a Zephyr thread id to an EC task id. + * + * @returns Task id OR TASK_ID_INVALID if mapping fails + */ +task_id_t thread_id_to_task_id(k_tid_t thread_id); + #ifdef TEST_BUILD /** * Set TASK_ID_TEST_RUNNER to current thread tid. Some functions that are tested diff --git a/zephyr/shim/include/shimmed_task_id.h b/zephyr/shim/include/shimmed_task_id.h index a0295ad764..4cccd51b73 100644 --- a/zephyr/shim/include/shimmed_task_id.h +++ b/zephyr/shim/include/shimmed_task_id.h @@ -213,7 +213,6 @@ enum { #define CROS_EC_TASK(name, ...) TASK_ID_##name, #define TASK_TEST(name, ...) CROS_EC_TASK(name) enum { - TASK_ID_IDLE = -1, /* We don't shim the idle task */ CROS_EC_TASK_LIST #ifdef TEST_BUILD TASK_ID_TEST_RUNNER, @@ -226,11 +225,16 @@ enum { /* * Additional task IDs for features that runs on non shimmed threads, - * task_get_current() needs to be updated to identify these ones. + * thread_id_to_task_id() and task_id_to_thread_id() need to be updated + * to identify these tasks. */ +/* clang-format off */ #define CROS_EC_EXTRA_TASKS(fn) \ - COND_CODE_1(CONFIG_TASK_HOSTCMD_THREAD_MAIN, (fn(HOSTCMD)), ()) \ - fn(SYSWORKQ) + COND_CODE_1(CONFIG_TASK_HOSTCMD_THREAD_MAIN, (fn(HOSTCMD)), \ + (fn(MAIN))) \ + fn(SYSWORKQ) \ + fn(IDLE) +/* clang-format on */ #define EXTRA_TASK_INTERNAL_ID(name) EXTRA_TASK_##name, enum { diff --git a/zephyr/shim/include/shimmed_tasks.h b/zephyr/shim/include/shimmed_tasks.h index 75be968f4a..7a55531180 100644 --- a/zephyr/shim/include/shimmed_tasks.h +++ b/zephyr/shim/include/shimmed_tasks.h @@ -47,4 +47,12 @@ #define HAS_TASK_USB_MUX 1 #endif /* CONFIG_PLATFORM_EC_USB_MUX_TASK */ +#ifndef CONFIG_TASK_HOSTCMD_THREAD_MAIN +#define HAS_TASK_MAIN 1 +#endif /* CONFIG_TASK_HOSTCMD_THREAD_DEDICATED */ + +/* These non-shimmed (extra) tasks are always present */ +#define HAS_TASK_IDLE 1 +#define HAS_TASK_SYSWORKQ 1 + #endif /* __CROS_EC_SHIMMED_TASKS_H */ diff --git a/zephyr/shim/include/usbc/tcpc_anx7447.h b/zephyr/shim/include/usbc/tcpc_anx7447.h index 38fcd536a5..53312cd0ea 100644 --- a/zephyr/shim/include/usbc/tcpc_anx7447.h +++ b/zephyr/shim/include/usbc/tcpc_anx7447.h @@ -18,7 +18,5 @@ }, \ .drv = &anx7447_tcpm_drv, \ .flags = DT_PROP(id, tcpc_flags), \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, int_pin), \ - (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ - (GPIO_LIMIT)), \ + .irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {}), \ }, diff --git a/zephyr/shim/include/usbc/tcpc_anx7447_emul.h b/zephyr/shim/include/usbc/tcpc_anx7447_emul.h index 900ca6f48e..be39ee36d9 100644 --- a/zephyr/shim/include/usbc/tcpc_anx7447_emul.h +++ b/zephyr/shim/include/usbc/tcpc_anx7447_emul.h @@ -17,7 +17,5 @@ .addr_flags = DT_REG_ADDR(id), \ }, \ .drv = &anx7447_tcpm_drv, \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, alert_gpio), \ - (GPIO_SIGNAL(DT_PHANDLE(id, alert_gpio))), \ - (GPIO_LIMIT)), \ + .irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {}), \ }, diff --git a/zephyr/shim/include/usbc/tcpc_ccgxxf.h b/zephyr/shim/include/usbc/tcpc_ccgxxf.h index 731ffcbc80..d28033e053 100644 --- a/zephyr/shim/include/usbc/tcpc_ccgxxf.h +++ b/zephyr/shim/include/usbc/tcpc_ccgxxf.h @@ -18,7 +18,10 @@ }, \ .drv = &ccgxxf_tcpm_drv, \ .flags = TCPC_FLAGS_TCPCI_REV2_0, \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, int_pin), \ - (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ - (GPIO_LIMIT)), \ + COND_CODE_1(CONFIG_PLATFORM_EC_TCPC_INTERRUPT, \ + (.irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {})), \ + (.alert_signal = COND_CODE_1( \ + DT_NODE_HAS_PROP(id, int_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ + (GPIO_LIMIT)))), \ }, diff --git a/zephyr/shim/include/usbc/tcpc_fusb302.h b/zephyr/shim/include/usbc/tcpc_fusb302.h index 2a7e684564..6989dbd21e 100644 --- a/zephyr/shim/include/usbc/tcpc_fusb302.h +++ b/zephyr/shim/include/usbc/tcpc_fusb302.h @@ -4,6 +4,7 @@ */ #include "driver/tcpm/fusb302.h" +#include "usbc/utils.h" #include <zephyr/devicetree.h> @@ -17,7 +18,13 @@ .addr_flags = DT_REG_ADDR(id), \ }, \ .drv = &fusb302_tcpm_drv, \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, int_pin), \ - (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ - (GPIO_LIMIT)), \ + COND_CODE_1(CONFIG_PLATFORM_EC_TCPC_INTERRUPT, \ + (.irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {})), \ + (.alert_signal = COND_CODE_1( \ + DT_NODE_HAS_PROP(id, int_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ + (GPIO_LIMIT)))), \ }, + +DT_FOREACH_STATUS_OKAY(FUSB302_TCPC_COMPAT, + TCPC_VERIFY_NO_FLAGS_ACTIVE_ALERT_HIGH) diff --git a/zephyr/shim/include/usbc/tcpc_generic_emul.h b/zephyr/shim/include/usbc/tcpc_generic_emul.h index 9d2216cb6e..95905b6818 100644 --- a/zephyr/shim/include/usbc/tcpc_generic_emul.h +++ b/zephyr/shim/include/usbc/tcpc_generic_emul.h @@ -17,7 +17,10 @@ .addr_flags = DT_REG_ADDR(id), \ }, \ .drv = &tcpci_tcpm_drv, \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, alert_gpio), \ - (GPIO_SIGNAL(DT_PHANDLE(id, alert_gpio))), \ - (GPIO_LIMIT)), \ + COND_CODE_1(CONFIG_PLATFORM_EC_TCPC_INTERRUPT, \ + (.irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {})), \ + (.alert_signal = COND_CODE_1( \ + DT_NODE_HAS_PROP(id, int_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ + (GPIO_LIMIT)))), \ }, diff --git a/zephyr/shim/include/usbc/tcpc_nct38xx.h b/zephyr/shim/include/usbc/tcpc_nct38xx.h index f34fc75863..797993750c 100644 --- a/zephyr/shim/include/usbc/tcpc_nct38xx.h +++ b/zephyr/shim/include/usbc/tcpc_nct38xx.h @@ -21,9 +21,12 @@ }, \ .drv = &nct38xx_tcpm_drv, \ .flags = DT_PROP(id, tcpc_flags), \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, int_pin), \ - (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ - (GPIO_LIMIT)), \ + COND_CODE_1(CONFIG_PLATFORM_EC_TCPC_INTERRUPT, \ + (.irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {})), \ + (.alert_signal = COND_CODE_1( \ + DT_NODE_HAS_PROP(id, int_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ + (GPIO_LIMIT)))), \ }, /** diff --git a/zephyr/shim/include/usbc/tcpc_ps8xxx.h b/zephyr/shim/include/usbc/tcpc_ps8xxx.h index 1caab08a5d..621d4ab016 100644 --- a/zephyr/shim/include/usbc/tcpc_ps8xxx.h +++ b/zephyr/shim/include/usbc/tcpc_ps8xxx.h @@ -4,6 +4,7 @@ */ #include "driver/tcpm/ps8xxx_public.h" +#include "usbc/utils.h" #include <zephyr/devicetree.h> @@ -18,7 +19,13 @@ }, \ .drv = &ps8xxx_tcpm_drv, \ .flags = DT_PROP(id, tcpc_flags), \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, int_pin), \ - (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ - (GPIO_LIMIT)), \ + COND_CODE_1(CONFIG_PLATFORM_EC_TCPC_INTERRUPT, \ + (.irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {})), \ + (.alert_signal = COND_CODE_1( \ + DT_NODE_HAS_PROP(id, int_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ + (GPIO_LIMIT))) \ + ), \ }, + +DT_FOREACH_STATUS_OKAY(PS8XXX_COMPAT, TCPC_VERIFY_NO_FLAGS_ACTIVE_ALERT_HIGH) diff --git a/zephyr/shim/include/usbc/tcpc_ps8xxx_emul.h b/zephyr/shim/include/usbc/tcpc_ps8xxx_emul.h index fa294802dc..09a31b9598 100644 --- a/zephyr/shim/include/usbc/tcpc_ps8xxx_emul.h +++ b/zephyr/shim/include/usbc/tcpc_ps8xxx_emul.h @@ -17,7 +17,10 @@ .addr_flags = DT_REG_ADDR(id), \ }, \ .drv = &ps8xxx_tcpm_drv, \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, alert_gpio), \ - (GPIO_SIGNAL(DT_PHANDLE(id, alert_gpio))), \ - (GPIO_LIMIT)), \ + COND_CODE_1(CONFIG_PLATFORM_EC_TCPC_INTERRUPT, \ + (.irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {})), \ + (.alert_signal = COND_CODE_1( \ + DT_NODE_HAS_PROP(id, int_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ + (GPIO_LIMIT)))), \ }, diff --git a/zephyr/shim/include/usbc/tcpc_rt1718s.h b/zephyr/shim/include/usbc/tcpc_rt1718s.h index 20d75482a3..489e00a144 100644 --- a/zephyr/shim/include/usbc/tcpc_rt1718s.h +++ b/zephyr/shim/include/usbc/tcpc_rt1718s.h @@ -4,6 +4,7 @@ */ #include "tcpm/rt1718s_public.h" +#include "usbc/utils.h" #include <zephyr/devicetree.h> @@ -18,7 +19,8 @@ }, \ .drv = &rt1718s_tcpm_drv, \ .flags = DT_PROP(id, tcpc_flags), \ - .alert_signal = COND_CODE_1(DT_NODE_HAS_PROP(id, int_pin), \ - (GPIO_SIGNAL(DT_PHANDLE(id, int_pin))), \ - (GPIO_LIMIT)), \ + .irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {}), \ }, + +DT_FOREACH_STATUS_OKAY(RT1718S_TCPC_COMPAT, + TCPC_VERIFY_NO_FLAGS_ACTIVE_ALERT_HIGH) diff --git a/zephyr/shim/include/usbc/utils.h b/zephyr/shim/include/usbc/utils.h index 53e9a34856..72a2173463 100644 --- a/zephyr/shim/include/usbc/utils.h +++ b/zephyr/shim/include/usbc/utils.h @@ -36,4 +36,16 @@ */ #define USBC_PORT_FROM_INST(inst) USBC_PORT(DT_DRV_INST(inst)) +/* + * Check that the TCPC interrupt flag defined in the devicetree is the same as + * the hardware. + * + * @param id: node id of the tcpc port + */ +#define TCPC_VERIFY_NO_FLAGS_ACTIVE_ALERT_HIGH(id) \ + BUILD_ASSERT( \ + (DT_PROP(id, tcpc_flags) & TCPC_FLAGS_ALERT_ACTIVE_HIGH) == 0, \ + "TCPC interrupt configuration error for " DT_NODE_FULL_NAME( \ + id)); + #endif /* __CROS_EC_ZEPHYR_SHIM_USBC_UTIL */ diff --git a/zephyr/shim/include/zephyr_hooks_shim.h b/zephyr/shim/include/zephyr_hooks_shim.h index f1c25c6e8f..3e0c43088f 100644 --- a/zephyr/shim/include/zephyr_hooks_shim.h +++ b/zephyr/shim/include/zephyr_hooks_shim.h @@ -55,7 +55,7 @@ struct zephyr_shim_hook_list { * See include/hooks.h for documentation. */ #define DECLARE_HOOK(_hooktype, _routine, _priority) \ - STRUCT_SECTION_ITERABLE_ALTERNATE( \ + static const STRUCT_SECTION_ITERABLE_ALTERNATE( \ zephyr_shim_hook_##_hooktype, zephyr_shim_hook_info, \ _cros_hook_##_hooktype##_##_routine) = { \ .routine = _routine, \ diff --git a/zephyr/shim/include/zephyr_host_command.h b/zephyr/shim/include/zephyr_host_command.h index 9271c6c368..844f9ae395 100644 --- a/zephyr/shim/include/zephyr_host_command.h +++ b/zephyr/shim/include/zephyr_host_command.h @@ -13,6 +13,7 @@ #include <stdbool.h> #include <zephyr/init.h> +#include <zephyr/kernel.h> /* Initializes and runs the host command handler loop. */ void host_command_task(void *u); @@ -20,19 +21,29 @@ void host_command_task(void *u); /* Takes over the main thread and runs the host command loop. */ void host_command_main(void); -/* True if running in the main thread. */ -bool in_host_command_main(void); +/* + * Returns the main thread id. Will be the same as the HOSTCMD thread + * when CONFIG_TASK_HOSTCMD_THREAD_MAIN is enabled. + */ +k_tid_t get_main_thread(void); + +/* + * Returns the HOSTCMD thread id. Will be different than the main thread + * when CONFIG_TASK_HOSTCMD_THREAD_DEDICATED is enabled. + */ +k_tid_t get_hostcmd_thread(void); #ifdef CONFIG_PLATFORM_EC_HOSTCMD /** * See include/host_command.h for documentation. */ -#define DECLARE_HOST_COMMAND(_command, _routine, _version_mask) \ - STRUCT_SECTION_ITERABLE(host_command, _cros_hcmd_##_command) = { \ - .command = _command, \ - .handler = _routine, \ - .version_mask = _version_mask, \ +#define DECLARE_HOST_COMMAND(_command, _routine, _version_mask) \ + static const STRUCT_SECTION_ITERABLE(host_command, \ + _cros_hcmd_##_command) = { \ + .command = _command, \ + .handler = _routine, \ + .version_mask = _version_mask, \ } #else /* !CONFIG_PLATFORM_EC_HOSTCMD */ diff --git a/zephyr/shim/include/zephyr_mkbp_event.h b/zephyr/shim/include/zephyr_mkbp_event.h index b8cb88029d..0221be81d4 100644 --- a/zephyr/shim/include/zephyr_mkbp_event.h +++ b/zephyr/shim/include/zephyr_mkbp_event.h @@ -15,8 +15,9 @@ zephyr_find_mkbp_event_source(uint8_t event_type); /** * See include/mkbp_event.h for documentation. */ -#define DECLARE_EVENT_SOURCE(_type, _func) \ - STRUCT_SECTION_ITERABLE(mkbp_event_source, _cros_evtsrc_##_func) = { \ - .event_type = _type, \ - .get_data = _func, \ +#define DECLARE_EVENT_SOURCE(_type, _func) \ + static const STRUCT_SECTION_ITERABLE(mkbp_event_source, \ + _cros_evtsrc_##_func) = { \ + .event_type = _type, \ + .get_data = _func, \ } diff --git a/zephyr/shim/src/host_command.c b/zephyr/shim/src/host_command.c index 16f5ae66d8..5ca84c944a 100644 --- a/zephyr/shim/src/host_command.c +++ b/zephyr/shim/src/host_command.c @@ -19,18 +19,10 @@ struct host_command *zephyr_find_host_command(int command) return NULL; } -/* Pointer to the main thread, defined in kernel/init.c */ -extern struct k_thread z_main_thread; - void host_command_main(void) { - k_thread_priority_set(&z_main_thread, + k_thread_priority_set(get_main_thread(), EC_TASK_PRIORITY(EC_TASK_HOSTCMD_PRIO)); - k_thread_name_set(&z_main_thread, "HOSTCMD"); + k_thread_name_set(get_main_thread(), "HOSTCMD"); host_command_task(NULL); } - -bool in_host_command_main(void) -{ - return (k_current_get() == &z_main_thread); -} diff --git a/zephyr/shim/src/panic.c b/zephyr/shim/src/panic.c index 1a9d7478e4..2e9068078b 100644 --- a/zephyr/shim/src/panic.c +++ b/zephyr/shim/src/panic.c @@ -3,8 +3,8 @@ * found in the LICENSE file. */ +#include "builtin/assert.h" #include "common.h" -#include "host_command.h" #include "panic.h" #include "system_safe_mode.h" @@ -151,9 +151,6 @@ void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *esf) LOG_PANIC(); - if (IS_ENABLED(CONFIG_HOSTCMD_EVENTS)) - host_set_single_event(EC_HOST_EVENT_PANIC); - /* Start system safe mode if possible */ if (IS_ENABLED(CONFIG_PLATFORM_EC_SYSTEM_SAFE_MODE)) { if (reason != K_ERR_KERNEL_PANIC && @@ -173,9 +170,7 @@ void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *esf) * the watchdog will overwrite this panic. */ panic_reboot(); -#ifndef TEST_BUILD - CODE_UNREACHABLE; -#endif + __ASSERT_UNREACHABLE; } void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception) diff --git a/zephyr/shim/src/rtc.c b/zephyr/shim/src/rtc.c index 3acf6a3bb6..6e694d48e4 100644 --- a/zephyr/shim/src/rtc.c +++ b/zephyr/shim/src/rtc.c @@ -95,7 +95,13 @@ void system_set_rtc_alarm(uint32_t seconds, uint32_t microseconds) return; } - seconds += system_get_rtc_sec(); + /* + * Adding 1 additional second because system_get_rtc_sec + * returns the number of seconds truncated to the nearest + * integer. This results in missed alarms if the actual + * value is 7.99 seconds and 7 seconds is returned. + */ + seconds += system_get_rtc_sec() + 1; cros_rtc_set_alarm(cros_rtc_dev, seconds, microseconds); } diff --git a/zephyr/shim/src/tasks.c b/zephyr/shim/src/tasks.c index 68ebbbc482..d283671f98 100644 --- a/zephyr/shim/src/tasks.c +++ b/zephyr/shim/src/tasks.c @@ -4,6 +4,7 @@ */ #include "common.h" +#include "ec_tasks.h" #include "host_command.h" #include "task.h" #include "timer.h" @@ -78,25 +79,114 @@ static struct task_ctx_base_data *task_get_base_data(task_id_t cros_task_id) return &shimmed_tasks_data[cros_task_id]; } -task_id_t task_get_current(void) +test_export_static k_tid_t get_idle_thread(void) +{ + extern struct k_thread z_idle_threads[]; + + if (!IS_ENABLED(CONFIG_SMP)) { + return &z_idle_threads[0]; + } + __ASSERT(false, "%s does not support SMP", __func__); + return NULL; +} + +test_export_static k_tid_t get_sysworkq_thread(void) +{ + return &k_sys_work_q.thread; +} + +k_tid_t get_main_thread(void) +{ + /* Pointer to the main thread, defined in kernel/init.c */ + extern struct k_thread z_main_thread; + + return &z_main_thread; +} + +test_mockable k_tid_t get_hostcmd_thread(void) +{ +#if IS_ENABLED(HAS_TASK_HOSTCMD) + if (IS_ENABLED(CONFIG_TASK_HOSTCMD_THREAD_MAIN)) { + return get_main_thread(); + } + return task_to_k_tid[TASK_ID_HOSTCMD]; +#endif /* HAS_TASK_HOSTCMD */ + __ASSERT(false, "HOSTCMD task is not enabled"); + return NULL; +} + +k_tid_t task_id_to_thread_id(task_id_t task_id) +{ + if (task_id < 0) { + __ASSERT(false, "Invalid task id %d", task_id); + return NULL; + } + if (task_id < TASK_ID_COUNT) { + return task_to_k_tid[task_id]; + } + if (task_id < TASK_ID_COUNT + EXTRA_TASK_COUNT) { + switch (task_id) { + case TASK_ID_SYSWORKQ: + return get_sysworkq_thread(); + +#if IS_ENABLED(HAS_TASK_HOSTCMD) + case TASK_ID_HOSTCMD: + return get_hostcmd_thread(); +#endif /* HAS_TASK_HOSTCMD */ + +#if IS_ENABLED(HAS_TASK_MAIN) + case TASK_ID_MAIN: + return get_main_thread(); +#endif /* HAS_TASK_MAIN */ + + case TASK_ID_IDLE: + return get_idle_thread(); + } + } + __ASSERT(false, "Failed to map task %d to thread", task_id); + return NULL; +} + +task_id_t thread_id_to_task_id(k_tid_t thread_id) { - if (in_deferred_context()) { + if (thread_id == NULL) { + __ASSERT(false, "Invalid thread_id"); + return TASK_ID_INVALID; + } + + if (get_sysworkq_thread() == thread_id) { return TASK_ID_SYSWORKQ; } -#ifdef CONFIG_TASK_HOSTCMD_THREAD_MAIN - if (in_host_command_main()) { +#if IS_ENABLED(HAS_TASK_HOSTCMD) + if (get_hostcmd_thread() == thread_id) { return TASK_ID_HOSTCMD; } -#endif +#endif /* HAS_TASK_HOSTCMD */ + +#if IS_ENABLED(HAS_TASK_MAIN) + if (get_main_thread() == thread_id) { + return TASK_ID_MAIN; + } +#endif /* HAS_TASK_MAIN */ + + if (get_idle_thread() == thread_id) { + return TASK_ID_IDLE; + } for (size_t i = 0; i < TASK_ID_COUNT; ++i) { - if (task_to_k_tid[i] == k_current_get()) + if (task_to_k_tid[i] == thread_id) { return i; + } } - __ASSERT(false, "Task index out of bound"); - return 0; + __ASSERT(false, "Failed to map thread to task"); + return TASK_ID_INVALID; +} + +task_id_t task_get_current(void) +{ + return thread_id_to_task_id(k_current_get()); } atomic_t *task_get_event_bitmap(task_id_t cros_task_id) @@ -349,5 +439,5 @@ inline bool in_deferred_context(void) /* * Deferred calls run in the sysworkq. */ - return (k_current_get() == &k_sys_work_q.thread); + return (k_current_get() == get_sysworkq_thread()); } diff --git a/zephyr/shim/src/tcpc.c b/zephyr/shim/src/tcpc.c index c4682fce85..98a3cd880b 100644 --- a/zephyr/shim/src/tcpc.c +++ b/zephyr/shim/src/tcpc.c @@ -3,6 +3,7 @@ * found in the LICENSE file. */ +#include "hooks.h" #include "usb_pd.h" #include "usb_pd_tcpm.h" #include "usbc/tcpc_anx7447.h" @@ -20,8 +21,11 @@ #include "usbc/utils.h" #include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> #include <zephyr/sys/util.h> +LOG_MODULE_REGISTER(tcpc, CONFIG_GPIO_LOG_LEVEL); + #define HAS_TCPC_PROP(usbc_id) \ COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, tcpc), (|| 1), ()) @@ -77,14 +81,86 @@ MAYBE_CONST struct tcpc_config_t tcpc_config[] = { DT_FOREACH_STATUS_OKAY( named_usbc_port, TCPC_CHIP) }; +#ifdef CONFIG_PLATFORM_EC_TCPC_INTERRUPT + +BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_MAX_COUNT); + +struct gpio_callback int_gpio_cb[CONFIG_USB_PD_PORT_MAX_COUNT]; + +static void tcpc_int_gpio_callback(const struct device *dev, + struct gpio_callback *cb, uint32_t pins) +{ + /* + * Retrieve the array index from the callback pointer, and + * use that to get the port number. + */ + int port = cb - &int_gpio_cb[0]; + + schedule_deferred_pd_interrupt(port); +} + +/* + * Enable all tcpc interrupts from devicetree bindings. + * Check whether the callback is already installed, and if + * not, init and add the callback before enabling the + * interrupt. + */ +void tcpc_enable_interrupt(void) +{ + gpio_flags_t flags; + + for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + /* + * Check whether the interrupt pin has been configured + * by the devicetree. + */ + if (!tcpc_config[i].irq_gpio.port) + continue; + /* + * Check whether the gpio pin is ready + */ + if (!gpio_is_ready_dt(&tcpc_config[i].irq_gpio)) { + LOG_ERR("tcpc port #%i interrupt not ready.", i); + return; + } + /* + * TODO(b/267537103): Once named-gpios support is dropped, + * evaluate if this code should call gpio_pin_configure_dt() + * + * Check whether callback has been initialised + */ + if (!int_gpio_cb[i].handler) { + /* + * Initialise and add the callback. + */ + gpio_init_callback(&int_gpio_cb[i], + tcpc_int_gpio_callback, + BIT(tcpc_config[i].irq_gpio.pin)); + gpio_add_callback(tcpc_config[i].irq_gpio.port, + &int_gpio_cb[i]); + } + flags = tcpc_config[i].flags & TCPC_FLAGS_ALERT_ACTIVE_HIGH ? + GPIO_INT_EDGE_RISING : + GPIO_INT_EDGE_FALLING; + flags = (flags | GPIO_INT_ENABLE) & ~GPIO_INT_DISABLE; + gpio_pin_interrupt_configure_dt(&tcpc_config[i].irq_gpio, + flags); + } +} +/* + * priority set to POST_I2C + 1 so projects can make local edits to + * tcpc_config as needed at POST_I2C before the interrupts are enabled. + */ +DECLARE_HOOK(HOOK_INIT, tcpc_enable_interrupt, HOOK_PRIO_POST_I2C + 1); + +#else /* CONFIG_PLATFORM_EC_TCPC_INTERRUPT */ + /* TCPC GPIO Interrupt Handlers */ void tcpc_alert_event(enum gpio_signal signal) { for (int i = 0; i < ARRAY_SIZE(tcpc_config); i++) { - /* No alerts for embedded TCPC */ /* No alerts if the alert pin is not set in the devicetree */ - if (tcpc_config[i].bus_type == EC_BUS_TYPE_EMBEDDED || - tcpc_config[i].alert_signal == GPIO_LIMIT) { + if (tcpc_config[i].alert_signal == GPIO_LIMIT) { continue; } @@ -95,4 +171,5 @@ void tcpc_alert_event(enum gpio_signal signal) } } +#endif /* CONFIG_PLATFORM_EC_TCPC_INTERRUPT */ #endif /* DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/subsys/ap_pwrseq/CMakeLists.txt b/zephyr/subsys/ap_pwrseq/CMakeLists.txt index e4b4ad1df9..a3f183f02b 100644 --- a/zephyr/subsys/ap_pwrseq/CMakeLists.txt +++ b/zephyr/subsys/ap_pwrseq/CMakeLists.txt @@ -14,6 +14,9 @@ zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ_SIGNAL_GPIO signal_gpio.c) zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ_SIGNAL_VW signal_vw.c) zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ_SIGNAL_ADC signal_adc.c) +zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ_DRIVER ap_pwrseq.c) +zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ_DRIVER ap_pwrseq_sm.c) + zephyr_library_sources_ifdef(CONFIG_X86_NON_DSX_PWRSEQ x86_non_dsx_common_pwrseq_sm_handler.c x86_non_dsx_chipset_power_state.c) diff --git a/zephyr/subsys/ap_pwrseq/Kconfig b/zephyr/subsys/ap_pwrseq/Kconfig index eabb45fab8..32d18e12cb 100644 --- a/zephyr/subsys/ap_pwrseq/Kconfig +++ b/zephyr/subsys/ap_pwrseq/Kconfig @@ -23,6 +23,16 @@ module = AP_PWRSEQ module-str = AP power sequencing source "subsys/logging/Kconfig.template.log_config" +config AP_PWRSEQ_DRIVER + bool "AP Power sequencing driver support" + select SMF + select SMF_ANCESTOR_SUPPORT + select EVENTS + help + AP power sequence driver establishes an underlaying framework to + easily add or extend AP Power Sequence action handler routines, it is + designed to follow the zephyr's State Machine Framework (SMF). + config AP_PWRSEQ_SIGNAL_ADC bool default y diff --git a/zephyr/subsys/ap_pwrseq/ap_pwrseq.c b/zephyr/subsys/ap_pwrseq/ap_pwrseq.c new file mode 100644 index 0000000000..c02ec88363 --- /dev/null +++ b/zephyr/subsys/ap_pwrseq/ap_pwrseq.c @@ -0,0 +1,314 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ap_pwrseq_drv_sm.h" + +#include <zephyr/kernel.h> +#include <zephyr/logging/log.h> +#include <zephyr/sys/atomic.h> + +LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); + +#define AP_PWRSEQ_EVENT_MASK GENMASK(AP_PWRSEQ_EVENT_COUNT - 1, 0) +#define AP_PWRSEQ_STATES_MASK GENMASK(AP_POWER_STATE_COUNT - 1, 0) + +struct ap_pwrseq_cb_list { + uint32_t states; + sys_slist_t list; + struct k_spinlock lock; +}; + +struct ap_pwrseq_data { + /* State machine data reference. */ + void *sm_data; + /* Driver event object to receive events posted. */ + struct k_event evt; + /* + * This mutex object blocks state machine transitions to prevent race + * condition when doing power state related tasks. Must be held when + * accessing `sm_data`. + */ + struct k_mutex mux; + /* State entry notification list. */ + struct ap_pwrseq_cb_list entry_list; + /* State exit notification list. */ + struct ap_pwrseq_cb_list exit_list; +}; + +/* Resolve into substate name string */ +#define AP_PWRSEQ_SUB_STATE_STR_DEFINE_WITH_COMA(state) state, + +#define AP_PWRSEQ_EACH_SUB_STATE_STR_DEFINE(node_id, prop, idx) \ + AP_PWRSEQ_SUB_STATE_STR_DEFINE_WITH_COMA( \ + DT_CAT5(node_id, _P_, prop, _IDX_, idx)) + +#define AP_PWRSEQ_EACH_SUB_STATE_STR_DEF_NODE_CHILD_DEFINE(node_id) \ + COND_CODE_1( \ + DT_NODE_HAS_PROP(node_id, application), \ + (DT_FOREACH_PROP_ELEM(node_id, application, \ + AP_PWRSEQ_EACH_SUB_STATE_STR_DEFINE)), \ + (COND_CODE_1(DT_NODE_HAS_PROP(node_id, chipset), \ + (DT_FOREACH_PROP_ELEM( \ + node_id, chipset, \ + AP_PWRSEQ_EACH_SUB_STATE_STR_DEFINE)), \ + ()))) + +static const char *const ap_pwrseq_state_str[AP_POWER_STATE_COUNT] = { + "AP_POWER_STATE_UNINIT", + "AP_POWER_STATE_G3", + "AP_POWER_STATE_S5", + "AP_POWER_STATE_S4", + "AP_POWER_STATE_S3", + "AP_POWER_STATE_S2", + "AP_POWER_STATE_S1", + "AP_POWER_STATE_S0", + DT_FOREACH_STATUS_OKAY( + ap_pwrseq_sub_states, + AP_PWRSEQ_EACH_SUB_STATE_STR_DEF_NODE_CHILD_DEFINE) +}; +BUILD_ASSERT(ARRAY_SIZE(ap_pwrseq_state_str) == AP_POWER_STATE_COUNT); + +static struct ap_pwrseq_data ap_pwrseq_task_data; + +static void ap_pwrseq_add_state_callback(struct ap_pwrseq_cb_list *cb_list, + sys_snode_t *node) +{ + if (!sys_slist_is_empty(&cb_list->list)) { + sys_slist_find_and_remove(&cb_list->list, node); + } + + sys_slist_prepend(&cb_list->list, node); +} + +static int +ap_pwrseq_register_state_callback(struct ap_pwrseq_state_callback *state_cb, + struct ap_pwrseq_cb_list *cb_list) +{ + if (!(state_cb->states_bit_mask & AP_PWRSEQ_STATES_MASK)) { + return -EINVAL; + } + + __ASSERT(state_cb->cb, "Callback pointer should not be NULL"); + + k_spinlock_key_t key = k_spin_lock(&cb_list->lock); + + ap_pwrseq_add_state_callback(cb_list, &state_cb->node); + + cb_list->states |= AP_PWRSEQ_STATES_MASK & state_cb->states_bit_mask; + k_spin_unlock(&cb_list->lock, key); + + return 0; +} + +static void ap_pwrseq_send_callback(const struct device *dev, + const enum ap_pwrseq_state entry, + const enum ap_pwrseq_state exit, + bool is_entry) +{ + struct ap_pwrseq_data *const data = dev->data; + struct ap_pwrseq_cb_list *cb_list = is_entry ? &data->entry_list : + &data->exit_list; + const enum ap_pwrseq_state *state = is_entry ? &entry : &exit; + struct ap_pwrseq_state_callback *state_cb, *tmp; + + if (!(cb_list->states & BIT(*state))) { + return; + } + SYS_SLIST_FOR_EACH_CONTAINER_SAFE(&cb_list->list, state_cb, tmp, node) + { + if (state_cb->states_bit_mask & BIT(*state)) { + state_cb->cb(dev, entry, exit); + } + } +} + +static void ap_pwrseq_send_entry_callback(const struct device *dev, + const enum ap_pwrseq_state entry, + const enum ap_pwrseq_state exit) +{ + ap_pwrseq_send_callback(dev, entry, exit, true); +} + +static void ap_pwrseq_send_exit_callback(const struct device *dev, + const enum ap_pwrseq_state entry, + const enum ap_pwrseq_state exit) +{ + ap_pwrseq_send_callback(dev, entry, exit, false); +} + +static uint32_t ap_pwrseq_wait_event(const struct device *dev) +{ + struct ap_pwrseq_data *const data = dev->data; + uint32_t events; + + events = k_event_wait(&data->evt, AP_PWRSEQ_EVENT_MASK, false, + Z_FOREVER); + /* Clear all events posted */ + k_event_clear(&data->evt, events); + + return events & AP_PWRSEQ_EVENT_MASK; +} + +static void ap_pwrseq_thread(void *arg, void *unused1, void *unused2) +{ + struct device *const dev = (struct device *)arg; + struct ap_pwrseq_data *const data = dev->data; + enum ap_pwrseq_state cur_state, new_state; + int run_status; + uint32_t events; + + LOG_INF("Power Sequence thread start"); + while (true) { + events = ap_pwrseq_wait_event(dev); + if (!events) { + continue; + } + LOG_DBG("Events posted: %0#x", events); + + /** + * Process generated events and keep looping while state + * transitions are occurring. + **/ + while (true) { + ap_pwrseq_state_lock(dev); + + cur_state = ap_pwrseq_sm_get_cur_state(data->sm_data); + run_status = + ap_pwrseq_sm_run_state(data->sm_data, events); + new_state = ap_pwrseq_sm_get_cur_state(data->sm_data); + + ap_pwrseq_state_unlock(dev); + if (run_status) { + /* Was this terminated? */ + return; + } + + /* Check if state transition took place */ + if (cur_state == new_state) { + break; + } + LOG_INF("%s -> %s", ap_pwrseq_get_state_str(cur_state), + ap_pwrseq_get_state_str(new_state)); + + ap_pwrseq_send_exit_callback(dev, new_state, cur_state); + + ap_pwrseq_send_entry_callback(dev, new_state, + cur_state); + } + } +} + +static int ap_pwrseq_driver_init(const struct device *dev); + +DEVICE_DEFINE(ap_pwrseq_dev, "ap_pwrseq_drv", ap_pwrseq_driver_init, NULL, + &ap_pwrseq_task_data, NULL, APPLICATION, + CONFIG_APPLICATION_INIT_PRIORITY, NULL); + +K_THREAD_DEFINE(ap_pwrseq_tid, CONFIG_AP_PWRSEQ_STACK_SIZE, ap_pwrseq_thread, + DEVICE_GET(ap_pwrseq_dev), NULL, NULL, + CONFIG_AP_PWRSEQ_THREAD_PRIORITY, 0, K_TICKS_FOREVER); + +static int ap_pwrseq_driver_init(const struct device *dev) +{ + struct ap_pwrseq_data *const data = dev->data; + + data->sm_data = ap_pwrseq_sm_get_instance(); + + k_mutex_init(&data->mux); + k_event_init(&data->evt); + + return 0; +} + +/** + * Global functions definition. + **/ +const struct device *ap_pwrseq_get_instance(void) +{ + return DEVICE_GET(ap_pwrseq_dev); +} + +int ap_pwrseq_start(const struct device *dev, enum ap_pwrseq_state init_state) +{ + struct ap_pwrseq_data *const data = dev->data; + int ret; + + ap_pwrseq_state_lock(dev); + ret = ap_pwrseq_sm_init(data->sm_data, ap_pwrseq_tid, init_state); + ap_pwrseq_state_unlock(dev); + if (ret) { + return ret; + } + + k_thread_start(ap_pwrseq_tid); + + return 0; +} + +void ap_pwrseq_post_event(const struct device *dev, enum ap_pwrseq_event event) +{ + struct ap_pwrseq_data *const data = dev->data; + + if (event >= AP_PWRSEQ_EVENT_COUNT) { + return; + } + + LOG_DBG("Posting Event: %0#lx", BIT(event)); + k_event_post(&data->evt, BIT(event)); +} + +enum ap_pwrseq_state ap_pwrseq_get_current_state(const struct device *dev) +{ + struct ap_pwrseq_data *const data = dev->data; + enum ap_pwrseq_state ret_state; + + ap_pwrseq_state_lock(dev); + + ret_state = ap_pwrseq_sm_get_cur_state(data->sm_data); + + ap_pwrseq_state_unlock(dev); + + return ret_state; +} + +const char *const ap_pwrseq_get_state_str(enum ap_pwrseq_state state) +{ + if (state >= AP_POWER_STATE_COUNT) { + return NULL; + } + + return ap_pwrseq_state_str[state]; +} + +int ap_pwrseq_state_lock(const struct device *dev) +{ + struct ap_pwrseq_data *const data = dev->data; + + /* Acquire lock to ensure no `run` operation is in progress. */ + return k_mutex_lock(&data->mux, K_FOREVER); +} + +int ap_pwrseq_state_unlock(const struct device *dev) +{ + struct ap_pwrseq_data *const data = dev->data; + + return k_mutex_unlock(&data->mux); +} + +int ap_pwrseq_register_state_entry_callback( + const struct device *dev, struct ap_pwrseq_state_callback *state_cb) +{ + struct ap_pwrseq_data *data = dev->data; + + return ap_pwrseq_register_state_callback(state_cb, &data->entry_list); +} + +int ap_pwrseq_register_state_exit_callback( + const struct device *dev, struct ap_pwrseq_state_callback *state_cb) +{ + struct ap_pwrseq_data *data = dev->data; + + return ap_pwrseq_register_state_callback(state_cb, &data->exit_list); +} diff --git a/zephyr/subsys/ap_pwrseq/ap_pwrseq_drv_sm.h b/zephyr/subsys/ap_pwrseq/ap_pwrseq_drv_sm.h new file mode 100644 index 0000000000..b2c71bf20d --- /dev/null +++ b/zephyr/subsys/ap_pwrseq/ap_pwrseq_drv_sm.h @@ -0,0 +1,71 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef _AP_PWRSEQ_INT_SM_H_ +#define _AP_PWRSEQ_INT_SM_H_ +#include "ap_power/ap_pwrseq.h" + +#include <zephyr/kernel/thread.h> + +/** + * This following AP Power Sequence state machine functions are only available + * for subsystem driver. + **/ + +/** + * @brief Obtain AP power sequence state machine instance. + * + * @param None. + * + * @retval Return instance data of the state machine, only one instance is + * allowed per application. + **/ +void *ap_pwrseq_sm_get_instance(void); + +/** + * @brief Sets AP power sequence state machine initial state. + * + * @param data Pointer to AP power sequence state machine instance data. + * + * @param tid AP power sequence instance thread associated to this state + * machine. Functions `ap_pwrseq_sm_set_state` and `ap_pwrseq_sm_run_state` are + * meant to be executed only within this thread context. + * + * @param init_state State machine initial state. + * + * @retval SUCCESS Upon success, init_state ‘entry’ action handlers on all + * implemented levels will be invoked. + * @retval -EINVAL State provided is invalid. + * @retval -EPERM State machine is already initialized. + **/ +int ap_pwrseq_sm_init(void *const data, k_tid_t tid, + enum ap_pwrseq_state init_state); + +/** + * @brief Execute current state `run` action handlers. + * + * This function is meant to be executed only within AP power sequence driver + * thread context. `tid` was given in `ap_pwrseq_sm_init`. + * + * @param data Pointer to AP power sequence state machine instance data. + * + * @param events Events to be processed in current `run` iteration. + * + * @retval SUCCESS Upon success, provided `run` action handlers will be executed + * for all levels in current state. + * @retval -EINVAL State machine has not been initialized. + **/ +int ap_pwrseq_sm_run_state(void *const data, uint32_t events); + +/** + * @brief Get current state enumeration value. + * + * @param data Pointer to AP power sequence state machine instance data. + * + * @retval Enum value Upon success. + * @retval AP_POWER_STATE_UNDEF If state machine has not been initialized. + **/ +enum ap_pwrseq_state ap_pwrseq_sm_get_cur_state(void *const data); +#endif /* _AP_PWRSEQ_INT_SM_H_ */ diff --git a/zephyr/subsys/ap_pwrseq/ap_pwrseq_sm.c b/zephyr/subsys/ap_pwrseq/ap_pwrseq_sm.c new file mode 100644 index 0000000000..538aae8bc7 --- /dev/null +++ b/zephyr/subsys/ap_pwrseq/ap_pwrseq_sm.c @@ -0,0 +1,262 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ap_power/ap_pwrseq_sm.h" + +#include <zephyr/logging/log.h> + +LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); + +struct ap_pwrseq_sm_data { + /* Zephyr SMF context */ + struct smf_ctx smf; + /* Pointer to array of states structures */ + const struct ap_pwrseq_smf **states; + /* Bitfiled of events */ + uint32_t events; + /* Id of current thread executing state machine */ + k_tid_t tid; + /* State entering during state transition */ + enum ap_pwrseq_state entry; + /* State exiting during state transition */ + enum ap_pwrseq_state exit; + /* Flag to inform if current `run` action has been handled */ + bool run_handled; + /* Flag to inform if current `entry` action has been handled */ + bool entry_handled; + /* Flag to inform if current `exit` action has been handled */ + bool exit_handled; + /* Flag to inform that state transition is in progress */ + bool in_transition; +}; + +/** + * Declare weak `struct smf_state` definitions of all ACPI states for + * architecture and chipset level. These are used as placeholder to keep AP + * power sequence state machine hierarchy in case corresponding state action + * handlers are not provided by implementation. + **/ +#define AP_POWER_ARCH_STATE_WEAK_DEFINE(name) \ + const struct smf_state __weak arch_##name##_actions = \ + SMF_CREATE_STATE(NULL, NULL, NULL, NULL); + +#define AP_POWER_CHIPSET_STATE_WEAK_DEFINE(name) \ + const struct smf_state __weak chipset_##name##_actions = \ + SMF_CREATE_STATE(NULL, NULL, NULL, &arch_##name##_actions); + +/** + * Declare weak `struct ap_pwrseq_smf` definitions of all ACPI states for + * application level. These are used as placeholder to keep AP + * power sequence state machine hierarchy in case corresponding state action + * handlers are not provided by implementation. + **/ +#define AP_POWER_APP_STATE_WEAK_DEFINE(name) \ + const struct ap_pwrseq_smf __weak app_state_##name = { \ + .actions = SMF_CREATE_STATE(NULL, NULL, NULL, \ + &chipset_##name##_actions), \ + .state = name \ + }; + +#define AP_POWER_STATE_WEAK_DEFINE(name) \ + AP_POWER_ARCH_STATE_WEAK_DEFINE(name) \ + AP_POWER_CHIPSET_STATE_WEAK_DEFINE(name) \ + AP_POWER_APP_STATE_WEAK_DEFINE(name) + +AP_POWER_STATE_WEAK_DEFINE(AP_POWER_STATE_G3) +AP_POWER_STATE_WEAK_DEFINE(AP_POWER_STATE_S5) +AP_POWER_STATE_WEAK_DEFINE(AP_POWER_STATE_S4) +AP_POWER_STATE_WEAK_DEFINE(AP_POWER_STATE_S3) +AP_POWER_STATE_WEAK_DEFINE(AP_POWER_STATE_S2) +AP_POWER_STATE_WEAK_DEFINE(AP_POWER_STATE_S1) +AP_POWER_STATE_WEAK_DEFINE(AP_POWER_STATE_S0) + +#define AP_PWRSEQ_STATE_DEFINE(name) [name] = &app_state_##name + +/* Sub States defines */ +#define AP_PWRSEQ_APP_SUB_STATE_DEFINE(state) [state] = &app_state_##state, + +#define AP_PWRSEQ_APP_SUB_STATE_DEFINE_(state) \ + AP_PWRSEQ_APP_SUB_STATE_DEFINE(state) + +#define AP_PWRSEQ_EACH_APP_SUB_STATE_NODE_DEFINE__(node_id, prop, idx) \ + AP_PWRSEQ_APP_SUB_STATE_DEFINE_( \ + DT_CAT6(node_id, _P_, prop, _IDX_, idx, _STRING_UPPER_TOKEN)) + +#define AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_NODE_DEFINE(state) \ + [state] = &chipset_##state##_actions, + +#define AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_NODE_DEFINE_(state) \ + AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_NODE_DEFINE(state) + +#define AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_NODE_DEFINE__(node_id, prop, idx) \ + AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_NODE_DEFINE_( \ + DT_CAT6(node_id, _P_, prop, _IDX_, idx, _STRING_UPPER_TOKEN)) + +#define AP_PWRSEQ_EACH_SUB_STATE_NODE_CHILD_DEFINE(node_id) \ + COND_CODE_1( \ + DT_NODE_HAS_PROP(node_id, chipset), \ + (DT_FOREACH_PROP_ELEM( \ + node_id, chipset, \ + AP_PWRSEQ_EACH_CHIPSET_SUB_STATE_NODE_DEFINE__)), \ + (COND_CODE_1( \ + DT_NODE_HAS_PROP(node_id, application), \ + (DT_FOREACH_PROP_ELEM( \ + node_id, application, \ + AP_PWRSEQ_EACH_APP_SUB_STATE_NODE_DEFINE__)), \ + ()))) + +/** + * @brief Array containing power state action handlers for all state and + * and substates available for AP power sequence state machine, these items + * correspond to `enum ap_pwrseq_state`. + **/ +static const struct ap_pwrseq_smf *ap_pwrseq_states[AP_POWER_STATE_COUNT] = { + AP_PWRSEQ_STATE_DEFINE(AP_POWER_STATE_G3), + AP_PWRSEQ_STATE_DEFINE(AP_POWER_STATE_S5), + AP_PWRSEQ_STATE_DEFINE(AP_POWER_STATE_S4), + AP_PWRSEQ_STATE_DEFINE(AP_POWER_STATE_S3), + AP_PWRSEQ_STATE_DEFINE(AP_POWER_STATE_S2), + AP_PWRSEQ_STATE_DEFINE(AP_POWER_STATE_S1), + AP_PWRSEQ_STATE_DEFINE(AP_POWER_STATE_S0), + DT_FOREACH_STATUS_OKAY(ap_pwrseq_sub_states, + AP_PWRSEQ_EACH_SUB_STATE_NODE_CHILD_DEFINE) +}; + +static struct ap_pwrseq_sm_data sm_data_0 = { + .states = ap_pwrseq_states, +}; + +/* Private functions available only for AP Power Sequence subsystem driver. */ +void *ap_pwrseq_sm_get_instance(void) +{ + return &sm_data_0; +} + +int ap_pwrseq_sm_init(void *const data, k_tid_t tid, + enum ap_pwrseq_state init_state) +{ + struct ap_pwrseq_sm_data *sm_data = data; + + if (sm_data->smf.current || sm_data->tid) { + return -EPERM; + } + + if (init_state >= AP_POWER_STATE_COUNT) { + return -EINVAL; + } + + sm_data->entry = sm_data->exit = AP_POWER_STATE_UNDEF; + smf_set_initial(&sm_data->smf, + (const struct smf_state *)sm_data->states[init_state]); + sm_data->tid = tid; + + return 0; +} + +int ap_pwrseq_sm_run_state(void *const data, uint32_t events) +{ + struct ap_pwrseq_sm_data *sm_data = data; + int ret; + + if (sm_data->tid != k_current_get()) { + /* Called by wrong thread */ + return -EPERM; + } + + if (sm_data->smf.current == NULL) { + return -EINVAL; + } + + sm_data->in_transition = false; + sm_data->entry = sm_data->exit = AP_POWER_STATE_UNDEF; + sm_data->run_handled = false; + sm_data->events = events; + + ret = smf_run_state((struct smf_ctx *const)sm_data); + + return ret; +} + +enum ap_pwrseq_state ap_pwrseq_sm_get_cur_state(void *const data) +{ + struct ap_pwrseq_sm_data *sm_data = data; + + if (!sm_data->smf.current) { + return AP_POWER_STATE_UNDEF; + } + + return ((struct ap_pwrseq_smf *)sm_data->smf.current)->state; +} + +/* Public functions for action handlers implementation. */ +int ap_pwrseq_sm_set_state(void *const data, enum ap_pwrseq_state state) +{ + struct ap_pwrseq_sm_data *sm_data = data; + + if (sm_data->tid != k_current_get()) { + /* Called by wrong thread */ + return -EPERM; + } + + if (state >= AP_POWER_STATE_COUNT || + /* Only one state transition is permited within `run` iterations */ + sm_data->in_transition) { + return -EINVAL; + } + + /* Transition has started, update corresponding flags */ + sm_data->in_transition = true; + sm_data->entry_handled = sm_data->exit_handled = false; + sm_data->entry = state; + sm_data->exit = ((struct ap_pwrseq_smf *)sm_data->smf.current)->state; + smf_set_state((struct smf_ctx *const)&sm_data->smf, + (const struct smf_state *)sm_data->states[state]); + + return 0; +} + +bool ap_pwrseq_sm_is_event_set(void *const data, enum ap_pwrseq_event event) +{ + struct ap_pwrseq_sm_data *sm_data = data; + + return ((sm_data->events & BIT(event)) == BIT(event)); +} + +enum ap_pwrseq_state ap_pwrseq_sm_get_entry_state(void *const data) +{ + struct ap_pwrseq_sm_data *sm_data = data; + + if (sm_data->tid != k_current_get()) { + /* Called by wrong thread */ + return -EPERM; + } + + return sm_data->entry; +} + +enum ap_pwrseq_state ap_pwrseq_sm_get_exit_state(void *const data) +{ + struct ap_pwrseq_sm_data *sm_data = data; + + if (sm_data->tid != k_current_get()) { + /* Called by wrong thread */ + return -EPERM; + } + + return sm_data->exit; +} + +#define AP_POWER_SM_HANDLER_DEF(action) \ + void ap_pwrseq_sm_exec_##action##_handler( \ + void *const data, ap_pwr_state_action_handler handler) \ + { \ + struct ap_pwrseq_sm_data *sm_data = data; \ + if (handler && !sm_data->action##_handled) \ + sm_data->action##_handled = !!handler(data); \ + } + +AP_POWER_SM_HANDLER_DEF(entry) +AP_POWER_SM_HANDLER_DEF(run) +AP_POWER_SM_HANDLER_DEF(exit) diff --git a/zephyr/test/drivers/CMakeLists.txt b/zephyr/test/drivers/CMakeLists.txt index aab3db65e0..96e1126711 100644 --- a/zephyr/test/drivers/CMakeLists.txt +++ b/zephyr/test/drivers/CMakeLists.txt @@ -17,6 +17,7 @@ add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_DEFAULT_CONSOLE_CMDS default/src/c add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_ANX7447 anx7447) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_AP_MUX_CONTROL ap_mux_control) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_AP_VDM_CONTROL ap_vdm_control) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_CONSOLE_CMD_CRASH console_cmd_crash) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_COMMON_CBI common_cbi) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_COMMON_CBI_GPIO common_cbi_gpio) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_COMMON_CHARGER common_charger) @@ -28,7 +29,6 @@ add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_IT8XXX2_HW_SHA256 it8xxx2_hw_sha25 add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_KEYBOARD_SCAN keyboard_scan) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_LED_DRIVER led_driver) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_MKBP mkbp) -add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_PANIC_EVENT panic_event) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_PANIC_OUTPUT panic_output) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_POWER_HOST_SLEEP power_host_sleep) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_RT9490 rt9490) @@ -63,6 +63,7 @@ add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_PI3USB9201 bc12_pi3usb9201) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_MEMMAP memmap) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_LED_COMMON led_common) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_PS8XXX ps8xxx) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_GPIO_UNHOOK gpio_unhook) get_target_property(TEST_SOURCES_NEW app SOURCES) diff --git a/zephyr/test/drivers/Kconfig b/zephyr/test/drivers/Kconfig index 321db83508..65c881de1a 100644 --- a/zephyr/test/drivers/Kconfig +++ b/zephyr/test/drivers/Kconfig @@ -11,6 +11,9 @@ config LINK_TEST_SUITE_DEFAULT config LINK_TEST_SUITE_DEFAULT_CONSOLE_CMDS bool "Link and test the default console commands test suite" +config LINK_TEST_SUITE_CONSOLE_CMD_CRASH + bool "Link and test the console command crash test suite" + config LINK_TEST_SUITE_ANX7447 bool "Link and test the anx7447 tests" @@ -40,6 +43,9 @@ config LINK_TEST_SUITE_FLASH help Include the test suite exercising flash-related code in the binary. +config LINK_TEST_SUITE_GPIO_UNHOOK + bool "Link and execute the unhooked gpio tests" + config LINK_TEST_SUITE_HOST_COMMANDS select PLATFORM_EC_CHARGE_STATE_DEBUG bool "Link and test the host command tests" @@ -76,9 +82,6 @@ config LINK_TEST_SUITE_LOCATE_CHIP_ALTS config LINK_TEST_SUITE_MKBP bool "Link and test the mkbp tests" -config LINK_TEST_SUITE_PANIC_EVENT - bool "Link and test the panic_event tests" - config LINK_TEST_SUITE_PANIC_OUTPUT bool "Link and test the panic_output tests" diff --git a/zephyr/test/drivers/ap_vdm_control/prj.conf b/zephyr/test/drivers/ap_vdm_control/prj.conf index 685fa4c15d..215a8ab36d 100644 --- a/zephyr/test/drivers/ap_vdm_control/prj.conf +++ b/zephyr/test/drivers/ap_vdm_control/prj.conf @@ -5,3 +5,6 @@ CONFIG_PLATFORM_EC_USB_MUX_AP_CONTROL=y CONFIG_PLATFORM_EC_USB_MUX_TASK=y CONFIG_PLATFORM_EC_USB_PD_VDM_AP_CONTROL=y + +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n diff --git a/zephyr/test/drivers/ap_vdm_control/src/ap_vdm_control.c b/zephyr/test/drivers/ap_vdm_control/src/ap_vdm_control.c index 2758b5bc52..897155485c 100644 --- a/zephyr/test/drivers/ap_vdm_control/src/ap_vdm_control.c +++ b/zephyr/test/drivers/ap_vdm_control/src/ap_vdm_control.c @@ -7,6 +7,7 @@ #include "test/drivers/stubs.h" #include "test/drivers/test_state.h" #include "test/drivers/utils.h" +#include "usb_dp_alt_mode.h" #include "usb_mux.h" #include "usb_pd_vdo.h" @@ -154,6 +155,39 @@ static void verify_vdm_req(struct ap_vdm_control_fixture *fixture, zassert_true(message_seen, "Expected message not found"); } +static void verify_no_vdms(struct ap_vdm_control_fixture *fixture) +{ + struct tcpci_partner_log_msg *msg; + + /* LCOV_EXCL_START */ + /* + * Code is not expected to be reached, but this check is + * written to be tolerant of unrelated messages coming through + * during the test run to avoid needlessly brittle test code. + */ + SYS_SLIST_FOR_EACH_CONTAINER(&fixture->partner.msg_log, msg, node) + { + uint16_t header = sys_get_le16(msg->buf); + + /* Ignore messages from ourselves */ + if (msg->sender == TCPCI_PARTNER_SENDER_PARTNER) + continue; + + /* + * Control messages, non-VDMs, and extended messages are not of + * interest + */ + if ((PD_HEADER_CNT(header) == 0) || + (PD_HEADER_TYPE(header) != PD_DATA_VENDOR_DEF) || + (PD_HEADER_EXT(header) != 0)) { + continue; + } + + zassert_unreachable(); + } + /* LCOV_EXCL_STOP */ +} + static void *ap_vdm_control_setup(void) { static struct ap_vdm_control_fixture fixture; @@ -765,3 +799,87 @@ ZTEST_F(ap_vdm_control, test_vdm_attention_disconnect_clear) zassert_equal(vdm_resp.vdm_attention_left, 0, "Failed to see no more messages"); } + +ZTEST_F(ap_vdm_control, test_no_ec_dp_enter) +{ + struct ec_params_typec_control params = { + .port = TEST_PORT, + .command = TYPEC_CONTROL_COMMAND_ENTER_MODE, + .mode_to_enter = TYPEC_MODE_DP, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_TYPEC_CONTROL, 0, params); + + /* + * Confirm that the EC doesn't try to send EnterMode messages for DP on + * its own through the EC DPM logic + */ + tcpci_partner_common_enable_pd_logging(&fixture->partner, true); + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM); + k_sleep(K_SECONDS(1)); + + tcpci_partner_common_enable_pd_logging(&fixture->partner, false); + + verify_no_vdms(fixture); +} + +ZTEST_F(ap_vdm_control, test_no_ec_dp_exit) +{ + /* + * Confirm that the EC won't try to exit DP mode on its own through the + * EC's DPM logic + */ + run_verify_dp_entry(fixture, 1); + + tcpci_partner_common_enable_pd_logging(&fixture->partner, true); + host_cmd_typec_control_exit_modes(TEST_PORT); + k_sleep(K_SECONDS(1)); + + tcpci_partner_common_enable_pd_logging(&fixture->partner, false); + + verify_no_vdms(fixture); +} + +ZTEST_F(ap_vdm_control, test_dp_stub_returns) +{ + int temp; + uint32_t data[2]; + + /* + * Confirm that the DP stubs return what we expect them to without + * the EC running its DP module + */ + run_verify_dp_entry(fixture, 1); + + zassert_false(dp_is_active(TEST_PORT)); + zassert_true(dp_is_idle(TEST_PORT)); + zassert_false(dp_entry_is_done(TEST_PORT)); + zassert_equal(dp_setup_next_vdm(TEST_PORT, &temp, data), + MSG_SETUP_ERROR); +} + +ZTEST_F(ap_vdm_control, test_no_ec_dp_mode) +{ + struct ec_response_typec_status status; + struct ec_response_usb_pd_control_v2 legacy_status; + struct ec_params_usb_pd_control params = { + .port = TEST_PORT, + .role = USB_PD_CTRL_ROLE_NO_CHANGE, + .mux = USB_PD_CTRL_MUX_NO_CHANGE, + .swap = USB_PD_CTRL_SWAP_NONE + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_USB_PD_CONTROL, 2, legacy_status, params); + + /* + * Confirm that neither old nor new APIs see the EC selecting a DP pin + * mode + */ + run_verify_dp_entry(fixture, 1); + + zassert_ok(host_command_process(&args)); + zassert_equal(legacy_status.dp_mode, 0); + + status = host_cmd_typec_status(TEST_PORT); + zassert_equal(status.dp_pin, 0); +} diff --git a/zephyr/test/drivers/boards/native_posix.overlay b/zephyr/test/drivers/boards/native_posix.overlay index d36f19f15c..f2b41b0df0 100644 --- a/zephyr/test/drivers/boards/native_posix.overlay +++ b/zephyr/test/drivers/boards/native_posix.overlay @@ -300,16 +300,6 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "extpower_interrupt"; }; - int_usb_c0: usb_c0 { - irq-pin = <&usb_c0_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usb_c1: usb_c1 { - irq-pin = <&usb_c1_tcpc_int_odl>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; int_usb_c0_ppc: usb_c0_ppc { irq-pin = <&gpio_usb_c0_ppc_int>; flags = <GPIO_INT_EDGE_FALLING>; @@ -857,7 +847,7 @@ compatible = "cros,tcpci-generic-emul"; status = "okay"; reg = <0x82>; - alert_gpio = <&usb_c0_tcpc_int_odl>; + irq-gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; }; }; @@ -892,7 +882,7 @@ ps8xxx_emul: ps8xxx_emul@b { compatible = "cros,ps8xxx-emul"; reg = <0xb>; - alert_gpio = <&usb_c1_tcpc_int_odl>; + irq-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; p0-i2c-addr = <0x8>; p1-i2c-addr = <0x9>; gpio-i2c-addr = <0x1a>; diff --git a/zephyr/test/drivers/common/include/test/drivers/utils.h b/zephyr/test/drivers/common/include/test/drivers/utils.h index 0a811eecd5..98f65bf966 100644 --- a/zephyr/test/drivers/common/include/test/drivers/utils.h +++ b/zephyr/test/drivers/common/include/test/drivers/utils.h @@ -493,17 +493,6 @@ int host_cmd_motion_sense_tablet_mode_lid_angle( */ void host_cmd_typec_discovery(int port, enum typec_partner_type partner_type, void *response, size_t response_size); -/** - * @brief Run the host command to get the PD alternative mode response. - * - * @param port The USB-C port number - * @param response Destination for command response. - * @param response_size Destination of response size from request params. - */ -void host_cmd_usb_pd_get_amode( - uint8_t port, uint16_t svid_idx, - struct ec_params_usb_pd_get_mode_response *response, - int *response_size); /** * @brief Run the host command to get the PD chip information. diff --git a/zephyr/test/drivers/common/src/stubs.c b/zephyr/test/drivers/common/src/stubs.c index cb0e915017..9943164417 100644 --- a/zephyr/test/drivers/common/src/stubs.c +++ b/zephyr/test/drivers/common/src/stubs.c @@ -188,12 +188,14 @@ void ppc_alert(enum gpio_signal signal) */ static void stubs_interrupt_init(void) { + cprints(CC_USB, "Resetting TCPCs..."); + cflush(); + +#if !(CONFIG_PLATFORM_EC_TCPC_INTERRUPT) /* Enable TCPC interrupts. */ gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1)); - - cprints(CC_USB, "Resetting TCPCs..."); - cflush(); +#endif /* Reset generic TCPCI on port 0. */ gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(usb_c0_tcpc_rst_l), 0); diff --git a/zephyr/test/drivers/common/src/utils.c b/zephyr/test/drivers/common/src/utils.c index dda855ebba..000348df9e 100644 --- a/zephyr/test/drivers/common/src/utils.c +++ b/zephyr/test/drivers/common/src/utils.c @@ -618,23 +618,6 @@ struct ec_response_typec_vdm_response host_cmd_typec_vdm_response(int port) return response; } -void host_cmd_usb_pd_get_amode( - uint8_t port, uint16_t svid_idx, - struct ec_params_usb_pd_get_mode_response *response, int *response_size) -{ - struct ec_params_usb_pd_get_mode_request params = { - .port = port, - .svid_idx = svid_idx, - }; - struct host_cmd_handler_args args = - BUILD_HOST_COMMAND_PARAMS(EC_CMD_USB_PD_GET_AMODE, 0, params); - args.response = response; - - zassert_ok(host_command_process(&args), - "Failed to get alternate-mode info for port %d", port); - *response_size = args.response_size; -} - int host_cmd_usb_pd_dev_info(uint8_t port, struct ec_params_usb_pd_rw_hash_entry *response) { diff --git a/zephyr/test/drivers/console_cmd_crash/CMakeLists.txt b/zephyr/test/drivers/console_cmd_crash/CMakeLists.txt new file mode 100644 index 0000000000..dc9eea08d0 --- /dev/null +++ b/zephyr/test/drivers/console_cmd_crash/CMakeLists.txt @@ -0,0 +1,8 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +target_sources(app + PRIVATE + src/crash.c +)
\ No newline at end of file diff --git a/zephyr/test/drivers/default/src/console_cmd/crash.c b/zephyr/test/drivers/console_cmd_crash/src/crash.c index 4218aa74d6..4218aa74d6 100644 --- a/zephyr/test/drivers/default/src/console_cmd/crash.c +++ b/zephyr/test/drivers/console_cmd_crash/src/crash.c diff --git a/zephyr/test/drivers/default/src/console_cmd/CMakeLists.txt b/zephyr/test/drivers/default/src/console_cmd/CMakeLists.txt index 7fdabd1c52..b4ed741430 100644 --- a/zephyr/test/drivers/default/src/console_cmd/CMakeLists.txt +++ b/zephyr/test/drivers/default/src/console_cmd/CMakeLists.txt @@ -18,7 +18,6 @@ target_sources(app PRIVATE accelread.c accelres.c button.c - crash.c cutoff.c ec_features.c gpio.c diff --git a/zephyr/test/drivers/default/src/espi.c b/zephyr/test/drivers/default/src/espi.c index e526980ef1..d81718d422 100644 --- a/zephyr/test/drivers/default/src/espi.c +++ b/zephyr/test/drivers/default/src/espi.c @@ -77,25 +77,6 @@ ZTEST_USER(espi, test_host_command_typec_status) zassert_equal(args.response_size, sizeof(response)); } -ZTEST_USER(espi, test_host_command_usb_pd_get_amode) -{ - /* Only test we've enabled the command */ - struct ec_params_usb_pd_get_mode_request params = { - .port = PORT, - .svid_idx = 0, - }; - struct ec_params_usb_pd_get_mode_response response; - struct host_cmd_handler_args args = BUILD_HOST_COMMAND( - EC_CMD_USB_PD_GET_AMODE, 0, response, params); - - zassert_ok(host_command_process(&args)); - zassert_ok(args.result); - /* Note: with no SVIDs the response size is the size of the svid field. - * See the usb alt mode test for verifying larger struct sizes - */ - zassert_equal(args.response_size, sizeof(response.svid)); -} - ZTEST_USER(espi, test_host_command_gpio_get_v0) { struct ec_params_gpio_get p = { diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c index 1d3da4921f..0e5d3eecad 100644 --- a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c @@ -213,6 +213,9 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_pr_swap) snk_resp = host_cmd_typec_status(TEST_USB_PORT); zassert_equal(PD_ROLE_SOURCE, snk_resp.power_role, "SNK Returned power_role=%u", snk_resp.power_role); + + tcpci_partner_common_handler_mask_msg(&super_fixture->partner_emul, + PD_CTRL_ACCEPT, false); } /** diff --git a/zephyr/test/drivers/default/src/isl923x.c b/zephyr/test/drivers/default/src/isl923x.c index 1393466c76..8dbfdf530b 100644 --- a/zephyr/test/drivers/default/src/isl923x.c +++ b/zephyr/test/drivers/default/src/isl923x.c @@ -720,6 +720,18 @@ ZTEST(isl923x, test_isl923x_is_acok) rv = raa489000_is_acok(CHARGER_NUM, &acok); zassert_equal(EC_SUCCESS, rv, "AC OK check did not return success"); zassert_false(acok, "AC OK is true"); + + /* + * Charger is sourcing - ACOK is always false, + * even if the pin is asserted. + */ + raa489000_emul_set_acok_pin(isl923x_emul, 1); + raa489000_emul_set_state_machine_state(isl923x_emul, + RAA489000_INFO2_STATE_OTG); + + rv = raa489000_is_acok(CHARGER_NUM, &acok); + zassert_equal(EC_SUCCESS, rv, "AC OK check did not return success"); + zassert_false(acok, "ACOK is true when sourcing, expected false"); } ZTEST(isl923x, test_isl923x_enable_asgate) diff --git a/zephyr/test/drivers/flash/src/flash.c b/zephyr/test/drivers/flash/src/flash.c index 753983cd6c..c0b0d9ef4f 100644 --- a/zephyr/test/drivers/flash/src/flash.c +++ b/zephyr/test/drivers/flash/src/flash.c @@ -9,12 +9,14 @@ #include "host_command.h" #include "system.h" #include "test/drivers/test_state.h" +#include "test/drivers/utils.h" #include <zephyr/drivers/emul.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include <zephyr/kernel.h> #include <zephyr/shell/shell_dummy.h> +#include <zephyr/sys/byteorder.h> #include <zephyr/ztest.h> #define WP_L_GPIO_PATH NAMED_GPIOS_GPIO_NODE(wp_l) @@ -497,6 +499,194 @@ ZTEST_USER(flash, test_console_cmd_flashwp__bad_param) zassert_ok(!shell_execute_cmd(get_ec_shell(), "flashwp xyz"), NULL); } +ZTEST_USER(flash, test_console_cmd_flash_erase__flash_locked) +{ + /* Force write protection on */ + zassert_ok(crec_flash_physical_protect_now(1)); + + CHECK_CONSOLE_CMD("flasherase 0x1000 0x1000", NULL, + EC_ERROR_ACCESS_DENIED); +} + +ZTEST_USER(flash, test_console_cmd_flash_erase__bad_args) +{ + /* No args*/ + CHECK_CONSOLE_CMD("flasherase", NULL, EC_ERROR_PARAM_COUNT); + + /* Check for 1 of 2 required args */ + CHECK_CONSOLE_CMD("flasherase 0x1000", NULL, EC_ERROR_PARAM_COUNT); + + /* Check for alpha arg instead of number*/ + CHECK_CONSOLE_CMD("flasherase xyz 100", NULL, EC_ERROR_PARAM1); + CHECK_CONSOLE_CMD("flasherase 100 xyz", NULL, EC_ERROR_PARAM2); +} + +/** + * @brief Writes a 32-bit word at a specific location in flash memory. Uses Host + * Command interface to communicate with flash driver. + * + * @param offset Address to begin writing at. + * @param data A 32-bit word to write. + * @return uint16_t Host command return status. + */ +static uint16_t write_flash_helper32(uint32_t offset, uint32_t data) +{ + uint8_t out_buf[sizeof(struct ec_params_flash_write) + sizeof(data)]; + + /* The write host command structs need to be filled run-time */ + struct ec_params_flash_write *write_params = + (struct ec_params_flash_write *)out_buf; + struct host_cmd_handler_args write_args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_FLASH_WRITE, 0); + + write_params->offset = offset; + write_params->size = sizeof(data); + write_args.params = write_params; + write_args.params_size = sizeof(*write_params) + sizeof(data); + + /* Flash write `data` */ + memcpy(write_params + 1, &data, sizeof(data)); + return host_command_process(&write_args); +} + +/** + * @brief Reads a 32-bit word at a specific location in flash memory. Uses Host + * Command interface to communicate with flash driver. + * + * @param offset Address to begin reading from. + * @param data Output param for 32-bit read data. + * @return uint16_t Host command return status. + */ +static uint16_t read_flash_helper32(uint32_t offset, uint32_t *output) +{ + struct ec_params_flash_read read_params = { + .offset = offset, + .size = sizeof(*output), + }; + struct host_cmd_handler_args read_args = + BUILD_HOST_COMMAND(EC_CMD_FLASH_READ, 0, *output, read_params); + + /* Flash read and compare the readback data */ + return host_command_process(&read_args); +} + +ZTEST_USER(flash, test_console_cmd_flash_erase__happy) +{ + /* Immediately before the region to erase */ + zassert_ok(write_flash_helper32(0x40000 - 4, 0x5A5A5A5A)); + + /* Start and end of the region we will erase */ + zassert_ok(write_flash_helper32(0x40000, 0xA1B2C3D4)); + zassert_ok(write_flash_helper32(0x50000 - 4, 0x1A2B3C4D)); + + /* Immediately after the region to erase */ + zassert_ok(write_flash_helper32(0x50000, 0xA5A5A5A5)); + + CHECK_CONSOLE_CMD("flasherase 0x40000 0x10000", NULL, EC_SUCCESS); + + uint32_t output; + + /* These should remain untouched */ + zassert_ok(read_flash_helper32(0x40000 - 4, &output)); + zassert_equal(output, 0x5A5A5A5A, "Got %08x", output); + zassert_ok(read_flash_helper32(0x50000, &output)); + zassert_equal(output, 0xA5A5A5A5, "Got %08x", output); + + /* These are within the erase region and should be reset to all FF */ + zassert_ok(read_flash_helper32(0x40000, &output)); + zassert_equal(output, 0xFFFFFFFF, "Got %08x", output); + zassert_ok(read_flash_helper32(0x50000 - 4, &output)); + zassert_equal(output, 0xFFFFFFFF, "Got %08x", output); +} + +ZTEST_USER(flash, test_console_cmd_flash_write__flash_locked) +{ + /* Force write protection on */ + zassert_ok(crec_flash_physical_protect_now(1)); + + CHECK_CONSOLE_CMD("flashwrite 0x1000 0x1000", NULL, + EC_ERROR_ACCESS_DENIED); +} + +ZTEST_USER(flash, test_console_cmd_flash_write__bad_args) +{ + /* No args*/ + CHECK_CONSOLE_CMD("flashwrite", NULL, EC_ERROR_PARAM_COUNT); + + /* Check for 1 of 2 required args */ + CHECK_CONSOLE_CMD("flashwrite 0x1000", NULL, EC_ERROR_PARAM_COUNT); + + /* Check for alpha arg instead of number*/ + CHECK_CONSOLE_CMD("flashwrite xyz 100", NULL, EC_ERROR_PARAM1); + CHECK_CONSOLE_CMD("flashwrite 100 xyz", NULL, EC_ERROR_PARAM2); +} + +ZTEST_USER(flash, test_console_cmd_flash_write__too_big) +{ + CHECK_CONSOLE_CMD("flashwrite 0x10000 " STRINGIFY(INT_MAX), NULL, + EC_ERROR_INVAL); +} + +ZTEST_USER(flash, test_console_cmd_flash_write__happy) +{ + /* Write 4 bytes. The bytes written are autogenerated and just the + * pattern 00 01 02 03. + */ + CHECK_CONSOLE_CMD("flashwrite 0x10000 4", NULL, EC_SUCCESS); + + uint32_t output; + static const uint8_t expected[] = { 0x00, 0x01, 0x02, 0x03 }; + + /* Check for pattern */ + zassert_ok(read_flash_helper32(0x10000, &output)); + zassert_mem_equal(&output, &expected, sizeof(expected)); + + /* Check the space after to ensure it is still erased. */ + zassert_ok(read_flash_helper32(0x10000 + 4, &output)); + zassert_equal(output, 0xFFFFFFFF, "Got %08x", output); +} + +ZTEST_USER(flash, test_console_cmd_flash_read__bad_args) +{ + /* No args*/ + CHECK_CONSOLE_CMD("flashread", NULL, EC_ERROR_PARAM_COUNT); + + /* Check for alpha arg instead of number*/ + CHECK_CONSOLE_CMD("flashread xyz 100", NULL, EC_ERROR_PARAM1); + CHECK_CONSOLE_CMD("flashread 100 xyz", NULL, EC_ERROR_PARAM2); +} + +ZTEST_USER(flash, test_console_cmd_flash_read__too_big) +{ + CHECK_CONSOLE_CMD("flashread 0x10000 " STRINGIFY(INT_MAX), NULL, + EC_ERROR_INVAL); +} + +ZTEST_USER(flash, test_console_cmd_flash_read__happy_4_bytes) +{ + /* Write some bytes to read */ + zassert_ok(write_flash_helper32(0x10000, sys_cpu_to_be32(0xA1B2C3D4))); + + static const char *expected = "\r\n\r\n" + "00010000: a1 b2 c3 d4\r\n"; + CHECK_CONSOLE_CMD("flashread 0x10000 4", expected, EC_SUCCESS); +} + +ZTEST_USER(flash, test_console_cmd_flash_read__happy_17_bytes) +{ + /* Test 16-byte column wrapping behavior */ + + /* Write some bytes to read */ + zassert_ok(write_flash_helper32(0x10000, sys_cpu_to_be32(0xA1B2C3D4))); + + static const char *expected = + "\r\n\r\n" + "00010000: a1 b2 c3 d4 ff ff ff ff ff ff ff ff ff ff ff ff\r\n" + "00010010: ff\r\n"; + + CHECK_CONSOLE_CMD("flashread 0x10000 17", expected, EC_SUCCESS); +} + /** * @brief Prepare a region of flash for the test_crec_flash_is_erased* tests * @@ -561,29 +751,23 @@ ZTEST_USER(flash, test_crec_flash_is_erased__not_erased) NULL); } -static void flash_reset(void) +static void flash_reset(void *data) { + ARG_UNUSED(data); + /* Set the GPIO WP_L to default */ - gpio_wp_l_set(0); + zassert_ok(gpio_wp_l_set(0)); /* Reset the protection flags */ cros_flash_emul_protect_reset(); -} - -static void flash_before(void *data) -{ - ARG_UNUSED(data); - flash_reset(); -} - -static void flash_after(void *data) -{ - ARG_UNUSED(data); - flash_reset(); + zassert_ok(crec_flash_physical_protect_now(0)); - /* The test modifies this bank. Erase it in case of failure. */ - crec_flash_erase(0x10000, 0x10000); + /* Tests modify these banks. Erase them. */ + zassert_ok(crec_flash_erase(0x10000, 0x10000)); + zassert_ok(crec_flash_erase(0x30000, 0x10000)); + zassert_ok(crec_flash_erase(0x40000, 0x10000)); + zassert_ok(crec_flash_erase(0x50000, 0x10000)); } -ZTEST_SUITE(flash, drivers_predicate_post_main, NULL, flash_before, flash_after, +ZTEST_SUITE(flash, drivers_predicate_post_main, NULL, flash_reset, flash_reset, NULL); diff --git a/zephyr/test/drivers/gpio_unhook/CMakeLists.txt b/zephyr/test/drivers/gpio_unhook/CMakeLists.txt new file mode 100644 index 0000000000..7487caac88 --- /dev/null +++ b/zephyr/test/drivers/gpio_unhook/CMakeLists.txt @@ -0,0 +1,7 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Add source files +target_sources(app PRIVATE src/un_init_hooks.c) +target_sources(app PRIVATE src/is_not_ready.c) diff --git a/zephyr/test/drivers/gpio_unhook/src/is_not_ready.c b/zephyr/test/drivers/gpio_unhook/src/is_not_ready.c new file mode 100644 index 0000000000..ad0e41aa57 --- /dev/null +++ b/zephyr/test/drivers/gpio_unhook/src/is_not_ready.c @@ -0,0 +1,30 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/tcpm/tcpci.h" +#include "tcpm/tcpm.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#include <zephyr/ztest.h> + +ZTEST_SUITE(not_ready, drivers_predicate_post_main, NULL, NULL, NULL, NULL); + +ZTEST(not_ready, bad_tcpc) +{ + for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + gpio_flags_t flags; + + zassert_ok(gpio_pin_get_config_dt(&tcpc_config[i].irq_gpio, + &flags), + "error accessing tcpc port %i", i); + + zassert_false( + flags & GPIO_INT_ENABLE, + "error port %i flag should not be enabled but is 0x%X", + i, flags); + } +} diff --git a/zephyr/test/drivers/gpio_unhook/src/un_init_hooks.c b/zephyr/test/drivers/gpio_unhook/src/un_init_hooks.c new file mode 100644 index 0000000000..d4c999df38 --- /dev/null +++ b/zephyr/test/drivers/gpio_unhook/src/un_init_hooks.c @@ -0,0 +1,15 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/tcpm/tcpci.h" +#include "hooks.h" +#include "tcpm/tcpm.h" +#include "test/drivers/stubs.h" + +void tcpc_un_init(void) +{ + tcpc_config[USBC_PORT_C0].irq_gpio.port->state->initialized = 0; +} +DECLARE_HOOK(HOOK_INIT, tcpc_un_init, HOOK_PRIO_INIT_I2C); diff --git a/zephyr/test/drivers/host_command_thread/src/main.c b/zephyr/test/drivers/host_command_thread/src/main.c index 8b315dd950..bcd1b97074 100644 --- a/zephyr/test/drivers/host_command_thread/src/main.c +++ b/zephyr/test/drivers/host_command_thread/src/main.c @@ -21,15 +21,16 @@ #define CUSTOM_COMMAND_ID 0x0088 -/* Pointer to the main thread, defined in kernel/init.c */ -extern struct k_thread z_main_thread; +/* Thread id of fake main thread */ +static k_tid_t fake_main_tid; /* 0 - did not run, 1 - true, -1 - false */ static int last_check_main_thread_result; static enum ec_status check_main_thread(struct host_cmd_handler_args *args) { - last_check_main_thread_result = in_host_command_main() ? 1 : -1; + last_check_main_thread_result = + (k_current_get() == get_main_thread() ? 1 : -1); return EC_RES_SUCCESS; } @@ -42,6 +43,15 @@ static void fake_main_thread(void *a, void *b, void *c) K_THREAD_STACK_DEFINE(fake_main_thread_stack, 4000); +/* Override get_hostcmd_thread() from shim/src/tasks.c so + * task_get_current() returns TASK_ID_HOSTCMD when fake main thread + * is running. + */ +k_tid_t get_hostcmd_thread(void) +{ + return fake_main_tid; +} + ZTEST_SUITE(host_cmd_thread, drivers_predicate_post_main, NULL, NULL, NULL, NULL); @@ -51,7 +61,8 @@ ZTEST(host_cmd_thread, test_takeover) BUILD_HOST_COMMAND_SIMPLE(CUSTOM_COMMAND_ID, 0); const char expected_thread_name[] = "HOSTCMD"; struct k_thread fake_main_thread_data; - k_tid_t tid = k_thread_create( + + fake_main_tid = k_thread_create( &fake_main_thread_data, fake_main_thread_stack, K_THREAD_STACK_SIZEOF(fake_main_thread_stack), fake_main_thread, NULL, NULL, NULL, 1, 0, K_NO_WAIT); @@ -60,11 +71,11 @@ ZTEST(host_cmd_thread, test_takeover) k_msleep(500); /* Get the name of the thread (must be done after the sleep) */ - const char *main_thread_name = k_thread_name_get(&z_main_thread); + const char *main_thread_name = k_thread_name_get(get_main_thread()); /* Verify that the thread is not the hostcmd thread */ zassert_equal(EC_TASK_PRIORITY(EC_TASK_HOSTCMD_PRIO), - k_thread_priority_get(&z_main_thread)); + k_thread_priority_get(get_main_thread())); zassert_equal(strlen(expected_thread_name), strlen(main_thread_name)); zassert_mem_equal(expected_thread_name, main_thread_name, strlen(expected_thread_name)); @@ -79,5 +90,5 @@ ZTEST(host_cmd_thread, test_takeover) zassert_equal(-1, last_check_main_thread_result); /* Kill the extra thread */ - k_thread_abort(tid); + k_thread_abort(fake_main_tid); } diff --git a/zephyr/test/drivers/panic_event/CMakeLists.txt b/zephyr/test/drivers/panic_event/CMakeLists.txt deleted file mode 100644 index 25ea751d53..0000000000 --- a/zephyr/test/drivers/panic_event/CMakeLists.txt +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Add source files -target_sources(app PRIVATE src/panic_event.c) diff --git a/zephyr/test/drivers/panic_event/src/panic_event.c b/zephyr/test/drivers/panic_event/src/panic_event.c deleted file mode 100644 index 09796d355f..0000000000 --- a/zephyr/test/drivers/panic_event/src/panic_event.c +++ /dev/null @@ -1,65 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * @file - * @brief Unit Tests for panic event. - */ - -#include "common.h" -#include "ec_tasks.h" -#include "panic.h" -#include "system.h" -#include "test/drivers/stubs.h" -#include "test/drivers/test_state.h" -#include "test/drivers/utils.h" - -#include <zephyr/device.h> -#include <zephyr/fff.h> -#include <zephyr/kernel.h> -#include <zephyr/logging/log.h> -#include <zephyr/ztest.h> - -struct host_events_ctx events_ctx; - -static void before(void *unused) -{ - ARG_UNUSED(unused); - host_events_save(&events_ctx); - host_clear_events(0xffffffff); -} - -static void after(void *unused) -{ - ARG_UNUSED(unused); - host_events_restore(&events_ctx); -} - -/** - * @brief Test Suite: Verifies panic event functionality. - */ -ZTEST_SUITE(panic_event, NULL, NULL, before, after, NULL); - -/** - * @brief TestPurpose: Verify EC_HOST_EVENT_PANIC event is asserted on panic - * - * Expected Results - * - Success - */ -ZTEST_USER(panic_event, test_panic_event_notify) -{ -#ifdef CONFIG_HOSTCMD_X86 - /* Enable the EC_HOST_EVENT_PANIC event in the lpc mask */ - host_event_t lpc_event_mask; - host_event_t mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC); - - lpc_event_mask = lpc_get_host_event_mask(LPC_HOST_EVENT_SCI); - lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, lpc_event_mask | mask); -#endif - - zassert_false(host_is_event_set(EC_HOST_EVENT_PANIC)); - k_sys_fatal_error_handler(K_ERR_CPU_EXCEPTION, NULL); - zassert_true(host_is_event_set(EC_HOST_EVENT_PANIC)); -} diff --git a/zephyr/test/drivers/prj.conf b/zephyr/test/drivers/prj.conf index 00fc806d3b..555be472f1 100644 --- a/zephyr/test/drivers/prj.conf +++ b/zephyr/test/drivers/prj.conf @@ -13,7 +13,9 @@ CONFIG_ZTEST_NEW_API=y CONFIG_ZTEST_PARAMETER_COUNT=24 CONFIG_TEST=y CONFIG_ASSERT=y -CONFIG_ASSERT_TEST=y +# Do not set CONFIG_ASSERT_TEST=y here, it will mask assert failures. +# Instead set CONFIG_ASSERT_TEST=y only on specific tests that require it. +CONFIG_ASSERT_TEST=n CONFIG_SHELL_VT100_COMMANDS=n # Print logs from Zephyr LOG_MODULE to stdout diff --git a/zephyr/test/drivers/shim_rtc/src/test_shim_rtc.c b/zephyr/test/drivers/shim_rtc/src/test_shim_rtc.c index 9c411bb433..ded293d80a 100644 --- a/zephyr/test/drivers/shim_rtc/src/test_shim_rtc.c +++ b/zephyr/test/drivers/shim_rtc/src/test_shim_rtc.c @@ -55,7 +55,13 @@ ZTEST_USER(rtc_shim, test_hc_rtc_set_get_alarm) set_value.time = 1776; zassert_ok(host_command_process(&set_args)); zassert_ok(host_command_process(&get_args)); - zassert_equal(get_value.time, set_value.time); + /* + * The RTC driver adds 1 second to the alarm time to compensate for + * truncation error. For example, 7 seconds is returned when the + * actual time is 7.9 seconds. "get_value.time - 1" removes the + * additional seconded for this test. + */ + zassert_equal(get_value.time - 1, set_value.time); } ZTEST(rtc_shim, test_hc_rtc_set_alarm_can_fire_cb) @@ -84,7 +90,14 @@ ZTEST(rtc_shim, test_hc_rtc_set_alarm_can_fire_cb) set_value.time = 2; zassert_ok(host_command_process(&set_args)); /* Set fake driver time forward to hit the alarm in 2 seconds */ - system_set_rtc(4); + + /* + * The RTC driver adds 1 second to the alarm time to compensate for + * truncation error. For example, 7 seconds is returned when the + * actual time is 7.9 seconds. So, RTC seconds is set to 5 instead + * of 4. + */ + system_set_rtc(5); /* Wait for irq to finish */ k_sleep(K_SECONDS(1)); diff --git a/zephyr/test/drivers/testcase.yaml b/zephyr/test/drivers/testcase.yaml index 5565bddf94..e13692cce7 100644 --- a/zephyr/test/drivers/testcase.yaml +++ b/zephyr/test/drivers/testcase.yaml @@ -101,6 +101,13 @@ tests: drivers.console: extra_configs: - CONFIG_LINK_TEST_SUITE_CONSOLE=y + drivers.console_cmd_crash: + extra_args: CONF_FILE="prj.conf;default/prj.conf" + DTC_OVERLAY_FILE="default/boards/native_posix.overlay" + extra_configs: + - CONFIG_LINK_TEST_SUITE_CONSOLE_CMD_CRASH=y + - CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH=y + - CONFIG_ASSERT_TEST=y drivers.dps: extra_args: CONF_FILE="prj.conf;dps/prj.conf" extra_configs: @@ -108,11 +115,17 @@ tests: drivers.flash: extra_configs: - CONFIG_LINK_TEST_SUITE_FLASH=y + - CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y drivers.flash.page_layout: extra_configs: - CONFIG_LINK_TEST_SUITE_FLASH=y - CONFIG_SHELL_BACKEND_DUMMY_BUF_SIZE=500 + - CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y - CONFIG_PLATFORM_EC_USE_ZEPHYR_FLASH_PAGE_LAYOUT=y + drivers.gpio_unhook: + extra_configs: + - CONFIG_LINK_TEST_SUITE_GPIO_UNHOOK=y + - CONFIG_GPIO_GET_CONFIG=y drivers.host_cmd: extra_configs: - CONFIG_LINK_TEST_SUITE_HOST_COMMANDS=y @@ -179,9 +192,6 @@ tests: - CONFIG_LINK_TEST_SUITE_PANIC_OUTPUT=y - CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH=y - CONFIG_ZTEST_THREAD_PRIORITY=1 - drivers.panic_event: - extra_configs: - - CONFIG_LINK_TEST_SUITE_PANIC_EVENT=y drivers.power_host_sleep: extra_configs: - CONFIG_LINK_TEST_SUITE_POWER_HOST_SLEEP=y @@ -192,7 +202,9 @@ tests: - CONFIG_POWER_SEQUENCE_MOCK=y - CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y drivers.ps8xxx: - extra_args: CONF_FILE="prj.conf;ps8xxx/prj.conf" DTC_OVERLAY_FILE="./boards/native_posix.overlay;./ps8xxx/usbc.dts" + extra_args: > + CONF_FILE="prj.conf;ps8xxx/prj.conf" + DTC_OVERLAY_FILE="./boards/native_posix.overlay;./ps8xxx/usbc.dts" extra_configs: - CONFIG_LINK_TEST_SUITE_PS8XXX=y drivers.rt9490: @@ -269,6 +281,12 @@ tests: drivers.usbc_console_pd: extra_configs: - CONFIG_LINK_TEST_SUITE_USBC_CONSOLE_PD=y + drivers.usbc_console_pd_legacy: + extra_args: > + DTC_OVERLAY_FILE="default/boards/native_posix.overlay;./usbc_console_pd/usbc_legacy.dts" + extra_configs: + - CONFIG_LINK_TEST_SUITE_USBC_CONSOLE_PD=y + - CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n drivers.usbc_ctvpd: extra_configs: - CONFIG_LINK_TEST_SUITE_USBC_CTVPD=y @@ -303,6 +321,7 @@ tests: drivers.host_cmd_thread: extra_configs: - CONFIG_LINK_TEST_SUITE_HOST_CMD_THREAD=y + - CONFIG_TASK_HOSTCMD_THREAD_MAIN=y drivers.pi3usb9201: extra_configs: - CONFIG_LINK_TEST_SUITE_PI3USB9201=y diff --git a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c index c6387aae64..e966878a74 100644 --- a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c +++ b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c @@ -258,16 +258,6 @@ ZTEST_F(usbc_alt_mode, verify_displayport_mode_entry) /* Verify host command when VDOs are present. */ struct ec_response_typec_status status; - struct ec_params_usb_pd_get_mode_response response; - int response_size; - - host_cmd_usb_pd_get_amode(TEST_PORT, 0, &response, &response_size); - - /* Response should be populated with a DisplayPort VDO */ - zassert_equal(response_size, sizeof(response)); - zassert_equal(response.svid, USB_SID_DISPLAYPORT); - zassert_equal(response.vdo[0], - fixture->partner.modes_vdm[response.opos], NULL); /* DPM configures the partner on DP mode entry */ /* Verify port partner thinks its configured for DisplayPort */ @@ -480,16 +470,6 @@ ZTEST_F(usbc_alt_mode_minus_dp_configure, test_dp_mode_entry_minus_config) /* Verify host command when VDOs are present. */ struct ec_response_typec_status status; - struct ec_params_usb_pd_get_mode_response response; - int response_size; - - host_cmd_usb_pd_get_amode(TEST_PORT, 0, &response, &response_size); - - /* Response should be populated with a DisplayPort VDO */ - zassert_equal(response_size, sizeof(response)); - zassert_equal(response.svid, USB_SID_DISPLAYPORT); - zassert_equal(response.vdo[0], - fixture->partner.modes_vdm[response.opos], NULL); /* DPM configures the partner on DP mode entry */ /* Verify port partner thinks it's *NOT* configured for DisplayPort */ diff --git a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c index 597aac4179..a4c406a054 100644 --- a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c +++ b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c @@ -32,50 +32,15 @@ ZTEST_F(usbc_alt_mode, verify_displayport_mode_reentry) k_sleep(K_SECONDS(1)); zassert_true(fixture->partner.displayport_configured); - /* Verify that DisplayPort is the active alternate mode. */ - struct ec_params_usb_pd_get_mode_response response; - int response_size; - - host_cmd_usb_pd_get_amode(TEST_PORT, 0, &response, &response_size); - - /* Response should be populated with a DisplayPort VDO */ - zassert_equal(response_size, sizeof(response)); - zassert_equal(response.svid, USB_SID_DISPLAYPORT); - zassert_equal(response.vdo[0], - fixture->partner.modes_vdm[response.opos]); -} - -ZTEST_F(usbc_alt_mode, verify_mode_entry_via_pd_host_cmd) -{ - if (!IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { - ztest_test_skip(); - } - - /* Verify entering mode */ - struct ec_params_usb_pd_set_mode_request set_mode_params = { - .cmd = PD_ENTER_MODE, - .port = TEST_PORT, - .opos = 1, /* Second VDO (after Discovery Responses) */ - .svid = USB_SID_DISPLAYPORT, - }; - - struct host_cmd_handler_args set_mode_args = BUILD_HOST_COMMAND_PARAMS( - EC_CMD_USB_PD_SET_AMODE, 0, set_mode_params); - - zassert_ok(host_command_process(&set_mode_args)); - - /* Verify that DisplayPort is the active alternate mode. */ - struct ec_params_usb_pd_get_mode_response get_mode_response; - int response_size; - - host_cmd_usb_pd_get_amode(TEST_PORT, 0, &get_mode_response, - &response_size); + /* + * Verify that DisplayPort is the active alternate mode by checking our + * MUX settings + */ + struct ec_response_typec_status status; - /* Response should be populated with a DisplayPort VDO */ - zassert_equal(response_size, sizeof(get_mode_response)); - zassert_equal(get_mode_response.svid, USB_SID_DISPLAYPORT); - zassert_equal(get_mode_response.vdo[0], - fixture->partner.modes_vdm[get_mode_response.opos]); + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_PD_MUX_DP_ENABLED), + USB_PD_MUX_DP_ENABLED, "Failed to see DP mux set"); } ZTEST_F(usbc_alt_mode, verify_mode_exit_via_pd_host_cmd) @@ -87,36 +52,16 @@ ZTEST_F(usbc_alt_mode, verify_mode_exit_via_pd_host_cmd) host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); k_sleep(K_SECONDS(1)); - struct ec_params_usb_pd_get_mode_response get_mode_response; - int response_size; - - host_cmd_usb_pd_get_amode(TEST_PORT, 0, &get_mode_response, - &response_size); + host_cmd_typec_control_exit_modes(TEST_PORT); + k_sleep(K_SECONDS(1)); + zassert_false(fixture->partner.displayport_configured); - /* We require an the active alternate mode (DisplayPort in this case), - * entering an alternate most (DisplayPort specifically) has already - * been verified in another test + /* + * Verify that DisplayPort is no longer active by checking our + * MUX settings */ - zassert_equal(response_size, sizeof(get_mode_response)); - zassert_equal(get_mode_response.svid, USB_SID_DISPLAYPORT); - zassert_equal(get_mode_response.vdo[0], - fixture->partner.modes_vdm[get_mode_response.opos]); - - struct ec_params_usb_pd_set_mode_request set_mode_params = { - .cmd = PD_EXIT_MODE, - .port = TEST_PORT, - .opos = get_mode_response.opos, - .svid = get_mode_response.svid, - }; - - struct host_cmd_handler_args set_mode_args = BUILD_HOST_COMMAND_PARAMS( - EC_CMD_USB_PD_SET_AMODE, 0, set_mode_params); - - zassert_ok(host_command_process(&set_mode_args)); + struct ec_response_typec_status status; - /* Verify mode was exited using get_amode command */ - host_cmd_usb_pd_get_amode(TEST_PORT, 0, &get_mode_response, - &response_size); - zassert_not_equal(get_mode_response.vdo[0], - fixture->partner.modes_vdm[get_mode_response.opos]); + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_PD_MUX_DP_ENABLED), 0); } diff --git a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c index ef56332f55..e36ba57e26 100644 --- a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c +++ b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c @@ -19,26 +19,27 @@ ZTEST_F(usbc_alt_mode, verify_displayport_mode_power_cycle) { + struct ec_response_typec_status status; + /* Verify that the TCPM enters DP mode on attach, exits on AP power-off, * and enters again on AP power on. */ zassert_true(fixture->partner.displayport_configured, NULL); + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_PD_MUX_DP_ENABLED), + USB_PD_MUX_DP_ENABLED); mock_power_request(POWER_REQ_SOFT_OFF); zassert_false(fixture->partner.displayport_configured, NULL); + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_PD_MUX_DP_ENABLED), 0); mock_power_request(POWER_REQ_ON); - zassert_true(fixture->partner.displayport_configured, NULL); - - struct ec_params_usb_pd_get_mode_response response; - int response_size; - host_cmd_usb_pd_get_amode(TEST_PORT, 0, &response, &response_size); - - zassert_equal(response_size, sizeof(response), NULL); - zassert_equal(response.svid, USB_SID_DISPLAYPORT, NULL); - zassert_equal(response.vdo[0], - fixture->partner.modes_vdm[response.opos], NULL); + zassert_true(fixture->partner.displayport_configured, NULL); + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_PD_MUX_DP_ENABLED), + USB_PD_MUX_DP_ENABLED); } diff --git a/zephyr/test/drivers/usbc_console_pd/usbc_legacy.dts b/zephyr/test/drivers/usbc_console_pd/usbc_legacy.dts new file mode 100644 index 0000000000..c07f379f77 --- /dev/null +++ b/zephyr/test/drivers/usbc_console_pd/usbc_legacy.dts @@ -0,0 +1,25 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +&{/gpio-interrupts} { + int_usb_c0: usb_c0 { + irq-pin = <&usb_c0_tcpc_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_usb_c1: usb_c1 { + irq-pin = <&usb_c1_tcpc_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; +}; + +&tcpci_emul { + int-pin = <&usb_c0_tcpc_int_odl>; +}; + +&ps8xxx_emul { + int-pin = <&usb_c1_tcpc_int_odl>; +}; diff --git a/zephyr/test/ec_app/boards/native_posix.overlay b/zephyr/test/ec_app/boards/native_posix.overlay index 69bf044ec6..1afbdd4f4c 100644 --- a/zephyr/test/ec_app/boards/native_posix.overlay +++ b/zephyr/test/ec_app/boards/native_posix.overlay @@ -30,6 +30,22 @@ flash1: flash@64000000 { reg = <0x64000000 DT_SIZE_K(512)>; }; + + power-states { + suspend_to_idle_instant: suspend_to_idle_instant { + compatible = "zephyr,power-state"; + power-state-name = "suspend-to-idle"; + substate-id = <0>; + min-residency-us = <500>; + }; + + suspend_to_idle_normal: suspend_to_idle_normal { + compatible = "zephyr,power-state"; + power-state-name = "suspend-to-idle"; + substate-id = <1>; + min-residency-us = <200100>; + }; + }; }; &gpio0 { diff --git a/zephyr/test/ec_app/prj.conf b/zephyr/test/ec_app/prj.conf index 502f5bbdc6..8bbe96b8dc 100644 --- a/zephyr/test/ec_app/prj.conf +++ b/zephyr/test/ec_app/prj.conf @@ -13,8 +13,11 @@ CONFIG_SHELL_BACKEND_SERIAL=n CONFIG_SERIAL=y CONFIG_RING_BUFFER=y +CONFIG_PM=y CONFIG_PLATFORM_EC_VBOOT_EFS2=y CONFIG_PLATFORM_EC_VBOOT_HASH=y CONFIG_PLATFORM_EC_HOSTCMD=y CONFIG_PLATFORM_EC_BACKLIGHT_LID=n CONFIG_PLATFORM_EC_SWITCH=n +CONFIG_PLATFORM_EC_BOOT_NO_SLEEP=y +CONFIG_PLATFORM_EC_BOOT_NO_SLEEP_MS=1000
\ No newline at end of file diff --git a/zephyr/test/ec_app/src/main.c b/zephyr/test/ec_app/src/main.c index 52a19f131c..2e3cd7efa9 100644 --- a/zephyr/test/ec_app/src/main.c +++ b/zephyr/test/ec_app/src/main.c @@ -6,7 +6,9 @@ #include "ec_app_main.h" #include "hooks.h" #include "task.h" +#include "timer.h" +#include <zephyr/pm/policy.h> #include <zephyr/shell/shell_dummy.h> #include <zephyr/ztest_assert.h> #include <zephyr/ztest_test_new.h> @@ -99,6 +101,17 @@ ZTEST(ec_app_tests, test_start_ec_tasks) } #endif +ZTEST(ec_app_tests, test_ec_boot_sleep_disable) +{ +#ifdef CONFIG_PLATFORM_EC_BOOT_NO_SLEEP_MS + zassert_true(pm_policy_state_lock_is_active(PM_STATE_SUSPEND_TO_IDLE, + PM_ALL_SUBSTATES)); + k_msleep(2 * CONFIG_PLATFORM_EC_BOOT_NO_SLEEP_MS); +#endif + zassert_false(pm_policy_state_lock_is_active(PM_STATE_SUSPEND_TO_IDLE, + PM_ALL_SUBSTATES)); +} + /* Does setup for all of the test cases. */ void *ec_app_setup(void) { diff --git a/zephyr/test/skyrim/CMakeLists.txt b/zephyr/test/skyrim/CMakeLists.txt index 8fbcc78432..72f995d0c0 100644 --- a/zephyr/test/skyrim/CMakeLists.txt +++ b/zephyr/test/skyrim/CMakeLists.txt @@ -10,6 +10,10 @@ zephyr_include_directories("${PLATFORM_EC_PROGRAM_DIR}/skyrim/include") add_subdirectory(${PLATFORM_EC}/zephyr/test/test_utils test_utils) -target_sources(app PRIVATE src/${CONFIG_TEST_BOARD_NAME}/common.c) +target_sources(app PRIVATE src/common.c src/${CONFIG_TEST_BOARD_NAME}/common.c) -target_sources_ifdef(CONFIG_TEST_BOARD_USB_PD_POLICY app PRIVATE src/baseboard/usb_pd_policy.c ${PLATFORM_EC_PROGRAM_DIR}/skyrim/src/usb_pd_policy.c)
\ No newline at end of file +target_sources_ifdef(CONFIG_TEST_BOARD_ALT_CHARGER app PRIVATE src/${CONFIG_TEST_BOARD_ALT_CHARGER_SRC} ${PLATFORM_EC_PROGRAM_DIR}/skyrim/${CONFIG_TEST_BOARD_NAME}/src/alt_charger.c) +target_sources_ifdef(CONFIG_TEST_BOARD_FAN app PRIVATE src/${CONFIG_TEST_BOARD_FAN_SRC} ${PLATFORM_EC_PROGRAM_DIR}/skyrim/${CONFIG_TEST_BOARD_NAME}/src/fan.c) +target_sources_ifdef(CONFIG_TEST_BOARD_PPC_CONFIG app PRIVATE src/${CONFIG_TEST_BOARD_PPC_CONFIG_SRC} ${PLATFORM_EC_PROGRAM_DIR}/skyrim/${CONFIG_TEST_BOARD_NAME}/src/ppc_config.c) +target_sources_ifdef(CONFIG_TEST_BOARD_USB_PD_POLICY app PRIVATE src/baseboard/usb_pd_policy.c ${PLATFORM_EC_PROGRAM_DIR}/skyrim/src/usb_pd_policy.c) +target_sources_ifdef(CONFIG_TEST_BOARD_USB_MUX_CONFIG app PRIVATE src/${TEST_BOARD_USB_MUX_CONFIG_SRC} ${PLATFORM_EC_PROGRAM_DIR}/skyrim/${CONFIG_TEST_BOARD_NAME}/src/usb_mux_config.c) diff --git a/zephyr/test/skyrim/Kconfig b/zephyr/test/skyrim/Kconfig index 41685834be..99013c0f6f 100644 --- a/zephyr/test/skyrim/Kconfig +++ b/zephyr/test/skyrim/Kconfig @@ -48,11 +48,49 @@ config TEST_BOARD_NAME default "skyrim" if TEST_BOARD_SKYRIM default "winterhold" if TEST_BOARD_WINTERHOLD +config TEST_BOARD_ALT_CHARGER + bool "Enable alt charger specific tests" + +config TEST_BOARD_ALT_CHARGER_SRC + string "Source file to use for this test" + default "common/alt_charger.c" + depends on TEST_BOARD_ALT_CHARGER + +config TEST_BOARD_FAN + bool "Enable fan tests" + +config TEST_BOARD_FAN_SRC + string "Source file to use for this test" + default "common/fan.c" + depends on TEST_BOARD_FAN + config TEST_BOARD_USB_PD_POLICY bool "Enable USB PD policy specific tests" select TEST_ENABLE_USB_PD_HOST_CMD default n +config TEST_BOARD_PPC_CONFIG + bool "Enable PPC config tests" + default n + +config TEST_BOARD_PPC_CONFIG_SRC + string "Source file to use for this test" + default "common/ppc_config.c" + depends on TEST_BOARD_PPC + +config TEST_BOARD_USB_MUX_CONFIG + bool "Enable USB mux config tests" + default n + +config TEST_BOARD_USB_MUX_CONFIG_SRC + string "Source file to use for this test" + default "common/usb_mux_config.c" + depends on TEST_BOARD_USB_MUX_CONFIG + +config SKYRIM_LOG_LEVEL + int "Fake config to allow building" + default 4 # Log level debug by default + config TEST_ENABLE_USB_PD_HOST_CMD bool "Fake config to enable this feature" default n diff --git a/zephyr/test/skyrim/boards/native_posix.overlay b/zephyr/test/skyrim/boards/native_posix.overlay index 7328610584..5bf8c86ec7 100644 --- a/zephyr/test/skyrim/boards/native_posix.overlay +++ b/zephyr/test/skyrim/boards/native_posix.overlay @@ -25,6 +25,79 @@ gpios = <&gpio0 2 GPIO_OUTPUT_LOW>; enum-name = "IOEX_USB_C1_TCPC_FASTSW_CTL_EN"; }; + + gpio_usb_c0_ppc_int_odl: usb_c0_ppc_int_odl { + gpios = <&gpio0 3 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PPC_INT_ODL"; + }; + gpio_usb_c1_ppc_int_odl: usb_c1_ppc_int_odl { + gpios = <&gpio0 4 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_PPC_INT_ODL"; + }; + + ioex_usb_c0_ilim_3a_en: usb_c0_ppc_ilim_3a_en { + gpios = <&gpio0 5 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C0_PPC_ILIM_3A_EN"; + }; + + gpio_usb_c1_in_hpd: usb_c1_in_hpd { + gpios = <&gpio0 6 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C1_HPD_IN_DB"; + }; + + ioex_usb_c1_sbu_flip: usb_c1_sbu_flip { + gpios = <&gpio0 7 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C1_SBU_FLIP"; + }; + + ioex_usb_c0_sbu_flip: usb_c0_sbu_flip { + gpios = <&gpio0 8 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C0_SBU_FLIP"; + }; + }; + + skyrim-fw-config { + compatible = "cros-ec,cbi-fw-config"; + + fan { + enum-name = "FW_FAN"; + start = <10>; + size = <1>; + + no-fan { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_NOT_PRESENT"; + value = <0>; + }; + fan-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_PRESENT"; + value = <1>; + /* + * Set as default so that unprovisioned + * configs will run the fan regardless. + */ + default; + }; + }; + + charger-option { + enum-name = "FW_CHARGER"; + start = <11>; + size = <2>; + + charger-option-isl9241 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_CHARGER_ISL9241"; + value = <0>; + default; + }; + charger-option-isl9538 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_CHARGER_ISL9538"; + value = <1>; + }; + }; }; }; diff --git a/zephyr/test/skyrim/prj.conf b/zephyr/test/skyrim/prj.conf index 77f7eab5a2..d9b3ba4ab9 100644 --- a/zephyr/test/skyrim/prj.conf +++ b/zephyr/test/skyrim/prj.conf @@ -7,7 +7,9 @@ CONFIG_ZTEST_ASSERT_VERBOSE=1 CONFIG_ZTEST_NEW_API=y CONFIG_ASSERT=y +CONFIG_PLATFORM_EC_CBI=y CONFIG_CROS_EC=y CONFIG_PLATFORM_EC=y +CONFIG_PLATFORM_EC_HOOKS=y CONFIG_EMUL=y CONFIG_GPIO=y diff --git a/zephyr/test/skyrim/src/common.c b/zephyr/test/skyrim/src/common.c new file mode 100644 index 0000000000..b369d0bdaa --- /dev/null +++ b/zephyr/test/skyrim/src/common.c @@ -0,0 +1,7 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/logging/log.h> + +LOG_MODULE_REGISTER(skyrim, CONFIG_SKYRIM_LOG_LEVEL); diff --git a/zephyr/test/skyrim/src/common/alt_charger.c b/zephyr/test/skyrim/src/common/alt_charger.c new file mode 100644 index 0000000000..c03d31aaeb --- /dev/null +++ b/zephyr/test/skyrim/src/common/alt_charger.c @@ -0,0 +1,55 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/devicetree.h> +#include <zephyr/fff.h> +#include <zephyr/ztest.h> + +#include <charger.h> +#include <cros_cbi.h> +#include <hooks.h> + +FAKE_VALUE_FUNC(int, cros_cbi_get_fw_config, enum cbi_fw_config_field_id, + uint32_t *); +FAKE_VOID_FUNC(chg_enable_alternate_test, int); + +void alt_charger_init(void); + +static bool alt_charger; +static int cros_cbi_get_fw_config_mock(enum cbi_fw_config_field_id field_id, + uint32_t *value) +{ + if (field_id != FW_CHARGER) + return -EINVAL; + + *value = alt_charger ? FW_CHARGER_ISL9538 : FW_CHARGER_ISL9241; + return 0; +} + +static void alt_charger_before(void *fixture) +{ + ARG_UNUSED(fixture); + RESET_FAKE(cros_cbi_get_fw_config); + RESET_FAKE(chg_enable_alternate_test); + + cros_cbi_get_fw_config_fake.custom_fake = cros_cbi_get_fw_config_mock; +} + +ZTEST_SUITE(alt_charger, NULL, NULL, alt_charger_before, NULL, NULL); + +ZTEST(alt_charger, normal_charger) +{ + alt_charger = false; + alt_charger_init(); + /* Test that the alternative charger wasn't enabled. */ + zassert_equal(chg_enable_alternate_test_fake.call_count, 0); +} + +ZTEST(alt_charger, alt_charger) +{ + alt_charger = true; + alt_charger_init(); + zassert_equal(chg_enable_alternate_test_fake.call_count, 1); + zassert_equal(chg_enable_alternate_test_fake.arg0_val, 0); +} diff --git a/zephyr/test/skyrim/src/common/fan.c b/zephyr/test/skyrim/src/common/fan.c new file mode 100644 index 0000000000..4968938298 --- /dev/null +++ b/zephyr/test/skyrim/src/common/fan.c @@ -0,0 +1,92 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/devicetree.h> +#include <zephyr/fff.h> +#include <zephyr/ztest.h> + +#include <cros_board_info.h> +#include <cros_cbi.h> +#include <fan.h> +#include <hooks.h> + +FAKE_VOID_FUNC(fan_set_count, int); +FAKE_VALUE_FUNC(int, cros_cbi_get_fw_config, enum cbi_fw_config_field_id, + uint32_t *); +FAKE_VALUE_FUNC(int, cbi_get_board_version, uint32_t *); + +void fan_init(void); +bool board_supports_pcore_ocp(void); + +static bool fan_present; +static int board_version; + +static int cros_cbi_get_fw_config_mock(enum cbi_fw_config_field_id field_id, + uint32_t *value) +{ + if (field_id != FW_FAN) + return -EINVAL; + + *value = fan_present ? FW_FAN_PRESENT : FW_FAN_NOT_PRESENT; + return 0; +} + +static int cbi_get_board_version_mock(uint32_t *value) +{ + *value = board_version; + return EC_SUCCESS; +} + +static void fan_before(void *fixture) +{ + ARG_UNUSED(fixture); + RESET_FAKE(fan_set_count); + RESET_FAKE(cros_cbi_get_fw_config); + RESET_FAKE(cbi_get_board_version); + + cros_cbi_get_fw_config_fake.custom_fake = cros_cbi_get_fw_config_mock; + cbi_get_board_version_fake.custom_fake = cbi_get_board_version_mock; +} + +ZTEST_SUITE(fan, NULL, NULL, fan_before, NULL, NULL); + +ZTEST(fan, board_supports_pcore_ocp) +{ + /* Only supported for board version > 3. */ + board_version = 2; + zassert_false(board_supports_pcore_ocp()); + board_version = 3; + zassert_false(board_supports_pcore_ocp()); + board_version = 4; + zassert_true(board_supports_pcore_ocp()); +} + +ZTEST(fan, fan_init) +{ + /* Only disable fans on board version >= 3. */ + fan_present = false; + board_version = 2; + fan_init(); + zassert_equal(fan_set_count_fake.call_count, 0); + + fan_present = true; + board_version = 3; + fan_init(); + zassert_equal(fan_set_count_fake.call_count, 0); + + fan_present = true; + board_version = 4; + fan_init(); + zassert_equal(fan_set_count_fake.call_count, 0); + + fan_present = false; + board_version = 3; + fan_init(); + zassert_equal(fan_set_count_fake.call_count, 1); + + fan_present = false; + board_version = 4; + fan_init(); + zassert_equal(fan_set_count_fake.call_count, 2); +} diff --git a/zephyr/test/skyrim/src/common/ppc_config.c b/zephyr/test/skyrim/src/common/ppc_config.c new file mode 100644 index 0000000000..0721e9c313 --- /dev/null +++ b/zephyr/test/skyrim/src/common/ppc_config.c @@ -0,0 +1,58 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/fff.h> +#include <zephyr/ztest.h> + +#include <gpio.h> +#include <usbc_ppc.h> + +FAKE_VOID_FUNC(aoz1380_interrupt, int); +FAKE_VOID_FUNC(nx20p348x_interrupt, int); + +static void ppc_config_before(void *fixture) +{ + ARG_UNUSED(fixture); + RESET_FAKE(aoz1380_interrupt); + RESET_FAKE(nx20p348x_interrupt); +} + +void ppc_interrupt(enum gpio_signal signal); +int board_aoz1380_set_vbus_source_current_limit(int port, + enum tcpc_rp_value rp); + +ZTEST_SUITE(ppc_config, NULL, NULL, ppc_config_before, NULL, NULL); + +ZTEST(ppc_config, board_aoz1380_set_vbus_source_current_limit) +{ + int rv; + const struct gpio_dt_spec *gpio = + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_ilim_3a_en); + + /* + * board_aoz1380_set_vbus_source_current_limit should set + * ioex_usb_c0_ilim_3a_en to 1 for 3A, 0 otherwise. + */ + rv = board_aoz1380_set_vbus_source_current_limit(0, TYPEC_RP_3A0); + zassert_equal(rv, EC_SUCCESS); + zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 1); + + rv = board_aoz1380_set_vbus_source_current_limit(0, TYPEC_RP_1A5); + zassert_equal(rv, EC_SUCCESS); + zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 0); +} + +ZTEST(ppc_config, ppc_interrupt) +{ + ppc_interrupt(GPIO_USB_C0_PPC_INT_ODL); + zassert_equal(aoz1380_interrupt_fake.call_count, 1); + /* port */ + zassert_equal(aoz1380_interrupt_fake.arg0_val, 0); + + ppc_interrupt(GPIO_USB_C1_PPC_INT_ODL); + zassert_equal(nx20p348x_interrupt_fake.call_count, 1); + /* port */ + zassert_equal(nx20p348x_interrupt_fake.arg0_val, 1); +} diff --git a/zephyr/test/skyrim/src/crystaldrift/common.c b/zephyr/test/skyrim/src/crystaldrift/common.c index 841b7db140..9fa7864859 100644 --- a/zephyr/test/skyrim/src/crystaldrift/common.c +++ b/zephyr/test/skyrim/src/crystaldrift/common.c @@ -2,6 +2,9 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <zephyr/logging/log.h> #include <zephyr/ztest.h> +LOG_MODULE_REGISTER(crystaldrift, CONFIG_SKYRIM_LOG_LEVEL); + ZTEST_SUITE(common, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/skyrim/src/frostflow/usb_mux_config.c b/zephyr/test/skyrim/src/frostflow/usb_mux_config.c new file mode 100644 index 0000000000..929bd318d4 --- /dev/null +++ b/zephyr/test/skyrim/src/frostflow/usb_mux_config.c @@ -0,0 +1,60 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/fff.h> +#include <zephyr/ztest.h> + +#include <gpio.h> +#include <usbc/usb_muxes.h> + +int board_c0_amd_fp6_mux_set(const struct usb_mux *me, mux_state_t mux_state); +int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state); + +ZTEST_SUITE(usb_mux_config, NULL, NULL, NULL, NULL, NULL); + +ZTEST(usb_mux_config, board_c0_amd_fp6_mux_set) +{ + const struct gpio_dt_spec *c0 = + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip); + const struct gpio_dt_spec *c1 = + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip); + struct usb_mux mux; + int rv; + + /* Output for each port should match inverted status. */ + mux.usb_port = 0; + rv = board_c0_amd_fp6_mux_set(&mux, 0); + zassert_equal(rv, EC_SUCCESS); + zassert_equal(gpio_emul_output_get(c0->port, c0->pin), 0); + + rv = board_c0_amd_fp6_mux_set(&mux, USB_PD_MUX_POLARITY_INVERTED); + zassert_equal(rv, EC_SUCCESS); + zassert_equal(gpio_emul_output_get(c0->port, c0->pin), 1); + + mux.usb_port = 1; + rv = board_c0_amd_fp6_mux_set(&mux, 0); + zassert_equal(rv, EC_SUCCESS); + zassert_equal(gpio_emul_output_get(c1->port, c1->pin), 0); + + rv = board_c0_amd_fp6_mux_set(&mux, USB_PD_MUX_POLARITY_INVERTED); + zassert_equal(rv, EC_SUCCESS); + zassert_equal(gpio_emul_output_get(c1->port, c1->pin), 1); +} + +ZTEST(usb_mux_config, board_c1_ps8818_mux_set) +{ + const struct gpio_dt_spec *gpio = + GPIO_DT_FROM_NODELABEL(gpio_usb_c1_in_hpd); + struct usb_mux mux; + + /* gpio_usb_c1_in_hpd should match if DP is enabled. */ + mux.usb_port = 0; + zassert_ok(board_c1_ps8818_mux_set(&mux, 0)); + zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 0); + + mux.usb_port = 1; + zassert_ok(board_c1_ps8818_mux_set(&mux, USB_PD_MUX_DP_ENABLED)); + zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 1); +} diff --git a/zephyr/test/skyrim/src/markarth/common.c b/zephyr/test/skyrim/src/markarth/common.c index 841b7db140..b302042761 100644 --- a/zephyr/test/skyrim/src/markarth/common.c +++ b/zephyr/test/skyrim/src/markarth/common.c @@ -2,6 +2,9 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <zephyr/logging/log.h> #include <zephyr/ztest.h> +LOG_MODULE_REGISTER(markarth, CONFIG_SKYRIM_LOG_LEVEL); + ZTEST_SUITE(common, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/skyrim/src/winterhold/ppc_config.c b/zephyr/test/skyrim/src/winterhold/ppc_config.c new file mode 100644 index 0000000000..131a74855e --- /dev/null +++ b/zephyr/test/skyrim/src/winterhold/ppc_config.c @@ -0,0 +1,38 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/fff.h> +#include <zephyr/ztest.h> + +#include <gpio.h> +#include <usbc_ppc.h> + +FAKE_VOID_FUNC(nx20p348x_interrupt, int); +DEFINE_FAKE_VOID_FUNC(nx20p348x_interrupt, int); + +static void ppc_config_before(void *fixture) +{ + ARG_UNUSED(fixture); + RESET_FAKE(nx20p348x_interrupt); +} + +void ppc_interrupt(enum gpio_signal signal); + +ZTEST_SUITE(ppc_config, NULL, NULL, ppc_config_before, NULL, NULL); + +ZTEST(ppc_config, ppc_interrupt_c0) +{ + ppc_interrupt(GPIO_USB_C0_PPC_INT_ODL); + zassert_equal(nx20p348x_interrupt_fake.call_count, 1); + /* port */ + zassert_equal(nx20p348x_interrupt_fake.arg0_val, 0); +} + +ZTEST(ppc_config, ppc_interrupt_c1) +{ + ppc_interrupt(GPIO_USB_C1_PPC_INT_ODL); + zassert_equal(nx20p348x_interrupt_fake.call_count, 1); + /* port */ + zassert_equal(nx20p348x_interrupt_fake.arg0_val, 1); +} diff --git a/zephyr/test/skyrim/testcase.yaml b/zephyr/test/skyrim/testcase.yaml index 29d22a2fcd..d2330c740b 100644 --- a/zephyr/test/skyrim/testcase.yaml +++ b/zephyr/test/skyrim/testcase.yaml @@ -26,22 +26,79 @@ tests: extra_configs: - CONFIG_TEST_BOARD_CRYSTALDRIFT=y + skyrim.crystaldrift.alt_charger: + extra_configs: + - CONFIG_TEST_BOARD_CRYSTALDRIFT=y + - CONFIG_TEST_BOARD_ALT_CHARGER=y + + skyrim.crystaldrift.fan: + extra_configs: + - CONFIG_TEST_BOARD_CRYSTALDRIFT=y + - CONFIG_TEST_BOARD_FAN=y + + skyrim.crystaldrift.ppc_config: + extra_configs: + - CONFIG_TEST_BOARD_CRYSTALDRIFT=y + - CONFIG_TEST_BOARD_PPC_CONFIG=y + # Frostflow tests skyrim.frostflow: extra_configs: - CONFIG_TEST_BOARD_FROSTFLOW=y + skyrim.frostflow.ppc_config: + extra_configs: + - CONFIG_TEST_BOARD_FROSTFLOW=y + - CONFIG_TEST_BOARD_PPC_CONFIG=y + + # skyrim.frostflow.usb_mux_config: + # extra_configs: + # - CONFIG_TEST_BOARD_FROSTFLOW=y + # - CONFIG_TEST_BOARD_USB_MUX_CONFIG=y + # - CONFIG_TEST_BOARD_USB_MUX_CONFIG_SRC="frostflow/usb_mux_config.c" + # Markarth tests skyrim.markarth: extra_configs: - CONFIG_TEST_BOARD_MARKARTH=y + skyrim.markarth.fan: + extra_configs: + - CONFIG_TEST_BOARD_MARKARTH=y + - CONFIG_TEST_BOARD_FAN=y + + skyrim.markarth.ppc_config: + extra_configs: + - CONFIG_TEST_BOARD_MARKARTH=y + - CONFIG_TEST_BOARD_PPC_CONFIG=y + # Skyrim tests skyrim.skyrim: extra_configs: - CONFIG_TEST_BOARD_SKYRIM=y + skyrim.skyrim.alt_charger: + extra_configs: + - CONFIG_TEST_BOARD_SKYRIM=y + - CONFIG_TEST_BOARD_ALT_CHARGER=y + + skyrim.skyrim.fan: + extra_configs: + - CONFIG_TEST_BOARD_SKYRIM=y + - CONFIG_TEST_BOARD_FAN=y + + skyrim.skyrim.ppc_config: + extra_configs: + - CONFIG_TEST_BOARD_SKYRIM=y + - CONFIG_TEST_BOARD_PPC_CONFIG=y + # Winterhold tests skyrim.winterhold: extra_configs: - CONFIG_TEST_BOARD_WINTERHOLD=y + + skyrim.winterhold.ppc_config: + extra_configs: + - CONFIG_TEST_BOARD_WINTERHOLD=y + - CONFIG_TEST_BOARD_PPC_CONFIG=y + - CONFIG_TEST_BOARD_PPC_CONFIG_SRC="winterhold/ppc_config.c" diff --git a/zephyr/test/system_safe_mode/prj.conf b/zephyr/test/system_safe_mode/prj.conf index 22294e85d3..f7aeb4b776 100644 --- a/zephyr/test/system_safe_mode/prj.conf +++ b/zephyr/test/system_safe_mode/prj.conf @@ -11,6 +11,7 @@ CONFIG_SYSTEM_FAKE=y CONFIG_PLATFORM_EC_SYSTEM_SAFE_MODE=y CONFIG_TASK_HOSTCMD_THREAD_DEDICATED=y CONFIG_PLATFORM_EC_HOSTCMD=y +CONFIG_ASSERT_TEST=y # Disable because not needed CONFIG_PLATFORM_EC_BACKLIGHT_LID=n diff --git a/zephyr/test/system_safe_mode/src/system_safe_mode.c b/zephyr/test/system_safe_mode/src/system_safe_mode.c index 2b861f2e5b..f286a45124 100644 --- a/zephyr/test/system_safe_mode/src/system_safe_mode.c +++ b/zephyr/test/system_safe_mode/src/system_safe_mode.c @@ -140,4 +140,22 @@ ZTEST_USER(system_safe_mode, test_blocked_command_in_safe_mode) zassert_true(host_command_process(&args)); } +ZTEST_USER(system_safe_mode, test_panic_event_notify) +{ +#ifdef CONFIG_HOSTCMD_X86 + /* Enable the EC_HOST_EVENT_PANIC event in the lpc mask */ + host_event_t lpc_event_mask; + host_event_t mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC); + + lpc_event_mask = lpc_get_host_event_mask(LPC_HOST_EVENT_SCI); + lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, lpc_event_mask | mask); +#endif + + zassert_false(host_is_event_set(EC_HOST_EVENT_PANIC)); + k_sys_fatal_error_handler(K_ERR_CPU_EXCEPTION, NULL); + /* Short sleep to allow hook task to run */ + k_msleep(1); + zassert_true(host_is_event_set(EC_HOST_EVENT_PANIC)); +} + ZTEST_SUITE(system_safe_mode, NULL, NULL, system_before, NULL, NULL); diff --git a/zephyr/test/tasks/CMakeLists.txt b/zephyr/test/tasks/CMakeLists.txt index b0b59e7c99..52e6723652 100644 --- a/zephyr/test/tasks/CMakeLists.txt +++ b/zephyr/test/tasks/CMakeLists.txt @@ -9,6 +9,9 @@ project(tasks) # Include the local test directory for shimmed_test_tasks.h zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") -target_sources(app PRIVATE +target_sources_ifdef(CONFIG_HAS_TEST_TASKS app PRIVATE main.c "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/tasks.c") + +target_sources_ifdef(CONFIG_SHIMMED_TASKS app PRIVATE + extra_tasks.c) diff --git a/zephyr/test/tasks/extra_tasks.c b/zephyr/test/tasks/extra_tasks.c new file mode 100644 index 0000000000..d9c75f4cfe --- /dev/null +++ b/zephyr/test/tasks/extra_tasks.c @@ -0,0 +1,149 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_tasks.h" +#include "host_command.h" +#include "task.h" + +#include <zephyr/kernel.h> +#include <zephyr/kernel/thread.h> +#include <zephyr/ztest.h> + +k_tid_t get_sysworkq_thread(void); +k_tid_t get_idle_thread(void); + +/* Utilities for finding a Zephyr thread by name */ +static k_tid_t found_thread; +static void find_thread_by_name_cb(const struct k_thread *thread, + void *user_data) +{ + const char *name = (const char *)user_data; + + if (strcmp(k_thread_name_get((k_tid_t)thread), name) == 0) { + found_thread = (k_tid_t)thread; + } +} + +static k_tid_t find_thread_by_name(const char *name) +{ + found_thread = NULL; + k_thread_foreach_unlocked(find_thread_by_name_cb, (void *)name); + return found_thread; +} + +/* Utilities for checking asserts */ +static bool expect_assert; +static int num_asserts; +void assert_post_action(const char *file, unsigned int line) +{ + num_asserts += 1; + if (!expect_assert) { + ztest_test_fail(); + } +} + +#define EXPECT_ASSERT(test) \ + do { \ + expect_assert = true; \ + num_asserts = 0; \ + (test); \ + expect_assert = false; \ + zassert_equal(num_asserts, 1); \ + } while (0) + +ZTEST_USER(extra_tasks, test_hostcmd_thread_mapping) +{ + k_tid_t hostcmd_thread; + k_tid_t main_thread; + +#if IS_ENABLED(HAS_TASK_HOSTCMD) +#ifdef CONFIG_TASK_HOSTCMD_THREAD_MAIN + k_thread_name_set(get_main_thread(), "HOSTCMD"); +#endif /* CONFIG_TASK_HOSTCMD_THREAD_MAIN */ + + hostcmd_thread = find_thread_by_name("HOSTCMD"); + zassert_not_null(hostcmd_thread); + zassert_equal(hostcmd_thread, get_hostcmd_thread()); + zassert_equal(TASK_ID_HOSTCMD, thread_id_to_task_id(hostcmd_thread)); + zassert_equal(task_id_to_thread_id(TASK_ID_HOSTCMD), hostcmd_thread); + +#ifdef CONFIG_TASK_HOSTCMD_THREAD_DEDICATED + main_thread = find_thread_by_name("main"); + zassert_not_null(main_thread); + zassert_equal(main_thread, get_main_thread()); + zassert_not_equal(main_thread, hostcmd_thread); + zassert_equal(TASK_ID_MAIN, thread_id_to_task_id(main_thread)); + zassert_equal(task_id_to_thread_id(TASK_ID_MAIN), main_thread); +#else + main_thread = get_main_thread(); + zassert_not_null(main_thread); + zassert_equal(main_thread, hostcmd_thread); +#endif /* CONFIG_TASK_HOSTCMD_THREAD_DEDICATED */ + +#else /* !HAS_TASK_HOSTCMD */ + hostcmd_thread = find_thread_by_name("HOSTCMD"); + zassert_is_null(hostcmd_thread); + EXPECT_ASSERT(hostcmd_thread = get_hostcmd_thread()); + zassert_is_null(hostcmd_thread); + + main_thread = find_thread_by_name("main"); + zassert_not_null(main_thread); + zassert_equal(main_thread, get_main_thread()); +#endif /* HAS_TASK_HOSTCMD */ +} + +ZTEST_USER(extra_tasks, test_sysworkq_thread_mapping) +{ + k_tid_t sysworkq_thread; + + sysworkq_thread = find_thread_by_name("sysworkq"); + zassert_not_null(sysworkq_thread); + zassert_equal(sysworkq_thread, get_sysworkq_thread()); + zassert_equal(TASK_ID_SYSWORKQ, thread_id_to_task_id(sysworkq_thread)); + zassert_equal(task_id_to_thread_id(TASK_ID_SYSWORKQ), sysworkq_thread); +} + +ZTEST_USER(extra_tasks, test_idle_thread_mapping) +{ + k_tid_t idle_thread; + + idle_thread = find_thread_by_name("idle"); + zassert_not_null(idle_thread); + zassert_equal(idle_thread, get_idle_thread()); + zassert_equal(TASK_ID_IDLE, thread_id_to_task_id(idle_thread)); + zassert_equal(task_id_to_thread_id(TASK_ID_IDLE), idle_thread); +} + +ZTEST_USER(extra_tasks, test_invalid_task_id) +{ + k_tid_t thread_id; + + EXPECT_ASSERT(thread_id = task_id_to_thread_id(TASK_ID_INVALID)); + zassert_is_null(thread_id); + + EXPECT_ASSERT(thread_id = task_id_to_thread_id(-1)); + zassert_is_null(thread_id); +} + +ZTEST_USER(extra_tasks, test_invalid_thread_id) +{ + task_id_t task_id; + + EXPECT_ASSERT(task_id = thread_id_to_task_id(NULL)); + zassert_equal(task_id, TASK_ID_INVALID); + + EXPECT_ASSERT(task_id = thread_id_to_task_id((k_tid_t)0x1234)); + zassert_equal(task_id, TASK_ID_INVALID); +} + +ZTEST_USER(extra_tasks, test_extra_task_enumeration) +{ + for (task_id_t task_id = 0; task_id < TASK_ID_COUNT + EXTRA_TASK_COUNT; + task_id++) { + zassert_not_null(task_id_to_thread_id(task_id)); + } +} + +ZTEST_SUITE(extra_tasks, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/tasks/main.c b/zephyr/test/tasks/main.c index bbf752c656..dc3df59ca7 100644 --- a/zephyr/test/tasks/main.c +++ b/zephyr/test/tasks/main.c @@ -10,6 +10,7 @@ #include <stdbool.h> #include <zephyr/kernel.h> +#include <zephyr/kernel/thread.h> #include <zephyr/ztest.h> /* Second for platform/ec task API (in microseconds). */ @@ -273,6 +274,23 @@ static void empty_set_mask2(void) zassert_within(end_ms - start_ms, 2000, 100, "Timeout for 2 seconds"); } +static void check_task_1_mapping(void) +{ + zassert_equal(TASK_ID_TASK_1, thread_id_to_task_id(k_current_get())); + zassert_equal(k_current_get(), task_id_to_thread_id(TASK_ID_TASK_1)); +} + +static void check_task_2_mapping(void) +{ + zassert_equal(TASK_ID_TASK_2, thread_id_to_task_id(k_current_get())); + zassert_equal(k_current_get(), task_id_to_thread_id(TASK_ID_TASK_2)); +} + +static void test_thread_to_task_mapping(void) +{ + run_test(&check_task_1_mapping, &check_task_2_mapping); +} + static void test_empty_set_mask(void) { run_test(&empty_set_mask1, &empty_set_mask2); @@ -289,6 +307,7 @@ void test_main(void) ztest_unit_test(test_event_delivered), ztest_unit_test(test_event_mask_not_delivered), ztest_unit_test(test_event_mask_extra), - ztest_unit_test(test_empty_set_mask)); + ztest_unit_test(test_empty_set_mask), + ztest_unit_test(test_thread_to_task_mapping)); ztest_run_test_suite(test_task_shim); } diff --git a/zephyr/test/tasks/prj.conf b/zephyr/test/tasks/prj.conf index 6c8e2fbc90..67deb38144 100644 --- a/zephyr/test/tasks/prj.conf +++ b/zephyr/test/tasks/prj.conf @@ -3,7 +3,9 @@ # found in the LICENSE file. CONFIG_ZTEST=y -CONFIG_HAS_TEST_TASKS=y CONFIG_PLATFORM_EC=y CONFIG_CROS_EC=y -CONFIG_PLATFORM_EC_HOOKS=n +CONFIG_TASKS_SET_TEST_RUNNER_TID_RULE=y +CONFIG_PLATFORM_EC_VBOOT_HASH=n +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +CONFIG_PLATFORM_EC_SWITCH=n diff --git a/zephyr/test/tasks/testcase.yaml b/zephyr/test/tasks/testcase.yaml index a72199a14a..c079930c6c 100644 --- a/zephyr/test/tasks/testcase.yaml +++ b/zephyr/test/tasks/testcase.yaml @@ -5,4 +5,26 @@ common: platform_allow: native_posix tests: - tasks.default: {} + tasks.default: + extra_configs: + - CONFIG_HAS_TEST_TASKS=y + tasks.extra_tasks: + extra_configs: + - CONFIG_ZTEST_NEW_API=y + - CONFIG_SHIMMED_TASKS=y + - CONFIG_ASSERT_TEST=y + - CONFIG_PLATFORM_EC_HOSTCMD=n + tasks.extra_tasks.hostcmd_main: + extra_configs: + - CONFIG_ZTEST_NEW_API=y + - CONFIG_SHIMMED_TASKS=y + - CONFIG_ASSERT_TEST=y + - CONFIG_PLATFORM_EC_HOSTCMD=y + - CONFIG_TASK_HOSTCMD_THREAD_MAIN=y + tasks.extra_tasks.hostcmd_dedicated: + extra_configs: + - CONFIG_ZTEST_NEW_API=y + - CONFIG_SHIMMED_TASKS=y + - CONFIG_ASSERT_TEST=y + - CONFIG_PLATFORM_EC_HOSTCMD=y + - CONFIG_TASK_HOSTCMD_THREAD_DEDICATED=y diff --git a/zephyr/test/vboot_efs2/boards/native_posix.overlay b/zephyr/test/vboot_efs2/boards/native_posix.overlay index 83b9e9b365..54bc09ace0 100644 --- a/zephyr/test/vboot_efs2/boards/native_posix.overlay +++ b/zephyr/test/vboot_efs2/boards/native_posix.overlay @@ -89,7 +89,7 @@ compatible = "cros,tcpci-generic-emul"; status = "okay"; reg = <0x82>; - alert_gpio = <&usb_c0_tcpc_int_odl>; + irq-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>; }; }; adc0: adc { diff --git a/zephyr/zmake/bazel_main.py b/zephyr/zmake/bazel_main.py new file mode 100644 index 0000000000..3df8636c1a --- /dev/null +++ b/zephyr/zmake/bazel_main.py @@ -0,0 +1,16 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +"""Entry point for Bazel execution. + +Bazel can't use zmake/__main__.py as it puts the main in PYTHONPATH. +""" + +import sys + +from zmake import __main__ + + +if __name__ == "__main__": + sys.exit(__main__.main()) diff --git a/zephyr/zmake/setup.py b/zephyr/zmake/setup.py index b7e58ef803..6e986ef8d0 100644 --- a/zephyr/zmake/setup.py +++ b/zephyr/zmake/setup.py @@ -5,6 +5,7 @@ """Configuration to allow pip install.""" import setuptools + setuptools.setup( name="zephyr-chrome-utils", version="0.1", diff --git a/zephyr/zmake/tests/conftest.py b/zephyr/zmake/tests/conftest.py index dfea10457c..af56f794cc 100644 --- a/zephyr/zmake/tests/conftest.py +++ b/zephyr/zmake/tests/conftest.py @@ -11,6 +11,7 @@ import hypothesis # pylint:disable=import-error import pytest # pylint:disable=import-error import zmake.zmake as zm + hypothesis.settings.register_profile( "cq", suppress_health_check=hypothesis.HealthCheck.all() ) diff --git a/zephyr/zmake/tests/test_build_config.py b/zephyr/zmake/tests/test_build_config.py index f0497fc4d5..6b4ab203b6 100644 --- a/zephyr/zmake/tests/test_build_config.py +++ b/zephyr/zmake/tests/test_build_config.py @@ -13,9 +13,10 @@ import tempfile import hypothesis # pylint:disable=import-error import hypothesis.strategies as st # pylint:disable=import-error import pytest # pylint:disable=import-error +from zmake.build_config import BuildConfig import zmake.jobserver import zmake.util as util -from zmake.build_config import BuildConfig + # pylint:disable=redefined-outer-name,unused-argument diff --git a/zephyr/zmake/tests/test_jobserver.py b/zephyr/zmake/tests/test_jobserver.py index a79e6dc280..d9f4f63163 100644 --- a/zephyr/zmake/tests/test_jobserver.py +++ b/zephyr/zmake/tests/test_jobserver.py @@ -4,10 +4,10 @@ """Test jobserver functionality.""" +from asyncio import subprocess import logging import os import threading -from asyncio import subprocess import pytest # pylint:disable=import-error import zmake.jobserver diff --git a/zephyr/zmake/tests/test_modules.py b/zephyr/zmake/tests/test_modules.py index dc4c170535..a42192d789 100644 --- a/zephyr/zmake/tests/test_modules.py +++ b/zephyr/zmake/tests/test_modules.py @@ -11,6 +11,7 @@ import hypothesis # pylint:disable=import-error import hypothesis.strategies as st # pylint:disable=import-error import zmake.modules + module_lists = st.lists( st.one_of(*map(st.just, zmake.modules.known_modules)), unique=True ) diff --git a/zephyr/zmake/tests/test_packers.py b/zephyr/zmake/tests/test_packers.py index 23bdb2bf6b..441e5db7e6 100644 --- a/zephyr/zmake/tests/test_packers.py +++ b/zephyr/zmake/tests/test_packers.py @@ -12,6 +12,7 @@ import hypothesis.strategies as st # pylint:disable=import-error import pytest # pylint:disable=import-error import zmake.output_packers as packers + # Strategies for use with hypothesis absolute_path = st.from_regex(regex=r"\A/[\w/]*\Z") diff --git a/zephyr/zmake/tests/test_project.py b/zephyr/zmake/tests/test_project.py index 3225de1d75..661072959d 100644 --- a/zephyr/zmake/tests/test_project.py +++ b/zephyr/zmake/tests/test_project.py @@ -15,6 +15,7 @@ import zmake.modules import zmake.output_packers import zmake.project + board_names = st.text(alphabet=set(string.ascii_lowercase) | {"_"}, min_size=1) sets_of_board_names = st.lists(st.lists(board_names, unique=True)) diff --git a/zephyr/zmake/tests/test_toolchains.py b/zephyr/zmake/tests/test_toolchains.py index 703149179c..2a71fd0d60 100644 --- a/zephyr/zmake/tests/test_toolchains.py +++ b/zephyr/zmake/tests/test_toolchains.py @@ -12,6 +12,7 @@ import zmake.output_packers import zmake.project as project import zmake.toolchains as toolchains + # pylint:disable=redefined-outer-name,unused-argument diff --git a/zephyr/zmake/tests/test_util.py b/zephyr/zmake/tests/test_util.py index c5efa2d18e..70378073d4 100644 --- a/zephyr/zmake/tests/test_util.py +++ b/zephyr/zmake/tests/test_util.py @@ -12,6 +12,7 @@ import hypothesis.strategies as st # pylint:disable=import-error import pytest # pylint:disable=import-error import zmake.util as util + # Strategies for use with hypothesis version_integers = st.integers(min_value=0) version_tuples = st.tuples(version_integers, version_integers, version_integers) diff --git a/zephyr/zmake/tests/test_version.py b/zephyr/zmake/tests/test_version.py index d6202c0d85..8881522e4b 100644 --- a/zephyr/zmake/tests/test_version.py +++ b/zephyr/zmake/tests/test_version.py @@ -13,6 +13,7 @@ import zmake.output_packers import zmake.project import zmake.version as version + # pylint:disable=redefined-outer-name,unused-argument diff --git a/zephyr/zmake/tests/test_zmake.py b/zephyr/zmake/tests/test_zmake.py index ff528edb8f..8fd39f1e9e 100644 --- a/zephyr/zmake/tests/test_zmake.py +++ b/zephyr/zmake/tests/test_zmake.py @@ -11,13 +11,14 @@ import re import unittest.mock import pytest # pylint:disable=import-error +from testfixtures import LogCapture # pylint:disable=import-error import zmake.build_config import zmake.jobserver import zmake.multiproc as multiproc import zmake.output_packers import zmake.project import zmake.toolchains -from testfixtures import LogCapture # pylint:disable=import-error + OUR_PATH = os.path.dirname(os.path.realpath(__file__)) diff --git a/zephyr/zmake/zmake/configlib.py b/zephyr/zmake/zmake/configlib.py index 139394745f..2affaf08f5 100644 --- a/zephyr/zmake/zmake/configlib.py +++ b/zephyr/zmake/zmake/configlib.py @@ -48,9 +48,11 @@ def register_binman_project(**kwargs): def register_npcx_project(**kwargs): """Register a project that uses NpcxPacker.""" kwargs.setdefault("output_packer", zmake.output_packers.NpcxPacker) + kwargs.setdefault("modules", ["ec", "cmsis"]) return register_binman_project(**kwargs) def register_mchp_project(**kwargs): kwargs.setdefault("output_packer", zmake.output_packers.MchpPacker) + kwargs.setdefault("modules", ["ec", "cmsis"]) return register_binman_project(**kwargs) diff --git a/zephyr/zmake/zmake/multiproc.py b/zephyr/zmake/zmake/multiproc.py index a668bcb961..61163b2df5 100644 --- a/zephyr/zmake/zmake/multiproc.py +++ b/zephyr/zmake/zmake/multiproc.py @@ -18,6 +18,7 @@ import select import threading from typing import Any, ClassVar, Dict, List + # Should we log job names or not LOG_JOB_NAMES = True diff --git a/zephyr/zmake/zmake/output_packers.py b/zephyr/zmake/zmake/output_packers.py index e0e342fd66..ce3099077c 100644 --- a/zephyr/zmake/zmake/output_packers.py +++ b/zephyr/zmake/zmake/output_packers.py @@ -3,9 +3,9 @@ # found in the LICENSE file. """Types which provide many builds and composite them into a single binary.""" import logging +from pathlib import Path import shutil import subprocess -from pathlib import Path from typing import Dict, Optional import zmake.build_config as build_config diff --git a/zephyr/zmake/zmake/project.py b/zephyr/zmake/zmake/project.py index a707da2462..15974af723 100644 --- a/zephyr/zmake/zmake/project.py +++ b/zephyr/zmake/zmake/project.py @@ -1,6 +1,7 @@ # Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. + """Module for project config wrapper object.""" import dataclasses @@ -43,8 +44,8 @@ class ProjectConfig: zephyr_board: str supported_toolchains: "list[str]" output_packer: type - modules: "dict[str, typing.Any]" = dataclasses.field( - default_factory=lambda: zmake.modules.known_modules, + modules: typing.Iterable[str] = dataclasses.field( + default_factory=lambda: ["ec"], ) is_test: bool = dataclasses.field(default=False) test_args: typing.List[str] = dataclasses.field(default_factory=list) diff --git a/zephyr/zmake/zmake/zmake.py b/zephyr/zmake/zmake/zmake.py index 30d56cc08f..731a409268 100644 --- a/zephyr/zmake/zmake/zmake.py +++ b/zephyr/zmake/zmake/zmake.py @@ -25,6 +25,7 @@ import zmake.project import zmake.util as util import zmake.version + ninja_warnings = re.compile(r"^(\S*: )?warning:.*") ninja_errors = re.compile(r"error:.*") |