diff options
Diffstat (limited to 'zephyr/program/intelrvp/adlrvp')
22 files changed, 0 insertions, 2502 deletions
diff --git a/zephyr/program/intelrvp/adlrvp/CMakeLists.txt b/zephyr/program/intelrvp/adlrvp/CMakeLists.txt deleted file mode 100644 index 71dee29552..0000000000 --- a/zephyr/program/intelrvp/adlrvp/CMakeLists.txt +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -cros_ec_library_include_directories("include") -zephyr_library_sources("src/adlrvp.c") diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/adlrvp_mchp.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/adlrvp_mchp.dts deleted file mode 100644 index 39fd720290..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/adlrvp_mchp.dts +++ /dev/null @@ -1,200 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - hibernate-wake-pins { - compatible = "cros-ec,hibernate-wake-pins"; - wakeup-irqs = < - &int_ac_present - &int_lid_open - &int_power_button - >; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - i2c_charger: charger { - i2c-port = <&i2c_smb_0>; - enum-names = "I2C_PORT_BATTERY", - "I2C_PORT_CHARGER", - "I2C_PORT_EEPROM", - "I2C_PORT_PORT80"; - }; - typec_0: typec-0 { - i2c-port = <&i2c_smb_1>; - enum-names = "I2C_PORT_TYPEC_0"; - }; - typec_1: typec-1 { - i2c-port = <&i2c_smb_2>; - enum-names = "I2C_PORT_TYPEC_1"; - }; - typec_2: typec-2 { - i2c-port = <&i2c_smb_3>; - enum-names = "I2C_PORT_TYPEC_2"; - }; - typec_3: typec-3 { - i2c-port = <&i2c_smb_4>; - enum-names = "I2C_PORT_TYPEC_3"; - }; - }; -}; - -/* charger */ -&i2c_smb_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; - port_sel = <0>; - pinctrl-0 = <&i2c00_scl_gpio004 &i2c00_sda_gpio003>; - pinctrl-names = "default"; - - pca95xx: pca95xx@22 { - compatible = "nxp,pca95xx"; - label = "PCA95XX"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - - rvp_board_id: rvp-board-id { - compatible = "intel,rvp-board-id"; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>; - - /* - * FAB ID [1:0] : IOEX[2:1] - */ - fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>, - <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>; - }; - - max695x@38 { - compatible = "maxim,max695x"; - reg = <0x38>; - }; - - charger: isl9241@9 { - compatible = "intersil,isl9241"; - status = "okay"; - reg = <0x9>; - }; - - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; - -/* typec_0 */ -&i2c_smb_1 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <6>; - pinctrl-0 = <&i2c06_scl_gpio140 &i2c06_sda_gpio132>; - pinctrl-names = "default"; - - tcpc_port0: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c0_soc_side_bb_retimer: jhl8040r-c0-soc-side@54 { - compatible = "intel,jhl8040r"; - reg = <0x54>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; - - usb_c0_bb_retimer: jhl8040r-c0@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; -}; - -/* typec_1 */ -&i2c_smb_2 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <3>; - pinctrl-0 = <&i2c03_scl_gpio010 &i2c03_sda_gpio007>; - pinctrl-names = "default"; - - tcpc_port1: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c1_soc_side_bb_retimer: jhl8040r-c1-soc-side@55 { - compatible = "intel,jhl8040r"; - reg = <0x55>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; - - usb_c1_bb_retimer: jhl8040r-c1@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; -}; - -/* typec_2 */ -&i2c_smb_3 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <7>; - pinctrl-0 = <&i2c07_scl_gpio013 &i2c07_sda_gpio012>; - pinctrl-names = "default"; - - tcpc_port2: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c2_bb_retimer: jhl8040r-c2@58 { - compatible = "intel,jhl8040r"; - reg = <0x58>; - reset-pin = <&usb_c2_bb_retimer_rst>; - ls-en-pin = <&usb_c2_bb_retimer_ls_en>; - }; -}; - -/* typec_3 */ -&i2c_smb_4 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - port_sel = <2>; - pinctrl-0 = <&i2c02_scl_gpio155 &i2c02_sda_gpio154>; - pinctrl-names = "default"; - - tcpc_port3: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c3_bb_retimer: jhl8040r-c3@59 { - compatible = "intel,jhl8040r"; - reg = <0x59>; - reset-pin = <&usb_c3_bb_retimer_rst>; - ls-en-pin = <&usb_c3_bb_retimer_ls_en>; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/bb_retimer.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/bb_retimer.dts deleted file mode 100644 index 1c760120f1..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/bb_retimer.dts +++ /dev/null @@ -1,28 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -&i2c_smb_1 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - - usb_c0_bb_retimer: jhl8040r@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - label = "USB_C0_BB_RETIMER"; - reset-pin = <&usb_c0_bb_retimer_rst>; - }; -}; - -&i2c_smb_2 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - - usb_c1_bb_retimer: jhl8040r@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - label = "USB_C1_BB_RETIMER"; - reset-pin = <&usb_c1_bb_retimer_rst>; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/gpio.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/gpio.dts deleted file mode 100644 index d526fdcb3b..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/gpio.dts +++ /dev/null @@ -1,299 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - gpio-wp = &gpio_wp; - gpio-kbd-kso2 = &gpio_ec_kso_02_inv; - }; - - named-gpios { - compatible = "named-gpios"; - - all_sys_pwrgd: all-sys-pwrgd { - gpios = <&gpio_040_076 15 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; - }; /* GPIO057 */ - rsmrst_pwrgd: rsmrst-pwrgd { - gpios = <&gpio_200_236 17 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_RSMRST_ODL"; - }; /* GPIO221 */ - pch_slp_s0_n: pch-slp-s0-n { - gpios = <&gpio_240_276 3 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S0_L"; - }; /* GPIO243 */ - vccpdsw_3p3: vccpdsw-3p3 { - gpios = <&gpio_200_236 1 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_DSW_PWROK"; - }; /* GPIO201 */ - pm_slp_sus_ec_n: pm-slp-sus-ec-n { - gpios = <&gpio_200_236 23 GPIO_INPUT>; - enum-name = "GPIO_SLP_SUS_L"; - }; /* GPIO227 */ - pm_slp_s3_n: pm-slp-s3-n { - gpios = <&gpio_140_176 17 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S3_L"; - }; /* GPIO161 */ - pm_slp_s4_n: pm-slp-s4-n { - gpios = <&gpio_140_176 18 GPIO_INPUT>; - }; /* GPIO162 */ - volume_up { - gpios = <&gpio_000_036 30 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_UP_L"; - }; /* GPIO036 */ - vol_dn_ec { - gpios = <&gpio_240_276 12 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; /* GPIO254 */ - smc_lid: smc-lid { - gpios = <&gpio_200_236 22 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_LID_OPEN"; - }; /* GPIO226 */ - mech_pwr_btn_odl: mech-pwr-btn-odl { - gpios = <&gpio_100_136 13 GPIO_INPUT>; - enum-name = "GPIO_POWER_BUTTON_L"; - }; /* GPIO115 */ - std_adp_prsnt: std-adp-prsnt { - gpios = <&gpio_040_076 3 GPIO_INPUT>; - enum-name= "GPIO_DC_JACK_PRESENT"; - }; /* GPIO043 */ - bc_acok: bc-acok { - gpios = <&gpio_140_176 14 GPIO_INPUT>; - enum-name = "GPIO_AC_PRESENT"; - }; /* GPIO156 */ - usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - gpios = <&gpio_140_176 3 GPIO_INPUT>; - }; /* GPIO143 */ - usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - gpios = <&gpio_240_276 1 GPIO_INPUT>; - }; /* GPIO241 */ - usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { - gpios = <&gpio_100_136 24 GPIO_INPUT>; - }; /* GPIO130 */ - usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { - gpios = <&gpio_240_276 2 GPIO_INPUT>; - }; /* GPIO242 */ - usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - gpios = <&gpio_240_276 0 GPIO_INPUT>; - }; /* GPIO240 */ - usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - gpios = <&gpio_100_136 1 GPIO_INPUT>; - }; /* GPIO101 */ - usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { - gpios = <&gpio_140_176 4 GPIO_INPUT>; - }; /* GPIO144 */ - usbc_tcpc_ppc_alrt_p3: usbc-tcpc-ppc-alrt-p3 { - gpios = <&gpio_140_176 2 GPIO_INPUT>; - }; /* GPIO142 */ - gpio_ec_pch_wake_odl: smc-wake-sci-n-mecc { - gpios = <&gpio_040_076 9 GPIO_ODR_HIGH>; - }; /* GPIO051 */ - ec_pch_mkbp_int_odl { - gpios = <&gpio_100_136 23 GPIO_ODR_HIGH>; - }; /* GPIO127 */ - lpc_espi_rst_n { - gpios = <&gpio_040_076 17 GPIO_INPUT>; - }; /* GPIO061 NANA */ - plt_rst_l { - gpios = <&gpio_040_076 10 GPIO_INPUT>; - }; /* GPIO052 NANA */ - slate_mode_indication { - gpios = <&gpio_200_236 18 GPIO_INPUT>; - }; /* GPIO222 */ - prochot_ec_n { - gpios = <&gpio_000_036 2 GPIO_INPUT>; - enum-name = "GPIO_CPU_PROCHOT"; - }; /* GPIO002 ???? */ - sys_rst_odl { - gpios = <&gpio_040_076 16 GPIO_ODR_HIGH>; - enum-name = "GPIO_SYS_RESET_L"; - }; /* GPIO060 */ - pm_rsmrst_n { - gpios = <&gpio_040_076 12 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_RSMRST_L"; - }; /* GPIO054 */ - pm_pwrbtn_n { - gpios = <&gpio_000_036 14 GPIO_ODR_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; /* GPIO016 */ - ec_spi_oe_mecc: ec-spi-oe-mecc { - gpios = <&gpio_040_076 2 GPIO_OUTPUT_LOW>; - }; /* GPIO042 */ - ec_ds3 { - gpios = <&gpio_000_036 21 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP3300_A"; - }; /* GPIO025 */ - pch_pwrok_ec { - gpios = <&gpio_100_136 6 GPIO_INPUT>; - enum-name = "GPIO_PCH_PWROK"; - }; /* GPIO106 */ - sys_pwrok { - gpios = <&gpio_200_236 2 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; /* GPIO202 */ - ec_dsw_pwrok { - gpios = <&gpio_000_036 28 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_DSW_PWROK"; - }; /* GPIO034 */ - gpio_wp: ec-flash-wp-odl { - gpios = <&gpio_000_036 12 GPIO_INPUT>; - }; /* GPIO014 */ - ec_h1_packet_mode { - gpios = <&gpio_000_036 29 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PACKET_MODE_EN"; - }; /* GPIO035 */ - ec_entering_rw { - gpios = <&gpio_100_136 2 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - }; /* GPIO102 */ - ccd_mode_odl: ccd-mode-odl { - gpios = <&gpio_140_176 29 GPIO_INPUT>; - enum-name = "GPIO_CCD_MODE_ODL"; - }; /* GPIO175 */ - bat_det { - gpios = <&gpio_200_236 6 GPIO_INPUT>; - enum-name = "GPIO_BATT_PRES_ODL"; - }; /* GPIO206 */ - edp_bklt_en_mecc { - gpios = <&gpio_000_036 18 GPIO_OUTPUT_HIGH>; - }; /* GPIO022 */ - led_1_l { - gpios = <&gpio_140_176 15 GPIO_OUTPUT_HIGH>; - }; /* GPIO157 */ - led_2_l { - gpios = <&gpio_140_176 11 GPIO_OUTPUT_HIGH>; - }; /* GPIO153 */ - therm_sen_mecc { - gpios = <&gpio_140_176 1 GPIO_OUTPUT_LOW>; - }; /* GPIO141 */ - smb_bs_clk { - gpios = <&gpio_000_036 4 GPIO_INPUT>; - }; /* GPIO004 */ - smb_bs_data { - gpios = <&gpio_000_036 3 GPIO_INPUT>; - }; /* GPIO003 */ - usbc_tcpc_i2c_clk_p0 { - gpios = <&gpio_140_176 0 GPIO_INPUT>; - }; /* GPIO140 */ - usbc_tcpc_i2c_data_p0 { - gpios = <&gpio_100_136 26 GPIO_INPUT>; - }; /* GPIO132 */ - usbc_tcpc_i2c_clk_p2 { - gpios = <&gpio_000_036 8 GPIO_INPUT>; - }; /* GPIO010 */ - usbc_tcpc_i2c_data_p2 { - gpios = <&gpio_000_036 7 GPIO_INPUT>; - }; /* GPIO007 */ - usbc_tcpc_i2c_clk_p1 { - gpios = <&gpio_000_036 11 GPIO_INPUT>; - }; /* GPIO013 */ - usbc_tcpc_i2c_data_p1 { - gpios = <&gpio_000_036 10 GPIO_INPUT>; - }; /* GPIO012 */ - usbc_tcpc_i2c_clk_p3 { - gpios = <&gpio_140_176 13 GPIO_INPUT>; - }; /* GPIO155 */ - usbc_tcpc_i2c_data_p3 { - gpios = <&gpio_140_176 12 GPIO_INPUT>; - }; /* GPIO154 */ - sml1_clk_mecc { - gpios = <&gpio_100_136 25 GPIO_INPUT>; - }; /* GPIO131 */ - cpu_cat_err_mecc { - gpios = <&gpio_000_036 0 GPIO_INPUT>; - }; /* GPIO000 */ - espi_alert0_n { - gpios = <&gpio_040_076 19 GPIO_INPUT>; - }; /* GPIO063 NANA */ - batt_disable_ec { - gpios = <&gpio_040_076 23 GPIO_INPUT>; - }; /* GPIO067 */ - cpu_c10_gate_mecc { - gpios = <&gpio_000_036 19 GPIO_INPUT>; - }; /* GPIO023 */ - smc_sdown_mecc { - gpios = <&gpio_240_276 13 GPIO_INPUT>; - }; /* GPIO255 */ - std_adpt_cntrl_gpio { - gpios = <&gpio_240_276 4 GPIO_INPUT>; - }; /* GPIO244 */ - smc_onoff_n { - gpios = <&gpio_100_136 12 GPIO_INPUT>; - }; /* GPIO114 */ - suswarn { - gpios = <&gpio_000_036 20 GPIO_INPUT>; - }; /* GPIO024 */ - me_g3_to_m3_ec { - gpios = <&gpio_000_036 27 GPIO_INPUT>; - }; /* GPIO033 */ - gpio_ec_kso_02_inv: ec-kso-02-inv { - gpios = <&gpio_040_076 6 (GPIO_OUTPUT_LOW - | GPIO_ACTIVE_LOW)>; - }; /* GPIO046 */ - - usb_c0_bb_retimer_rst: usb-c0-bb-retimer-rst { - gpios = <&ioex_c0_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_RST"; - }; - usb_c0_bb_retimer_ls_en: usb-c0-bb-retimer-ls-en { - gpios = <&ioex_c0_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_LS_EN"; - }; - usb-c0-usb-mux-cntrl-1 { - gpios = <&ioex_c0_port 4 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_1"; - }; - usb-c0-usb-mux-cntrl-0 { - gpios = <&ioex_c0_port 5 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_0"; - }; - usb_c1_bb_retimer_rst: usb-c1-bb-retimer-rst { - gpios = <&ioex_c1_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_RST"; - }; - usb_c1_bb_retimer_ls_en: usb-c1-bb-retimer-ls-en { - gpios = <&ioex_c1_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_LS_EN"; - }; - usb-c1-hpd { - gpios = <&ioex_c1_port 2 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_HPD"; - }; - usb-c0-c1-oc { - gpios = <&ioex_c1_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C0_C1_OC"; - }; - usb_c2_bb_retimer_rst: usb-c2-bb-retimer-rst { - gpios = <&ioex_c2_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_RST"; - }; - usb_c2_bb_retimer_ls_en: usb-c2-bb-retimer-ls-en { - gpios = <&ioex_c2_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_LS_EN"; - }; - usb-c2-usb-mux-cntrl-1 { - gpios = <&ioex_c2_port 4 GPIO_OUTPUT_LOW>; - }; - usb-c2-usb-mux-cntrl-0 { - gpios = <&ioex_c2_port 5 GPIO_OUTPUT_LOW>; - }; - usb_c3_bb_retimer_rst: usb-c3-bb-retimer-rst { - gpios = <&ioex_c3_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_RST"; - }; - usb_c3_bb_retimer_ls_en: usb-c3-bb-retimer-ls-en { - gpios = <&ioex_c3_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_LS_EN"; - }; - usb-c2-c3-oc { - gpios = <&ioex_c3_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C2_C3_OC"; - }; - /* unimplemented GPIOs */ - en-pp5000 { - enum-name = "GPIO_EN_PP5000"; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/interrupts.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/interrupts.dts deleted file mode 100644 index 17986fe2c7..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/interrupts.dts +++ /dev/null @@ -1,80 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/ { - gpio-interrupts { - compatible = "cros-ec,gpio-interrupts"; - - int_lid_open: lid-open { - irq-pin = <&smc_lid>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "lid_interrupt"; - }; - int_power_button: power-button { - irq-pin = <&mech_pwr_btn_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_button_interrupt"; - }; - int_ac_present: ac-present { - irq-pin = <&bc_acok>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "extpower_interrupt"; - }; - int_slp_s0: slp-s0 { - irq-pin = <&pch_slp_s0_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_slp_sus: slp-sus { - irq-pin = <&pm_slp_sus_ec_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_pg_dsw_pwrok: pg-dsw-pwrok { - irq-pin = <&vccpdsw_3p3>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_rsmrst_pwrgd: rsmrst-pwrgd { - irq-pin = <&rsmrst_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_all_sys_pwrgd: all-sys-pwrgd { - irq-pin = <&all_sys_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - irq-pin = <&usbc_tcpc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - irq-pin = <&usbc_tcpc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - irq-pin = <&usbc_tcpc_ppc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - irq-pin = <&usbc_tcpc_ppc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_std_adp_prsnt: std-adp-prsnt { - irq-pin = <&std_adp_prsnt>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_dc_jack_interrupt"; - }; - int_ccd_mode_odl: ccd-mode-odl { - irq-pin = <&ccd_mode_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_connect_c0_sbu"; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/keyboard.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/keyboard.dts deleted file mode 100644 index 2601da793d..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/keyboard.dts +++ /dev/null @@ -1,31 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - cros-keyscan { - compatible = "cros-ec,keyscan"; - - output-settle = <80>; - debounce-down = <9000>; - debounce-up = <30000>; - poll-timeout = <100000>; - - actual-key-mask = < - 0x14 /* C0 */ - 0xff /* C1 */ - 0xff /* C2 */ - 0xff /* C3 */ - 0xff /* C4 */ - 0xf5 /* C5 */ - 0xff /* C6 */ - 0xa4 /* C7 */ - 0xff /* C8 */ - 0xfe /* C9 */ - 0x55 /* C10 */ - 0xfa /* C11 */ - 0xca /* C12 */ - >; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/prj.conf b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/prj.conf deleted file mode 100644 index d7220368a2..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/prj.conf +++ /dev/null @@ -1,75 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -CONFIG_BOARD_ADLRVP_MCHP=y -CONFIG_CROS_SYSTEM_XEC=y - -# For MCHP ESPI Drivers -CONFIG_ESPI_PERIPHERAL_EC_HOST_CMD=y -CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION=y -CONFIG_ESPI_PERIPHERAL_CUSTOM_OPCODE=y -CONFIG_ESPI_PERIPHERAL_XEC_EMI0=y -CONFIG_ESPI_PERIPHERAL_ACPI_EC_IBF_EVT_DATA=y -CONFIG_ESPI_PERIPHERAL_KBC_OBE_CBK=y -CONFIG_ESPI_PERIPHERAL_KBC_IBF_EVT_DATA=y - -# Invoke SoC Python script to create zephyr.mchp.bin which -# is zephyr.bin processed for Boot-ROM loading. -CONFIG_MCHP_MEC_UNSIGNED_HEADER=y -CONFIG_MCHP_MEC_HEADER_FLASH_SIZE_256K=y - -# Support Zephyr SPI NOR driver to work with MCHP SPI driver -CONFIG_SPI_NOR=y -CONFIG_SPI_XEC_QMSPI_FULL_DUPLEX=y - -# Sensors - MCHP TACH driver under sensor -CONFIG_SENSOR=n -CONFIG_SENSOR_SHELL=n - -# Debug option -# Enable flash console commands -CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y - - -## TODO - support following features next -# Fan -CONFIG_PLATFORM_EC_FAN=n - -# RTC -CONFIG_PLATFORM_EC_RTC=n - -# PWM -CONFIG_PWM=n - -## INTEL RVP -# Host command -CONFIG_PLATFORM_EC_HOSTCMD_AP_RESET=n - -# Power Sequencing -CONFIG_PLATFORM_EC_THROTTLE_AP=n - -## ADL RVP -# CBI -CONFIG_EEPROM=n - -# LED -CONFIG_PLATFORM_EC_LED_COMMON=n -CONFIG_PLATFORM_EC_LED_PWM=n -CONFIG_PLATFORM_EC_LED_PWM_TASK_DISABLED=n - -# Temperature sensors -CONFIG_PLATFORM_EC_TEMP_SENSOR=n -CONFIG_PLATFORM_EC_THERMISTOR=n -CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=n - -# Charger -CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y - -# H1 issues second reset -CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=n - -# Debug options -# Enable flash console commands -CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y -CONFIG_WDT_DISABLE_AT_BOOT=y diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/usbc.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/usbc.dts deleted file mode 100644 index 471a1f52e9..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_mchp/usbc.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - usbc { - #address-cells = <1>; - #size-cells = <0>; - usbc_port0: port0@0 { - compatible = "named-usbc-port"; - reg = <0>; - tcpc = <&tcpc_port0>; - chg = <&charger>; - usb_mux_chain_0: usb-mux-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c0_bb_retimer - &virtual_mux_c0>; - }; - usb_mux_alt_chain_0: usb-mux-alt-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c0_bb_retimer - &usb_c0_soc_side_bb_retimer - &virtual_mux_c0>; - }; - }; - port0-muxes { - virtual_mux_c0: virtual-mux-c0 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - usbc_port1: port1@1 { - compatible = "named-usbc-port"; - reg = <1>; - tcpc = <&tcpc_port1>; - usb_mux_chain_1: usb-mux-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c1_bb_retimer - &virtual_mux_c1>; - }; - usb_mux_alt_chain_1: usb-mux-alt-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c1_bb_retimer - &usb_c1_soc_side_bb_retimer - &virtual_mux_c1>; - }; - }; - port1-muxes { - virtual_mux_c1: virtual-mux-c1 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port2@2 { - compatible = "named-usbc-port"; - reg = <2>; - tcpc = <&tcpc_port2>; - usb_mux_chain_2: usb-mux-chain-2 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c2_bb_retimer - &virtual_mux_c2>; - }; - }; - port2-muxes { - virtual_mux_c2: virtual-mux-c2 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port3@3 { - compatible = "named-usbc-port"; - reg = <3>; - tcpc = <&tcpc_port3>; - usb_mux_chain_3: usb-mux-chain-3 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c3_bb_retimer - &virtual_mux_c3>; - }; - }; - port3-muxes { - virtual_mux_c3: virtual-mux-c3 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts deleted file mode 100644 index b8fbd6656d..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts +++ /dev/null @@ -1,257 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - chosen { - cros,rtc = &mtc; - }; - - hibernate-wake-pins { - compatible = "cros-ec,hibernate-wake-pins"; - wakeup-irqs = < - &int_ac_present - &int_lid_open - &int_power_button - >; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - i2c_charger: charger { - i2c-port = <&i2c7_0>; - enum-names = "I2C_PORT_BATTERY", - "I2C_PORT_CHARGER", - "I2C_PORT_EEPROM", - "I2C_PORT_PORT80"; - }; - typec_0: typec-0 { - i2c-port = <&i2c0_0>; - enum-names = "I2C_PORT_TYPEC_0"; - }; - typec_1: typec-1 { - i2c-port = <&i2c2_0>; - enum-names = "I2C_PORT_TYPEC_1"; - }; - typec_2: typec-2 { - i2c-port = <&i2c1_0>; - enum-names = "I2C_PORT_TYPEC_2"; - }; - typec_3: typec-3 { - i2c-port = <&i2c3_0>; - enum-names = "I2C_PORT_TYPEC_3"; - }; - }; - - named-adc-channels { - compatible = "named-adc-channels"; - - adc_ambient: ambient { - enum-name = "ADC_TEMP_SENSOR_1"; - io-channels = <&adc0 3>; - }; - adc_ddr: ddr { - enum-name = "ADC_TEMP_SENSOR_2"; - io-channels = <&adc0 4>; - }; - adc_skin: skin { - enum-name = "ADC_TEMP_SENSOR_3"; - io-channels = <&adc0 2>; - }; - adc_vr: vr { - enum-name = "ADC_TEMP_SENSOR_4"; - io-channels = <&adc0 1>; - }; - }; - -}; - -/* host interface */ -&espi0 { - status = "okay"; - pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; - pinctrl-names = "default"; -}; - -/* charger */ -&i2c7_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; - pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; - pinctrl-names = "default"; - - pca95xx: pca95xx@22 { - compatible = "nxp,pca95xx"; - label = "PCA95XX"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - - rvp_board_id: rvp-board-id { - compatible = "intel,rvp-board-id"; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>; - - /* - * FAB ID [1:0] : IOEX[2:1] - */ - fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>, - <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>; - }; - - max695x@38 { - compatible = "maxim,max695x"; - reg = <0x38>; - }; - - charger: isl9241@9 { - compatible = "intersil,isl9241"; - status = "okay"; - reg = <0x9>; - }; - - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; - -&i2c_ctrl7 { - status = "okay"; -}; - -/* typec_0 */ -&i2c0_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; - pinctrl-names = "default"; - - tcpc_port0: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c0_soc_side_bb_retimer: jhl8040r-c0-soc-side@54 { - compatible = "intel,jhl8040r"; - reg = <0x54>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; - - usb_c0_bb_retimer: jhl8040r-c0@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl0 { - status = "okay"; -}; - -/* typec_1 */ -&i2c2_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; - pinctrl-names = "default"; - - tcpc_port1: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c1_soc_side_bb_retimer: jhl8040r-c1-soc-side@55 { - compatible = "intel,jhl8040r"; - reg = <0x55>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; - - usb_c1_bb_retimer: jhl8040r-c1@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl2 { - status = "okay"; -}; - -/* typec_2 */ -&i2c1_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; - pinctrl-names = "default"; - - tcpc_port2: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c2_bb_retimer: jhl8040r-c2@58 { - compatible = "intel,jhl8040r"; - reg = <0x58>; - reset-pin = <&usb_c2_bb_retimer_rst>; - ls-en-pin = <&usb_c2_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl1 { - status = "okay"; -}; - -/* typec_3 */ -&i2c3_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; - pinctrl-names = "default"; - - tcpc_port3: fusb302@22 { - compatible = "fairchild,fusb302"; - reg = <0x22>; - }; - - usb_c3_bb_retimer: jhl8040r-c3@59 { - compatible = "intel,jhl8040r"; - reg = <0x59>; - reset-pin = <&usb_c3_bb_retimer_rst>; - ls-en-pin = <&usb_c3_bb_retimer_ls_en>; - }; -}; - -&i2c_ctrl3 { - status = "okay"; -}; - -&adc0 { - status = "okay"; - pinctrl-0 = <&adc0_chan1_gp44 - &adc0_chan2_gp43 - &adc0_chan3_gp42 - &adc0_chan4_gp41>; - pinctrl-names = "default"; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/fan.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/fan.dts deleted file mode 100644 index 8babe53903..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/fan.dts +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - fans { - compatible = "cros-ec,fans"; - - fan_0 { - pwms = <&pwm3 0 PWM_KHZ(30) PWM_POLARITY_NORMAL>; - rpm_min = <3000>; - rpm_start = <3000>; - rpm_max = <10000>; - tach = <&tach2>; - pgood_gpio = <&all_sys_pwrgd>; - enable_gpio = <&gpio_fan_control>; - }; - }; -}; - -/* Tachemeter for fan speed measurement */ -&tach2 { - status = "okay"; - pinctrl-0 = <&ta2_2_in_gpa6>; - pinctrl-names = "default"; - port = <NPCX_TACH_PORT_A>; /* port-A is selected */ - sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */ - pulses-per-round = <2>; /* number of pulses per round of encoder */ -}; - -&pwm3 { - status = "okay"; - pinctrl-0 = <&pwm3_gp80>; - pinctrl-names = "default"; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/gpio.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/gpio.dts deleted file mode 100644 index 1d38fc877c..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/gpio.dts +++ /dev/null @@ -1,344 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - gpio-wp = &gpio_wp; - gpio-kbd-kso2 = &gpio_ec_kso_02_inv; - }; - - named-gpios { - compatible = "named-gpios"; - - all_sys_pwrgd: all-sys-pwrgd { - gpios = <&gpio7 0 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; - }; - rsmrst_pwrgd: rsmrst-pwrgd { - gpios = <&gpio3 7 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_RSMRST_ODL"; - }; - pch_slp_s0_n: pch-slp-s0-n { - gpios = <&gpioa 1 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S0_L"; - }; - vccpdsw_3p3: vccpdsw-3p3 { - gpios = <&gpio4 5 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_DSW_PWROK"; - }; - pm_slp_sus_ec_n: pm-slp-sus-ec-n { - gpios = <&gpio8 6 GPIO_INPUT>; - enum-name = "GPIO_SLP_SUS_L"; - }; - pm-slp-s3-n { - gpios = <&gpiob 0 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S3_L"; - }; - pm-slp-s4-n { - gpios = <&gpioa 5 GPIO_INPUT>; - }; - volume-up { - gpios = <&gpio6 1 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_UP_L"; - }; - vol-dn-ec { - gpios = <&gpio0 3 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; - smc_lid: smc-lid { - gpios = <&gpio0 1 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_LID_OPEN"; - }; - mech_pwr_btn_odl: mech-pwr-btn-odl { - gpios = <&gpio0 0 GPIO_INPUT>; - enum-name = "GPIO_POWER_BUTTON_L"; - }; - std_adp_prsnt: std-adp-prsnt { - gpios = <&gpio0 2 GPIO_INPUT>; - enum-name= "GPIO_DC_JACK_PRESENT"; - }; - bc_acok: bc-acok { - gpios = <&gpioc 6 GPIO_INPUT>; - enum-name = "GPIO_AC_PRESENT"; - }; - usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - gpios = <&gpio4 0 GPIO_INPUT>; - }; - usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - gpios = <&gpio6 2 GPIO_INPUT>; - }; - usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { - gpios = <&gpio6 3 GPIO_INPUT>; - }; - usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { - gpios = <&gpio6 7 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - gpios = <&gpiof 0 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - gpios = <&gpiof 1 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { - gpios = <&gpiof 2 GPIO_INPUT>; - }; - usbc_tcpc_ppc_alrt_p3: usbc-tcpc-ppc-alrt-p3 { - gpios = <&gpiof 3 GPIO_INPUT>; - }; - gpio_ec_pch_wake_odl: smc-wake-sci-n-mecc { - gpios = <&gpioa 4 GPIO_ODR_HIGH>; - }; - ec-pch-mkbp-int-odl { - gpios = <&gpiof 5 GPIO_ODR_HIGH>; - }; - lpc-espi-rst-n { - gpios = <&gpio5 4 GPIO_INPUT>; - }; - plt-rst-l { - gpios = <&gpioa 2 GPIO_INPUT>; - }; - slate-mode-indication { - gpios = <&gpioe 5 GPIO_INPUT>; - }; - prochot-ec-n { - gpios = <&gpioa 7 GPIO_INPUT>; - enum-name = "GPIO_CPU_PROCHOT"; - }; - sys-rst-odl { - gpios = <&gpioc 5 GPIO_ODR_HIGH>; - enum-name = "GPIO_SYS_RESET_L"; - }; - pm-rsmrst-n { - gpios = <&gpiod 3 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_RSMRST_L"; - }; - pm-pwrbtn-n { - gpios = <&gpio9 7 GPIO_ODR_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; - ec_spi_oe_mecc: ec-spi-oe-mecc { - gpios = <&gpio6 0 GPIO_OUTPUT_LOW>; - }; - ec-ds3 { - gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP3300_A"; - alias = "GPIO_TEMP_SENSOR_POWER"; - }; - pch-pwrok-ec { - gpios = <&gpioa 0 GPIO_INPUT>; - enum-name = "GPIO_PCH_PWROK"; - }; - sys-pwrok { - gpios = <&gpio9 3 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; - ec-dsw-pwrok { - gpios = <&gpio9 5 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_DSW_PWROK"; - }; - gpio_wp: ec-flash-wp-odl { - gpios = <&gpio9 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; - }; - ec-h1-packet-mode { - gpios = <&gpioe 2 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PACKET_MODE_EN"; - }; - ec-entering-rw { - gpios = <&gpiod 4 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - }; - ccd_mode_odl: ccd-mode-odl { - gpios = <&gpiof 4 GPIO_INPUT>; - enum-name = "GPIO_CCD_MODE_ODL"; - }; - bat-det { - gpios = <&gpio7 6 GPIO_INPUT>; - enum-name = "GPIO_BATT_PRES_ODL"; - }; - edp-bklt-en-mecc { - gpios = <&gpioe 1 GPIO_OUTPUT_HIGH>; - }; - led_red_l: led-1-l { - gpios = <&gpiob 6 GPIO_OUTPUT_HIGH>; - }; - led_white_l: led-2-l { - gpios = <&gpiob 7 GPIO_OUTPUT_HIGH>; - }; - gpio_fan_control: therm-sen-mecc { - gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; - }; - smb-bs-clk { - gpios = <&gpiob 3 GPIO_INPUT>; - }; - smb-bs-data { - gpios = <&gpiob 2 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p0 { - gpios = <&gpiob 5 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p0 { - gpios = <&gpiob 4 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p2 { - gpios = <&gpio9 2 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p2 { - gpios = <&gpio9 1 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p1 { - gpios = <&gpio9 0 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p1 { - gpios = <&gpio8 7 GPIO_INPUT>; - }; - usbc-tcpc-i2c-clk-p3 { - gpios = <&gpiod 1 GPIO_INPUT>; - }; - usbc-tcpc-i2c-data-p3 { - gpios = <&gpiod 0 GPIO_INPUT>; - }; - sml1-clk-mecc { - gpios = <&gpio3 3 GPIO_INPUT>; - }; - sml1-data-mecc { - gpios = <&gpio3 6 GPIO_INPUT>; - }; - smb-pch-clk { - gpios = <&gpioc 2 GPIO_INPUT>; - }; - smb-pch-data { - gpios = <&gpioc 1 GPIO_INPUT>; - }; - i3c-0-scl { - gpios = <&gpioe 4 GPIO_INPUT>; - }; - i3c-0-sda { - gpios = <&gpioe 3 GPIO_INPUT>; - }; - cpu-cat-err-mecc { - gpios = <&gpio3 4 GPIO_INPUT>; - }; - tp29 { - gpios = <&gpio5 0 GPIO_INPUT>; - }; - tp28 { - gpios = <&gpio5 6 GPIO_INPUT>; - }; - espi-alert0-n { - gpios = <&gpio5 7 GPIO_INPUT>; - }; - batt-disable-ec { - gpios = <&gpio6 6 GPIO_INPUT>; - }; - tp33 { - gpios = <&gpio7 2 GPIO_INPUT>; - }; - tp26 { - gpios = <&gpio7 3 GPIO_INPUT>; - }; - slp-s0-cs-n { - gpios = <&gpio7 4 GPIO_INPUT>; - }; - ec-peci { - gpios = <&gpio8 1 GPIO_INPUT>; - }; - cpu-c10-gate-mecc { - gpios = <&gpio9 6 GPIO_INPUT>; - }; - smb-pch-alrt { - gpios = <&gpioa 3 GPIO_INPUT>; - }; - smc-sdown-mecc { - gpios = <&gpiob 1 GPIO_INPUT>; - }; - std-adpt-cntrl-gpio { - gpios = <&gpioc 3 GPIO_INPUT>; - }; - sml1-alert { - gpios = <&gpioc 7 GPIO_INPUT>; - }; - smc-onoff-n { - gpios = <&gpiod 2 GPIO_INPUT>; - }; - suswarn { - gpios = <&gpiod 5 GPIO_INPUT>; - }; - tp-gpiod6-ec { - gpios = <&gpiod 6 GPIO_INPUT>; - }; - tp-gpiod7-ec { - gpios = <&gpiod 7 GPIO_INPUT>; - }; - me-g3-to-m3-ec { - gpios = <&gpioe 0 GPIO_INPUT>; - }; - gpio_ec_kso_02_inv: ec-kso-02-inv { - gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; - }; - - usb_c0_bb_retimer_rst: usb-c0-bb-retimer-rst { - gpios = <&ioex_c0_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_RST"; - }; - usb_c0_bb_retimer_ls_en: usb-c0-bb-retimer-ls-en { - gpios = <&ioex_c0_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_BB_RETIMER_LS_EN"; - }; - usb-c0-usb-mux-cntrl-1 { - gpios = <&ioex_c0_port 4 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_1"; - }; - usb-c0-usb-mux-cntrl-0 { - gpios = <&ioex_c0_port 5 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_USB_MUX_CNTRL_0"; - }; - usb_c1_bb_retimer_rst: usb-c1-bb-retimer-rst { - gpios = <&ioex_c1_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_RST"; - }; - usb_c1_bb_retimer_ls_en: usb-c1-bb-retimer-ls-en { - gpios = <&ioex_c1_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_BB_RETIMER_LS_EN"; - }; - usb-c1-hpd { - gpios = <&ioex_c1_port 2 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_HPD"; - }; - usb-c0-c1-oc { - gpios = <&ioex_c1_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C0_C1_OC"; - }; - usb_c2_bb_retimer_rst: usb-c2-bb-retimer-rst { - gpios = <&ioex_c2_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_RST"; - }; - usb_c2_bb_retimer_ls_en: usb-c2-bb-retimer-ls-en { - gpios = <&ioex_c2_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_BB_RETIMER_LS_EN"; - }; - usb-c2-usb-mux-cntrl-1 { - gpios = <&ioex_c2_port 4 GPIO_OUTPUT_LOW>; - }; - usb-c2-usb-mux-cntrl-0 { - gpios = <&ioex_c2_port 5 GPIO_OUTPUT_LOW>; - }; - usb_c3_bb_retimer_rst: usb-c3-bb-retimer-rst { - gpios = <&ioex_c3_port 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_RST"; - }; - usb_c3_bb_retimer_ls_en: usb-c3-bb-retimer-ls-en { - gpios = <&ioex_c3_port 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C3_BB_RETIMER_LS_EN"; - }; - usb-c2-c3-oc { - gpios = <&ioex_c3_port 8 GPIO_OUTPUT_HIGH>; - enum-name = "IOEX_USB_C2_C3_OC"; - }; - /* unimplemented GPIOs */ - en-pp5000 { - enum-name = "GPIO_EN_PP5000"; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts deleted file mode 100644 index d7bb40fad2..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts +++ /dev/null @@ -1,100 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/ { - gpio-interrupts { - compatible = "cros-ec,gpio-interrupts"; - - int_lid_open: lid-open { - irq-pin = <&smc_lid>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "lid_interrupt"; - }; - int_power_button: power-button { - irq-pin = <&mech_pwr_btn_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_button_interrupt"; - }; - int_ac_present: ac-present { - irq-pin = <&bc_acok>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "extpower_interrupt"; - }; - int_slp_s0: slp-s0 { - irq-pin = <&pch_slp_s0_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_slp_sus: slp-sus { - irq-pin = <&pm_slp_sus_ec_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_pg_dsw_pwrok: pg-dsw-pwrok { - irq-pin = <&vccpdsw_3p3>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_rsmrst_pwrgd: rsmrst-pwrgd { - irq-pin = <&rsmrst_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_all_sys_pwrgd: all-sys-pwrgd { - irq-pin = <&all_sys_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - irq-pin = <&usbc_tcpc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p1: usbc-tcpc-alrt-p1 { - irq-pin = <&usbc_tcpc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { - irq-pin = <&usbc_tcpc_alrt_p2>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { - irq-pin = <&usbc_tcpc_alrt_p3>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "tcpc_alert_event"; - }; - int_usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { - irq-pin = <&usbc_tcpc_ppc_alrt_p0>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { - irq-pin = <&usbc_tcpc_ppc_alrt_p1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { - irq-pin = <&usbc_tcpc_ppc_alrt_p2>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_usbc_tcpc_ppc_alrt_p3: usbc-tcpc-ppc-alrt-p3 { - irq-pin = <&usbc_tcpc_ppc_alrt_p3>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "ppc_interrupt"; - }; - int_std_adp_prsnt: std-adp-prsnt { - irq-pin = <&std_adp_prsnt>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_dc_jack_interrupt"; - }; - int_ccd_mode_odl: ccd-mode-odl { - irq-pin = <&ccd_mode_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "board_connect_c0_sbu"; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts deleted file mode 100644 index be0a570e95..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts +++ /dev/null @@ -1,59 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - cros-keyscan { - compatible = "cros-ec,keyscan"; - - output-settle = <35>; - debounce-down = <5000>; - debounce-up = <40000>; - poll-timeout = <100000>; - - actual-key-mask = < - 0x14 /* C0 */ - 0xff /* C1 */ - 0xff /* C2 */ - 0xff /* C3 */ - 0xff /* C4 */ - 0xf5 /* C5 */ - 0xff /* C6 */ - 0xa4 /* C7 */ - 0xff /* C8 */ - 0xfe /* C9 */ - 0x55 /* C10 */ - 0xfa /* C11 */ - 0xca /* C12 */ - >; - }; -}; - -&cros_kb_raw { - status = "okay"; - /* No KSO2 (it's inverted and implemented by GPIO) */ - pinctrl-0 = < - &ksi0_gp31 - &ksi1_gp30 - &ksi2_gp27 - &ksi3_gp26 - &ksi4_gp25 - &ksi5_gp24 - &ksi6_gp23 - &ksi7_gp22 - &kso00_gp21 - &kso01_gp20 - &kso03_gp16 - &kso04_gp15 - &kso05_gp14 - &kso06_gp13 - &kso07_gp12 - &kso08_gp11 - &kso09_gp10 - &kso10_gp07 - &kso11_gp06 - &kso12_gp05 - >; - pinctrl-names = "default"; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/prj.conf b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/prj.conf deleted file mode 100644 index d04abada31..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/prj.conf +++ /dev/null @@ -1,13 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -CONFIG_BOARD_ADLRVP_NPCX=y -CONFIG_CROS_SYSTEM_NPCX=y -CONFIG_SYSCON=y - -# Charger -CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y - -# RTC -CONFIG_PLATFORM_EC_RTC=y diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts deleted file mode 100644 index eb1576dbff..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - pwmleds { - compatible = "pwm-leds"; - pwm_led0: pwm_led_0 { - pwms = <&pwm4 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>; - }; - pwm_led1: pwm_led_1 { - pwms = <&pwm5 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>; - }; - }; - - cros-pwmleds { - compatible = "cros-ec,pwm-leds"; - - leds = <&pwm_led0 &pwm_led1>; - - color-map-green = <100>; - - /* brightness-range = <red green blue yellow white amber> */ - brightness-range = <0 100 0 0 0 0>; - - - #address-cells = <1>; - #size-cells = <0>; - - pwm_led_0@0 { - reg = <0>; - ec-led-name = "EC_LED_ID_BATTERY_LED"; - }; - - pwm_led_1@1 { - reg = <1>; - ec-led-name = "EC_LED_ID_POWER_LED"; - }; - }; -}; - -/* LED1 */ -&pwm4 { - status = "okay"; - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; - pinctrl-0 = <&pwm4_gpb6>; - pinctrl-names = "default"; -}; - -/* LED2 */ -&pwm5 { - status = "okay"; - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; - pinctrl-0 = <&pwm5_gpb7>; - pinctrl-names = "default"; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts deleted file mode 100644 index 93ecaa02f6..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <cros/thermistor/thermistor.dtsi> - -/ { - temp_ambient: ambient { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_ambient>; - }; - temp_ddr: ddr { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_ddr>; - }; - temp_skin: skin { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_skin>; - }; - temp_vr: vr { - compatible = "cros-ec,temp-sensor-thermistor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - adc = <&adc_vr>; - }; - - named-temp-sensors { - compatible = "cros-ec,temp-sensors"; - ambient { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_ambient>; - }; - - /* - * TDB: battery temp read api is not using thermistor and - * zephyr shim layer doesn't support to configure custom read - * function. - * - * battery { - * compatible = "cros-ec,temp-sensor-thermistor", - * "cros-ec,temp-sensor"; - * thermistor = < >; - * enum-name = ""; - * temp_fan_off = <15>; - * temp_fan_max = <50>; - * temp_host_high = <75>; - * temp_host_halt = <80>; - * temp_host_release_high = <65>; - * adc = <&adc_battery>; - * }; - */ - - ddr { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_ddr>; - }; - skin { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_skin>; - }; - vr { - temp_fan_off = <15>; - temp_fan_max = <50>; - temp_host_high = <75>; - temp_host_halt = <80>; - temp_host_release_high = <65>; - sensor = <&temp_vr>; - }; - }; -}; - -&thermistor_3V0_22K6_47K_4050B { - status = "okay"; -}; diff --git a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/usbc.dts b/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/usbc.dts deleted file mode 100644 index 471a1f52e9..0000000000 --- a/zephyr/program/intelrvp/adlrvp/adlrvp_npcx/usbc.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - usbc { - #address-cells = <1>; - #size-cells = <0>; - usbc_port0: port0@0 { - compatible = "named-usbc-port"; - reg = <0>; - tcpc = <&tcpc_port0>; - chg = <&charger>; - usb_mux_chain_0: usb-mux-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c0_bb_retimer - &virtual_mux_c0>; - }; - usb_mux_alt_chain_0: usb-mux-alt-chain-0 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c0_bb_retimer - &usb_c0_soc_side_bb_retimer - &virtual_mux_c0>; - }; - }; - port0-muxes { - virtual_mux_c0: virtual-mux-c0 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - usbc_port1: port1@1 { - compatible = "named-usbc-port"; - reg = <1>; - tcpc = <&tcpc_port1>; - usb_mux_chain_1: usb-mux-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c1_bb_retimer - &virtual_mux_c1>; - }; - usb_mux_alt_chain_1: usb-mux-alt-chain-1 { - compatible = "cros-ec,usb-mux-chain"; - alternative-chain; - usb-muxes = <&usb_c1_bb_retimer - &usb_c1_soc_side_bb_retimer - &virtual_mux_c1>; - }; - }; - port1-muxes { - virtual_mux_c1: virtual-mux-c1 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port2@2 { - compatible = "named-usbc-port"; - reg = <2>; - tcpc = <&tcpc_port2>; - usb_mux_chain_2: usb-mux-chain-2 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c2_bb_retimer - &virtual_mux_c2>; - }; - }; - port2-muxes { - virtual_mux_c2: virtual-mux-c2 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - - port3@3 { - compatible = "named-usbc-port"; - reg = <3>; - tcpc = <&tcpc_port3>; - usb_mux_chain_3: usb-mux-chain-3 { - compatible = "cros-ec,usb-mux-chain"; - usb-muxes = <&usb_c3_bb_retimer - &virtual_mux_c3>; - }; - }; - port3-muxes { - virtual_mux_c3: virtual-mux-c3 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/battery.dts b/zephyr/program/intelrvp/adlrvp/battery.dts deleted file mode 100644 index 1de4111791..0000000000 --- a/zephyr/program/intelrvp/adlrvp/battery.dts +++ /dev/null @@ -1,20 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - getac-3s = &default_battery; - getac-2s = &getac_smp_hhp_408_2s; - }; - - batteries { - default_battery: getac-smp-hhp-408-3s { - compatible = "getac,bq40z50-R3-S3", "battery-smart"; - }; - getac_smp_hhp_408_2s: getac-smp-hhp-408-2s { - compatible = "getac,bq40z50-R3-S2", "battery-smart"; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/include/adlrvp_zephyr.h b/zephyr/program/intelrvp/adlrvp/include/adlrvp_zephyr.h deleted file mode 100644 index 135fd4ef4f..0000000000 --- a/zephyr/program/intelrvp/adlrvp/include/adlrvp_zephyr.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel ADL-RVP specific configuration */ - -#ifndef __ADLRVP_BOARD_H -#define __ADLRVP_BOARD_H - -#include "config.h" - -#define I2C_ADDR_FUSB302_TCPC_AIC 0x22 -#define I2C_ADDR_SN5S330_TCPC_AIC_PPC 0x40 - -#define I2C_ADDR_PCA9675_TCPC_AIC_IOEX 0x21 - -/* SOC side BB retimers (dual retimer config) */ -#define I2C_PORT0_BB_RETIMER_SOC_ADDR 0x54 -#if defined(HAS_TASK_PD_C1) -#define I2C_PORT1_BB_RETIMER_SOC_ADDR 0x55 -#endif - -#define ADLM_LP4_RVP1_SKU_BOARD_ID 0x01 -#define ADLM_LP5_RVP2_SKU_BOARD_ID 0x02 -#define ADLM_LP5_RVP3_SKU_BOARD_ID 0x03 -#define ADLN_LP5_ERB_SKU_BOARD_ID 0x06 -#define ADLN_LP5_RVP_SKU_BOARD_ID 0x07 -#define ADLP_DDR5_RVP_SKU_BOARD_ID 0x12 -#define ADLP_LP5_T4_RVP_SKU_BOARD_ID 0x13 -#define ADL_RVP_BOARD_ID(id) ((id)&0x3F) - -#define CONFIG_BATTERY_TYPE_NO_AUTO_DETECT - -enum adlrvp_charge_ports { - TYPE_C_PORT_0, -#if defined(HAS_TASK_PD_C1) - TYPE_C_PORT_1, -#endif -#if defined(HAS_TASK_PD_C2) - TYPE_C_PORT_2, -#endif -#if defined(HAS_TASK_PD_C3) - TYPE_C_PORT_3, -#endif -}; - -enum ioex_port { - IOEX_C0_PCA9675, - IOEX_C1_PCA9675, -#if defined(HAS_TASK_PD_C2) - IOEX_C2_PCA9675, - IOEX_C3_PCA9675, -#endif - IOEX_PORT_COUNT -}; - -#endif /* __ADLRVP_BOARD_H */ diff --git a/zephyr/program/intelrvp/adlrvp/ioex.dts b/zephyr/program/intelrvp/adlrvp/ioex.dts deleted file mode 100644 index 3e2227dacb..0000000000 --- a/zephyr/program/intelrvp/adlrvp/ioex.dts +++ /dev/null @@ -1,78 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - /* IOEX_C0_PCA9675 */ - ioex-c0 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_0>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c0_port: ioex-c0-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; - - /* IOEX_C1_PCA9675 */ - ioex-c1 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_1>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c1_port: ioex-c1-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; - - /* IOEX_C2_PCA9675 */ - ioex-c2 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_2>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c2_port: ioex-c2-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; - - /* IOEX_C3_PCA9675 */ - ioex-c3 { - compatible = "cros,ioex-chip"; - i2c-port = <&typec_3>; - i2c-addr = <0x21>; - drv = "pca9675_ioexpander_drv"; - flags = <0x00>; - #address-cells = <1>; - #size-cells = <0>; - ioex_c3_port: ioex-c3-port@0 { - compatible = "cros,ioex-port"; - reg = <0>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <16>; - }; - }; -}; diff --git a/zephyr/program/intelrvp/adlrvp/prj.conf b/zephyr/program/intelrvp/adlrvp/prj.conf deleted file mode 100644 index df0811ecdd..0000000000 --- a/zephyr/program/intelrvp/adlrvp/prj.conf +++ /dev/null @@ -1,64 +0,0 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Power Sequencing -CONFIG_AP_X86_INTEL_TGL=y -CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE=n -CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n -CONFIG_PLATFORM_EC_POWERSEQ_ICELAKE=y - -# Battery -CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y -CONFIG_PLATFORM_EC_BATTERY_V2=y - -# BC1.2 -CONFIG_PLATFORM_EC_USB_CHARGER=n - -# CBI -CONFIG_EEPROM=y - -# Charger -CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=5 -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 -CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=n -CONFIG_PLATFORM_EC_CHARGER_BQ25720=y -CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_CUSTOM=y -CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV=70 -CONFIG_PLATFORM_EC_CHARGER_ISL9241=y -CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG=y - -# LED -CONFIG_PLATFORM_EC_LED_COMMON=y -CONFIG_PLATFORM_EC_LED_PWM_TASK_DISABLED=y - -# Temperature sensors -CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y - -# USB-C and PD -CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y -CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=n -CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n -CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG=n -CONFIG_PLATFORM_EC_USB_MUX_TUSB1044=y -CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y -CONFIG_PLATFORM_EC_USB_PD_REV30=y -CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=y -CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=y -CONFIG_PLATFORM_EC_USB_PD_USB4=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_FUSB302=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y -CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y -CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB=y - -# IOEX -CONFIG_PLATFORM_EC_IOEX_PCA9675=y - -# eSPI -CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US=150 diff --git a/zephyr/program/intelrvp/adlrvp/src/adlrvp.c b/zephyr/program/intelrvp/adlrvp/src/adlrvp.c deleted file mode 100644 index d7d192b1af..0000000000 --- a/zephyr/program/intelrvp/adlrvp/src/adlrvp.c +++ /dev/null @@ -1,430 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* TODO: b/218904113: Convert to using Zephyr GPIOs */ -#include "adlrvp_zephyr.h" -#include "battery.h" -#include "battery_fuel_gauge.h" -#include "bq25710.h" -#include "charger.h" -#include "common.h" -#include "console.h" -#include "driver/retimer/bb_retimer_public.h" -#include "extpower.h" -#include "gpio_signal.h" -#include "hooks.h" -#include "intel_rvp_board_id.h" -#include "intelrvp.h" -#include "ioexpander.h" -#include "isl9241.h" -#include "power/icelake.h" -#include "sn5s330.h" -#include "system.h" -#include "task.h" -#include "tusb1064.h" -#include "usb_mux.h" -#include "usbc/usb_muxes.h" -#include "usbc_ppc.h" -#include "util.h" - -#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ##args) -#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ##args) - -/* TCPC AIC GPIO Configuration */ -const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[] = { - [TYPE_C_PORT_0] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p0)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#if defined(HAS_TASK_PD_C1) - [TYPE_C_PORT_1] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p1)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p1)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#endif -#if defined(HAS_TASK_PD_C2) - [TYPE_C_PORT_2] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p2)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p2)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#endif -#if defined(HAS_TASK_PD_C3) - [TYPE_C_PORT_3] = { - .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p3)), - .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p3)), - .ppc_intr_handler = sn5s330_interrupt, - }, -#endif -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_aic_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* USB-C PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [TYPE_C_PORT_0] = { - .i2c_port = I2C_PORT_TYPEC_0, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv, - }, -#if defined(HAS_TASK_PD_C1) - [TYPE_C_PORT_1] = { - .i2c_port = I2C_PORT_TYPEC_1, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv - }, -#endif -#if defined(HAS_TASK_PD_C2) - [TYPE_C_PORT_2] = { - .i2c_port = I2C_PORT_TYPEC_2, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv, - }, -#endif -#if defined(HAS_TASK_PD_C3) - [TYPE_C_PORT_3] = { - .i2c_port = I2C_PORT_TYPEC_3, - .i2c_addr_flags = I2C_ADDR_SN5S330_TCPC_AIC_PPC, - .drv = &sn5s330_drv, - }, -#endif -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == CONFIG_USB_PD_PORT_MAX_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* Cache BB retimer power state */ -static bool cache_bb_enable[CONFIG_USB_PD_PORT_MAX_COUNT]; - -void board_overcurrent_event(int port, int is_overcurrented) -{ - /* Port 0 & 1 and 2 & 3 share same line for over current indication */ -#if defined(HAS_TASK_PD_C2) - enum ioex_signal oc_signal = port < TYPE_C_PORT_2 ? IOEX_USB_C0_C1_OC : - IOEX_USB_C2_C3_OC; -#else - enum ioex_signal oc_signal = IOEX_USB_C0_C1_OC; -#endif - - /* Overcurrent indication is active low signal */ - ioex_set_level(oc_signal, is_overcurrented ? 0 : 1); -} - -__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) -{ - /* - * ADL-P-DDR5 RVP SKU has cascaded retimer topology. - * Ports with cascaded retimers share common load switch and reset pin - * hence no need to set the power state again if the 1st retimer's power - * status has already changed. - */ - if (cache_bb_enable[me->usb_port] == enable) - return EC_SUCCESS; - - cache_bb_enable[me->usb_port] = enable; - - /* Handle retimer's power domain.*/ - if (enable) { - ioex_set_level(bb_controls[me->usb_port].usb_ls_en_gpio, 1); - - /* - * minimum time from VCC to RESET_N de-assertion is 100us - * For boards that don't provide a load switch control, the - * retimer_init() function ensures power is up before calling - * this function. - */ - msleep(1); - ioex_set_level(bb_controls[me->usb_port].retimer_rst_gpio, 1); - - /* - * Allow 1ms time for the retimer to power up lc_domain - * which powers I2C controller within retimer - */ - msleep(1); - - } else { - ioex_set_level(bb_controls[me->usb_port].retimer_rst_gpio, 0); - msleep(1); - ioex_set_level(bb_controls[me->usb_port].usb_ls_en_gpio, 0); - } - return EC_SUCCESS; -} - -static void board_connect_c0_sbu_deferred(void) -{ - int ccd_intr_level = gpio_get_level(GPIO_CCD_MODE_ODL); - - if (ccd_intr_level) { - /* Default set the SBU lines to AUX mode on TCPC-AIC */ - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_1, 0); - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_0, 0); - } else { - /* Set the SBU lines to CCD mode on TCPC-AIC */ - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_1, 1); - ioex_set_level(IOEX_USB_C0_USB_MUX_CNTRL_0, 0); - } -} -DECLARE_DEFERRED(board_connect_c0_sbu_deferred); - -void board_connect_c0_sbu(enum gpio_signal s) -{ - hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0); -} - -static void enable_h1_irq(void) -{ - gpio_enable_interrupt(GPIO_CCD_MODE_ODL); -} -DECLARE_HOOK(HOOK_INIT, enable_h1_irq, HOOK_PRIO_LAST); - -void set_charger_system_voltage(void) -{ - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* - * As per b:196184163 configure the PPVAR_SYS depend - * on AC or AC+battery - */ - if (extpower_is_present() && battery_is_present()) { - bq25710_set_min_system_voltage( - CHARGER_SOLO, battery_get_info()->voltage_min); - } else { - bq25710_set_min_system_voltage( - CHARGER_SOLO, battery_get_info()->voltage_max); - } - break; - - /* Add additional board SKUs */ - default: - break; - } -} -DECLARE_HOOK(HOOK_AC_CHANGE, set_charger_system_voltage, HOOK_PRIO_DEFAULT); - -static void configure_charger(void) -{ - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* charger chip BQ25720 support */ - chg_chips[0].i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS; - chg_chips[0].drv = &bq25710_drv; - set_charger_system_voltage(); - break; - - /* Add additional board SKUs */ - default: - break; - } -} - -static void configure_retimer_usbmux(void) -{ - struct usb_mux *mux; - - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* enable TUSB1044RNQR redriver on Port0 */ - mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_0), 0); - mux->i2c_addr_flags = TUSB1064_I2C_ADDR14_FLAGS; - mux->driver = &tusb1064_usb_mux_driver; - mux->hpd_update = tusb1044_hpd_update; - -#if defined(HAS_TASK_PD_C1) - mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_1), 0); - mux->driver = NULL; - mux->hpd_update = NULL; -#endif - break; - - case ADLP_LP5_T4_RVP_SKU_BOARD_ID: - /* No retimer on Port-2 */ -#if defined(HAS_TASK_PD_C2) - mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_2), 0); - mux->driver = NULL; -#endif - break; - - case ADLP_DDR5_RVP_SKU_BOARD_ID: - /* - * ADL-P-DDR5 RVP has dual BB-retimers for port0 & port1. - * Change the default usb mux config on runtime to support - * dual retimer topology. - */ - USB_MUX_ENABLE_ALTERNATIVE(usb_mux_alt_chain_0); -#if defined(HAS_TASK_PD_C1) - USB_MUX_ENABLE_ALTERNATIVE(usb_mux_alt_chain_1); -#endif - break; - - /* Add additional board SKUs */ - - default: - break; - } -} - -static void configure_battery_type(void) -{ - int bat_cell_type; - - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLM_LP4_RVP1_SKU_BOARD_ID: - case ADLM_LP5_RVP2_SKU_BOARD_ID: - case ADLM_LP5_RVP3_SKU_BOARD_ID: - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* configure Battery to 2S based */ - bat_cell_type = BATTERY_TYPE(DT_ALIAS(getac_2s)); - break; - default: - /* configure Battery to 3S based */ - bat_cell_type = BATTERY_TYPE(DT_ALIAS(getac_3s)); - break; - } - - /* Set the fixed battery type */ - battery_set_fixed_battery_type(bat_cell_type); -} -/******************************************************************************/ -/* PWROK signal configuration */ -/* - * On ADLRVP, SYS_PWROK_EC is an output controlled by EC and uses ALL_SYS_PWRGD - * as input. - */ -const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = { - { - .gpio = GPIO_PCH_SYS_PWROK, - .delay_ms = 3, - }, -}; -const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list); - -const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = { - { - .gpio = GPIO_PCH_SYS_PWROK, - }, -}; -const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_deassert_list); - -/* - * Returns board information (board id[7:0] and Fab id[15:8]) on success - * -1 on error. - */ -__override int board_get_version(void) -{ - /* Cache the board ID */ - static int adlrvp_board_id; - - int i; - int rv = EC_ERROR_UNKNOWN; - - int fab_id, board_id, bom_id; - - /* Board ID is already read */ - if (adlrvp_board_id) - return adlrvp_board_id; - - /* - * IOExpander that has Board ID information is on DSW-VAL rail on - * ADL RVP. On cold boot cycles, DSW-VAL rail is taking time to settle. - * This loop retries to ensure rail is settled and read is successful - */ - for (i = 0; i < RVP_VERSION_READ_RETRY_CNT; i++) { - rv = gpio_pin_get_dt(&bom_id_config[0]); - - if (rv >= 0) - break; - - k_msleep(1); - } - - /* retrun -1 if failed to read board id */ - if (rv < 0) - return -1; - - /* - * BOM ID [2] : IOEX[0] - * BOM ID [1:0] : IOEX[15:14] - */ - bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2; - bom_id |= gpio_pin_get_dt(&bom_id_config[1]) << 1; - bom_id |= gpio_pin_get_dt(&bom_id_config[2]); - - /* - * FAB ID [1:0] : IOEX[2:1] + 1 - */ - fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1; - fab_id |= gpio_pin_get_dt(&fab_id_config[1]); - fab_id += 1; - - /* - * BOARD ID[5:0] : IOEX[13:8] - */ - board_id = gpio_pin_get_dt(&board_id_config[0]) << 5; - board_id |= gpio_pin_get_dt(&board_id_config[1]) << 4; - board_id |= gpio_pin_get_dt(&board_id_config[2]) << 3; - board_id |= gpio_pin_get_dt(&board_id_config[3]) << 2; - board_id |= gpio_pin_get_dt(&board_id_config[4]) << 1; - board_id |= gpio_pin_get_dt(&board_id_config[5]); - - CPRINTF("BID:0x%x, FID:0x%x, BOM:0x%x", board_id, fab_id, bom_id); - - adlrvp_board_id = board_id | (fab_id << 8); - return adlrvp_board_id; -} - -__override bool board_is_tbt_usb4_port(int port) -{ - bool tbt_usb4 = true; - - switch (ADL_RVP_BOARD_ID(board_get_version())) { - case ADLN_LP5_ERB_SKU_BOARD_ID: - case ADLN_LP5_RVP_SKU_BOARD_ID: - /* No retimer on both ports */ - tbt_usb4 = false; - break; - - case ADLP_LP5_T4_RVP_SKU_BOARD_ID: - /* No retimer on Port-2 hence no platform level AUX & LSx mux */ -#if defined(HAS_TASK_PD_C2) - if (port == TYPE_C_PORT_2) - tbt_usb4 = false; -#endif - break; - - /* Add additional board SKUs */ - default: - break; - } - - return tbt_usb4; -} - -static int board_pre_task_peripheral_init(const struct device *unused) -{ - ARG_UNUSED(unused); - - /* Initialized IOEX-0 to access IOEX-GPIOs needed pre-task */ - ioex_init(IOEX_C0_PCA9675); - - /* Make sure SBU are routed to CCD or AUX based on CCD status at init */ - board_connect_c0_sbu_deferred(); - - /* Configure battery type */ - configure_battery_type(); - - /* Reconfigure board specific charger drivers */ - configure_charger(); - - /* Configure board specific retimer & mux */ - configure_retimer_usbmux(); - - return 0; -} -SYS_INIT(board_pre_task_peripheral_init, APPLICATION, - CONFIG_APPLICATION_INIT_PRIORITY); |