diff options
Diffstat (limited to 'chip')
150 files changed, 854 insertions, 578 deletions
diff --git a/chip/host/flash.c b/chip/host/flash.c index 03a5fc777b..209489162c 100644 --- a/chip/host/flash.c +++ b/chip/host/flash.c @@ -5,6 +5,8 @@ /* Flash module for emulator */ +#include <stdio.h> + #include "builtin/assert.h" #include "common.h" #include "config_chip.h" @@ -12,8 +14,6 @@ #include "persistence.h" #include "util.h" -#include <stdio.h> - /* This needs to be aligned to the erase bank size for NVCTR. */ __aligned(CONFIG_FLASH_ERASE_SIZE) char __host_flash[CONFIG_FLASH_SIZE_BYTES]; uint8_t __host_flash_protect[PHYSICAL_BANKS]; diff --git a/chip/host/gpio.c b/chip/host/gpio.c index d80d93dcf7..b74bec52a1 100644 --- a/chip/host/gpio.c +++ b/chip/host/gpio.c @@ -5,6 +5,8 @@ /* GPIO module for emulator */ +#include "console.h" + #include "common.h" #include "console.h" #include "gpio.h" diff --git a/chip/host/persistence.c b/chip/host/persistence.c index 369f58034b..4d8ef09df1 100644 --- a/chip/host/persistence.c +++ b/chip/host/persistence.c @@ -18,14 +18,13 @@ * this homegrown implementation of something similar-yet-different. */ -#include "builtin/assert.h" -#include "util.h" - +#include <linux/limits.h> +#include <unistd.h> #include <stdio.h> #include <string.h> -#include <linux/limits.h> -#include <unistd.h> +#include "builtin/assert.h" +#include "util.h" /* The longest path in a chroot seems to be about 280 characters (as of * April 2021) so define a cut-off instead of just hoping for the best: diff --git a/chip/host/reboot.c b/chip/host/reboot.c index 59e15ee81d..24d90d943d 100644 --- a/chip/host/reboot.c +++ b/chip/host/reboot.c @@ -5,15 +5,14 @@ /* Emulator self-reboot procedure */ +#include <string.h> +#include <unistd.h> + #include "console.h" #include "host_test.h" #include "reboot.h" #include "test_util.h" -#include <string.h> - -#include <unistd.h> - #ifdef TEST_FUZZ /* reboot breaks fuzzing, let's just not do it. */ void emulator_reboot(void) diff --git a/chip/host/spi_controller.c b/chip/host/spi_controller.c index ae6e2c9346..a1df53d935 100644 --- a/chip/host/spi_controller.c +++ b/chip/host/spi_controller.c @@ -5,11 +5,12 @@ * Mock SPI Controller driver for unit test. */ +#include <stdint.h> + #include "common.h" #include "gpio.h" -#include "spi.h" -#include <stdint.h> +#include "spi.h" test_mockable int spi_enable(const struct spi_device_t *spi_device, int enable) { diff --git a/chip/host/trng.c b/chip/host/trng.c index d0def66277..ef3df1ad5f 100644 --- a/chip/host/trng.c +++ b/chip/host/trng.c @@ -14,11 +14,11 @@ #error "This fake trng driver must not be used in non-test builds." #endif -#include "common.h" - #include <stdint.h> #include <stdlib.h> /* Only valid for host */ +#include "common.h" + static unsigned int seed; test_mockable void trng_init(void) diff --git a/chip/host/uart.c b/chip/host/uart.c index 71e8345196..9e70a6005c 100644 --- a/chip/host/uart.c +++ b/chip/host/uart.c @@ -5,6 +5,12 @@ /* UART driver for emulator */ +#include <pthread.h> +#include <signal.h> +#include <stdio.h> +#include <termio.h> +#include <unistd.h> + #include "builtin/assert.h" #include "common.h" #include "queue.h" @@ -13,13 +19,6 @@ #include "uart.h" #include "util.h" -#include <signal.h> -#include <stdio.h> - -#include <pthread.h> -#include <termio.h> -#include <unistd.h> - static int stopped = 1; static int init_done; diff --git a/chip/ish/aontaskfw/ish_aontask.c b/chip/ish/aontaskfw/ish_aontask.c index 6f2d9c9f2d..d167f3f5df 100644 --- a/chip/ish/aontaskfw/ish_aontask.c +++ b/chip/ish/aontaskfw/ish_aontask.c @@ -45,8 +45,8 @@ #include "common.h" #include "ia_structs.h" -#include "ish_aon_defs.h" #include "ish_aon_share.h" +#include "ish_aon_defs.h" #include "ish_dma.h" #include "power_mgt.h" @@ -91,56 +91,6 @@ static void handle_reset(enum ish_pm_state pm_state); -#if defined(CHIP_VARIANT_ISH5P4) -static void sb_upstream_write_raw_base(uint32_t addr, uint32_t attr, - uint32_t data, uint32_t sairs, - uint8_t addr48, uint16_t addr_hi) -{ - uint32_t eflags; - uint32_t addr_hi_32; - - addr_hi_32 = addr_hi | (1 << 31); - - eflags = interrupt_lock(); - - PMU_VNN_REQ = (1 << VNN_ID_SIDEBAND); - while (!(PMU_VNN_REQ_ACK & PMU_VNN_REQ_ACK_STATUS)) - continue; - - if (dma_poll(SBEP_REG_UP_MSG_STATUS_ADDR, 0, UP_STATUS_BUSY_MASK) == - DMA_RC_OK) { - SBEP_REG_UP_MSG_REQ_ADDR_LOW = addr; - - if (addr48) { - SBEP_REG_UP_MSG_REQ_ADDR_HIGH = addr_hi_32; - } else { - SBEP_REG_UP_MSG_REQ_ADDR_HIGH = 0; - } - - SBEP_REG_UP_MSG_REQ_ATTR = attr; - SBEP_REG_UP_MSG_REQ_DATA = data; - SBEP_REG_UP_MSG_REQ_EH = sairs; - SBEP_REG_UP_MSG_COMMAND = SBEP_CMD_WRITE; - - dma_poll(SBEP_REG_UP_MSG_STATUS_ADDR, 0, UP_STATUS_BUSY_MASK); - dma_poll(SBEP_REG_UP_MSG_STATUS_ADDR, UP_STATUS_MSG_SENT_MASK, - UP_STATUS_MSG_SENT_MASK); - SBEP_REG_UP_MSG_STATUS = UP_STATUS_MSG_SENT_CLR; - } - - PMU_VNN_REQ = (1 << VNN_ID_SIDEBAND); - interrupt_unlock(eflags); -} - -static void sb_upstream_write_raw(uint32_t addr, uint32_t attr, uint32_t data, - uint32_t sairs) -{ - addr = addr & 0x0000FFFF; - - sb_upstream_write_raw_base(addr, attr, data, sairs, 0, 0); -} -#endif - /* ISR for PMU wakeup interrupt */ static void pmu_wakeup_isr(void) { @@ -720,13 +670,6 @@ static void handle_d0i3(void) aon_share.pg_exit = 0; } -#if defined(CHIP_VARIANT_ISH5P4) - /* Set PMC LTR to 2ms before DMA copy */ - if (IS_ENABLED(CONFIG_ISH_NEW_PM)) - sb_upstream_write_raw(0, LTR_CMD_ATTR, LTR_CMD_DATA_2MS, - SBEP_PMC_SAIRS_VAL); -#endif - /* store main FW 's context to IMR DDR from main SRAM */ ret = store_main_fw(); @@ -737,13 +680,6 @@ static void handle_d0i3(void) /* power off main SRAM */ sram_power(0); -#if defined(CHIP_VARIANT_ISH5P4) - /* Set LTR to a large number after DMA copy done */ - if (IS_ENABLED(CONFIG_ISH_NEW_PM)) - sb_upstream_write_raw(0, LTR_CMD_ATTR, LTR_CMD_DATA_INFINITE, - SBEP_PMC_SAIRS_VAL); -#endif - set_vnnred_aoncg(); if (IS_ENABLED(CONFIG_ISH_IPAPG) && is_ipapg_allowed()) { @@ -776,13 +712,6 @@ static void handle_d0i3(void) aon_share.uma_msb); } -#if defined(CHIP_VARIANT_ISH5P4) - /* Set PMC LTR to 2ms before DMA copy */ - if (IS_ENABLED(CONFIG_ISH_NEW_PM)) - sb_upstream_write_raw(0, LTR_CMD_ATTR, LTR_CMD_DATA_2MS, - SBEP_PMC_SAIRS_VAL); -#endif - /* restore main FW 's context to main SRAM from IMR DDR */ ret = restore_main_fw(); diff --git a/chip/ish/clock.c b/chip/ish/clock.c index f9fec0b7d2..e46c4278b7 100644 --- a/chip/ish/clock.c +++ b/chip/ish/clock.c @@ -7,8 +7,8 @@ #include "clock.h" #include "common.h" -#include "power_mgt.h" #include "util.h" +#include "power_mgt.h" /* Console output macros */ #define CPUTS(outstr) cputs(CC_CLOCK, outstr) diff --git a/chip/ish/dma.c b/chip/ish/dma.c index eae6a850f1..48a27a0463 100644 --- a/chip/ish/dma.c +++ b/chip/ish/dma.c @@ -7,12 +7,34 @@ #include "common.h" #include "console.h" -#include "ish_dma.h" #include "registers.h" +#include "ish_dma.h" #include "util.h" static int dma_init_called; /* If ish_dma_init is called */ +static int dma_poll(uint32_t addr, uint32_t expected, uint32_t mask) +{ + int retval = -1; + uint32_t counter = 0; + + /* + * The timeout is approximately 2.2 seconds according to + * value of UINT32_MAX, 120MHZ ISH clock frequency and + * instruction count which is around 4. + */ + while (counter < (UINT32_MAX / 64)) { + /* test condition */ + if ((REG32(addr) & mask) == expected) { + retval = DMA_RC_OK; + break; + } + counter++; + } + + return retval; +} + void ish_dma_ocp_timeout_disable(void) { if (!IS_ENABLED(CONFIG_ISH_NEW_PM)) { @@ -22,6 +44,24 @@ void ish_dma_ocp_timeout_disable(void) } } +static inline uint32_t interrupt_lock(void) +{ + uint32_t eflags = 0; + __asm__ volatile("pushfl;" /* save eflag value */ + "popl %0;" + "cli;" + : "=r"(eflags)); /* shut off interrupts */ + return eflags; +} + +static inline void interrupt_unlock(uint32_t eflags) +{ + __asm__ volatile("pushl %0;" /* restore elfag values */ + "popfl;" + : + : "r"(eflags)); +} + void dma_configure_psize(void) { /* Give chan0 512 bytes for high performance, and chan1 128 bytes. */ diff --git a/chip/ish/hbm.h b/chip/ish/hbm.h index 17c7853b1d..d666f748c8 100644 --- a/chip/ish/hbm.h +++ b/chip/ish/hbm.h @@ -6,10 +6,10 @@ #ifndef __HBM_H #define __HBM_H -#include "heci_client.h" - -#include <stddef.h> #include <stdint.h> +#include <stddef.h> + +#include "heci_client.h" #define HBM_MAJOR_VERSION 1 #ifdef HECI_ENABLE_DMA diff --git a/chip/ish/heci_client.h b/chip/ish/heci_client.h index 2ba9ea01db..951b82c6d9 100644 --- a/chip/ish/heci_client.h +++ b/chip/ish/heci_client.h @@ -6,10 +6,10 @@ #ifndef __HECI_CLIENT_H #define __HECI_CLIENT_H -#include "hooks.h" - -#include <stddef.h> #include <stdint.h> +#include <stddef.h> + +#include "hooks.h" #define HECI_MAX_NUM_OF_CLIENTS 2 diff --git a/chip/ish/hid_device.h b/chip/ish/hid_device.h index 07d8a77673..ba7722f5bb 100644 --- a/chip/ish/hid_device.h +++ b/chip/ish/hid_device.h @@ -6,10 +6,10 @@ #ifndef __HID_DEVICE_H #define __HID_DEVICE_H -#include "hooks.h" - -#include <stddef.h> #include <stdint.h> +#include <stddef.h> + +#include "hooks.h" #define HID_SUBSYS_MAX_PAYLOAD_SIZE 4954 diff --git a/chip/ish/hwtimer.c b/chip/ish/hwtimer.c index 40c3de67a8..57049a63b3 100644 --- a/chip/ish/hwtimer.c +++ b/chip/ish/hwtimer.c @@ -8,9 +8,9 @@ #include "console.h" #include "hpet.h" #include "hwtimer.h" +#include "timer.h" #include "registers.h" #include "task.h" -#include "timer.h" #include "util.h" #define CPUTS(outstr) cputs(CC_CLOCK, outstr) diff --git a/chip/ish/i2c.c b/chip/ish/i2c.c index 230f073369..e26bcd70e5 100644 --- a/chip/ish/i2c.c +++ b/chip/ish/i2c.c @@ -6,16 +6,16 @@ /* I2C port module for ISH */ #include "common.h" -#include "config_chip.h" #include "console.h" +#include "config_chip.h" #include "gpio.h" #include "hooks.h" -#include "hwtimer.h" #include "i2c.h" -#include "ish_i2c.h" #include "registers.h" +#include "ish_i2c.h" #include "task.h" #include "timer.h" +#include "hwtimer.h" #include "util.h" #define CPUTS(outstr) cputs(CC_I2C, outstr) diff --git a/chip/ish/ipc_heci.c b/chip/ish/ipc_heci.c index 8ce0a258e1..1fd81e3d3f 100644 --- a/chip/ish/ipc_heci.c +++ b/chip/ish/ipc_heci.c @@ -24,15 +24,15 @@ */ #include "builtin/assert.h" +#include "registers.h" #include "console.h" -#include "hooks.h" -#include "hwtimer.h" +#include "task.h" +#include "util.h" #include "ipc_heci.h" #include "ish_fwst.h" #include "queue.h" -#include "registers.h" -#include "task.h" -#include "util.h" +#include "hooks.h" +#include "hwtimer.h" #define CPUTS(outstr) cputs(CC_LPC, outstr) #define CPRINTS(format, args...) cprints(CC_LPC, format, ##args) diff --git a/chip/ish/ipc_heci.h b/chip/ish/ipc_heci.h index 96b08f9c4a..f9372aefa3 100644 --- a/chip/ish/ipc_heci.h +++ b/chip/ish/ipc_heci.h @@ -7,8 +7,6 @@ #ifndef __IPC_HECI_H #define __IPC_HECI_H -#include <stddef.h> - enum IPC_ERR { IPC_ERR_IPC_IS_NOT_READY = EC_ERROR_INTERNAL_FIRST + 0, IPC_ERR_TOO_SMALL_BUFFER = EC_ERROR_INTERNAL_FIRST + 1, diff --git a/chip/ish/ish_dma.h b/chip/ish/ish_dma.h index 89d6cb7342..fb9c4f4f06 100644 --- a/chip/ish/ish_dma.h +++ b/chip/ish/ish_dma.h @@ -27,47 +27,6 @@ #define PAGE_SIZE 4096 -static inline uint32_t interrupt_lock(void) -{ - uint32_t eflags = 0; - - __asm__ volatile("pushfl;" /* save eflag value */ - "popl %0;" - "cli;" - : "=r"(eflags)); /* shut off interrupts */ - return eflags; -} - -static inline void interrupt_unlock(uint32_t eflags) -{ - __asm__ volatile("pushl %0;" /* restore elfag values */ - "popfl;" - : - : "r"(eflags)); -} - -static inline int dma_poll(uint32_t addr, uint32_t expected, uint32_t mask) -{ - int retval = -1; - uint32_t counter = 0; - - /* - * The timeout is approximately 2.2 seconds according to - * value of UINT32_MAX, 120MHZ ISH clock frequency and - * instruction count which is around 4. - */ - while (counter < (UINT32_MAX / 64)) { - /* test condition */ - if ((REG32(addr) & mask) == expected) { - retval = DMA_RC_OK; - break; - } - counter++; - } - - return retval; -} - /** * SRAM: ISH local static ram * UMA: Protected system DRAM region dedicated for ISH diff --git a/chip/ish/ish_i2c.h b/chip/ish/ish_i2c.h index 7aa2977178..c24f4e0cdc 100644 --- a/chip/ish/ish_i2c.h +++ b/chip/ish/ish_i2c.h @@ -6,9 +6,8 @@ #ifndef __CROS_EC_ISH_I2C_H #define __CROS_EC_ISH_I2C_H -#include "task.h" - #include <stdint.h> +#include "task.h" #define I2C_TSC_TIMEOUT 2000000 #define I2C_CALIB_ADDRESS 0x3 diff --git a/chip/ish/ish_persistent_data.c b/chip/ish/ish_persistent_data.c index ed909d6f7b..149acaeade 100644 --- a/chip/ish/ish_persistent_data.c +++ b/chip/ish/ish_persistent_data.c @@ -4,11 +4,11 @@ */ #include "common.h" -#include "config.h" #include "ec_commands.h" +#include "config.h" #include "hooks.h" -#include "ish_persistent_data.h" #include "system.h" +#include "ish_persistent_data.h" #define PERSISTENT_DATA_MAGIC 0x49534864 /* "ISHd" */ diff --git a/chip/ish/power_mgt.c b/chip/ish/power_mgt.c index de9022b55a..83ef0fc91b 100644 --- a/chip/ish/power_mgt.c +++ b/chip/ish/power_mgt.c @@ -3,6 +3,8 @@ * found in the LICENSE file. */ +#include <stdnoreturn.h> + #include "aontaskfw/ish_aon_share.h" #include "console.h" #include "hwtimer.h" @@ -15,8 +17,6 @@ #include "util.h" #include "watchdog.h" -#include <stdnoreturn.h> - #define CPUTS(outstr) cputs(CC_SYSTEM, outstr) #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) #define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) @@ -612,18 +612,8 @@ void ish_pm_init(void) /* clear reset history register in CCU */ CCU_RST_HST = CCU_RST_HST; -#if defined(CHIP_VARIANT_ISH5P4) - if (IS_ENABLED(CONFIG_ISH_NEW_PM)) - PMU_D3_STATUS_1 = 0xffffffff; -#endif - /* disable TCG and disable BCG */ - CCU_TCG_ENABLE = 0; - CCU_BCG_ENABLE = 0; - - /* Disable power gate of CACHE and ROM */ - PMU_RF_ROM_PWR_CTRL = 0; - + CCU_TCG_EN = 0; reset_bcg(); if (IS_ENABLED(CONFIG_ISH_PM_AONTASK)) @@ -634,15 +624,8 @@ void ish_pm_init(void) PMU_GPIO_WAKE_MASK1 = 0; } - /* Unmask all wake up events in event1 */ + /* unmask all wake up events */ PMU_MASK_EVENT = ~PMU_MASK_EVENT_BIT_ALL; - /* Mask events in event2 */ - PMU_MASK_EVENT2 = PMU_MASK2_ALL_EVENTS; - -#if defined(CHIP_VARIANT_ISH5P4) - SBEP_REG_CLK_GATE_ENABLE = - (SB_CLK_GATE_EN_LOCAL_CLK_GATE | SB_CLK_GATE_EN_TRUNK_CLK_GATE); -#endif if (IS_ENABLED(CONFIG_ISH_NEW_PM)) { PMU_ISH_FABRIC_CNT = (PMU_ISH_FABRIC_CNT & 0xffff0000) | @@ -665,15 +648,6 @@ void ish_pm_init(void) (PMU_D3_STATUS & PMU_BME_BIT_SET)) PMU_D3_STATUS = PMU_D3_STATUS; -#if defined(CHIP_VARIANT_ISH5P4) - if (IS_ENABLED(CONFIG_ISH_NEW_PM)) { - /* Mask all function1 */ - PMU_REG_MASK_D3_RISE = 0x2; - PMU_REG_MASK_D3_FALL = 0x2; - PMU_REG_MASK_BME_RISE = 0x2; - PMU_REG_MASK_BME_FALL = 0x2; - } -#endif enable_d3bme_irqs(); } } diff --git a/chip/ish/power_mgt.h b/chip/ish/power_mgt.h index a7a702018f..851529ffb1 100644 --- a/chip/ish/power_mgt.h +++ b/chip/ish/power_mgt.h @@ -6,11 +6,11 @@ #ifndef __CROS_EC_POWER_MGT_H #define __CROS_EC_POWER_MGT_H +#include <stdnoreturn.h> + #include "common.h" #include "registers.h" -#include <stdnoreturn.h> - extern void uart_port_restore(void); extern void uart_to_idle(void); extern void clear_fabric_error(void); diff --git a/chip/ish/registers.h b/chip/ish/registers.h index 7fe5d2c5ab..bdd04a7cb2 100644 --- a/chip/ish/registers.h +++ b/chip/ish/registers.h @@ -48,7 +48,6 @@ enum ish_i2c_port { #define ISH_IOAPIC_BASE 0xFEC00000 #define ISH_HPET_BASE 0x04700000 #define ISH_LAPIC_BASE 0xFEE00000 -#define ISH_SBEP_BASE 0x04500000 #else #define ISH_I2C0_BASE 0x00100000 #define ISH_I2C1_BASE 0x00102000 @@ -129,66 +128,6 @@ enum ish_i2c_port { #define ISH_GPIO_GWSR REG32(ISH_GPIO_BASE + 0x118) /* Wake Source */ #define ISH_GPIO_GSEC REG32(ISH_GPIO_BASE + 0x130) /* Secure Input */ -#if defined(CHIP_VARIANT_ISH5P4) -/* Side Band End Point registers */ -#define SBEP_REG_CLK_GATE_ENABLE REG32(ISH_SBEP_BASE + 0x006C) -#define SB_CLK_GATE_EN_LOCAL_CLK_GATE BIT(0) -#define SB_CLK_GATE_EN_TRUNK_CLK_GATE BIT(1) -#endif - -#define SBEP_REG_UP_MSG_STATUS_ADDR (ISH_SBEP_BASE + 0x0040) -#define SBEP_REG_UP_MSG_STATUS REG32(ISH_SBEP_BASE + 0x0040) -#define SBEP_REG_UP_MSG_COMMAND REG32(ISH_SBEP_BASE + 0x0044) -#define SBEP_REG_UP_MSG_REQ_ADDR_LOW REG32(ISH_SBEP_BASE + 0x0048) -#define SBEP_REG_UP_MSG_REQ_ADDR_HIGH REG32(ISH_SBEP_BASE + 0x004C) -#define SBEP_REG_UP_MSG_REQ_DATA REG32(ISH_SBEP_BASE + 0x0050) -#define SBEP_REG_UP_MSG_REQ_ATTR REG32(ISH_SBEP_BASE + 0x0054) -#define SBEP_REG_UP_MSG_REQ_EH REG32(ISH_SBEP_BASE + 0x0058) - -#define UP_STATUS_BUSY_MASK 0x01 -#define UP_STATUS_MSG_SENT_MASK 0x02 -#define UP_STATUS_MSG_SENT_CLR 0x02 - -#define SBEP_CMD_ACTION 0x1 -#define SBEP_CMD_TYPE_WRITE 0x0 -#define SBEP_CMD_TYPE_READ 0x1 -#define SBEP_CMD_POSTED 0x1 -#define SBEP_CMD_NON_POSTED 0x0 -#define SBEP_CMD_INT_ENABLED 0x1 -#define SBEP_CMD_ACTION_OFF 0 -#define SBEP_CMD_TYPE_OFF 1 -#define SBEP_CMD_POSTED_OFF 2 -#define SBEP_CMD_INT_OFF 3 - -#define SBEP_CMD_WRITE \ - ((SBEP_CMD_ACTION << SBEP_CMD_ACTION_OFF) | \ - (SBEP_CMD_TYPE_WRITE << SBEP_CMD_TYPE_OFF) | \ - (SBEP_CMD_POSTED << SBEP_CMD_POSTED_OFF) | \ - (SBEP_CMD_INT_ENABLED << SBEP_CMD_INT_OFF)) - -#define SBEP_ATTR_LTR_OPCODE 0x43 -#define SBEP_ATTR_PMC_DEST_ID 0xCC -#define SBEP_ATTR_DEST_ID_OFF 0 -#define SBEP_ATTR_OPCODE_OFF 8 -#define SBEP_ATTR_WRITE_ALL_BYTES 0xF -#define SBEP_ATTR_BYTE_ENABLE_OFF 16 -#define LTR_CMD_ATTR \ - ((SBEP_ATTR_PMC_DEST_ID << SBEP_ATTR_DEST_ID_OFF) | \ - (SBEP_ATTR_LTR_OPCODE << SBEP_ATTR_OPCODE_OFF) | \ - (SBEP_ATTR_WRITE_ALL_BYTES << SBEP_ATTR_BYTE_ENABLE_OFF)) -#define LTR_CMD_DATA_2MS 0x90029002 -#define LTR_CMD_DATA_INFINITE 0 - -#define SBEP_SAIRS_ROOT_SPACE_PMC 0 - -#define SBEP_SAIRS_EH_PRESENT 1 -#define SBEP_SAIRS_ROOT_SPACE_OFF 16 -#define SBEP_SAIRS_EH_PRESENT_OFF 31 - -#define SBEP_PMC_SAIRS_VAL \ - ((SBEP_SAIRS_ROOT_SPACE_PMC << SBEP_SAIRS_ROOT_SPACE_OFF) | \ - (SBEP_SAIRS_EH_PRESENT << SBEP_SAIRS_EH_PRESENT_OFF)) - /* APIC interrupt vectors */ #define ISH_TS_VECTOR 0x20 /* Task switch vector */ #define LAPIC_LVT_ERROR_VECTOR 0x21 /* Clears IOAPIC/LAPIC sync errors */ @@ -269,7 +208,6 @@ enum ish_i2c_port { #define PMU_PMC_PG_WAKE REG32(ISH_PMU_BASE + 0xF18) #define PMU_INTERNAL_PCE REG32(ISH_PMU_BASE + 0xF30) #define PMU_D3_STATUS REG32(ISH_PMU_BASE + 0x100) -#define PMU_D3_STATUS_1 REG32(ISH_PMU_BASE + 0x104) #define PMU_HOST_RST_B BIT(0) #define PMU_PCE_SHADOW_MASK 0x1F #define PMU_PCE_PG_ALLOWED BIT(4) @@ -294,10 +232,6 @@ enum ish_i2c_port { #define PMU_BME_BIT_FALLING_EDGE_STATUS BIT(26) #define PMU_BME_BIT_RISING_EDGE_MASK BIT(27) #define PMU_BME_BIT_FALLING_EDGE_MASK BIT(28) -#define PMU_REG_MASK_D3_RISE REG32(ISH_PMU_BASE + 0x200) -#define PMU_REG_MASK_D3_FALL REG32(ISH_PMU_BASE + 0x208) -#define PMU_REG_MASK_BME_RISE REG32(ISH_PMU_BASE + 0x220) -#define PMU_REG_MASK_BME_FALL REG32(ISH_PMU_BASE + 0x228) #endif #define PMU_GPIO_WAKE_MASK0 REG32(ISH_PMU_BASE + 0x250) @@ -322,7 +256,6 @@ enum ish_i2c_port { #define VNN_ID_DMA0 4 #define VNN_ID_DMA(chan) (VNN_ID_DMA0 + chan) -#define VNN_ID_SIDEBAND 21 /* OCP registers */ #define OCP_IOSF2OCP_BRIDGE (ISH_OCP_BASE + 0x9400) @@ -389,7 +322,6 @@ enum ish_i2c_port { #define DEST_BURST_SIZE 3 #define PMU_MASK_EVENT REG32(ISH_PMU_BASE + 0x10) -#define PMU_MASK_EVENT2 REG32(ISH_PMU_BASE + 0x4C) #define PMU_MASK_EVENT_BIT_GPIO(pin) BIT(pin) #define PMU_MASK_EVENT_BIT_HPET BIT(16) #define PMU_MASK_EVENT_BIT_IPC BIT(17) @@ -400,16 +332,6 @@ enum ish_i2c_port { #define PMU_MASK_EVENT_BIT_SPI BIT(22) #define PMU_MASK_EVENT_BIT_UART BIT(23) #define PMU_MASK_EVENT_BIT_ALL (0xffffffff) -#define PMU_MASK_EVENT2_SRAM_ERASE1 BIT(3) -#define PMU_MASK_EVENT2_SRAM_ERASE0 BIT(4) -#define PMU_MASK_EVENT2_ISOL_ACK_RISE BIT(14) -#define PMU_MASK_EVENT2_ISOL_ACK_FALL BIT(15) -#define PMU_MASK_EVENT2_HOST_RST_RISE BIT(16) -#define PMU_MASK_EVENT2_HOST_RST_FALL BIT(17) -#define PMU_MASK2_ALL_EVENTS \ - (PMU_MASK_EVENT2_SRAM_ERASE0 | PMU_MASK_EVENT2_SRAM_ERASE1 | \ - PMU_MASK_EVENT2_ISOL_ACK_RISE | PMU_MASK_EVENT2_ISOL_ACK_FALL | \ - PMU_MASK_EVENT2_HOST_RST_RISE | PMU_MASK_EVENT2_HOST_RST_FALL) #define PMU_RF_ROM_PWR_CTRL REG32(ISH_PMU_BASE + 0x30) diff --git a/chip/ish/system_state_subsys.c b/chip/ish/system_state_subsys.c index 76053dcded..bfc120ff9b 100644 --- a/chip/ish/system_state_subsys.c +++ b/chip/ish/system_state_subsys.c @@ -3,10 +3,10 @@ * found in the LICENSE file. */ -#include "console.h" #include "heci_client.h" #include "registers.h" #include "system_state.h" +#include "console.h" #ifdef SS_SUBSYSTEM_DEBUG #define CPUTS(outstr) cputs(CC_LPC, outstr) diff --git a/chip/ish/uart.c b/chip/ish/uart.c index 0ff03da89a..b1c9493869 100644 --- a/chip/ish/uart.c +++ b/chip/ish/uart.c @@ -4,16 +4,17 @@ */ /* UART module for ISH */ -#include "atomic.h" #include "common.h" -#include "console.h" -#include "interrupts.h" #include "math_util.h" -#include "registers.h" -#include "system.h" +#include "console.h" +#include "uart_defs.h" +#include "atomic.h" #include "task.h" +#include "registers.h" #include "uart.h" #include "uart_defs.h" +#include "interrupts.h" +#include "system.h" #define CPUTS(outstr) cputs(CC_LPC, outstr) #define CPRINTS(format, args...) cprints(CC_LPC, format, ##args) diff --git a/chip/ish/uart_defs.h b/chip/ish/uart_defs.h index 581a702d31..1fc36b7adc 100644 --- a/chip/ish/uart_defs.h +++ b/chip/ish/uart_defs.h @@ -8,10 +8,9 @@ #ifndef __CROS_EC_UART_DEFS_H_ #define __CROS_EC_UART_DEFS_H_ -#include "atomic.h" - -#include <stddef.h> #include <stdint.h> +#include <stddef.h> +#include "atomic.h" #define UART_ERROR -1 #define UART_BUSY -2 diff --git a/chip/ish/watchdog.c b/chip/ish/watchdog.c index 8f0ea5ddf1..7b32133619 100644 --- a/chip/ish/watchdog.c +++ b/chip/ish/watchdog.c @@ -23,9 +23,9 @@ #include "ec_commands.h" #include "hooks.h" #include "ish_persistent_data.h" +#include "task.h" #include "registers.h" #include "system.h" -#include "task.h" #include "watchdog.h" /* Units are hundreds of milliseconds */ diff --git a/chip/it83xx/adc.c b/chip/it83xx/adc.c index c666fc4e88..9f9fa27f41 100644 --- a/chip/it83xx/adc.c +++ b/chip/it83xx/adc.c @@ -7,8 +7,8 @@ #include "adc.h" #include "clock.h" -#include "common.h" #include "console.h" +#include "common.h" #include "gpio.h" #include "hooks.h" #include "registers.h" diff --git a/chip/it83xx/adc_chip.h b/chip/it83xx/adc_chip.h index 3804a684e5..99e84624e0 100644 --- a/chip/it83xx/adc_chip.h +++ b/chip/it83xx/adc_chip.h @@ -8,10 +8,10 @@ #ifndef __CROS_EC_ADC_CHIP_H #define __CROS_EC_ADC_CHIP_H -#include "common.h" - #include <stdint.h> +#include "common.h" + /* * Maximum time we allow for an ADC conversion. * NOTE: diff --git a/chip/it83xx/flash.c b/chip/it83xx/flash.c index fa8ab65292..25aefa2f66 100644 --- a/chip/it83xx/flash.c +++ b/chip/it83xx/flash.c @@ -9,13 +9,13 @@ #include "flash_chip.h" #include "host_command.h" #include "intc.h" -#include "registers.h" -#include "shared_mem.h" #include "system.h" -#include "task.h" -#include "uart.h" #include "util.h" #include "watchdog.h" +#include "registers.h" +#include "task.h" +#include "shared_mem.h" +#include "uart.h" #define FLASH_DMA_START ((uint32_t)&__flash_dma_start) #define FLASH_DMA_CODE __attribute__((section(".flash_direct_map"))) diff --git a/chip/it83xx/hwtimer.c b/chip/it83xx/hwtimer.c index 7a46f52773..b9add82b5a 100644 --- a/chip/it83xx/hwtimer.c +++ b/chip/it83xx/hwtimer.c @@ -5,8 +5,8 @@ /* Hardware timers driver */ -#include "common.h" #include "cpu.h" +#include "common.h" #include "hooks.h" #include "hwtimer.h" #include "hwtimer_chip.h" diff --git a/chip/it83xx/i2c_peripheral.c b/chip/it83xx/i2c_peripheral.c index dfb139514f..80fea907fd 100644 --- a/chip/it83xx/i2c_peripheral.c +++ b/chip/it83xx/i2c_peripheral.c @@ -12,10 +12,9 @@ #include "i2c_peripheral.h" #include "printf.h" #include "registers.h" -#include "task.h" - #include <stddef.h> #include <string.h> +#include "task.h" /* Console output macros */ #define CPRINTS(format, args...) cprints(CC_I2C, format, ##args) diff --git a/chip/it83xx/keyboard_raw.c b/chip/it83xx/keyboard_raw.c index 9123a6e5e8..0d2f048deb 100644 --- a/chip/it83xx/keyboard_raw.c +++ b/chip/it83xx/keyboard_raw.c @@ -4,11 +4,11 @@ */ #include "common.h" -#include "irq_chip.h" #include "keyboard_raw.h" #include "keyboard_scan.h" #include "registers.h" #include "task.h" +#include "irq_chip.h" #define KSOH_PIN_MASK (((1 << (KEYBOARD_COLS_MAX - 8)) - 1) & 0xff) diff --git a/chip/it83xx/peci.c b/chip/it83xx/peci.c index ee94f2baac..e5f172ce80 100644 --- a/chip/it83xx/peci.c +++ b/chip/it83xx/peci.c @@ -10,9 +10,9 @@ #include "hooks.h" #include "peci.h" #include "registers.h" -#include "task.h" -#include "timer.h" #include "util.h" +#include "timer.h" +#include "task.h" enum peci_status { PECI_STATUS_NO_ERR = 0x00, diff --git a/chip/it83xx/pwm.c b/chip/it83xx/pwm.c index 3d0d4eaeb6..07165dea77 100644 --- a/chip/it83xx/pwm.c +++ b/chip/it83xx/pwm.c @@ -8,11 +8,11 @@ #include "clock.h" #include "gpio.h" #include "hooks.h" -#include "math_util.h" #include "pwm.h" #include "pwm_chip.h" #include "registers.h" #include "util.h" +#include "math_util.h" #define PWM_CTRX_MIN 100 #define PWM_EC_FREQ 8000000 diff --git a/chip/max32660/clock_chip.c b/chip/max32660/clock_chip.c index 26225401ba..93a5f862d8 100644 --- a/chip/max32660/clock_chip.c +++ b/chip/max32660/clock_chip.c @@ -9,16 +9,16 @@ #include "common.h" #include "console.h" #include "cpu.h" -#include "gcr_regs.h" #include "hooks.h" #include "hwtimer.h" -#include "pwrseq_regs.h" #include "registers.h" #include "system.h" #include "timer.h" -#include "tmr_regs.h" #include "util.h" #include "watchdog.h" +#include "tmr_regs.h" +#include "gcr_regs.h" +#include "pwrseq_regs.h" #define MAX32660_SYSTEMCLOCK SYS_CLOCK_HIRC diff --git a/chip/max32660/flash_chip.c b/chip/max32660/flash_chip.c index 01a26f94b5..eb702799b0 100644 --- a/chip/max32660/flash_chip.c +++ b/chip/max32660/flash_chip.c @@ -5,16 +5,16 @@ /* MAX32660 Flash Memory Module for Chrome EC */ -#include "common.h" #include "flash.h" -#include "flc_regs.h" -#include "icc_regs.h" -#include "registers.h" #include "switch.h" #include "system.h" #include "timer.h" #include "util.h" #include "watchdog.h" +#include "registers.h" +#include "common.h" +#include "icc_regs.h" +#include "flc_regs.h" #define CPUTS(outstr) cputs(CC_SYSTEM, outstr) #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) diff --git a/chip/max32660/gpio_chip.c b/chip/max32660/gpio_chip.c index b6deaa9111..cc54f9055f 100644 --- a/chip/max32660/gpio_chip.c +++ b/chip/max32660/gpio_chip.c @@ -6,16 +6,16 @@ /* MAX32660 GPIO module for Chrome EC */ #include "clock.h" -#include "common.h" #include "console.h" +#include "common.h" #include "gpio.h" -#include "gpio_regs.h" #include "hooks.h" -#include "registers.h" #include "switch.h" #include "task.h" #include "timer.h" #include "util.h" +#include "registers.h" +#include "gpio_regs.h" #define CPRINTF(format, args...) cprintf(CC_GPIO, format, ##args) #define CPRINTS(format, args...) cprints(CC_GPIO, format, ##args) diff --git a/chip/max32660/hwtimer_chip.c b/chip/max32660/hwtimer_chip.c index b6c39f4036..a6469ae795 100644 --- a/chip/max32660/hwtimer_chip.c +++ b/chip/max32660/hwtimer_chip.c @@ -6,15 +6,15 @@ /* MAX32660 HW Timer module for Chrome EC */ #include "clock.h" -#include "common.h" #include "console.h" -#include "gcr_regs.h" +#include "common.h" #include "hooks.h" #include "hwtimer.h" -#include "registers.h" #include "task.h" #include "timer.h" +#include "registers.h" #include "tmr_regs.h" +#include "gcr_regs.h" /* Define the rollover timer */ #define TMR_ROLLOVER MXC_TMR0 diff --git a/chip/max32660/i2c_chip.c b/chip/max32660/i2c_chip.c index a4fab91199..bb116f4d8a 100644 --- a/chip/max32660/i2c_chip.c +++ b/chip/max32660/i2c_chip.c @@ -5,19 +5,18 @@ /* MAX32660 I2C port module for Chrome EC. */ +#include <stdint.h> +#include <stddef.h> #include "common.h" #include "config_chip.h" #include "gpio.h" #include "hooks.h" #include "i2c.h" -#include "i2c_regs.h" -#include "registers.h" #include "stdbool.h" #include "system.h" #include "task.h" - -#include <stddef.h> -#include <stdint.h> +#include "registers.h" +#include "i2c_regs.h" /** * Byte to use if the EC HOST requested more data diff --git a/chip/max32660/system_chip.c b/chip/max32660/system_chip.c index f63e22dc26..8679881102 100644 --- a/chip/max32660/system_chip.c +++ b/chip/max32660/system_chip.c @@ -9,14 +9,14 @@ #include "common.h" #include "console.h" #include "cpu.h" -#include "gcr_regs.h" #include "host_command.h" #include "panic.h" -#include "registers.h" #include "system.h" #include "task.h" #include "timer.h" #include "util.h" +#include "registers.h" +#include "gcr_regs.h" /* Console output macros */ #define CPUTS(outstr) cputs(CC_SYSTEM, outstr) diff --git a/chip/max32660/uart_chip.c b/chip/max32660/uart_chip.c index ec25d9e476..87ba59e629 100644 --- a/chip/max32660/uart_chip.c +++ b/chip/max32660/uart_chip.c @@ -5,19 +5,18 @@ /* MAX32660 Console UART Module for Chrome EC */ -#include "common.h" -#include "gcr_regs.h" -#include "gpio.h" -#include "gpio_regs.h" -#include "registers.h" +#include <stdint.h> #include "system.h" #include "task.h" -#include "tmr_regs.h" #include "uart.h" +#include "registers.h" +#include "tmr_regs.h" +#include "gpio.h" +#include "gpio_regs.h" +#include "common.h" +#include "gcr_regs.h" #include "uart_regs.h" -#include <stdint.h> - static int done_uart_init_yet; #ifndef UARTN diff --git a/chip/max32660/wdt_chip.c b/chip/max32660/wdt_chip.c index 4890c34536..03cd2bd009 100644 --- a/chip/max32660/wdt_chip.c +++ b/chip/max32660/wdt_chip.c @@ -7,14 +7,14 @@ #include "clock.h" #include "common.h" -#include "config.h" -#include "console.h" #include "gpio.h" #include "hooks.h" -#include "registers.h" #include "task.h" #include "util.h" #include "watchdog.h" +#include "console.h" +#include "registers.h" +#include "board.h" #include "wdt_regs.h" #define CPUTS(outstr) cputs(CC_COMMAND, outstr) diff --git a/chip/mchp/adc.c b/chip/mchp/adc.c index f09c04d26b..621fe1f3be 100644 --- a/chip/mchp/adc.c +++ b/chip/mchp/adc.c @@ -10,9 +10,9 @@ #include "hooks.h" #include "registers.h" #include "task.h" -#include "tfdp_chip.h" #include "timer.h" #include "util.h" +#include "tfdp_chip.h" /* * Conversion on a single channel takes less than 12 ms. Set timeout to diff --git a/chip/mchp/clock.c b/chip/mchp/clock.c index 0323d16f8f..4701d43b1f 100644 --- a/chip/mchp/clock.c +++ b/chip/mchp/clock.c @@ -17,10 +17,10 @@ #include "shared_mem.h" #include "system.h" #include "task.h" -#include "tfdp_chip.h" #include "timer.h" #include "uart.h" #include "util.h" +#include "tfdp_chip.h" #include "vboot_hash.h" /* Console output macros */ diff --git a/chip/mchp/dma.c b/chip/mchp/dma.c index c921527d7f..8a091286a7 100644 --- a/chip/mchp/dma.c +++ b/chip/mchp/dma.c @@ -9,9 +9,9 @@ #include "hooks.h" #include "registers.h" #include "task.h" -#include "tfdp_chip.h" #include "timer.h" #include "util.h" +#include "tfdp_chip.h" /* Console output macros */ #define CPUTS(outstr) cputs(CC_DMA, outstr) diff --git a/chip/mchp/dma_chip.h b/chip/mchp/dma_chip.h index bfdb8ab9be..6f569a1dc7 100644 --- a/chip/mchp/dma_chip.h +++ b/chip/mchp/dma_chip.h @@ -13,8 +13,8 @@ #ifndef _DMA_CHIP_H #define _DMA_CHIP_H -#include <stddef.h> #include <stdint.h> +#include <stddef.h> #ifdef __cplusplus extern "C" { diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c index 53d17e90b2..371cf09c5e 100644 --- a/chip/mchp/espi.c +++ b/chip/mchp/espi.c @@ -5,26 +5,29 @@ /* ESPI module for Chrome EC */ -#include "acpi.h" -#include "chipset.h" #include "common.h" +#include "acpi.h" #include "console.h" -#include "espi.h" #include "gpio.h" #include "hooks.h" #include "host_command.h" #include "keyboard_protocol.h" -#include "lpc.h" -#include "lpc_chip.h" #include "port80.h" -#include "power.h" +#include "util.h" +#include "chipset.h" + #include "registers.h" +#include "espi.h" +#include "lpc.h" +#include "lpc_chip.h" #include "system.h" #include "task.h" -#include "tfdp_chip.h" -#include "timer.h" +#include "console.h" #include "uart.h" #include "util.h" +#include "power.h" +#include "timer.h" +#include "tfdp_chip.h" /* Console output macros */ #ifdef CONFIG_MCHP_ESPI_DEBUG diff --git a/chip/mchp/fan.c b/chip/mchp/fan.c index c68d71bcc8..3f61cb4d2f 100644 --- a/chip/mchp/fan.c +++ b/chip/mchp/fan.c @@ -9,8 +9,8 @@ #include "fan.h" #include "registers.h" -#include "tfdp_chip.h" #include "util.h" +#include "tfdp_chip.h" /* Maximum fan driver setting value */ #define MAX_FAN_DRIVER_SETTING 0x3ff diff --git a/chip/mchp/flash.c b/chip/mchp/flash.c index f0f3a5575e..4b0e407fb2 100644 --- a/chip/mchp/flash.c +++ b/chip/mchp/flash.c @@ -6,14 +6,14 @@ #include "common.h" #include "console.h" #include "flash.h" -#include "hooks.h" #include "host_command.h" #include "shared_mem.h" #include "spi.h" #include "spi_flash.h" #include "system.h" -#include "tfdp_chip.h" #include "util.h" +#include "hooks.h" +#include "tfdp_chip.h" #define PAGE_SIZE 256 diff --git a/chip/mchp/gpio.c b/chip/mchp/gpio.c index 3ad9d7b6e4..a3cab86fcc 100644 --- a/chip/mchp/gpio.c +++ b/chip/mchp/gpio.c @@ -8,13 +8,13 @@ #include "common.h" #include "gpio.h" #include "hooks.h" -#include "lpc_chip.h" #include "registers.h" #include "system.h" #include "task.h" -#include "tfdp_chip.h" #include "timer.h" #include "util.h" +#include "lpc_chip.h" +#include "tfdp_chip.h" /* Console output macros */ #define CPUTS(outstr) cputs(CC_LPC, outstr) diff --git a/chip/mchp/gpio_chip.h b/chip/mchp/gpio_chip.h index ec0f3d2278..e092669b60 100644 --- a/chip/mchp/gpio_chip.h +++ b/chip/mchp/gpio_chip.h @@ -13,10 +13,10 @@ #ifndef _GPIO_CHIP_H #define _GPIO_CHIP_H -#include "gpio.h" - -#include <stddef.h> #include <stdint.h> +#include <stddef.h> + +#include "gpio.h" #ifdef __cplusplus extern "C" { diff --git a/chip/mchp/gpio_cmds.c b/chip/mchp/gpio_cmds.c index a53f8cca2a..927d6d0326 100644 --- a/chip/mchp/gpio_cmds.c +++ b/chip/mchp/gpio_cmds.c @@ -8,12 +8,12 @@ #include "common.h" #include "console.h" #include "gpio.h" -#include "gpio_chip.h" #include "hooks.h" #include "registers.h" #include "system.h" -#include "tfdp_chip.h" #include "util.h" +#include "gpio_chip.h" +#include "tfdp_chip.h" /* Console output macros */ #define CPUTS(outstr) cputs(CC_LPC, outstr) diff --git a/chip/mchp/gpspi.c b/chip/mchp/gpspi.c index a7f7b388c4..0142fe0e3c 100644 --- a/chip/mchp/gpspi.c +++ b/chip/mchp/gpspi.c @@ -9,15 +9,15 @@ #include "console.h" #include "dma.h" #include "gpio.h" -#include "gpspi_chip.h" -#include "hooks.h" #include "registers.h" #include "spi.h" -#include "spi_chip.h" -#include "task.h" -#include "tfdp_chip.h" #include "timer.h" #include "util.h" +#include "hooks.h" +#include "task.h" +#include "spi_chip.h" +#include "gpspi_chip.h" +#include "tfdp_chip.h" #define CPUTS(outstr) cputs(CC_SPI, outstr) #define CPRINTS(format, args...) cprints(CC_SPI, format, ##args) diff --git a/chip/mchp/gpspi_chip.h b/chip/mchp/gpspi_chip.h index 16c3208410..7c1285b6cf 100644 --- a/chip/mchp/gpspi_chip.h +++ b/chip/mchp/gpspi_chip.h @@ -13,8 +13,8 @@ #ifndef _GPSPI_CHIP_H #define _GPSPI_CHIP_H -#include <stddef.h> #include <stdint.h> +#include <stddef.h> /* struct spi_device_t */ #include "spi.h" diff --git a/chip/mchp/hwtimer.c b/chip/mchp/hwtimer.c index c72140b18f..2e9ff780fb 100644 --- a/chip/mchp/hwtimer.c +++ b/chip/mchp/hwtimer.c @@ -11,8 +11,8 @@ #include "hwtimer.h" #include "registers.h" #include "task.h" -#include "tfdp_chip.h" #include "timer.h" +#include "tfdp_chip.h" void __hw_clock_event_set(uint32_t deadline) { diff --git a/chip/mchp/keyboard_raw.c b/chip/mchp/keyboard_raw.c index 30181776fa..daa0c8e64f 100644 --- a/chip/mchp/keyboard_raw.c +++ b/chip/mchp/keyboard_raw.c @@ -11,8 +11,8 @@ #include "keyboard_scan.h" #include "registers.h" #include "task.h" -#include "tfdp_chip.h" #include "util.h" +#include "tfdp_chip.h" /* * Using direct mode interrupt, do not enable diff --git a/chip/mchp/lfw/ec_lfw.c b/chip/mchp/lfw/ec_lfw.c index eb8b3370cb..dfd9814e6e 100644 --- a/chip/mchp/lfw/ec_lfw.c +++ b/chip/mchp/lfw/ec_lfw.c @@ -6,23 +6,23 @@ * */ -#include "clock.h" +#include <stdint.h> + #include "config.h" -#include "cpu.h" #include "cros_version.h" -#include "dma.h" #include "gpio.h" -#include "gpio_list.h" -#include "hwtimer.h" -#include "registers.h" #include "spi.h" #include "spi_flash.h" +#include "util.h" +#include "timer.h" +#include "dma.h" +#include "registers.h" +#include "cpu.h" +#include "clock.h" #include "system.h" +#include "hwtimer.h" +#include "gpio_list.h" #include "tfdp_chip.h" -#include "timer.h" -#include "util.h" - -#include <stdint.h> #ifdef CONFIG_MCHP_LFW_DEBUG #include "dma_chip.h" @@ -305,7 +305,7 @@ void uart_init(void) } #endif /* #ifdef CONFIG_UART_CONSOLE */ -noreturn void watchdog_reset(void) +void fault_handler(void) { uart_puts("EXCEPTION!\nTriggering watchdog reset\n"); /* trigger reset in 1 ms */ @@ -315,11 +315,6 @@ noreturn void watchdog_reset(void) ; } -void fault_handler(void) -{ - asm("b watchdog_reset"); -} - void jump_to_image(uintptr_t init_addr) { void (*resetvec)(void) = (void (*)(void))init_addr; diff --git a/chip/mchp/lfw/ec_lfw.h b/chip/mchp/lfw/ec_lfw.h index 0c677e5d0b..2589638954 100644 --- a/chip/mchp/lfw/ec_lfw.h +++ b/chip/mchp/lfw/ec_lfw.h @@ -7,7 +7,6 @@ */ #include <stdint.h> - #include <stdnoreturn.h> /* Why naked? This is dangerous except for diff --git a/chip/mchp/lfw/ec_lfw.ld b/chip/mchp/lfw/ec_lfw.ld index d178a42280..f0071a55e9 100644 --- a/chip/mchp/lfw/ec_lfw.ld +++ b/chip/mchp/lfw/ec_lfw.ld @@ -79,15 +79,7 @@ SECTIONS FILL(0xFF); . = ORIGIN(SRAM) + LENGTH(SRAM) - 1; BYTE(0xFF); /* emit at least a byte to make linker happy */ - } >SRAM + } __image_size = LOADADDR(.text) + SIZEOF(.text) - ORIGIN(VECTOR); - - /* - * Discard C++ exception index table and exception table. These are - * described in more detail in "Exception Handling ABI for ARM - * Architecture": - * https://github.com/ARM-software/abi-aa/blob/60a8eb8c55e999d74dac5e368fc9d7e36e38dda4/ehabi32/ehabi32.rst#54the-object-producer-interface - */ - /DISCARD/ : { *(.ARM.*) } } diff --git a/chip/mchp/lfw/ec_lfw_416kb.ld b/chip/mchp/lfw/ec_lfw_416kb.ld index c7dfacada3..f27d046e7d 100644 --- a/chip/mchp/lfw/ec_lfw_416kb.ld +++ b/chip/mchp/lfw/ec_lfw_416kb.ld @@ -83,15 +83,7 @@ SECTIONS FILL(0xFF); . = ORIGIN(SRAM) + LENGTH(SRAM) - 1; BYTE(0xFF); /* emit at least a byte to make linker happy */ - } >SRAM + } __image_size = LOADADDR(.text) + SIZEOF(.text) - ORIGIN(VECTOR); - - /* - * Discard C++ exception index table and exception table. These are - * described in more detail in "Exception Handling ABI for ARM - * Architecture": - * https://github.com/ARM-software/abi-aa/blob/60a8eb8c55e999d74dac5e368fc9d7e36e38dda4/ehabi32/ehabi32.rst#54the-object-producer-interface - */ - /DISCARD/ : { *(.ARM.*) } } diff --git a/chip/mchp/lpc.c b/chip/mchp/lpc.c index e41e4b0c78..da9b045b22 100644 --- a/chip/mchp/lpc.c +++ b/chip/mchp/lpc.c @@ -5,24 +5,24 @@ /* LPC module for MCHP MEC family */ -#include "acpi.h" -#include "chipset.h" #include "common.h" +#include "acpi.h" #include "console.h" -#include "espi.h" #include "gpio.h" #include "hooks.h" #include "host_command.h" #include "keyboard_protocol.h" #include "lpc.h" #include "lpc_chip.h" +#include "espi.h" #include "port80.h" #include "registers.h" #include "system.h" #include "task.h" -#include "tfdp_chip.h" #include "timer.h" #include "util.h" +#include "chipset.h" +#include "tfdp_chip.h" /* Console output macros */ #ifdef CONFIG_MCHP_DEBUG_LPC diff --git a/chip/mchp/pwm.c b/chip/mchp/pwm.c index 706228fa53..d0e88b5175 100644 --- a/chip/mchp/pwm.c +++ b/chip/mchp/pwm.c @@ -12,8 +12,8 @@ #include "pwm.h" #include "pwm_chip.h" #include "registers.h" -#include "tfdp_chip.h" #include "util.h" +#include "tfdp_chip.h" #define CPUTS(outstr) cputs(CC_PWM, outstr) #define CPRINTS(format, args...) cprints(CC_PWM, format, ##args) diff --git a/chip/mchp/qmspi.c b/chip/mchp/qmspi.c index a0d31b72e3..6979bdae6a 100644 --- a/chip/mchp/qmspi.c +++ b/chip/mchp/qmspi.c @@ -8,17 +8,17 @@ #include "common.h" #include "console.h" #include "dma.h" -#include "dma_chip.h" #include "gpio.h" -#include "hooks.h" -#include "qmspi_chip.h" #include "registers.h" #include "spi.h" -#include "spi_chip.h" -#include "task.h" -#include "tfdp_chip.h" #include "timer.h" #include "util.h" +#include "hooks.h" +#include "task.h" +#include "dma_chip.h" +#include "spi_chip.h" +#include "qmspi_chip.h" +#include "tfdp_chip.h" #define CPUTS(outstr) cputs(CC_SPI, outstr) #define CPRINTS(format, args...) cprints(CC_SPI, format, ##args) diff --git a/chip/mchp/qmspi_chip.h b/chip/mchp/qmspi_chip.h index 899f59516f..5a66c34e62 100644 --- a/chip/mchp/qmspi_chip.h +++ b/chip/mchp/qmspi_chip.h @@ -13,8 +13,8 @@ #ifndef _QMSPI_CHIP_H #define _QMSPI_CHIP_H -#include <stddef.h> #include <stdint.h> +#include <stddef.h> /* struct spi_device_t */ #include "spi.h" diff --git a/chip/mchp/spi.c b/chip/mchp/spi.c index 4445666790..195c10d8a6 100644 --- a/chip/mchp/spi.c +++ b/chip/mchp/spi.c @@ -9,14 +9,14 @@ #include "console.h" #include "dma.h" #include "gpio.h" -#include "hooks.h" -#include "qmspi_chip.h" #include "registers.h" #include "spi.h" -#include "spi_chip.h" -#include "task.h" #include "timer.h" #include "util.h" +#include "hooks.h" +#include "task.h" +#include "spi_chip.h" +#include "qmspi_chip.h" #if defined(CONFIG_MCHP_GPSPI) && !defined(LFW) #include "gpspi_chip.h" #endif diff --git a/chip/mchp/spi_chip.h b/chip/mchp/spi_chip.h index e651901ea4..f8c4c1169c 100644 --- a/chip/mchp/spi_chip.h +++ b/chip/mchp/spi_chip.h @@ -13,8 +13,8 @@ #ifndef _SPI_CHIP_H #define _SPI_CHIP_H -#include <stddef.h> #include <stdint.h> +#include <stddef.h> /* struct spi_device_t */ #include "spi.h" diff --git a/chip/mchp/system.c b/chip/mchp/system.c index 65470c43b9..bb5224c455 100644 --- a/chip/mchp/system.c +++ b/chip/mchp/system.c @@ -5,9 +5,11 @@ /* System module for Chrome EC : MCHP hardware specific implementation */ +#include <stdnoreturn.h> + +#include "common.h" /* includes config.h and board.h */ #include "clock.h" #include "clock_chip.h" -#include "common.h" /* includes config.h and board.h */ #include "console.h" #include "cpu.h" #include "gpio.h" @@ -23,8 +25,6 @@ #include "timer.h" #include "util.h" -#include <stdnoreturn.h> - #define CPUTS(outstr) cputs(CC_LPC, outstr) #define CPRINTS(format, args...) cprints(CC_LPC, format, ##args) diff --git a/chip/mchp/uart.c b/chip/mchp/uart.c index 59ea3e1c35..00bfc77e14 100644 --- a/chip/mchp/uart.c +++ b/chip/mchp/uart.c @@ -13,9 +13,9 @@ #include "registers.h" #include "system.h" #include "task.h" -#include "tfdp_chip.h" #include "uart.h" #include "util.h" +#include "tfdp_chip.h" #define TX_FIFO_SIZE 16 diff --git a/chip/mchp/watchdog.c b/chip/mchp/watchdog.c index 50edda70e0..0de4398fdb 100644 --- a/chip/mchp/watchdog.c +++ b/chip/mchp/watchdog.c @@ -8,8 +8,8 @@ #include "hooks.h" #include "registers.h" #include "task.h" -#include "tfdp_chip.h" #include "watchdog.h" +#include "tfdp_chip.h" void watchdog_reload(void) { diff --git a/chip/mt_scp/mt818x/ipi.c b/chip/mt_scp/mt818x/ipi.c index d0d9292fd1..723137d9c9 100644 --- a/chip/mt_scp/mt818x/ipi.c +++ b/chip/mt_scp/mt818x/ipi.c @@ -24,13 +24,13 @@ #include "console.h" #include "hooks.h" #include "host_command.h" -#include "hwtimer.h" #include "ipi_chip.h" #include "mkbp_event.h" #include "power.h" #include "system.h" #include "task.h" #include "util.h" +#include "hwtimer.h" #include "video.h" #define CPRINTF(format, args...) cprintf(CC_IPI, format, ##args) diff --git a/chip/mt_scp/mt818x/memmap.c b/chip/mt_scp/mt818x/memmap.c index 24c0fd8f7a..0ecb370cf3 100644 --- a/chip/mt_scp/mt818x/memmap.c +++ b/chip/mt_scp/mt818x/memmap.c @@ -11,8 +11,8 @@ #include "hooks.h" #include "memmap.h" #include "registers.h" -#include "task.h" #include "util.h" +#include "task.h" /* * Map SCP address (bits 31~28) to AP address diff --git a/chip/mt_scp/mt8192/clock.c b/chip/mt_scp/mt8192/clock.c index 21d07d410a..665695a7a2 100644 --- a/chip/mt_scp/mt8192/clock.c +++ b/chip/mt_scp/mt8192/clock.c @@ -5,6 +5,9 @@ /* Clocks, PLL and power settings */ +#include <assert.h> +#include <string.h> + #include "clock.h" #include "common.h" #include "console.h" @@ -14,9 +17,6 @@ #include "registers.h" #include "timer.h" -#include <assert.h> -#include <string.h> - #define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ##args) #define CPRINTS(format, args...) cprints(CC_CLOCK, format, ##args) diff --git a/chip/mt_scp/mt8195/clock.c b/chip/mt_scp/mt8195/clock.c index 779f356bab..2ed3fab4a1 100644 --- a/chip/mt_scp/mt8195/clock.c +++ b/chip/mt_scp/mt8195/clock.c @@ -5,6 +5,9 @@ /* Clocks, PLL and power settings */ +#include <assert.h> +#include <string.h> + #include "clock.h" #include "common.h" #include "console.h" @@ -17,9 +20,6 @@ #include "task.h" #include "timer.h" -#include <assert.h> -#include <string.h> - #define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ##args) #define CPRINTS(format, args...) cprints(CC_CLOCK, format, ##args) diff --git a/chip/npcx/adc.c b/chip/npcx/adc.c index 73d4ec48b3..f01419bf67 100644 --- a/chip/npcx/adc.c +++ b/chip/npcx/adc.c @@ -9,8 +9,8 @@ #include "atomic.h" #include "clock.h" #include "clock_chip.h" -#include "common.h" #include "console.h" +#include "common.h" #include "gpio.h" #include "hooks.h" #include "registers.h" diff --git a/chip/npcx/espi.c b/chip/npcx/espi.c index e73d04e988..d64a22860d 100644 --- a/chip/npcx/espi.c +++ b/chip/npcx/espi.c @@ -5,18 +5,18 @@ /* ESPI module for Chrome EC */ -#include "chipset.h" -#include "console.h" -#include "espi.h" -#include "hooks.h" -#include "lpc_chip.h" -#include "power.h" #include "registers.h" #include "system.h" #include "task.h" -#include "timer.h" +#include "chipset.h" +#include "console.h" #include "uart.h" #include "util.h" +#include "power.h" +#include "espi.h" +#include "lpc_chip.h" +#include "hooks.h" +#include "timer.h" /* Console output macros */ #if !(DEBUG_ESPI) @@ -274,9 +274,6 @@ void espi_wait_vw_not_dirty(enum espi_vw_signal signal, unsigned int timeout_us) uint64_t timeout; sig_idx = espi_vw_get_signal_index(signal); - /* Cannot find signal index */ - if (sig_idx < 0) - return; for (offset = 0; offset < ESPI_VWEVSM_NUM; offset++) { uint8_t vw_idx = VWEVSM_IDX_GET(NPCX_VWEVSM(offset)); diff --git a/chip/npcx/fan.c b/chip/npcx/fan.c index 9ceccaba33..6a246f5c6a 100644 --- a/chip/npcx/fan.c +++ b/chip/npcx/fan.c @@ -7,19 +7,20 @@ #include "clock.h" #include "clock_chip.h" -#include "console.h" #include "fan.h" #include "fan_chip.h" #include "gpio.h" #include "hooks.h" -#include "math_util.h" +#include "registers.h" +#include "util.h" #include "pwm.h" #include "pwm_chip.h" -#include "registers.h" -#include "system.h" -#include "task.h" +#include "console.h" #include "timer.h" -#include "util.h" +#include "task.h" +#include "hooks.h" +#include "system.h" +#include "math_util.h" #if !(DEBUG_FAN) #define CPRINTS(...) diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c index dc8de6e3ee..390cb1fa64 100644 --- a/chip/npcx/flash.c +++ b/chip/npcx/flash.c @@ -6,18 +6,18 @@ /* Flash memory module for Chrome EC */ #include "builtin/assert.h" -#include "console.h" #include "flash.h" #include "host_command.h" -#include "hwtimer_chip.h" #include "registers.h" #include "spi_flash_reg.h" #include "switch.h" #include "system.h" -#include "task.h" #include "timer.h" #include "util.h" +#include "task.h" #include "watchdog.h" +#include "console.h" +#include "hwtimer_chip.h" static int all_protected; /* Has all-flash protection been requested? */ static int addr_prot_start; diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c index a976b3b122..4127b79e30 100644 --- a/chip/npcx/gpio.c +++ b/chip/npcx/gpio.c @@ -7,19 +7,19 @@ #include "builtin/assert.h" #include "common.h" -#include "ec_commands.h" #include "gpio.h" #include "gpio_chip.h" -#include "hooks.h" -#include "host_command.h" -#include "hwtimer_chip.h" #include "i2c.h" +#include "hooks.h" #include "registers.h" -#include "system.h" -#include "system_chip.h" #include "task.h" #include "timer.h" #include "util.h" +#include "system.h" +#include "system_chip.h" +#include "ec_commands.h" +#include "host_command.h" +#include "hwtimer_chip.h" #if !(DEBUG_GPIO) #define CPUTS(...) diff --git a/chip/npcx/header.c b/chip/npcx/header.c index 81e5e986af..2db7d9094c 100644 --- a/chip/npcx/header.c +++ b/chip/npcx/header.c @@ -10,11 +10,11 @@ * This header is used by Nuvoton EC Booter. */ +#include <stdint.h> + #include "config.h" #include "registers.h" -#include <stdint.h> - /* Signature used by fw header */ #define SIG_FW_EC 0x2A3B4D5E diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c index e2e2fe4b19..dfa06f69b2 100644 --- a/chip/npcx/hwtimer.c +++ b/chip/npcx/hwtimer.c @@ -8,12 +8,12 @@ #include "clock.h" #include "clock_chip.h" #include "common.h" -#include "console.h" #include "hooks.h" #include "hwtimer.h" #include "hwtimer_chip.h" #include "math_util.h" #include "registers.h" +#include "console.h" #include "task.h" #include "timer.h" #include "util.h" diff --git a/chip/npcx/keyboard_raw.c b/chip/npcx/keyboard_raw.c index 1774e7353d..cb2be7911e 100644 --- a/chip/npcx/keyboard_raw.c +++ b/chip/npcx/keyboard_raw.c @@ -5,11 +5,11 @@ /* Functions needed by keyboard scanner module for Chrome EC */ -#include "clock.h" #include "common.h" -#include "gpio.h" #include "keyboard_raw.h" #include "keyboard_scan.h" +#include "clock.h" +#include "gpio.h" #include "registers.h" #include "task.h" diff --git a/chip/npcx/lct.c b/chip/npcx/lct.c index 8f720e1376..19568cac44 100644 --- a/chip/npcx/lct.c +++ b/chip/npcx/lct.c @@ -4,9 +4,9 @@ */ /* LCT (Long Countdown Timer) module for Chrome EC */ +#include "lct_chip.h" #include "console.h" #include "hooks.h" -#include "lct_chip.h" #include "registers.h" #include "rtc.h" #include "task.h" diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index b44420e025..48e094f3fc 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -20,12 +20,12 @@ #include "lpc_chip.h" #include "port80.h" #include "registers.h" -#include "sib_chip.h" #include "system.h" -#include "system_chip.h" +#include "sib_chip.h" #include "task.h" #include "uart.h" #include "util.h" +#include "system_chip.h" /* Console output macros */ #if !(DEBUG_LPC) diff --git a/chip/npcx/peci.c b/chip/npcx/peci.c index 8a4372f7bd..7c213648f4 100644 --- a/chip/npcx/peci.c +++ b/chip/npcx/peci.c @@ -15,8 +15,8 @@ #include "peci.h" #include "registers.h" #include "task.h" -#include "temp_sensor.h" #include "timer.h" +#include "temp_sensor.h" #include "util.h" /* Initial PECI baud rate */ diff --git a/chip/npcx/ps2.c b/chip/npcx/ps2.c index 5fc91ef241..a8a65e63ea 100644 --- a/chip/npcx/ps2.c +++ b/chip/npcx/ps2.c @@ -8,11 +8,11 @@ #include "atomic.h" #include "clock.h" #include "console.h" -#include "gpio.h" #include "hooks.h" +#include "gpio.h" #include "ps2_chip.h" -#include "registers.h" #include "task.h" +#include "registers.h" #include "timer.h" #include "util.h" diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h index a583fb1c64..922d787323 100644 --- a/chip/npcx/registers.h +++ b/chip/npcx/registers.h @@ -8,9 +8,9 @@ #ifndef __CROS_EC_REGISTERS_H #define __CROS_EC_REGISTERS_H -#include "clock_chip.h" #include "common.h" #include "compile_time_macros.h" +#include "clock_chip.h" /******************************************************************************/ /* diff --git a/chip/npcx/sha256_chip.c b/chip/npcx/sha256_chip.c index 4d90ba6e74..e2590cad65 100644 --- a/chip/npcx/sha256_chip.c +++ b/chip/npcx/sha256_chip.c @@ -32,7 +32,7 @@ enum ncl_sha_type { * The base address of the table that holds the function pointer for each * SHA256 API in ROM. */ -#define NCL_SHA_BASE_ADDR 0x0000013CUL +#define NCL_SHA_BASE_ADDR 0x00000100UL struct ncl_sha { /* Get the SHA context size required by SHA APIs. */ uint32_t (*get_context_size)(void); diff --git a/chip/npcx/shi.c b/chip/npcx/shi.c index dde2243462..d5f19c9191 100644 --- a/chip/npcx/shi.c +++ b/chip/npcx/shi.c @@ -15,12 +15,12 @@ #include "clock.h" #include "console.h" #include "gpio.h" +#include "task.h" #include "hooks.h" #include "host_command.h" #include "registers.h" #include "spi.h" #include "system.h" -#include "task.h" #include "timer.h" #include "util.h" diff --git a/chip/npcx/spi.c b/chip/npcx/spi.c index bbe6b33a9d..0161ce63ef 100644 --- a/chip/npcx/spi.c +++ b/chip/npcx/spi.c @@ -5,11 +5,11 @@ /* SPI module for Chrome EC */ -#include "clock.h" -#include "clock_chip.h" #include "console.h" #include "gpio.h" #include "hooks.h" +#include "clock.h" +#include "clock_chip.h" #include "registers.h" #include "spi.h" #include "task.h" diff --git a/chip/npcx/spiflashfw/npcx_monitor.c b/chip/npcx/spiflashfw/npcx_monitor.c index 0d8530a456..5b7a767992 100644 --- a/chip/npcx/spiflashfw/npcx_monitor.c +++ b/chip/npcx/spiflashfw/npcx_monitor.c @@ -5,13 +5,12 @@ * NPCX SoC spi flash update tool - monitor firmware */ +#include <stdint.h> #include "config.h" #include "npcx_monitor.h" #include "registers.h" #include "util.h" -#include <stdint.h> - /*****************************************************************************/ /* spi flash internal functions */ void sspi_flash_pinmux(int enable) diff --git a/chip/npcx/system-npcx7.c b/chip/npcx/system-npcx7.c index 386544ed04..5cacbec749 100644 --- a/chip/npcx/system-npcx7.c +++ b/chip/npcx/system-npcx7.c @@ -11,16 +11,16 @@ #include "console.h" #include "cpu.h" #include "ec_commands.h" -#include "gpio.h" #include "hooks.h" -#include "hwtimer_chip.h" #include "lct_chip.h" #include "registers.h" -#include "rom_chip.h" #include "system.h" -#include "system_chip.h" #include "task.h" #include "util.h" +#include "gpio.h" +#include "hwtimer_chip.h" +#include "system_chip.h" +#include "rom_chip.h" #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) #define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) diff --git a/chip/npcx/system-npcx9.c b/chip/npcx/system-npcx9.c index 386544ed04..5cacbec749 100644 --- a/chip/npcx/system-npcx9.c +++ b/chip/npcx/system-npcx9.c @@ -11,16 +11,16 @@ #include "console.h" #include "cpu.h" #include "ec_commands.h" -#include "gpio.h" #include "hooks.h" -#include "hwtimer_chip.h" #include "lct_chip.h" #include "registers.h" -#include "rom_chip.h" #include "system.h" -#include "system_chip.h" #include "task.h" #include "util.h" +#include "gpio.h" +#include "hwtimer_chip.h" +#include "system_chip.h" +#include "rom_chip.h" #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) #define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) diff --git a/chip/npcx/uart.c b/chip/npcx/uart.c index d77c3579c5..bc87b5921e 100644 --- a/chip/npcx/uart.c +++ b/chip/npcx/uart.c @@ -6,7 +6,6 @@ /* UART module for Chrome EC */ #include "clock.h" -#include "clock_chip.h" #include "common.h" #include "console.h" #include "gpio.h" @@ -14,6 +13,7 @@ #include "hwtimer_chip.h" #include "lpc.h" #include "registers.h" +#include "clock_chip.h" #include "system.h" #include "task.h" #include "timer.h" diff --git a/chip/npcx/uartn.c b/chip/npcx/uartn.c index 66cb30062b..9bcaccd94c 100644 --- a/chip/npcx/uartn.c +++ b/chip/npcx/uartn.c @@ -6,16 +6,15 @@ /* UART module for Chrome EC */ +#include <clock.h> #include "common.h" +#include <gpio.h> +#include <gpio_chip.h> #include "registers.h" #include "system.h" #include "task.h" #include "util.h" -#include <clock.h> -#include <gpio.h> -#include <gpio_chip.h> - #ifdef NPCX_UART_FIFO_SUPPORT /* Enable UART Tx FIFO empty interrupt */ #define NPCX_UART_TX_EMPTY_INT_EN(n) \ diff --git a/chip/npcx/watchdog.c b/chip/npcx/watchdog.c index 7998378565..8ae9ee0474 100644 --- a/chip/npcx/watchdog.c +++ b/chip/npcx/watchdog.c @@ -8,14 +8,14 @@ #include "clock.h" #include "common.h" #include "console.h" +#include "registers.h" +#include "hwtimer_chip.h" #include "gpio.h" #include "hooks.h" -#include "hwtimer_chip.h" -#include "registers.h" -#include "system_chip.h" -#include "task.h" #include "timer.h" +#include "task.h" #include "util.h" +#include "system_chip.h" #include "watchdog.h" /* WDCNT value for watchdog period */ diff --git a/chip/stm32/adc-stm32l.c b/chip/stm32/adc-stm32l.c index 06b16224f7..636710f071 100644 --- a/chip/stm32/adc-stm32l.c +++ b/chip/stm32/adc-stm32l.c @@ -4,9 +4,9 @@ */ #include "adc.h" -#include "clock.h" #include "common.h" #include "console.h" +#include "clock.h" #include "dma.h" #include "hooks.h" #include "registers.h" diff --git a/chip/stm32/bkpdata.c b/chip/stm32/bkpdata.c index ef5729d118..bde026facd 100644 --- a/chip/stm32/bkpdata.c +++ b/chip/stm32/bkpdata.c @@ -3,13 +3,13 @@ * found in the LICENSE file. */ +#include <assert.h> + #include "bkpdata.h" #include "registers.h" #include "system.h" /* enum system_bbram_idx */ #include "task.h" -#include <assert.h> - uint16_t bkpdata_read(enum bkpdata_index index) { if (index < 0 || index >= STM32_BKP_ENTRIES) diff --git a/chip/stm32/build.mk b/chip/stm32/build.mk index 72984eec5f..1fc14a15fa 100644 --- a/chip/stm32/build.mk +++ b/chip/stm32/build.mk @@ -33,6 +33,8 @@ CORE:=cortex-m CFLAGS_CPU+=-mcpu=cortex-m3 endif +# Select between 16-bit and 32-bit timer for clock source +TIMER_TYPE=$(if $(CONFIG_STM_HWTIMER32),32,) DMA_TYPE=$(if $(CHIP_FAMILY_STM32F4)$(CHIP_FAMILY_STM32H7),-stm32f4,) SPI_TYPE=$(if $(CHIP_FAMILY_STM32H7),-stm32h7,) @@ -46,7 +48,7 @@ chip-$(CONFIG_FPU)+=fpu.o chip-$(CONFIG_SPI)+=spi.o chip-$(CONFIG_SPI_CONTROLLER)+=spi_controller$(SPI_TYPE).o chip-$(CONFIG_COMMON_GPIO)+=gpio.o gpio-$(CHIP_FAMILY).o -chip-$(CONFIG_COMMON_TIMER)+=hwtimer32.o +chip-$(CONFIG_COMMON_TIMER)+=hwtimer$(TIMER_TYPE).o chip-$(CONFIG_I2C)+=i2c-$(CHIP_FAMILY).o chip-$(CONFIG_ITE_FLASH_SUPPORT)+=i2c_ite_flash_support.o chip-$(CONFIG_STREAM_USART)+=usart.o usart-$(CHIP_FAMILY).o diff --git a/chip/stm32/clock-f.c b/chip/stm32/clock-f.c index 0aad58ab00..d181397d86 100644 --- a/chip/stm32/clock-f.c +++ b/chip/stm32/clock-f.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32f0.c b/chip/stm32/clock-stm32f0.c index 18c089b036..3b56382fdb 100644 --- a/chip/stm32/clock-stm32f0.c +++ b/chip/stm32/clock-stm32f0.c @@ -6,8 +6,8 @@ /* Clocks and power management settings */ #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32f3.c b/chip/stm32/clock-stm32f3.c index 5b17fe56eb..7d2b3de7f2 100644 --- a/chip/stm32/clock-stm32f3.c +++ b/chip/stm32/clock-stm32f3.c @@ -6,8 +6,8 @@ /* Clocks and power management settings */ #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32f4.c b/chip/stm32/clock-stm32f4.c index 15cf8a45e2..479faac7da 100644 --- a/chip/stm32/clock-stm32f4.c +++ b/chip/stm32/clock-stm32f4.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32g4.c b/chip/stm32/clock-stm32g4.c index 962fdc37f2..dbb8fd88cb 100644 --- a/chip/stm32/clock-stm32g4.c +++ b/chip/stm32/clock-stm32g4.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32h7.c b/chip/stm32/clock-stm32h7.c index 3e6ba679cb..67e17f4174 100644 --- a/chip/stm32/clock-stm32h7.c +++ b/chip/stm32/clock-stm32h7.c @@ -13,6 +13,8 @@ * but at least yields predictable behavior. */ +#include <stdbool.h> + #include "builtin/assert.h" #include "chipset.h" #include "clock.h" @@ -27,8 +29,6 @@ #include "uart.h" #include "util.h" -#include <stdbool.h> - /* Check chip family and variant for compatibility */ #ifndef CHIP_FAMILY_STM32H7 #error Source clock-stm32h7.c does not support this chip family. diff --git a/chip/stm32/clock-stm32l4.c b/chip/stm32/clock-stm32l4.c index 412771163c..77e807c1ad 100644 --- a/chip/stm32/clock-stm32l4.c +++ b/chip/stm32/clock-stm32l4.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-l4.h" #include "clock.h" +#include "clock-l4.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h index d35b3ccbcf..ae069ed005 100644 --- a/chip/stm32/config-stm32l15x.h +++ b/chip/stm32/config-stm32l15x.h @@ -24,19 +24,8 @@ #define CONFIG_RAM_BASE 0x20000000 #define CONFIG_RAM_SIZE 0x00004000 -/* Number of IRQ vectors on the NVIC - * - * Section 10.1 "Nested vectored interrupt controller (NVIC)" states: - * 45 maskable interrupt channels in Cat.1 and Cat.2 devices (see Table 49) - * 54 maskable interrupt channels in Cat.3 devices (see Table 50) and 57 - * channels in Cat.4, Cat.5 and Cat.6 devices (see Table 51). - * - * The only STM32L15 that we support is the "discovery" board is a "Category - * 3" device. See Section 1.5 "Product Category definition". - * - * https://www.st.com/resource/en/reference_manual/cd00240193-stm32l100xx-stm32l151xx-stm32l152xx-and-stm32l162xx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf - */ -#define CONFIG_IRQ_COUNT 54 +/* Number of IRQ vectors on the NVIC */ +#define CONFIG_IRQ_COUNT 45 /* Lots of RAM, so use bigger UART buffer */ #undef CONFIG_UART_TX_BUF_SIZE diff --git a/chip/stm32/flash-f.c b/chip/stm32/flash-f.c index 2673201472..9bfdb1b6b7 100644 --- a/chip/stm32/flash-f.c +++ b/chip/stm32/flash-f.c @@ -5,23 +5,22 @@ /* Common flash memory module for STM32F and STM32F0 */ +#include <stdbool.h> #include "battery.h" #include "builtin/assert.h" -#include "clock.h" #include "console.h" -#include "flash-f.h" +#include "clock.h" #include "flash.h" +#include "flash-f.h" #include "hooks.h" -#include "panic.h" #include "registers.h" +#include "panic.h" #include "system.h" #include "task.h" #include "timer.h" #include "util.h" #include "watchdog.h" -#include <stdbool.h> - #define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) diff --git a/chip/stm32/flash-stm32f3.c b/chip/stm32/flash-stm32f3.c index c41f9c526d..8705e4d657 100644 --- a/chip/stm32/flash-stm32f3.c +++ b/chip/stm32/flash-stm32f3.c @@ -5,16 +5,15 @@ /* Flash memory module for stm32f3 and stm32f4 */ +#include <stdbool.h> #include "common.h" +#include "flash.h" #include "flash-f.h" #include "flash-regs.h" -#include "flash.h" #include "hooks.h" -#include "panic.h" #include "registers.h" #include "system.h" - -#include <stdbool.h> +#include "panic.h" /*****************************************************************************/ /* Physical layer APIs */ diff --git a/chip/stm32/flash-stm32f4.c b/chip/stm32/flash-stm32f4.c index c41f9c526d..8705e4d657 100644 --- a/chip/stm32/flash-stm32f4.c +++ b/chip/stm32/flash-stm32f4.c @@ -5,16 +5,15 @@ /* Flash memory module for stm32f3 and stm32f4 */ +#include <stdbool.h> #include "common.h" +#include "flash.h" #include "flash-f.h" #include "flash-regs.h" -#include "flash.h" #include "hooks.h" -#include "panic.h" #include "registers.h" #include "system.h" - -#include <stdbool.h> +#include "panic.h" /*****************************************************************************/ /* Physical layer APIs */ diff --git a/chip/stm32/flash-stm32g4-l4.c b/chip/stm32/flash-stm32g4-l4.c index ad08047c23..31dba5c887 100644 --- a/chip/stm32/flash-stm32g4-l4.c +++ b/chip/stm32/flash-stm32g4-l4.c @@ -4,12 +4,12 @@ */ /* Flash memory module for STM32L4 family */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "flash.h" #include "hooks.h" -#include "panic.h" #include "registers.h" +#include "panic.h" #include "system.h" #include "task.h" #include "timer.h" diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c index 2b9b594938..445b354e57 100644 --- a/chip/stm32/flash-stm32h7.c +++ b/chip/stm32/flash-stm32h7.c @@ -4,14 +4,14 @@ */ /* Flash memory module for STM32H7 family */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "cpu.h" -#include "flash-regs.h" #include "flash.h" +#include "flash-regs.h" #include "hooks.h" -#include "panic.h" #include "registers.h" +#include "panic.h" #include "system.h" #include "task.h" #include "timer.h" diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c new file mode 100644 index 0000000000..3521347f3f --- /dev/null +++ b/chip/stm32/hwtimer.c @@ -0,0 +1,481 @@ +/* Copyright 2012 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Hardware timers driver */ + +#include "builtin/assert.h" +#include "clock.h" +#include "clock-f.h" +#include "common.h" +#include "hooks.h" +#include "hwtimer.h" +#include "panic.h" +#include "registers.h" +#include "task.h" +#include "timer.h" +#include "watchdog.h" + +/* + * Trigger select mapping for secondary timer from primary timer. This is + * unfortunately not very straightforward; there's no tidy way to do this + * algorithmically. To avoid burning memory for a lookup table, use macros to + * compute the offset. This also has the benefit that compilation will fail if + * an unsupported primary/secondary pairing is used. + */ +#ifdef CHIP_FAMILY_STM32F0 +/* + * Secondary Primary + * 1 15 2 3 17 + * 2 1 15 3 14 + * 3 1 2 15 14 + * 15 2 3 16 17 + * -------------------- + * ts = 0 1 2 3 + */ +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_15 0 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_17 3 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_1 0 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_15 1 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_1 0 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_15 2 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_16 2 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_17 3 +#elif defined(CHIP_FAMILY_STM32F3) +/* + * Secondary Primary + * 2 19 15 3 14 + * 3 19 2 5 14 + * 4 19 2 3 15 + * 5 2 3 4 15 + * 12 4 5 13 14 + * 19 2 3 15 16 + * --------------------- + * ts = 0 1 2 3 + */ +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_19 0 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_15 1 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_19 0 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_5 2 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_19 0 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_15 3 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_4 2 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_15 3 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_4 0 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_5 1 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_13 2 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_15 2 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_16 3 +#else /* !CHIP_FAMILY_STM32F0 && !CHIP_FAMILY_STM32F3 */ +/* + * Secondary Primary + * 1 15 2 3 4 (STM32F100 only) + * 2 9 10 3 4 + * 3 9 2 11 4 + * 4 10 2 3 9 + * 9 2 3 10 11 (STM32L15x only) + * -------------------- + * ts = 0 1 2 3 + */ +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_15 0 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_4 3 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_9 0 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_10 1 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_4 3 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_9 0 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_11 2 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_4 3 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_10 0 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_9 3 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_10 2 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_11 3 +#endif /* !CHIP_FAMILY_STM32F0 */ +#define TSMAP(secondary, primary) \ + CONCAT4(STM32_TIM_TS_SECONDARY_, secondary, _PRIMARY_, primary) + +/* + * Timers are defined per board. This gives us flexibility to work around + * timers which are dedicated to board-specific PWM sources. + */ +#define IRQ_MSB IRQ_TIM(TIM_CLOCK_MSB) +#define IRQ_LSB IRQ_TIM(TIM_CLOCK_LSB) +#define IRQ_WD IRQ_TIM(TIM_WATCHDOG) + +/* TIM1 has fancy names for its IRQs; remap count-up IRQ for the macro above */ +#if defined TIM_WATCHDOG && (TIM_WATCHDOG == 1) +#define STM32_IRQ_TIM1 STM32_IRQ_TIM1_BRK_UP_TRG +#else /* !(TIM_WATCHDOG == 1) */ +#define STM32_IRQ_TIM1 STM32_IRQ_TIM1_CC +#endif /* !(TIM_WATCHDOG == 1) */ + +#define TIM_BASE(n) CONCAT3(STM32_TIM, n, _BASE) +#define TIM_WD_BASE TIM_BASE(TIM_WATCHDOG) + +static uint32_t last_deadline; + +void __hw_clock_event_set(uint32_t deadline) +{ + last_deadline = deadline; + + if ((deadline >> 16) > STM32_TIM_CNT(TIM_CLOCK_MSB)) { + /* first set a match on the MSB */ + STM32_TIM_CCR1(TIM_CLOCK_MSB) = deadline >> 16; + /* disable LSB match */ + STM32_TIM_DIER(TIM_CLOCK_LSB) &= ~2; + /* Clear the match flags */ + STM32_TIM_SR(TIM_CLOCK_MSB) = ~2; + STM32_TIM_SR(TIM_CLOCK_LSB) = ~2; + /* Set the match interrupt */ + STM32_TIM_DIER(TIM_CLOCK_MSB) |= 2; + } + /* + * In the unlikely case where the MSB has increased and matched + * the deadline MSB before we set the match interrupt, as the STM + * hardware timer won't trigger an interrupt, we fall back to the + * following LSB event code to set another interrupt. + */ + if ((deadline >> 16) == STM32_TIM_CNT(TIM_CLOCK_MSB)) { + /* we can set a match on the LSB only */ + STM32_TIM_CCR1(TIM_CLOCK_LSB) = deadline & 0xffff; + /* disable MSB match */ + STM32_TIM_DIER(TIM_CLOCK_MSB) &= ~2; + /* Clear the match flags */ + STM32_TIM_SR(TIM_CLOCK_MSB) = ~2; + STM32_TIM_SR(TIM_CLOCK_LSB) = ~2; + /* Set the match interrupt */ + STM32_TIM_DIER(TIM_CLOCK_LSB) |= 2; + } + /* + * If the LSB deadline is already in the past and won't trigger an + * interrupt, the common code in process_timers will deal with the + * expired timer and automatically set the next deadline, we don't need + * to do anything here. + */ +} + +uint32_t __hw_clock_event_get(void) +{ + return last_deadline; +} + +void __hw_clock_event_clear(void) +{ + /* Disable the match interrupts */ + STM32_TIM_DIER(TIM_CLOCK_LSB) &= ~2; + STM32_TIM_DIER(TIM_CLOCK_MSB) &= ~2; +} + +uint32_t __hw_clock_source_read(void) +{ + uint32_t hi; + uint32_t lo; + + /* Ensure the two half-words are coherent */ + do { + hi = STM32_TIM_CNT(TIM_CLOCK_MSB); + lo = STM32_TIM_CNT(TIM_CLOCK_LSB); + } while (hi != STM32_TIM_CNT(TIM_CLOCK_MSB)); + + return (hi << 16) | lo; +} + +void __hw_clock_source_set(uint32_t ts) +{ + ASSERT(!is_interrupt_enabled()); + + /* Stop counting (LSB first, then MSB) */ + STM32_TIM_CR1(TIM_CLOCK_LSB) &= ~1; + STM32_TIM_CR1(TIM_CLOCK_MSB) &= ~1; + + /* Set new value to counters */ + STM32_TIM_CNT(TIM_CLOCK_MSB) = ts >> 16; + STM32_TIM_CNT(TIM_CLOCK_LSB) = ts & 0xffff; + + /* + * Clear status. We may clear information other than timer overflow + * (eg. event timestamp was matched) but: + * - Bits other than overflow are unused (see __hw_clock_source_irq()) + * - After setting timestamp software will trigger timer interrupt using + * task_trigger_irq() (see force_time() in common/timer.c). + * process_timers() is called from timer interrupt, so if "match" bit + * was present in status (think: some task timers are expired) + * process_timers() will handle that correctly. + */ + STM32_TIM_SR(TIM_CLOCK_MSB) = 0; + STM32_TIM_SR(TIM_CLOCK_LSB) = 0; + + /* Start counting (MSB first, then LSB) */ + STM32_TIM_CR1(TIM_CLOCK_MSB) |= 1; + STM32_TIM_CR1(TIM_CLOCK_LSB) |= 1; +} + +static void __hw_clock_source_irq(void) +{ + uint32_t stat_tim_msb = STM32_TIM_SR(TIM_CLOCK_MSB); + + /* Clear status */ + STM32_TIM_SR(TIM_CLOCK_LSB) = 0; + STM32_TIM_SR(TIM_CLOCK_MSB) = 0; + + /* + * Find expired timers and set the new timer deadline + * signal overflow if the 16-bit MSB counter has overflowed. + */ + process_timers(stat_tim_msb & 0x01); +} +DECLARE_IRQ(IRQ_MSB, __hw_clock_source_irq, 1); +DECLARE_IRQ(IRQ_LSB, __hw_clock_source_irq, 1); + +void __hw_timer_enable_clock(int n, int enable) +{ + volatile uint32_t *reg; + uint32_t mask = 0; + + /* + * Mapping of timers to reg/mask is split into a few different ranges, + * some specific to individual chips. + */ +#if defined(CHIP_FAMILY_STM32F0) + if (n == 1) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM1; + } +#elif defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F4) + if (n >= 9 && n <= 11) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM9 << (n - 9); + } +#endif + +#if defined(CHIP_FAMILY_STM32F0) + if (n >= 15 && n <= 17) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM15 << (n - 15); + } +#endif + +#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32F3) + if (n == 14) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM14; + } +#endif + +#if defined(CHIP_FAMILY_STM32F3) + if (n == 12 || n == 13) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM12 << (n - 12); + } + if (n == 18) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM18; + } + if (n == 19) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM19; + } +#endif + + if (n >= 2 && n <= 7) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM2 << (n - 2); + } + + if (!mask) + return; + + if (enable) + *reg |= mask; + else + *reg &= ~mask; +} + +static void update_prescaler(void) +{ + /* + * Pre-scaler value : + * TIM_CLOCK_LSB is counting microseconds; + * TIM_CLOCK_MSB is counting every TIM_CLOCK_LSB overflow. + * + * This will take effect at the next update event (when the current + * prescaler counter ticks down, or if forced via EGR). + */ + STM32_TIM_PSC(TIM_CLOCK_MSB) = 0; + STM32_TIM_PSC(TIM_CLOCK_LSB) = (clock_get_timer_freq() / SECOND) - 1; +} +DECLARE_HOOK(HOOK_FREQ_CHANGE, update_prescaler, HOOK_PRIO_DEFAULT); + +int __hw_clock_source_init(uint32_t start_t) +{ + /* + * we use 2 chained 16-bit counters to emulate a 32-bit one : + * TIM_CLOCK_MSB is the MSB (Secondary) + * TIM_CLOCK_LSB is the LSB (Primary) + */ + + /* Enable TIM_CLOCK_MSB and TIM_CLOCK_LSB clocks */ + __hw_timer_enable_clock(TIM_CLOCK_MSB, 1); + __hw_timer_enable_clock(TIM_CLOCK_LSB, 1); + + /* Delay 1 APB clock cycle after the clock is enabled */ + clock_wait_bus_cycles(BUS_APB, 1); + + /* + * Timer configuration : Upcounter, counter disabled, update event only + * on overflow. + */ + STM32_TIM_CR1(TIM_CLOCK_MSB) = 0x0004; + STM32_TIM_CR1(TIM_CLOCK_LSB) = 0x0004; + /* + * TIM_CLOCK_LSB (primary mode) generates a periodic trigger signal on + * each UEV + */ + STM32_TIM_CR2(TIM_CLOCK_MSB) = 0x0000; + STM32_TIM_CR2(TIM_CLOCK_LSB) = 0x0020; + + STM32_TIM_SMCR(TIM_CLOCK_MSB) = + 0x0007 | (TSMAP(TIM_CLOCK_MSB, TIM_CLOCK_LSB) << 4); + STM32_TIM_SMCR(TIM_CLOCK_LSB) = 0x0000; + + /* Auto-reload value : 16-bit free-running counters */ + STM32_TIM_ARR(TIM_CLOCK_MSB) = 0xffff; + STM32_TIM_ARR(TIM_CLOCK_LSB) = 0xffff; + + /* Update prescaler */ + update_prescaler(); + + /* Reload the pre-scaler */ + STM32_TIM_EGR(TIM_CLOCK_MSB) = 0x0001; + STM32_TIM_EGR(TIM_CLOCK_LSB) = 0x0001; + + /* Set up the overflow interrupt on TIM_CLOCK_MSB */ + STM32_TIM_DIER(TIM_CLOCK_MSB) = 0x0001; + STM32_TIM_DIER(TIM_CLOCK_LSB) = 0x0000; + + /* Override the count with the start value */ + STM32_TIM_CNT(TIM_CLOCK_MSB) = start_t >> 16; + STM32_TIM_CNT(TIM_CLOCK_LSB) = start_t & 0xffff; + + /* Start counting */ + STM32_TIM_CR1(TIM_CLOCK_MSB) |= 1; + STM32_TIM_CR1(TIM_CLOCK_LSB) |= 1; + + /* Enable timer interrupts */ + task_enable_irq(IRQ_MSB); + task_enable_irq(IRQ_LSB); + + return IRQ_LSB; +} + +#ifdef CONFIG_WATCHDOG_HELP + +void __keep watchdog_check(uint32_t excep_lr, uint32_t excep_sp) +{ + struct timer_ctlr *timer = (struct timer_ctlr *)TIM_WD_BASE; + + /* clear status */ + timer->sr = 0; + + watchdog_trace(excep_lr, excep_sp); +} + +void IRQ_HANDLER(IRQ_WD)(void) __attribute__((naked)); +void IRQ_HANDLER(IRQ_WD)(void) +{ + /* Naked call so we can extract raw LR and SP */ + asm volatile("mov r0, lr\n" + "mov r1, sp\n" + /* Must push registers in pairs to keep 64-bit aligned + * stack for ARM EABI. */ + "push {r0, lr}\n" + "bl watchdog_check\n" + "pop {r0,pc}\n"); +} +const struct irq_priority __keep IRQ_PRIORITY(IRQ_WD) + __attribute__((section(".rodata.irqprio"))) = { + IRQ_WD, 0 + }; /* put the watchdog + at the highest + priority + */ + +void hwtimer_setup_watchdog(void) +{ + struct timer_ctlr *timer = (struct timer_ctlr *)TIM_WD_BASE; + + /* Enable clock */ + __hw_timer_enable_clock(TIM_WATCHDOG, 1); + + /* Delay 1 APB clock cycle after the clock is enabled */ + clock_wait_bus_cycles(BUS_APB, 1); + + /* + * Timer configuration : Down counter, counter disabled, update + * event only on overflow. + */ + timer->cr1 = 0x0014 | BIT(7); + + /* TIM (secondary mode) uses TIM_CLOCK_LSB as internal trigger */ + timer->smcr = 0x0007 | (TSMAP(TIM_WATCHDOG, TIM_CLOCK_LSB) << 4); + + /* + * The auto-reload value is based on the period between rollovers for + * TIM_CLOCK_LSB. Since TIM_CLOCK_LSB runs at 1MHz, it will overflow + * in 65.536ms. We divide our required watchdog period by this amount + * to obtain the number of times TIM_CLOCK_LSB can overflow before we + * generate an interrupt. + */ + timer->arr = timer->cnt = CONFIG_AUX_TIMER_PERIOD_MS * MSEC / BIT(16); + + /* count on every TIM_CLOCK_LSB overflow */ + timer->psc = 0; + + /* Reload the pre-scaler from arr when it goes below zero */ + timer->egr = 0x0000; + + /* setup the overflow interrupt */ + timer->dier = 0x0001; + + /* Start counting */ + timer->cr1 |= 1; + + /* Enable timer interrupts */ + task_enable_irq(IRQ_WD); +} + +void hwtimer_reset_watchdog(void) +{ + struct timer_ctlr *timer = (struct timer_ctlr *)TIM_WD_BASE; + + timer->cnt = timer->arr; +} + +#endif /* defined(CONFIG_WATCHDOG_HELP) */ diff --git a/chip/stm32/hwtimer32.c b/chip/stm32/hwtimer32.c index ebe46d8316..0448d34e4b 100644 --- a/chip/stm32/hwtimer32.c +++ b/chip/stm32/hwtimer32.c @@ -6,8 +6,8 @@ /* Hardware 32-bit timer driver */ #include "builtin/assert.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "hooks.h" #include "hwtimer.h" diff --git a/chip/stm32/i2c-stm32l4.c b/chip/stm32/i2c-stm32l4.c index bb24a8a50f..eeb87ec4e0 100644 --- a/chip/stm32/i2c-stm32l4.c +++ b/chip/stm32/i2c-stm32l4.c @@ -4,6 +4,7 @@ */ #include "builtin/assert.h" +#include "printf.h" #include "chipset.h" #include "clock.h" #include "common.h" @@ -12,8 +13,8 @@ #include "hooks.h" #include "hwtimer.h" #include "i2c.h" -#include "printf.h" #include "registers.h" + #include "system.h" #include "task.h" #include "timer.h" diff --git a/chip/stm32/i2c_ite_flash_support.c b/chip/stm32/i2c_ite_flash_support.c index 335064572b..8482065086 100644 --- a/chip/stm32/i2c_ite_flash_support.c +++ b/chip/stm32/i2c_ite_flash_support.c @@ -4,8 +4,8 @@ */ /* STM implementation for flashing ITE-based ECs over i2c */ -#include "i2c.h" #include "i2c_ite_flash_support.h" +#include "i2c.h" #include "registers.h" #include "time.h" diff --git a/chip/stm32/pwm.c b/chip/stm32/pwm.c index a9f266cbe0..0f2e50c999 100644 --- a/chip/stm32/pwm.c +++ b/chip/stm32/pwm.c @@ -6,8 +6,8 @@ /* PWM control module for STM32 */ #include "builtin/assert.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "gpio.h" #include "hooks.h" #include "hwtimer.h" diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index 916cb2257a..1bb961a935 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -5,17 +5,17 @@ /* USART driver for Chrome EC */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "dma.h" #include "gpio.h" #include "hooks.h" #include "registers.h" -#include "stm32-dma.h" #include "system.h" #include "task.h" #include "uart.h" #include "util.h" +#include "stm32-dma.h" /* Console USART index */ #define UARTN CONFIG_UART_CONSOLE diff --git a/chip/stm32/ucpd-stm32gx.c b/chip/stm32/ucpd-stm32gx.c index 424792c5d0..3fec860200 100644 --- a/chip/stm32/ucpd-stm32gx.c +++ b/chip/stm32/ucpd-stm32gx.c @@ -6,8 +6,8 @@ /* STM32GX UCPD module for Chrome EC */ #include "clock.h" -#include "common.h" #include "console.h" +#include "common.h" #include "driver/tcpm/tcpm.h" #include "gpio.h" #include "hooks.h" diff --git a/chip/stm32/usart-stm32f0.c b/chip/stm32/usart-stm32f0.c index debb062473..56325cdc74 100644 --- a/chip/stm32/usart-stm32f0.c +++ b/chip/stm32/usart-stm32f0.c @@ -2,13 +2,14 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32f0.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32f0.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32f3.c b/chip/stm32/usart-stm32f3.c index b46ac2ed8f..f5a138643c 100644 --- a/chip/stm32/usart-stm32f3.c +++ b/chip/stm32/usart-stm32f3.c @@ -2,12 +2,13 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32f3.h" + #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32f3.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32f4.c b/chip/stm32/usart-stm32f4.c index 0806cab062..a710760e3a 100644 --- a/chip/stm32/usart-stm32f4.c +++ b/chip/stm32/usart-stm32f4.c @@ -3,13 +3,14 @@ * found in the LICENSE file. */ +#include "usart-stm32f4.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32f4.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32l.c b/chip/stm32/usart-stm32l.c index b6c9e21595..dc300d598a 100644 --- a/chip/stm32/usart-stm32l.c +++ b/chip/stm32/usart-stm32l.c @@ -2,13 +2,14 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32l.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32l.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32l5.c b/chip/stm32/usart-stm32l5.c index 5f34c37bc4..30e0f009ff 100644 --- a/chip/stm32/usart-stm32l5.c +++ b/chip/stm32/usart-stm32l5.c @@ -2,13 +2,14 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32l.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32l.h" #include "util.h" /* diff --git a/chip/stm32/usart_host_command.c b/chip/stm32/usart_host_command.c index 817343df98..437975e609 100644 --- a/chip/stm32/usart_host_command.c +++ b/chip/stm32/usart_host_command.c @@ -3,8 +3,8 @@ * found in the LICENSE file. */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "dma.h" #include "gpio.h" #include "hooks.h" @@ -13,9 +13,9 @@ #include "registers.h" #include "system.h" #include "task.h" -#include "usart-stm32f4.h" -#include "usart_host_command.h" #include "usart_rx_dma.h" +#include "usart_host_command.h" +#include "usart-stm32f4.h" #include "util.h" /* Console output macros */ diff --git a/chip/stm32/usart_host_command.h b/chip/stm32/usart_host_command.h index ddbd5c5c99..ee4bdd88dc 100644 --- a/chip/stm32/usart_host_command.h +++ b/chip/stm32/usart_host_command.h @@ -6,13 +6,12 @@ #ifndef __CROS_EC_USART_HOST_COMMAND_H #define __CROS_EC_USART_HOST_COMMAND_H +#include <stdarg.h> /* For va_list */ #include "common.h" #include "gpio.h" #include "host_command.h" #include "usart.h" -#include <stdarg.h> /* For va_list */ - /* * Add data to host command layer buffer. */ diff --git a/chip/stm32/usart_rx_dma.c b/chip/stm32/usart_rx_dma.c index 8997617ff3..21c8313c73 100644 --- a/chip/stm32/usart_rx_dma.c +++ b/chip/stm32/usart_rx_dma.c @@ -3,13 +3,14 @@ * found in the LICENSE file. */ +#include "usart_rx_dma.h" + #include "atomic.h" #include "common.h" #include "console.h" #include "registers.h" #include "system.h" #include "usart_host_command.h" -#include "usart_rx_dma.h" #include "util.h" typedef size_t (*add_data_t)(struct usart_config const *config, diff --git a/chip/stm32/usart_rx_dma.h b/chip/stm32/usart_rx_dma.h index 191ccc8c7f..6d273d18b9 100644 --- a/chip/stm32/usart_rx_dma.h +++ b/chip/stm32/usart_rx_dma.h @@ -7,8 +7,8 @@ #ifndef __CROS_EC_USART_RX_DMA_H #define __CROS_EC_USART_RX_DMA_H -#include "dma.h" #include "producer.h" +#include "dma.h" #include "queue.h" #include "usart.h" diff --git a/chip/stm32/usart_rx_interrupt-stm32f0.c b/chip/stm32/usart_rx_interrupt-stm32f0.c index a142bcd436..dfbe6ec3ff 100644 --- a/chip/stm32/usart_rx_interrupt-stm32f0.c +++ b/chip/stm32/usart_rx_interrupt-stm32f0.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F3 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt-stm32f3.c b/chip/stm32/usart_rx_interrupt-stm32f3.c index a142bcd436..dfbe6ec3ff 100644 --- a/chip/stm32/usart_rx_interrupt-stm32f3.c +++ b/chip/stm32/usart_rx_interrupt-stm32f3.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F3 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt-stm32f4.c b/chip/stm32/usart_rx_interrupt-stm32f4.c index 80ba37e88f..1d86c7d5b6 100644 --- a/chip/stm32/usart_rx_interrupt-stm32f4.c +++ b/chip/stm32/usart_rx_interrupt-stm32f4.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F4 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt-stm32l.c b/chip/stm32/usart_rx_interrupt-stm32l.c index 2c74d7dbd1..750809307b 100644 --- a/chip/stm32/usart_rx_interrupt-stm32l.c +++ b/chip/stm32/usart_rx_interrupt-stm32l.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32L */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt.c b/chip/stm32/usart_rx_interrupt.c index a142bcd436..dfbe6ec3ff 100644 --- a/chip/stm32/usart_rx_interrupt.c +++ b/chip/stm32/usart_rx_interrupt.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F3 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_tx_dma.c b/chip/stm32/usart_tx_dma.c index d6469aa9e6..8128231ff7 100644 --- a/chip/stm32/usart_tx_dma.c +++ b/chip/stm32/usart_tx_dma.c @@ -2,12 +2,13 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart_tx_dma.h" + +#include "usart.h" #include "common.h" #include "registers.h" #include "system.h" #include "task.h" -#include "usart.h" -#include "usart_tx_dma.h" #include "util.h" void usart_tx_dma_written(struct consumer const *consumer, size_t count) diff --git a/chip/stm32/usart_tx_interrupt.c b/chip/stm32/usart_tx_interrupt.c index 7c99840e26..80d1d4df0f 100644 --- a/chip/stm32/usart_tx_interrupt.c +++ b/chip/stm32/usart_tx_interrupt.c @@ -5,11 +5,12 @@ /* Interrupt based USART TX driver for STM32 */ +#include "usart.h" + #include "common.h" #include "registers.h" #include "system.h" #include "task.h" -#include "usart.h" #include "usart_host_command.h" #include "util.h" diff --git a/chip/stm32/usb-stm32f3.c b/chip/stm32/usb-stm32f3.c index bef15db566..eb48129e09 100644 --- a/chip/stm32/usb-stm32f3.c +++ b/chip/stm32/usb-stm32f3.c @@ -5,8 +5,9 @@ * STM32F3 Family specific USB functionality */ -#include "system.h" #include "usb-stm32f3.h" + +#include "system.h" #include "usb_api.h" void usb_connect(void) diff --git a/chip/stm32/usb-stream.c b/chip/stm32/usb-stream.c index f9cd2687bf..76f7fbd340 100644 --- a/chip/stm32/usb-stream.c +++ b/chip/stm32/usb-stream.c @@ -11,10 +11,10 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usart.h" -#include "usb-stream.h" #include "usb_hw.h" -#include "util.h" +#include "usb-stream.h" static size_t rx_read(struct usb_stream_config const *config) { diff --git a/chip/stm32/usb.c b/chip/stm32/usb.c index dba9ebaba1..1c621a32b3 100644 --- a/chip/stm32/usb.c +++ b/chip/stm32/usb.c @@ -15,10 +15,10 @@ #include "system.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" #include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_console.c b/chip/stm32/usb_console.c index 062ce2f484..fdadc243c1 100644 --- a/chip/stm32/usb_console.c +++ b/chip/stm32/usb_console.c @@ -12,10 +12,10 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" #include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_dwc.c b/chip/stm32/usb_dwc.c index 15ce4bff7f..67f89a5222 100644 --- a/chip/stm32/usb_dwc.c +++ b/chip/stm32/usb_dwc.c @@ -13,12 +13,12 @@ #include "hooks.h" #include "link_defs.h" #include "registers.h" +#include "usb_hw.h" #include "system.h" #include "task.h" #include "timer.h" -#include "usb_descriptor.h" -#include "usb_hw.h" #include "util.h" +#include "usb_descriptor.h" #include "watchdog.h" /****************************************************************************/ diff --git a/chip/stm32/usb_dwc_console.c b/chip/stm32/usb_dwc_console.c index ff3c0817b6..fd66db7380 100644 --- a/chip/stm32/usb_dwc_console.c +++ b/chip/stm32/usb_dwc_console.c @@ -12,9 +12,9 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_descriptor.h" #include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_dwc_stream.c b/chip/stm32/usb_dwc_stream.c index 78e0a4b484..670c93b437 100644 --- a/chip/stm32/usb_dwc_stream.c +++ b/chip/stm32/usb_dwc_stream.c @@ -3,11 +3,12 @@ * found in the LICENSE file. */ -#include "console.h" #include "registers.h" #include "timer.h" #include "usb_dwc_stream.h" #include "util.h" + +#include "console.h" #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) /* diff --git a/chip/stm32/usb_dwc_stream.h b/chip/stm32/usb_dwc_stream.h index bd512f5e9a..7e5e938053 100644 --- a/chip/stm32/usb_dwc_stream.h +++ b/chip/stm32/usb_dwc_stream.h @@ -10,9 +10,9 @@ #include "compile_time_macros.h" #include "consumer.h" #include "hooks.h" +#include "registers.h" #include "producer.h" #include "queue.h" -#include "registers.h" #include "usb_descriptor.h" #include "usb_hw.h" diff --git a/chip/stm32/usb_endpoints.c b/chip/stm32/usb_endpoints.c index 57ebc86eb2..cf8cb17869 100644 --- a/chip/stm32/usb_endpoints.c +++ b/chip/stm32/usb_endpoints.c @@ -5,14 +5,13 @@ * USB endpoints/interfaces callbacks declaration */ -#include "common.h" +#include <stdint.h> +#include <stddef.h> #include "compiler.h" #include "config.h" +#include "common.h" #include "usb_hw.h" -#include <stddef.h> -#include <stdint.h> - typedef void (*xfer_func)(void); typedef void (*evt_func)(enum usb_ep_event evt); diff --git a/chip/stm32/usb_hid.c b/chip/stm32/usb_hid.c index 321248c702..e9426b690d 100644 --- a/chip/stm32/usb_hid.c +++ b/chip/stm32/usb_hid.c @@ -13,11 +13,11 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_descriptor.h" +#include "usb_hw.h" #include "usb_hid.h" #include "usb_hid_hw.h" -#include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_hid_hw.h b/chip/stm32/usb_hid_hw.h index 5e28a801c1..54bfca0808 100644 --- a/chip/stm32/usb_hid_hw.h +++ b/chip/stm32/usb_hid_hw.h @@ -8,8 +8,6 @@ #ifndef __CROS_EC_USB_HID_HW_H #define __CROS_EC_USB_HID_HW_H -#include "chip/stm32/usb_hw.h" - #include <common.h> struct usb_hid_config_t { diff --git a/chip/stm32/usb_hid_keyboard.c b/chip/stm32/usb_hid_keyboard.c index 7b40f31309..7f3caac960 100644 --- a/chip/stm32/usb_hid_keyboard.c +++ b/chip/stm32/usb_hid_keyboard.c @@ -20,12 +20,12 @@ #include "tablet_mode.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" +#include "usb_hw.h" #include "usb_hid.h" #include "usb_hid_hw.h" -#include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_hid_touchpad.c b/chip/stm32/usb_hid_touchpad.c index 8eb5ee95dc..15dd38756f 100644 --- a/chip/stm32/usb_hid_touchpad.c +++ b/chip/stm32/usb_hid_touchpad.c @@ -15,13 +15,13 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" +#include "usb_hw.h" #include "usb_hid.h" #include "usb_hid_hw.h" #include "usb_hid_touchpad.h" -#include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_isochronous.c b/chip/stm32/usb_isochronous.c index d2225991c0..ad20b6d1ca 100644 --- a/chip/stm32/usb_isochronous.c +++ b/chip/stm32/usb_isochronous.c @@ -3,15 +3,15 @@ * found in the LICENSE file. */ +#include "stddef.h" #include "common.h" #include "config.h" #include "link_defs.h" #include "registers.h" -#include "stddef.h" +#include "util.h" #include "usb_api.h" #include "usb_hw.h" #include "usb_isochronous.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 2d090293f9..9536301863 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -11,15 +11,15 @@ #include "crc.h" #include "dma.h" #include "gpio.h" -#include "hooks.h" #include "hwtimer.h" +#include "hooks.h" #include "registers.h" #include "system.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_pd.h" #include "usb_pd_config.h" -#include "util.h" #ifdef CONFIG_COMMON_RUNTIME #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) |