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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /zephyr/drivers/cros_rtc
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-stabilize-14695.107.B-ish.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'zephyr/drivers/cros_rtc')
-rw-r--r--zephyr/drivers/cros_rtc/CMakeLists.txt9
-rw-r--r--zephyr/drivers/cros_rtc/Kconfig36
-rw-r--r--zephyr/drivers/cros_rtc/cros_rtc_npcx.c241
-rw-r--r--zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c450
-rw-r--r--zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h58
-rw-r--r--zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c480
-rw-r--r--zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h60
7 files changed, 0 insertions, 1334 deletions
diff --git a/zephyr/drivers/cros_rtc/CMakeLists.txt b/zephyr/drivers/cros_rtc/CMakeLists.txt
deleted file mode 100644
index f6ce9b6890..0000000000
--- a/zephyr/drivers/cros_rtc/CMakeLists.txt
+++ /dev/null
@@ -1,9 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-zephyr_library_sources_ifdef(CONFIG_CROS_RTC_NPCX cros_rtc_npcx.c)
-zephyr_library_sources_ifdef(CONFIG_CROS_RTC_NXP_PCF85063A
- nxp_rtc_pcf85063a.c)
-zephyr_library_sources_ifdef(CONFIG_CROS_RTC_RENESAS_IDT1337AG
- renesas_rtc_idt1337ag.c)
diff --git a/zephyr/drivers/cros_rtc/Kconfig b/zephyr/drivers/cros_rtc/Kconfig
deleted file mode 100644
index 9abe8e27e0..0000000000
--- a/zephyr/drivers/cros_rtc/Kconfig
+++ /dev/null
@@ -1,36 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-if PLATFORM_EC_RTC
-
-choice CROS_RTC_TYPE
- prompt "Select the RTC to use"
- default CROS_RTC_NPCX if SOC_FAMILY_NPCX
- help
- Select the RTC used on the board.
-
-config CROS_RTC_NPCX
- bool "Nuvoton NPCX Real-Time Clock (RTC) driver for the Zephyr shim"
- depends on SOC_FAMILY_NPCX
- help
- This option enables a driver for providing the support of Real-Time
- Clock (RTC) on the NPCX chip.
-
-config CROS_RTC_NXP_PCF85063A
- bool "NXP PCF85063A Real-Time Clock (RTC) driver for the Zephyr shim"
- depends on PLATFORM_EC_I2C
- help
- This option enables a driver for providing the support of NXP
- Real-Time Clock (RTC) on the the I2C bus.
-
-config CROS_RTC_RENESAS_IDT1337AG
- bool "RENESAS IDT1337AG Real-Time Clock (RTC) driver for the Zephyr shim"
- depends on PLATFORM_EC_I2C
- help
- This option enables a driver for providing the support of RENESAS
- Real-Time Clock (RTC) on the the I2C bus.
-
-endchoice # RTC Select
-
-endif # PLATFORM_EC_RTC
diff --git a/zephyr/drivers/cros_rtc/cros_rtc_npcx.c b/zephyr/drivers/cros_rtc/cros_rtc_npcx.c
deleted file mode 100644
index 0ecbe5f47c..0000000000
--- a/zephyr/drivers/cros_rtc/cros_rtc_npcx.c
+++ /dev/null
@@ -1,241 +0,0 @@
-/*
- * Copyright 2021 Google LLC
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#define DT_DRV_COMPAT nuvoton_npcx_cros_mtc
-
-#include <assert.h>
-#include <drivers/cros_rtc.h>
-#include <drivers/gpio.h>
-#include <kernel.h>
-#include <soc.h>
-#include <soc/nuvoton_npcx/reg_def_cros.h>
-
-#include "ec_tasks.h"
-#include "soc_miwu.h"
-#include "task.h"
-
-#include <logging/log.h>
-LOG_MODULE_REGISTER(cros_rtc, LOG_LEVEL_ERR);
-
-#define NPCX_MTC_TTC_LOAD_DELAY_US 250 /* Delay after writing TTC */
-#define NPCX_MTC_ALARM_MASK GENMASK(24, 0) /* Valid field of alarm in WTC */
-
-/* Driver config */
-struct cros_rtc_npcx_config {
- /* Monotonic counter base address */
- uintptr_t base;
- /* Monotonic counter wake-up input source configuration */
- const struct npcx_wui mtc_alarm;
-};
-
-/* Driver data */
-struct cros_rtc_npcx_data {
- /* Monotonic counter wake-up callback object */
- struct miwu_dev_callback miwu_mtc_cb;
- cros_rtc_alarm_callback_t alarm_callback;
-};
-
-/* Driver convenience defines */
-#define DRV_CONFIG(dev) ((const struct cros_rtc_npcx_config *)(dev)->config)
-
-#define DRV_DATA(dev) ((struct cros_rtc_npcx_data *)(dev)->data)
-
-#define HAL_INSTANCE(dev) (struct mtc_reg *)(DRV_CONFIG(dev)->base)
-
-/* Counter internal local functions */
-static uint32_t counter_npcx_get_val(const struct device *dev)
-{
- struct mtc_reg *const inst = HAL_INSTANCE(dev);
-
- /*
- * Get value of monotonic counter which keeps counting when VCC1 power
- * domain exists (Unit:sec)
- */
- return inst->TTC;
-}
-
-static void counter_npcx_set_val(const struct device *dev, uint32_t val)
-{
- struct mtc_reg *const inst = HAL_INSTANCE(dev);
-
- /*
- * Set monotonic counter. Write it twice to ensure the value latch to
- * TTC register. A delay (~250 us) is also needed before writing again.
- */
- inst->TTC = val;
- k_busy_wait(NPCX_MTC_TTC_LOAD_DELAY_US);
-
- inst->TTC = val;
- k_busy_wait(NPCX_MTC_TTC_LOAD_DELAY_US);
-}
-
-static uint32_t counter_npcx_get_alarm_val(const struct device *dev)
-{
- struct mtc_reg *const inst = HAL_INSTANCE(dev);
-
- /*
- * If alarm is not set or it is set and has already gone off, return
- * zero directly.
- */
- if (!IS_BIT_SET(inst->WTC, NPCX_WTC_WIE) ||
- IS_BIT_SET(inst->WTC, NPCX_WTC_PTO)) {
- return 0;
- }
-
- /* Return 25-bit alarm value */
- return inst->WTC & NPCX_MTC_ALARM_MASK;
-}
-
-static void counter_npcx_set_alarm_val(const struct device *dev, uint32_t val)
-{
- struct mtc_reg *const inst = HAL_INSTANCE(dev);
-
- /* Disable alarm interrupt */
- inst->WTC &= ~BIT(NPCX_WTC_WIE);
-
- /* Set new alarm value */
- inst->WTC = val & NPCX_MTC_ALARM_MASK;
-
- /* Enable alarm interrupt */
- inst->WTC |= BIT(NPCX_WTC_WIE);
-}
-
-static void counter_npcx_reset_alarm(const struct device *dev)
-{
- struct mtc_reg *const inst = HAL_INSTANCE(dev);
-
- /* Disable alarm interrupt first */
- if (IS_BIT_SET(inst->WTC, NPCX_WTC_WIE)) {
- inst->WTC &= ~BIT(NPCX_WTC_WIE);
- }
-
- /* Set alarm to maximum value and clear its pending bit */
- if (IS_BIT_SET(inst->WTC, NPCX_WTC_PTO)) {
- inst->WTC = NPCX_MTC_ALARM_MASK;
- inst->WTC |= BIT(NPCX_WTC_PTO);
- }
-}
-
-/* Counter local functions */
-static void counter_npcx_isr(const struct device *dev, struct npcx_wui *wui)
-{
- struct cros_rtc_npcx_data *data = DRV_DATA(dev);
-
- LOG_DBG("%s", __func__);
-
- /* Alarm is one-shot, so reset alarm to default */
- counter_npcx_reset_alarm(dev);
-
- /* Call callback function */
- if (data->alarm_callback) {
- data->alarm_callback(dev);
- }
-}
-
-/* cros ec RTC api functions */
-static int cros_rtc_npcx_configure(const struct device *dev,
- cros_rtc_alarm_callback_t callback)
-{
- struct cros_rtc_npcx_data *data = DRV_DATA(dev);
-
- if (callback == NULL) {
- return -EINVAL;
- }
-
- data->alarm_callback = callback;
- return 0;
-}
-
-static int cros_rtc_npcx_get_value(const struct device *dev, uint32_t *value)
-{
- *value = counter_npcx_get_val(dev);
-
- return 0;
-}
-
-static int cros_rtc_npcx_set_value(const struct device *dev, uint32_t value)
-{
- counter_npcx_set_val(dev, value);
-
- return 0;
-}
-static int cros_rtc_npcx_get_alarm(const struct device *dev, uint32_t *seconds,
- uint32_t *microseconds)
-{
- *seconds = counter_npcx_get_alarm_val(dev);
- *microseconds = 0;
-
- return 0;
-}
-static int cros_rtc_npcx_set_alarm(const struct device *dev, uint32_t seconds,
- uint32_t microseconds)
-{
- const struct cros_rtc_npcx_config *config = DRV_CONFIG(dev);
- ARG_UNUSED(microseconds);
-
- /* Enable interrupt of the MTC alarm wake-up input source */
- npcx_miwu_irq_enable(&config->mtc_alarm);
-
- /* Make sure alarm restore to default state */
- counter_npcx_reset_alarm(dev);
- counter_npcx_set_alarm_val(dev, seconds);
-
- return 0;
-}
-
-static int cros_rtc_npcx_reset_alarm(const struct device *dev)
-{
- const struct cros_rtc_npcx_config *config = DRV_CONFIG(dev);
-
- /* Disable interrupt of the MTC alarm wake-up input source */
- npcx_miwu_irq_disable(&config->mtc_alarm);
-
- counter_npcx_reset_alarm(dev);
-
- return 0;
-}
-
-/* cros ec RTC driver registration */
-static const struct cros_rtc_driver_api cros_rtc_npcx_driver_api = {
- .configure = cros_rtc_npcx_configure,
- .get_value = cros_rtc_npcx_get_value,
- .set_value = cros_rtc_npcx_set_value,
- .get_alarm = cros_rtc_npcx_get_alarm,
- .set_alarm = cros_rtc_npcx_set_alarm,
- .reset_alarm = cros_rtc_npcx_reset_alarm,
-};
-
-static int cros_rtc_npcx_init(const struct device *dev)
-{
- const struct cros_rtc_npcx_config *config = DRV_CONFIG(dev);
- struct cros_rtc_npcx_data *data = DRV_DATA(dev);
-
- /* Initialize the miwu input and its callback for monotonic counter */
- npcx_miwu_init_dev_callback(&data->miwu_mtc_cb, &config->mtc_alarm,
- counter_npcx_isr, dev);
- npcx_miwu_manage_dev_callback(&data->miwu_mtc_cb, true);
-
- /*
- * Configure the monotonic counter wake-up event triggered from a rising
- * edge on its signal.
- */
- npcx_miwu_interrupt_configure(&config->mtc_alarm, NPCX_MIWU_MODE_EDGE,
- NPCX_MIWU_TRIG_HIGH);
-
- return 0;
-}
-
-static const struct cros_rtc_npcx_config cros_rtc_npcx_cfg_0 = {
- .base = DT_INST_REG_ADDR(0),
- .mtc_alarm = NPCX_DT_WUI_ITEM_BY_NAME(0, mtc_alarm)
-};
-
-static struct cros_rtc_npcx_data cros_rtc_npcx_data_0;
-
-DEVICE_DT_INST_DEFINE(0, cros_rtc_npcx_init, /* pm_control_fn= */ NULL,
- &cros_rtc_npcx_data_0, &cros_rtc_npcx_cfg_0, POST_KERNEL,
- CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
- &cros_rtc_npcx_driver_api);
diff --git a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c
deleted file mode 100644
index 94632947c6..0000000000
--- a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c
+++ /dev/null
@@ -1,450 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#define DT_DRV_COMPAT nxp_rtc_pcf85063a
-
-#include <assert.h>
-#include <device.h>
-#include <drivers/cros_rtc.h>
-#include <drivers/gpio.h>
-#include <drivers/i2c.h>
-#include <kernel.h>
-#include <rtc.h>
-#include <soc.h>
-
-#include "nxp_rtc_pcf85063a.h"
-
-#include <logging/log.h>
-LOG_MODULE_REGISTER(cros_rtc, LOG_LEVEL_ERR);
-
-/* Driver config */
-struct nxp_rtc_pcf85063a_config {
- const struct device *bus;
- const uint16_t i2c_addr_flags;
- const struct gpio_dt_spec gpio_alert;
-};
-
-/* Driver data */
-struct nxp_rtc_pcf85063a_data {
- const struct device *dev;
- uint8_t time_reg[NUM_TIMER_REGS];
- struct gpio_callback gpio_cb;
- cros_rtc_alarm_callback_t alarm_callback;
-};
-
-/* Driver convenience defines */
-#define DRV_CONFIG(dev) ((const struct nxp_rtc_pcf85063a_config *)(dev)->config)
-#define DRV_DATA(dev) ((struct nxp_rtc_pcf85063a_data *)(dev)->data)
-
-/*
- * is_alarm == true: Reads alarm registers SECONDS, MINUTES, HOURS, and DAYS
- * is_alarm == false: Reads time registers SECONDS, MINUTES, HOURS, DAYS, and
- * MONTHS, YEARS
- */
-static int pcf85063a_read_time_regs(const struct device *dev, bool is_alarm)
-{
- const struct nxp_rtc_pcf85063a_config *const config = DRV_CONFIG(dev);
- struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev);
- uint8_t start_reg;
- uint8_t num_reg;
-
- if (is_alarm) {
- start_reg = REG_SECOND_ALARM;
- num_reg = NUM_ALARM_REGS;
- } else {
- start_reg = REG_SECONDS;
- num_reg = NUM_TIMER_REGS;
- }
-
- return i2c_burst_read(config->bus,
- config->i2c_addr_flags, start_reg, data->time_reg, num_reg);
-}
-
-static int pcf85063a_read_reg(const struct device *dev,
- uint8_t reg, uint8_t *val)
-{
- const struct nxp_rtc_pcf85063a_config *const config = DRV_CONFIG(dev);
-
- return i2c_reg_read_byte(config->bus, config->i2c_addr_flags, reg, val);
-}
-
-/*
- * is_alarm == true: Writes alarm registers SECONDS, MINUTES, HOURS, and DAYS
- * is_alarm == false: Writes time registers SECONDS, MINUTES, HOURS, DAYS, and
- * MONTHS, YEARS
- */
-static int pcf85063a_write_time_regs(const struct device *dev, bool is_alarm)
-{
- const struct nxp_rtc_pcf85063a_config *const config = DRV_CONFIG(dev);
- struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev);
- uint8_t tx_buf[NUM_TIMER_REGS];
- uint8_t start_reg;
- uint8_t num_reg;
-
- if (is_alarm) {
- start_reg = REG_SECOND_ALARM;
- num_reg = NUM_ALARM_REGS;
- } else {
- start_reg = REG_SECONDS;
- num_reg = NUM_TIMER_REGS;
- }
-
- for (int i = 0; i < num_reg; i++) {
- tx_buf[i] = data->time_reg[i];
- }
-
- return i2c_burst_write(config->bus,
- config->i2c_addr_flags, start_reg, tx_buf, num_reg);
-}
-
-
-static int pcf85063a_write_reg(const struct device *dev,
- uint8_t reg, uint8_t val)
-{
- const struct nxp_rtc_pcf85063a_config *const config = DRV_CONFIG(dev);
- uint8_t tx_buf[2];
-
- tx_buf[0] = reg;
- tx_buf[1] = val;
-
- return i2c_write(config->bus,
- tx_buf, sizeof(tx_buf), config->i2c_addr_flags);
-}
-
-/*
- * val bits 7 to 4 - tens place
- * val bits 3 to 0 - ones place
- */
-static int bcd_to_dec(uint8_t val, enum bcd_mask mask)
-{
- int tens = ((val & mask) >> 4) * 10;
- int ones = (val & 0xf);
-
- return tens + ones;
-}
-
-/*
- * val bits 7 to 4 - tens place
- * val bits 3 to 0 - ones place
- */
-static uint8_t dec_to_bcd(uint32_t val, enum bcd_mask mask)
-{
- int tens = val / 10;
- int ones = val - (tens * 10);
-
- return ((tens << 4) & mask) | ones;
-}
-
-static int nxp_rtc_pcf85063a_read_seconds(const struct device *dev,
- uint32_t *value, bool is_alarm)
-{
- struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev);
- struct calendar_date time;
- int ret;
-
- ret = pcf85063a_read_time_regs(dev, is_alarm);
-
- if (ret < 0) {
- return ret;
- }
-
- if (is_alarm) {
- *value = (bcd_to_dec(data->time_reg[DAYS], DAYS_MASK) *
- SECS_PER_DAY) +
- (bcd_to_dec(data->time_reg[HOURS], HOURS24_MASK) *
- SECS_PER_HOUR) +
- (bcd_to_dec(data->time_reg[MINUTES], MINUTES_MASK) *
- SECS_PER_MINUTE) +
- bcd_to_dec(data->time_reg[SECONDS], SECONDS_MASK);
- } else {
- time.year = bcd_to_dec(data->time_reg[YEARS], YEARS_MASK);
- time.month =
- bcd_to_dec(data->time_reg[MONTHS], MONTHS_MASK);
- time.day = bcd_to_dec(data->time_reg[DAYS], DAYS_MASK);
-
- *value = date_to_sec(time) - SECS_TILL_YEAR_2K +
- (bcd_to_dec(data->time_reg[HOURS], HOURS24_MASK) *
- SECS_PER_HOUR) +
- (bcd_to_dec(data->time_reg[MINUTES], MINUTES_MASK) *
- SECS_PER_MINUTE) +
- bcd_to_dec(data->time_reg[SECONDS], SECONDS_MASK);
- }
-
- return ret;
-}
-
-static int nxp_rtc_pcf85063a_write_seconds(const struct device *dev,
- uint32_t value, bool is_alarm)
-{
- struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev);
- struct calendar_date time;
- uint32_t tmp_sec;
-
- time = sec_to_date(value + SECS_TILL_YEAR_2K);
-
- if (!is_alarm) {
- data->time_reg[YEARS] = dec_to_bcd(time.year, YEARS_MASK);
- data->time_reg[MONTHS] =
- dec_to_bcd(time.month, MONTHS_MASK);
- }
-
- data->time_reg[DAYS] = dec_to_bcd(time.day, DAYS_MASK);
-
- if (is_alarm && data->time_reg[DAYS] == 0) {
- data->time_reg[DAYS] |= DISABLE_ALARM;
- }
-
- value %= SECS_PER_DAY;
- tmp_sec = value / SECS_PER_HOUR;
- data->time_reg[HOURS] = dec_to_bcd(tmp_sec, HOURS24_MASK);
-
- if (is_alarm && data->time_reg[HOURS] == 0) {
- data->time_reg[HOURS] |= DISABLE_ALARM;
- }
-
- value -= (tmp_sec * SECS_PER_HOUR);
- tmp_sec = value / SECS_PER_MINUTE;
- data->time_reg[MINUTES] = dec_to_bcd(tmp_sec, MINUTES_MASK);
-
- if (is_alarm && data->time_reg[MINUTES] == 0) {
- data->time_reg[MINUTES] |= DISABLE_ALARM;
- }
-
- value -= (tmp_sec * SECS_PER_MINUTE);
- data->time_reg[SECONDS] = dec_to_bcd(value, SECONDS_MASK);
-
- if (is_alarm && data->time_reg[SECONDS] == 0) {
- data->time_reg[SECONDS] |= DISABLE_ALARM;
- }
-
- return pcf85063a_write_time_regs(dev, is_alarm);
-}
-
-static int nxp_rtc_pcf85063a_configure(const struct device *dev,
- cros_rtc_alarm_callback_t callback)
-{
- struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev);
-
- if (callback == NULL) {
- return -EINVAL;
- }
-
- data->alarm_callback = callback;
-
- return 0;
-}
-
-static int nxp_rtc_pcf85063a_get_value(const struct device *dev,
- uint32_t *value)
-{
- return nxp_rtc_pcf85063a_read_seconds(dev, value, false);
-}
-
-static int nxp_rtc_pcf85063a_set_value(const struct device *dev, uint32_t value)
-{
- return nxp_rtc_pcf85063a_write_seconds(dev, value, false);
-}
-
-static int nxp_rtc_pcf85063a_get_alarm(const struct device *dev,
- uint32_t *seconds, uint32_t *microseconds)
-{
- *microseconds = 0;
- return nxp_rtc_pcf85063a_read_seconds(dev, seconds, true);
-}
-
-static int nxp_rtc_pcf85063a_reset_alarm(const struct device *dev)
-{
- struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev);
- int ret;
-
- /* Disable alarm interrupt and clear pending alarm flag */
- ret = pcf85063a_write_reg(dev, REG_CONTROL_2, 0);
- if (ret < 0) {
- return ret;
- }
-
- /* Clear and disable the alarm registers */
- data->time_reg[SECONDS] = DISABLE_ALARM;
- data->time_reg[MINUTES] = DISABLE_ALARM;
- data->time_reg[HOURS] = DISABLE_ALARM;
- data->time_reg[DAYS] = DISABLE_ALARM;
-
- return pcf85063a_write_time_regs(dev, true);
-}
-
-static int nxp_rtc_pcf85063a_set_alarm(const struct device *dev,
- uint32_t seconds, uint32_t microseconds)
-{
- int ret;
-
- ARG_UNUSED(microseconds);
-
- ret = nxp_rtc_pcf85063a_reset_alarm(dev);
-
- if (ret < 0) {
- return ret;
- }
-
- ret = nxp_rtc_pcf85063a_write_seconds(dev, seconds, true);
-
- if (ret < 0) {
- return ret;
- }
-
- return pcf85063a_write_reg(dev, REG_CONTROL_2, ENABLE_ALARM_INTERRUPT);
-}
-
-static void nxp_pcf85063a_isr(const struct device *port,
- struct gpio_callback *cb, uint32_t pin)
-{
- struct nxp_rtc_pcf85063a_data *data =
- CONTAINER_OF(cb, struct nxp_rtc_pcf85063a_data, gpio_cb);
- const struct device *dev = (const struct device *)data->dev;
-
- ARG_UNUSED(port);
- ARG_UNUSED(pin);
- ARG_UNUSED(cb);
-
- LOG_DBG("%s", __func__);
-
- /* Call callback function */
- if (data->alarm_callback) {
- data->alarm_callback(dev);
- }
-}
-
-static const struct cros_rtc_driver_api nxp_rtc_pcf85063a_driver_api = {
- .configure = nxp_rtc_pcf85063a_configure,
- .get_value = nxp_rtc_pcf85063a_get_value,
- .set_value = nxp_rtc_pcf85063a_set_value,
- .get_alarm = nxp_rtc_pcf85063a_get_alarm,
- .set_alarm = nxp_rtc_pcf85063a_set_alarm,
- .reset_alarm = nxp_rtc_pcf85063a_reset_alarm,
-};
-
-static int nxp_rtc_pcf85063a_init(const struct device *dev)
-{
- const struct nxp_rtc_pcf85063a_config *const config = DRV_CONFIG(dev);
- struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev);
- uint8_t val;
- int ret;
-
- if (!device_is_ready(config->bus)) {
- LOG_ERR("Device %s is not ready", config->bus->name);
- return -ENODEV;
- }
-
- /*
- * Read Control_1 register. For normal operation,
- * the values should be as follows:
- * Bit 7 (external clock test mode) : (0) normal mode
- * Bit 6 (unused) : (0)
- * Bit 5 (STOP bit) : (0) RTC clock runs
- * BIT 4 (software reset) : (0) no software reset
- * BIT 3 (unused) : (0)
- * BIT 2 (correction interrupt enable) : (0) no correction
- * interrupt generated
- * BIT 1 (12 or 24-hour mode) : (0) 24-hour mode
- * BIT 0 (internal oscillator capacitor: (0) 7pF
- */
- ret = pcf85063a_read_reg(dev, REG_CONTROL_1, &val);
-
- if (ret < 0) {
- return ret;
- }
-
- if (val != CONTROL_1_DEFAULT_VALUE) {
- /* PCF85063A is not initialized, so send soft reset */
- ret = pcf85063a_write_reg(dev, REG_CONTROL_1, SOFT_RESET);
-
- if (ret < 0) {
- return ret;
- }
- }
-
- /*
- * Read Seconds register and check if oscillator is stopped.
- * If so, clear the bit.
- */
- ret = pcf85063a_read_reg(dev, REG_SECONDS, &val);
-
- if (ret < 0) {
- return ret;
- }
-
- if (val & OS_BIT) {
- /* Oscillator stop bit is set, clear it. */
- val &= ~OS_BIT;
- ret = pcf85063a_write_reg(dev, REG_SECONDS, val);
-
- if (ret < 0) {
- return ret;
- }
- }
-
- nxp_rtc_pcf85063a_reset_alarm(dev);
-
- /* Configure GPIO interrupt pin for PCF85063A alarm pin */
-
- if (!device_is_ready(config->gpio_alert.port)) {
- LOG_ERR("Alert GPIO device not ready");
- return -ENODEV;
- }
-
- ret = gpio_pin_configure_dt(&config->gpio_alert, GPIO_INPUT);
-
- if (ret < 0) {
- LOG_ERR("Could not configure RTC alert pin");
- return ret;
- }
-
- gpio_init_callback(&data->gpio_cb,
- nxp_pcf85063a_isr, BIT(config->gpio_alert.pin));
-
- ret = gpio_add_callback(config->gpio_alert.port, &data->gpio_cb);
-
- if (ret < 0) {
- LOG_ERR("Could not set RTC alert pin callback");
- return ret;
- }
-
- data->dev = dev;
-
- return gpio_pin_interrupt_configure_dt(&config->gpio_alert,
- GPIO_INT_EDGE_FALLING);
-}
-
-#define PCF85063A_INT_GPIOS \
- DT_PHANDLE_BY_IDX(DT_NODELABEL(pcf85063a), int_gpios, 0)
-
-/*
- * dt_flags is a uint8_t type. However, for platform/ec
- * the GPIO flags in the devicetree are expanded past 8 bits
- * to support the INPUT/OUTPUT and PULLUP/PULLDOWN properties.
- * Cast back to a gpio_dt_flags to compile, discarding the bits
- * that are not supported by the Zephyr GPIO API.
- */
-#define CROS_EC_GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \
- { \
- .port = \
- DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)), \
- .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \
- .dt_flags = \
- (gpio_dt_flags_t)DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \
- }
-
-static const struct nxp_rtc_pcf85063a_config nxp_rtc_pcf85063a_cfg_0 = {
- .bus = DEVICE_DT_GET(DT_INST_BUS(0)),
- .i2c_addr_flags = DT_INST_REG_ADDR(0),
- .gpio_alert =
- CROS_EC_GPIO_DT_SPEC_GET_BY_IDX(PCF85063A_INT_GPIOS, gpios, 0)
-};
-
-static struct nxp_rtc_pcf85063a_data nxp_rtc_pcf85063a_data_0;
-
-DEVICE_DT_INST_DEFINE(0, nxp_rtc_pcf85063a_init, /* pm_control_fn= */ NULL,
- &nxp_rtc_pcf85063a_data_0, &nxp_rtc_pcf85063a_cfg_0,
- POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
- &nxp_rtc_pcf85063a_driver_api);
diff --git a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h
deleted file mode 100644
index dc4fcd24fc..0000000000
--- a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __CROS_EC_RTC_PCF85063A_H
-#define __CROS_EC_RTC_PCF85063A_H
-
-#define PCF85063A_REG_NUM 18
-#define SOFT_RESET 0x58
-#define CONTROL_1_DEFAULT_VALUE 0
-#define OS_BIT 0x80
-#define DISABLE_ALARM 0x80
-#define ENABLE_ALARM_INTERRUPT 0x80
-#define RTC_STOP_CLOCKS 0x20
-#define RTC_START_CLOCKS 0x00
-
-#define NUM_TIMER_REGS 7
-#define NUM_ALARM_REGS 4
-
-#define REG_CONTROL_1 0x00
-#define REG_CONTROL_2 0x01
-#define REG_OFFSET 0x02
-#define REG_RAM_BYTE 0x03
-#define REG_SECONDS 0x04
-#define REG_MINUTES 0x05
-#define REG_HOURS 0x06
-#define REG_DAYS 0x07
-#define REG_WEEKDAYS 0x08
-#define REG_MONTHS 0x09
-#define REG_YEARS 0x0a
-#define REG_SECOND_ALARM 0x0b
-#define REG_MINUTE_ALARM 0x0c
-#define REG_HOUR_ALARM 0x0d
-#define REG_DAY_ALARM 0x0e
-#define REG_WEEKDAY_ALARM 0x0f
-#define REG_TIMER_VALUE 0x10
-#define REG_TIMER_MODE 0x11
-
-/* Macros for indexing time_reg buffer */
-#define SECONDS 0
-#define MINUTES 1
-#define HOURS 2
-#define DAYS 3
-#define WEEKDAYS 4
-#define MONTHS 5
-#define YEARS 6
-
-enum bcd_mask {
- SECONDS_MASK = 0x70,
- MINUTES_MASK = 0x70,
- HOURS24_MASK = 0x30,
- DAYS_MASK = 0x30,
- MONTHS_MASK = 0x10,
- YEARS_MASK = 0xf0
-};
-
-#endif /* __CROS_EC_RTC_PCF85063A_H */
diff --git a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c
deleted file mode 100644
index bbe76f5286..0000000000
--- a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c
+++ /dev/null
@@ -1,480 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#define DT_DRV_COMPAT renesas_rtc_idt1337ag
-
-#include <assert.h>
-#include <device.h>
-#include <drivers/cros_rtc.h>
-#include <drivers/gpio.h>
-#include <drivers/i2c.h>
-#include <kernel.h>
-#include <rtc.h>
-#include <soc.h>
-
-#include "renesas_rtc_idt1337ag.h"
-
-#include <logging/log.h>
-LOG_MODULE_REGISTER(cros_rtc, LOG_LEVEL_ERR);
-
-/* Driver config */
-struct renesas_rtc_idt1337ag_config {
- const struct device *bus;
- const uint16_t i2c_addr_flags;
- const struct gpio_dt_spec gpio_alert;
-};
-
-/* Driver data */
-struct renesas_rtc_idt1337ag_data {
- const struct device *dev;
- struct gpio_callback gpio_cb;
- cros_rtc_alarm_callback_t alarm_callback;
-};
-
-enum timer_type {
- RTC_TIMER,
- ALARM_TIMER,
-};
-
-/*
- * type == ALARM_TIMER: Reads alarm registers SECONDS, MINUTES, HOURS, and DAYS
- * type == RTC_TIMER: Reads time registers SECONDS, MINUTES, HOURS, DAYS, and
- * MONTHS, YEARS
- */
-static int idt1337ag_read_time_regs(const struct device *dev,
- uint8_t *time_reg, enum timer_type type)
-{
- const struct renesas_rtc_idt1337ag_config *const config = dev->config;
- uint8_t start_reg;
- uint8_t num_reg;
-
- if (type == ALARM_TIMER) {
- start_reg = REG_SECOND_ALARM1;
- num_reg = NUM_ALARM_REGS;
- } else {
- start_reg = REG_SECONDS;
- num_reg = NUM_TIMER_REGS;
- }
-
- return i2c_burst_read(config->bus,
- config->i2c_addr_flags, start_reg, time_reg, num_reg);
-}
-
-static int idt1337ag_read_reg(const struct device *dev,
- uint8_t reg, uint8_t *val)
-{
- const struct renesas_rtc_idt1337ag_config *const config = dev->config;
-
- return i2c_reg_read_byte(config->bus, config->i2c_addr_flags, reg, val);
-}
-
-/*
- * type == ALARM_TIMER: Writes alarm registers SECONDS, MINUTES, HOURS, and DAYS
- * type == RTC_TIMER: Writes time registers SECONDS, MINUTES, HOURS, DAYS, and
- * MONTHS, YEARS
- */
-static int idt1337ag_write_time_regs(const struct device *dev,
- uint8_t *time_reg, enum timer_type type)
-{
- const struct renesas_rtc_idt1337ag_config *const config = dev->config;
- uint8_t start_reg;
- uint8_t num_reg;
-
- if (type == ALARM_TIMER) {
- /*
- * Register 0x0A bit 6 determines if the DAY(1b) or DATE(0b)
- * alarm is selected.
- * Select the DAY alarm
- */
- time_reg[DAYS] |= SELECT_DAYS_ALARM;
-
- start_reg = REG_SECOND_ALARM1;
- num_reg = NUM_ALARM_REGS;
- } else {
- start_reg = REG_SECONDS;
- num_reg = NUM_TIMER_REGS;
- }
-
- return i2c_burst_write(config->bus,
- config->i2c_addr_flags, start_reg, time_reg, num_reg);
-}
-
-static int idt1337ag_write_reg(const struct device *dev,
- uint8_t reg, uint8_t val)
-{
- const struct renesas_rtc_idt1337ag_config *const config = dev->config;
- uint8_t tx_buf[2];
-
- tx_buf[0] = reg;
- tx_buf[1] = val;
-
- return i2c_write(config->bus,
- tx_buf, sizeof(tx_buf), config->i2c_addr_flags);
-}
-
-/*
- * val bits 7 to 4 - tens place
- * val bits 3 to 0 - ones place
- */
-static int bcd_to_dec(uint8_t val, enum bcd_mask mask)
-{
- int tens = ((val & mask) >> 4) * 10;
- int ones = (val & 0xf);
-
- return tens + ones;
-}
-
-/*
- * val bits 7 to 4 - tens place
- * val bits 3 to 0 - ones place
- */
-static uint8_t dec_to_bcd(uint32_t val, enum bcd_mask mask)
-{
- int tens = val / 10;
- int ones = val - (tens * 10);
-
- return ((tens << 4) & mask) | ones;
-}
-
-static int renesas_rtc_idt1337ag_read_seconds(const struct device *dev,
- uint32_t *value, enum timer_type type)
-{
- uint8_t time_reg[NUM_TIMER_REGS];
- struct calendar_date time;
- int ret;
-
- ret = idt1337ag_read_time_regs(dev, time_reg, type);
-
- if (ret < 0) {
- return ret;
- }
-
- if (type == ALARM_TIMER) {
- *value = (bcd_to_dec(time_reg[DAYS], DAYS_MASK) *
- SECS_PER_DAY) +
- (bcd_to_dec(time_reg[HOURS], HOURS24_MASK) *
- SECS_PER_HOUR) +
- (bcd_to_dec(time_reg[MINUTES], MINUTES_MASK) *
- SECS_PER_MINUTE) +
- bcd_to_dec(time_reg[SECONDS], SECONDS_MASK);
- } else {
- time.year = bcd_to_dec(time_reg[YEARS], YEARS_MASK);
- time.month = bcd_to_dec(time_reg[MONTHS], MONTHS_MASK);
- time.day = bcd_to_dec(time_reg[DAYS], DAYS_MASK);
-
- *value = date_to_sec(time) - SECS_TILL_YEAR_2K +
- (bcd_to_dec(time_reg[HOURS], HOURS24_MASK) *
- SECS_PER_HOUR) +
- (bcd_to_dec(time_reg[MINUTES], MINUTES_MASK) *
- SECS_PER_MINUTE) +
- bcd_to_dec(time_reg[SECONDS], SECONDS_MASK);
- }
-
- return ret;
-}
-
-static int renesas_rtc_idt1337ag_write_seconds(const struct device *dev,
- uint32_t value, enum timer_type type)
-{
- uint8_t time_reg[NUM_TIMER_REGS];
- struct calendar_date time;
- uint32_t tmp_sec;
-
- time = sec_to_date(value + SECS_TILL_YEAR_2K);
-
- if (type == RTC_TIMER) {
- time_reg[YEARS] = dec_to_bcd(time.year, YEARS_MASK);
- time_reg[MONTHS] = dec_to_bcd(time.month, MONTHS_MASK);
- }
-
- time_reg[DAYS] = dec_to_bcd(time.day, DAYS_MASK);
-
- value %= SECS_PER_DAY;
- tmp_sec = value / SECS_PER_HOUR;
- time_reg[HOURS] = dec_to_bcd(tmp_sec, HOURS24_MASK);
-
- value -= (tmp_sec * SECS_PER_HOUR);
- tmp_sec = value / SECS_PER_MINUTE;
- time_reg[MINUTES] = dec_to_bcd(tmp_sec, MINUTES_MASK);
-
- value -= (tmp_sec * SECS_PER_MINUTE);
- time_reg[SECONDS] = dec_to_bcd(value, SECONDS_MASK);
-
- return idt1337ag_write_time_regs(dev, time_reg, type);
-}
-
-static int renesas_rtc_idt1337ag_configure(const struct device *dev,
- cros_rtc_alarm_callback_t callback)
-{
- struct renesas_rtc_idt1337ag_data *data = dev->data;
-
- if (callback == NULL) {
- return -EINVAL;
- }
-
- data->alarm_callback = callback;
-
- return 0;
-}
-
-static int renesas_rtc_idt1337ag_get_value(const struct device *dev,
- uint32_t *value)
-{
- return renesas_rtc_idt1337ag_read_seconds(dev, value, RTC_TIMER);
-}
-
-static int renesas_rtc_idt1337ag_set_value(const struct device *dev,
- uint32_t value)
-{
- return renesas_rtc_idt1337ag_write_seconds(dev, value, RTC_TIMER);
-}
-
-static int renesas_rtc_idt1337ag_get_alarm(const struct device *dev,
- uint32_t *seconds, uint32_t *microseconds)
-{
- *microseconds = 0;
- return renesas_rtc_idt1337ag_read_seconds(dev, seconds, ALARM_TIMER);
-}
-
-static int renesas_rtc_idt1337ag_reset_alarm(const struct device *dev)
-{
- uint8_t time_reg[NUM_ALARM_REGS];
- int ret;
- uint8_t val;
-
- ret = idt1337ag_read_reg(dev, REG_CONTROL, &val);
-
- if (ret < 0) {
- return ret;
- }
-
- /* Disable alarm interrupt and clear pending alarm flag */
- val &= ~CONTROL_A1IE;
- ret = idt1337ag_write_reg(dev, REG_CONTROL, val);
-
- if (ret < 0) {
- return ret;
- }
-
- /* Clear alarm1 flag if set */
- ret = idt1337ag_read_reg(dev, REG_STATUS, &val);
-
- if (ret < 0) {
- return ret;
- }
-
- /* Clear the alarm1 and alarm2 flag */
- val &= ~(STATUS_A1F | STATUS_A2F);
- ret = idt1337ag_write_reg(dev, REG_STATUS, val);
-
- if (ret < 0) {
- return ret;
- }
-
- /* Clear and disable the alarm registers */
- time_reg[SECONDS] = DISABLE_ALARM;
- time_reg[MINUTES] = DISABLE_ALARM;
- time_reg[HOURS] = DISABLE_ALARM;
- time_reg[DAYS] = DISABLE_ALARM;
-
- return idt1337ag_write_time_regs(dev, time_reg, ALARM_TIMER);
-}
-
-static int renesas_rtc_idt1337ag_set_alarm(const struct device *dev,
- uint32_t seconds, uint32_t microseconds)
-{
- int ret;
- uint8_t val;
-
- ARG_UNUSED(microseconds);
-
- ret = renesas_rtc_idt1337ag_reset_alarm(dev);
- if (ret < 0) {
- return ret;
- }
-
- ret = renesas_rtc_idt1337ag_write_seconds(dev, seconds, ALARM_TIMER);
- if (ret < 0) {
- return ret;
- }
-
- ret = idt1337ag_read_reg(dev, REG_CONTROL, &val);
- if (ret < 0) {
- return ret;
- }
-
- val |= CONTROL_A1IE;
- idt1337ag_write_reg(dev, REG_CONTROL, val);
-
- return 0;
-}
-
-static void renesas_rtc_idt1337ag_isr(const struct device *port,
- struct gpio_callback *cb, uint32_t pin)
-{
- struct renesas_rtc_idt1337ag_data *data =
- CONTAINER_OF(cb, struct renesas_rtc_idt1337ag_data, gpio_cb);
- const struct device *dev = data->dev;
-
- ARG_UNUSED(port);
- ARG_UNUSED(pin);
- ARG_UNUSED(cb);
-
- LOG_DBG("%s", __func__);
-
- /* Call callback function */
- if (data->alarm_callback) {
- data->alarm_callback(dev);
- }
-}
-
-static const struct cros_rtc_driver_api renesas_rtc_idt1337ag_driver_api = {
- .configure = renesas_rtc_idt1337ag_configure,
- .get_value = renesas_rtc_idt1337ag_get_value,
- .set_value = renesas_rtc_idt1337ag_set_value,
- .get_alarm = renesas_rtc_idt1337ag_get_alarm,
- .set_alarm = renesas_rtc_idt1337ag_set_alarm,
- .reset_alarm = renesas_rtc_idt1337ag_reset_alarm,
-};
-
-static int renesas_rtc_idt1337ag_init(const struct device *dev)
-{
- const struct renesas_rtc_idt1337ag_config *const config = dev->config;
- struct renesas_rtc_idt1337ag_data *data = dev->data;
- uint8_t val;
- int ret;
-
- if (!device_is_ready(config->bus)) {
- LOG_ERR("Device %s is not ready", config->bus->name);
- return -ENODEV;
- }
-
- /*
- * Read Control register. For normal operation,
- * the values should be as follows:
- * Bit 7 (enable oscillator) : (0) normal mode
- * Bit 6 (unused) : (0)
- * Bit 5 (unused) : (0)
- * BIT 4 (RS2) : (0) Not used when INTCN == 1
- * BIT 3 (RS1) : (0) Not used when INTCN == 1
- * BIT 2 (INTCN) : (1) a match between the timekeeping
- * registers and the alarm 1
- * registers activate the INTA pin
- * BIT 1 (A2IE) : (0) Alarm 2 is not used
- * BIT 0 (A1IE) : (1) Enables Alarm 1
- */
- ret = idt1337ag_read_reg(dev, REG_CONTROL, &val);
-
- if (ret < 0) {
- return ret;
- }
-
- /* Enable IDT1337AG oscillator */
- val &= ~CONTROL_EOSC;
-
- /* Disable Alarm 2 */
- val &= ~CONTROL_A2IE;
-
- /* Alarm 1 assert INTA pin */
- val |= CONTROL_INTCN;
-
- ret = idt1337ag_write_reg(dev, REG_CONTROL, val);
-
- if (ret < 0) {
- return ret;
- }
-
- /* Date register isn't used. Set it to zero */
- ret = idt1337ag_write_reg(dev, REG_DATE, 0);
-
- /* Make sure the oscillator is running */
- ret = idt1337ag_read_reg(dev, REG_STATUS, &val);
-
- if (ret < 0) {
- return ret;
- }
-
- /* Clear IDT1337AG oscillator not running flag */
- val &= ~STATUS_OSF;
-
- /* Clear Alarm 2 flag */
- val &= ~STATUS_A2F;
-
- ret = idt1337ag_write_reg(dev, REG_STATUS, val);
-
- if (ret < 0) {
- return ret;
- }
-
- renesas_rtc_idt1337ag_reset_alarm(dev);
-
- /* Disable Alarm2 */
- idt1337ag_write_reg(dev, REG_MINUTE_ALARM2, DISABLE_ALARM);
- idt1337ag_write_reg(dev, REG_HOUR_ALARM2, DISABLE_ALARM);
- idt1337ag_write_reg(dev, REG_DAY_ALARM2, DISABLE_ALARM);
-
- /* Configure GPIO interrupt pin for IDT1337AG alarm pin */
-
- if (!device_is_ready(config->gpio_alert.port)) {
- LOG_ERR("Alert GPIO device not ready");
- return -ENODEV;
- }
-
- ret = gpio_pin_configure_dt(&config->gpio_alert, GPIO_INPUT);
-
- if (ret < 0) {
- LOG_ERR("Could not configure RTC alert pin");
- return ret;
- }
-
- gpio_init_callback(&data->gpio_cb,
- renesas_rtc_idt1337ag_isr, BIT(config->gpio_alert.pin));
-
- ret = gpio_add_callback(config->gpio_alert.port, &data->gpio_cb);
-
- if (ret < 0) {
- LOG_ERR("Could not set RTC alert pin callback");
- return ret;
- }
-
- data->dev = dev;
-
- return gpio_pin_interrupt_configure_dt(&config->gpio_alert,
- GPIO_INT_EDGE_FALLING);
-}
-
-#define IDT1337AG_INT_GPIOS \
- DT_PHANDLE_BY_IDX(DT_NODELABEL(idt1337ag), int_gpios, 0)
-
-/*
- * dt_flags is a uint8_t type. However, for platform/ec
- * the GPIO flags in the devicetree are expanded past 8 bits
- * to support the INPUT/OUTPUT and PULLUP/PULLDOWN properties.
- * Cast back to a gpio_dt_flags to compile, discarding the bits
- * that are not supported by the Zephyr GPIO API.
- */
-#define CROS_EC_GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \
- { \
- .port = \
- DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)), \
- .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \
- .dt_flags = \
- (gpio_dt_flags_t)DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \
- }
-
-static const struct renesas_rtc_idt1337ag_config renesas_rtc_idt1337ag_cfg_0 = {
- .bus = DEVICE_DT_GET(DT_INST_BUS(0)),
- .i2c_addr_flags = DT_INST_REG_ADDR(0),
- .gpio_alert =
- CROS_EC_GPIO_DT_SPEC_GET_BY_IDX(IDT1337AG_INT_GPIOS, gpios, 0)
-};
-
-static struct renesas_rtc_idt1337ag_data renesas_rtc_idt1337ag_data_0;
-
-DEVICE_DT_INST_DEFINE(0, renesas_rtc_idt1337ag_init, /* pm_control_fn= */ NULL,
- &renesas_rtc_idt1337ag_data_0,
- &renesas_rtc_idt1337ag_cfg_0,
- POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
- &renesas_rtc_idt1337ag_driver_api);
diff --git a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h
deleted file mode 100644
index 3296f80992..0000000000
--- a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __CROS_EC_RTC_IDT1337AG_H
-#define __CROS_EC_RTC_IDT1337AG_H
-
-/* Setting bit 6 of register 0Ah selects the DAY as alarm source */
-#define SELECT_DAYS_ALARM 0x40
-#define DISABLE_ALARM 0x80
-
-#define CONTROL_A1IE BIT(0)
-#define CONTROL_A2IE BIT(1)
-#define CONTROL_INTCN BIT(2)
-#define CONTROL_EOSC BIT(7)
-
-#define STATUS_A1F BIT(0)
-#define STATUS_A2F BIT(1)
-#define STATUS_OSF BIT(7)
-
-#define NUM_TIMER_REGS 7
-#define NUM_ALARM_REGS 4
-
-#define REG_SECONDS 0x00
-#define REG_MINUTES 0x01
-#define REG_HOURS 0x02
-#define REG_DAYS 0x03
-#define REG_DATE 0x04
-#define REG_MONTHS 0x05
-#define REG_YEARS 0x06
-#define REG_SECOND_ALARM1 0x07
-#define REG_MINUTE_ALARM1 0x08
-#define REG_HOUR_ALARM1 0x09
-#define REG_DAY_ALARM1 0x0a
-#define REG_MINUTE_ALARM2 0x0b
-#define REG_HOUR_ALARM2 0x0c
-#define REG_DAY_ALARM2 0x0d
-#define REG_CONTROL 0x0e
-#define REG_STATUS 0x0f
-
-/* Macros for indexing time_reg buffer */
-#define SECONDS 0
-#define MINUTES 1
-#define HOURS 2
-#define DAYS 3
-#define DATE 4
-#define MONTHS 5
-#define YEARS 6
-
-enum bcd_mask {
- SECONDS_MASK = 0x70,
- MINUTES_MASK = 0x70,
- HOURS24_MASK = 0x30,
- DAYS_MASK = 0x00,
- MONTHS_MASK = 0x10,
- YEARS_MASK = 0xf0
-};
-
-#endif /* __CROS_EC_RTC_IDT1337AG_H */