diff options
author | Jonathan Brandmeyer <jbrandmeyer@chromium.org> | 2018-09-25 10:13:34 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-09-25 15:48:08 -0700 |
commit | 8649d800a9dd9c23de199029b2db25827f687925 (patch) | |
tree | c4176eeaebb6b0d761895858e8d6b03b21a4526b /test/host_command.c | |
parent | de0629592aef6e9d77821bb89b62d2a733675e2b (diff) | |
download | chrome-ec-8649d800a9dd9c23de199029b2db25827f687925.tar.gz |
i2c: Do not attempt bus clear on split xfer failurestabilize-11101.B
If a split transaction fails after its first half, the chip driver has a
few options for dealing with the bus state. It can either release the
bus by sending a stop bit, or it can leave the bus busy and use a
repeated start for the next transaction. ChromeEC does not support
multimaster I2C, so either condition is acceptable.
TEST=boot a bip with a battery disconnected. Observe that the bus reset
error path is not taken when attempting to read the battery
identification registers.
BRANCH=none
BUG=b:116603165, b:112862656
Change-Id: Ieb29233b0701edc2135707247b15a637e9d4d25b
Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1243707
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'test/host_command.c')
0 files changed, 0 insertions, 0 deletions