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| author | Bhanu Prakash Maiya <bhanumaiya@google.com> | 2020-04-30 15:26:52 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-06-05 10:06:44 +0000 |
| commit | 86aacabcd3c2e496a43d291d9dee61e29edcc2d0 (patch) | |
| tree | 5a87bbbee684ce95de718f654b0086abfa87daac /include/spi.h | |
| parent | bc96d7077db615d849d398115af76b7b85f63e01 (diff) | |
| download | chrome-ec-86aacabcd3c2e496a43d291d9dee61e29edcc2d0.tar.gz | |
Bloonchipper: USART based transport layer for host command
1. USART host command layer in chip/stm32
2. Fix usart implementation in stm32
BUG=b:147849609
BRANCH=none
TEST=1. make BOARD=bloonchipper -j
2. usart request and response works on dragonclaw
Change-Id: Idd89d3e490f23aa528ecaf6510c13d16b405de13
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190531
Tested-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Diffstat (limited to 'include/spi.h')
| -rw-r--r-- | include/spi.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/include/spi.h b/include/spi.h index c42b7ab757..ad087a6ffc 100644 --- a/include/spi.h +++ b/include/spi.h @@ -8,6 +8,8 @@ #ifndef __CROS_EC_SPI_H #define __CROS_EC_SPI_H +#include "host_command.h" + /* * SPI Clock polarity and phase mode (0 - 3) * @code @@ -66,7 +68,8 @@ int spi_enable(int port, int enable); #define SPI_READBACK_ALL (-1) -/* Issue a SPI transaction. Assumes SPI port has already been enabled. +/* + * Issue a SPI transaction. Assumes SPI port has already been enabled. * * Transmits <txlen> bytes from <txdata>, throwing away the corresponding * received data, then transmits <rxlen> dummy bytes, saving the received data @@ -85,7 +88,8 @@ int spi_transaction(const struct spi_device_t *spi_device, const uint8_t *txdata, int txlen, uint8_t *rxdata, int rxlen); -/* Similar to spi_transaction(), but hands over to DMA for reading response. +/* + * Similar to spi_transaction(), but hands over to DMA for reading response. * Must call spi_transaction_flush() after this to make sure the response is * received. * Contrary the regular spi_transaction(), this function does NOT lock the @@ -101,6 +105,12 @@ int spi_transaction_flush(const struct spi_device_t *spi_device); /* Wait for async response received but do not de-assert chip select */ int spi_transaction_wait(const struct spi_device_t *spi_device); +/* + * Get SPI protocol information. This function is called in runtime if board's + * host command transport is SPI. + */ +enum ec_status spi_get_protocol_info(struct host_cmd_handler_args *args); + #ifdef CONFIG_SPI /** * Called when the NSS level changes, signalling the start or end of a SPI |