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author | Randall Spangler <rspangler@chromium.org> | 2013-07-23 18:13:15 -0700 |
---|---|---|
committer | ChromeBot <chrome-bot@google.com> | 2013-07-24 16:31:14 -0700 |
commit | e6f0c272a02d03a15f826b8c7282d0084c125b6b (patch) | |
tree | 35e57a253ef0dbd1692c06f57a3cdf9ed092d476 /chip | |
parent | b13a2aed146c7e54c21fe5d84f0a3ff1989a612b (diff) | |
download | chrome-ec-e6f0c272a02d03a15f826b8c7282d0084c125b6b.tar.gz |
Clean up and document UART config options
No functional changes, just renaming config options.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I91584cb1f8990dd0f980abd32c04465a66243e71
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63244
Diffstat (limited to 'chip')
-rw-r--r-- | chip/lm4/config_chip.h | 1 | ||||
-rw-r--r-- | chip/lm4/uart.c | 43 | ||||
-rw-r--r-- | chip/stm32/config-stm32l15x.h | 1 | ||||
-rw-r--r-- | chip/stm32/config_chip.h | 5 | ||||
-rw-r--r-- | chip/stm32/uart.c | 7 |
5 files changed, 28 insertions, 29 deletions
diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h index c2ddbbb702..6dd030a5d1 100644 --- a/chip/lm4/config_chip.h +++ b/chip/lm4/config_chip.h @@ -13,6 +13,7 @@ #define CONFIG_IRQ_COUNT 132 /* Use a bigger console output buffer */ +#undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 8192 /* Interval between HOOK_TICK notifications */ diff --git a/chip/lm4/uart.c b/chip/lm4/uart.c index 1e7df2f0a3..15b83e5551 100644 --- a/chip/lm4/uart.c +++ b/chip/lm4/uart.c @@ -14,8 +14,7 @@ #include "uart.h" #include "util.h" -/* Baud rate for UARTs */ -#define BAUD_RATE 115200 +#define CONFIG_UART_HOST_IRQ CONCAT2(LM4_IRQ_UART, CONFIG_UART_HOST) static int init_done; @@ -114,17 +113,17 @@ DECLARE_IRQ(LM4_IRQ_UART0, uart_ec_interrupt, 1); static void uart_host_interrupt(void) { /* Clear transmit and receive interrupt status */ - LM4_UART_ICR(CONFIG_HOST_UART) = 0x70; + LM4_UART_ICR(CONFIG_UART_HOST) = 0x70; #ifdef CONFIG_LPC /* * If we have space in our FIFO and a character is pending in LPC, * handle that character. */ - if (!(LM4_UART_FR(CONFIG_HOST_UART) & 0x20) && lpc_comx_has_char()) { + if (!(LM4_UART_FR(CONFIG_UART_HOST) & 0x20) && lpc_comx_has_char()) { /* Copy the next byte then disable transmit interrupt */ - LM4_UART_DR(CONFIG_HOST_UART) = lpc_comx_get_char(); - LM4_UART_IM(CONFIG_HOST_UART) &= ~0x20; + LM4_UART_DR(CONFIG_UART_HOST) = lpc_comx_get_char(); + LM4_UART_IM(CONFIG_UART_HOST) &= ~0x20; } /* @@ -133,12 +132,12 @@ static void uart_host_interrupt(void) * because LPC is much faster than UART, and we don't have flow control * on the UART receive-side either. */ - if (!(LM4_UART_FR(CONFIG_HOST_UART) & 0x10)) - lpc_comx_put_char(LM4_UART_DR(CONFIG_HOST_UART)); + if (!(LM4_UART_FR(CONFIG_UART_HOST) & 0x10)) + lpc_comx_put_char(LM4_UART_DR(CONFIG_UART_HOST)); #endif } /* Must be same prio as LPC interrupt handler so they don't preempt */ -DECLARE_IRQ(CONFIG_HOST_UART_IRQ, uart_host_interrupt, 2); +DECLARE_IRQ(CONFIG_UART_HOST_IRQ, uart_host_interrupt, 2); /** * Configure GPIOs for the UART module. @@ -148,13 +147,13 @@ static void configure_gpio(void) /* UART0 RX and TX are GPIO PA0:1 alternate function 1 */ gpio_set_alternate_function(LM4_GPIO_A, 0x03, 1); -#if defined(CONFIG_HOST_UART1_GPIOS_PC4_5) +#if (CONFIG_UART_HOST == 1) && defined(CONFIG_UART_HOST_GPIOS_PC4_5) /* UART1 RX and TX are GPIO PC4:5 alternate function 2 */ gpio_set_alternate_function(LM4_GPIO_C, 0x30, 2); -#elif defined(CONFIG_HOST_UART1_GPIOS_PB0_1) +#elif (CONFIG_UART_HOST == 1) && defined(CONFIG_UART_HOST_GPIOS_PB0_1) /* UART1 RX and TX are GPIO PB0:1 alternate function 1 */ gpio_set_alternate_function(LM4_GPIO_B, 0x03, 1); -#elif defined(CONFIG_HOST_UART2_GPIOS_PG4_5) +#elif (CONFIG_UART_HOST == 2) && defined(CONFIG_UART_HOST_GPIOS_PG4_5) /* UART2 RX and TX are GPIO PG4:5 alternate function 1 */ gpio_set_alternate_function(LM4_GPIO_G, 0x30, 1); #else @@ -169,10 +168,10 @@ static void uart_config(int port) /* Use the internal oscillator */ LM4_UART_CC(port) = 0x1; /* Set the baud rate divisor */ - LM4_UART_IBRD(port) = (INTERNAL_CLOCK / 16) / BAUD_RATE; + LM4_UART_IBRD(port) = (INTERNAL_CLOCK / 16) / CONFIG_UART_BAUD_RATE; LM4_UART_FBRD(port) = - (((INTERNAL_CLOCK / 16) % BAUD_RATE) * 64 - + BAUD_RATE / 2) / BAUD_RATE; + (((INTERNAL_CLOCK / 16) % CONFIG_UART_BAUD_RATE) * 64 + + CONFIG_UART_BAUD_RATE / 2) / CONFIG_UART_BAUD_RATE; /* * 8-N-1, FIFO enabled. Must be done after setting * the divisor for the new divisor to take effect. @@ -199,7 +198,7 @@ void uart_init(void) volatile uint32_t scratch __attribute__((unused)); /* Enable UART0 and Host UART and delay a few clocks */ - LM4_SYSTEM_RCGCUART |= (1 << CONFIG_HOST_UART) | 1; + LM4_SYSTEM_RCGCUART |= (1 << CONFIG_UART_HOST) | 1; scratch = LM4_SYSTEM_RCGCUART; /* Configure GPIOs */ @@ -207,7 +206,7 @@ void uart_init(void) /* Configure UARTs (identically) */ uart_config(0); - uart_config(CONFIG_HOST_UART); + uart_config(CONFIG_UART_HOST); /* * Enable interrupts for UART0 only. Host UART will have to wait @@ -224,18 +223,18 @@ void uart_init(void) void uart_comx_enable(void) { - uart_clear_rx_fifo(CONFIG_HOST_UART); - task_enable_irq(CONFIG_HOST_UART_IRQ); + uart_clear_rx_fifo(CONFIG_UART_HOST); + task_enable_irq(CONFIG_UART_HOST_IRQ); } int uart_comx_putc_ok(void) { - if (LM4_UART_FR(CONFIG_HOST_UART) & 0x20) { + if (LM4_UART_FR(CONFIG_UART_HOST) & 0x20) { /* * FIFO is full, so enable transmit interrupt to let us know * when it empties. */ - LM4_UART_IM(CONFIG_HOST_UART) |= 0x20; + LM4_UART_IM(CONFIG_UART_HOST) |= 0x20; return 0; } else { return 1; @@ -244,7 +243,7 @@ int uart_comx_putc_ok(void) void uart_comx_putc(int c) { - LM4_UART_DR(CONFIG_HOST_UART) = c; + LM4_UART_DR(CONFIG_UART_HOST) = c; } /*****************************************************************************/ diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h index ad3e95e099..eef90576d4 100644 --- a/chip/stm32/config-stm32l15x.h +++ b/chip/stm32/config-stm32l15x.h @@ -47,6 +47,7 @@ #define CONFIG_IRQ_COUNT 45 /* Lots of RAM, so use bigger UART buffer */ +#undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 2048 /* Flash erases to 0, not 1 */ diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h index c34a683f7c..a06d590e31 100644 --- a/chip/stm32/config_chip.h +++ b/chip/stm32/config_chip.h @@ -6,7 +6,10 @@ #ifndef __CROS_EC_CONFIG_CHIP_H #define __CROS_EC_CONFIG_CHIP_H -/* use variant specific configuration for flash / UART / IRQ */ +/* Default to UART 1 for EC console */ +#define CONFIG_UART_CONSOLE 1 + +/* Use variant specific configuration for flash / UART / IRQ */ #if defined(CHIP_VARIANT_stm32l15x) #include "config-stm32l15x.h" #elif defined(CHIP_VARIANT_stm32f100) diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index cade7542f8..77b5d93623 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -13,13 +13,8 @@ #include "uart.h" #include "util.h" -/* Baud rate for UARTs */ -#ifndef CONFIG_UART_BAUD_RATE -#define CONFIG_UART_BAUD_RATE 115200 -#endif - /* Console USART index */ -#define UARTN CONFIG_CONSOLE_UART +#define UARTN CONFIG_UART_CONSOLE static int init_done; /* Initialization done? */ static int should_stop; /* Last TX control action */ |