diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2016-11-08 11:56:38 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-09 18:40:00 -0800 |
| commit | 5e8a2255ab6f41316001ecf381612fc89c042622 (patch) | |
| tree | 16c36fb0e6f6fda4951102a4be268c66e944e911 /chip/stm32 | |
| parent | 3857a3487340b246e66bcc3d146b36db0daf62e4 (diff) | |
| download | chrome-ec-5e8a2255ab6f41316001ecf381612fc89c042622.tar.gz | |
stm32f0: Allow change of external int priorities
This change allows each board to customize external interrupt
priorities.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I5941f368ea70a069b34ce1d98508a1fad1ac22da
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/408796
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/stm32')
| -rw-r--r-- | chip/stm32/config_chip.h | 4 | ||||
| -rw-r--r-- | chip/stm32/gpio.c | 6 |
2 files changed, 7 insertions, 3 deletions
diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h index b87d14931c..cc1926dfab 100644 --- a/chip/stm32/config_chip.h +++ b/chip/stm32/config_chip.h @@ -9,6 +9,10 @@ #ifdef CHIP_FAMILY_STM32F0 /* CPU core BFD configuration */ #include "core/cortex-m0/config_core.h" +/* IRQ priorities */ +#define STM32_IRQ_EXT0_1_PRIORITY 1 +#define STM32_IRQ_EXT2_3_PRIORITY 1 +#define STM32_IRQ_EXTI4_15_PRIORITY 1 #else /* CPU core BFD configuration */ #include "core/cortex-m/config_core.h" diff --git a/chip/stm32/gpio.c b/chip/stm32/gpio.c index a2ea8fad94..7767fbf324 100644 --- a/chip/stm32/gpio.c +++ b/chip/stm32/gpio.c @@ -118,7 +118,7 @@ void __keep gpio_interrupt(void) } } #ifdef CHIP_FAMILY_STM32F0 -DECLARE_IRQ(STM32_IRQ_EXTI0_1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2_3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4_15, gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI0_1, gpio_interrupt, STM32_IRQ_EXT0_1_PRIORITY); +DECLARE_IRQ(STM32_IRQ_EXTI2_3, gpio_interrupt, STM32_IRQ_EXT2_3_PRIORITY); +DECLARE_IRQ(STM32_IRQ_EXTI4_15, gpio_interrupt, STM32_IRQ_EXTI4_15_PRIORITY); #endif |