servo_v4: Fix ADC console command

The console adc command prints adc values in the
order they appear in hardware, however they are lableled
in the order they are enumerated in board.h, which is not
necessarily the same.

This prints the correct name and value pairs, and removes
the adc_read_all_channels function which is not otherwise
used.

BUG=chromium:571476
BRANCH=None
TEST="adc" command associates correct values with names now.

Change-Id: I688641953d20082224b4120eaefe0d634ad4c74c
Signed-off-by: Nick Sanders <nsanders@google.com>
Reviewed-on: https://chromium-review.googlesource.com/340892
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>

3 files changed, 0 insertions, 145 deletions

diff --git a/chip/stm32/adc-stm32f0.c b/chip/stm32/adc-stm32f0.c
index ca111d055e..fc6c11f334 100644
--- a/chip/stm32/adc-stm32f0.c
+++ b/chip/stm32/adc-stm32f0.c
@@ -284,67 +284,6 @@ int adc_read_channel(enum adc_channel ch)
 	return value * adc->factor_mul / adc->factor_div + adc->shift;
 }
 
-int adc_read_all_channels(int *data)
-{
-	int i;
-	uint32_t channels = 0;
-	const struct adc_t *adc;
-	int restore_watchdog = 0;
-	int ret = EC_SUCCESS;
-	int blocking_read = !profile.ier_reg;
-
-	mutex_lock(&adc_lock);
-
-	if (adc_watchdog_enabled()) {
-		ASSERT(blocking_read);
-		restore_watchdog = 1;
-		adc_disable_watchdog_no_lock();
-	}
-
-	/* Select all used channels */
-	for (i = 0; i < ADC_CH_COUNT; ++i)
-		channels |= 1 << adc_channels[i].channel;
-	STM32_ADC_CHSELR = channels;
-
-	/* Enable DMA */
-	STM32_ADC_CFGR1 |= STM32_ADC_CFGR1_DMAEN;
-
-	dma_clear_isr(STM32_DMAC_ADC);
-	dma_start_rx(profile.dma_option,
-		     profile.dma_buffer_size * ADC_CH_COUNT,
-		     data);
-
-	/* Clear flags */
-	STM32_ADC_ISR = 0xe;
-	/* Enable requested interrupt(s) */
-	STM32_ADC_IER |= profile.ier_reg;
-	if (!blocking_read)
-		task_enable_irq(STM32_IRQ_ADC_COMP);
-
-	STM32_ADC_CR |= 1 << 2; /* ADSTART */
-
-	if (blocking_read) {
-		if (dma_wait(STM32_DMAC_ADC)) {
-			ret = EC_ERROR_UNKNOWN;
-			goto fail;
-		}
-
-		for (i = 0; i < ADC_CH_COUNT; ++i) {
-			adc = adc_channels + i;
-			data[i] = (data[i] & 0xffff) *
-				   adc->factor_mul / adc->factor_div +
-				   adc->shift;
-		}
-	}
-
-fail:
-	if (restore_watchdog)
-		adc_enable_watchdog_no_lock();
-	if (blocking_read)
-		mutex_unlock(&adc_lock);
-	return ret;
-}
-
 static void adc_init(void)
 {
 	/*
diff --git a/chip/stm32/adc-stm32f3.c b/chip/stm32/adc-stm32f3.c
index 94212b2155..a8203bae24 100644
--- a/chip/stm32/adc-stm32f3.c
+++ b/chip/stm32/adc-stm32f3.c
@@ -220,53 +220,6 @@ int adc_read_channel(enum adc_channel ch)
 	       value * adc->factor_mul / adc->factor_div + adc->shift;
 }
 
-int adc_read_all_channels(int *data)
-{
-	int i;
-	int16_t raw_data[ADC_CH_COUNT];
-	const struct adc_t *adc;
-	int restore_watchdog = 0;
-	int ret = EC_SUCCESS;
-
-	if (!adc_powered())
-		return EC_ERROR_UNKNOWN;
-
-	mutex_lock(&adc_lock);
-
-	if (adc_watchdog_enabled()) {
-		restore_watchdog = 1;
-		adc_disable_watchdog_no_lock();
-	}
-
-	adc_configure_all();
-
-	dma_clear_isr(STM32_DMAC_ADC);
-	dma_start_rx(&dma_adc_option, ADC_CH_COUNT, raw_data);
-
-	/* Start conversion */
-	STM32_ADC_CR2 |= (1 << 0); /* ADON */
-
-	if (dma_wait(STM32_DMAC_ADC)) {
-		ret = EC_ERROR_UNKNOWN;
-		goto exit_all_channels;
-	}
-
-	for (i = 0; i < ADC_CH_COUNT; ++i) {
-		adc = adc_channels + i;
-		data[i] = raw_data[i] * adc->factor_mul / adc->factor_div +
-			  adc->shift;
-	}
-
-exit_all_channels:
-	dma_disable(STM32_DMAC_ADC);
-
-	if (restore_watchdog)
-		adc_enable_watchdog_no_lock();
-
-	mutex_unlock(&adc_lock);
-	return ret;
-}
-
 static void adc_init(void)
 {
 	/*
diff --git a/chip/stm32/adc-stm32l.c b/chip/stm32/adc-stm32l.c
index 3e8edde278..5a67254f29 100644
--- a/chip/stm32/adc-stm32l.c
+++ b/chip/stm32/adc-stm32l.c
@@ -174,40 +174,3 @@ int adc_read_channel(enum adc_channel ch)
 	return (value == ADC_READ_ERROR) ? ADC_READ_ERROR :
 	       value * adc->factor_mul / adc->factor_div + adc->shift;
 }
-
-int adc_read_all_channels(int *data)
-{
-	int i;
-	int16_t raw_data[ADC_CH_COUNT];
-	const struct adc_t *adc;
-	int ret = EC_SUCCESS;
-
-	mutex_lock(&adc_lock);
-
-	adc_prepare();
-
-	adc_configure_all();
-
-	dma_start_rx(&dma_adc_option, ADC_CH_COUNT, raw_data);
-
-	/* Start conversion */
-	STM32_ADC_CR2 |= (1 << 30); /* SWSTART */
-
-	if (dma_wait(STM32_DMAC_ADC)) {
-		ret = EC_ERROR_UNKNOWN;
-		goto exit_all_channels;
-	}
-	dma_clear_isr(STM32_DMAC_ADC);
-
-	for (i = 0; i < ADC_CH_COUNT; ++i) {
-		adc = adc_channels + i;
-		data[i] = raw_data[i] * adc->factor_mul / adc->factor_div +
-			  adc->shift;
-	}
-
-exit_all_channels:
-	adc_release();
-	mutex_unlock(&adc_lock);
-
-	return ret;
-}