summaryrefslogtreecommitdiff
path: root/board/puff
diff options
context:
space:
mode:
authorAndrew McRae <amcrae@google.com>2020-06-21 13:28:53 +1000
committerCommit Bot <commit-bot@chromium.org>2020-06-23 09:54:36 +0000
commitfb16c5a5a9fd4320eb54ac3463a72d2320989e75 (patch)
treeddb00a1dfb8763f2c59bee9bdb7ae6caca291cea /board/puff
parent6ac3fe8e804516b12c5747e0aae728fcc3f79153 (diff)
downloadchrome-ec-fb16c5a5a9fd4320eb54ac3463a72d2320989e75.tar.gz
Puff: Only reset TCPC on power-on restart
Reset the TCPC after a power-on restart, and clear any explicit PD contract so that the previous state is not restored. Even though Puff does not have BBRAM, the state is required for restarts so that PD can determine when power needs to be renegotiated explicitly through sending a soft reset, or not since the system is starting from a fresh connection. The impact was that a system powered from a type-C charger would not go into recovery since a restart assumed it was an initial charger connection (so no soft reset was sent), the wait for capabilities timed out, and a hard reset was sent, causing the charger to cycle power, and thereby skipping the recovery stage. BUG=b:159281839 TEST=Confirm that recovery can be entered using type-C charger. BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: Ibecf75e999ae5ff15580ce69c3a58a3c49930b48 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2251706 Tested-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
Diffstat (limited to 'board/puff')
-rw-r--r--board/puff/board.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/board/puff/board.c b/board/puff/board.c
index 97967d6efd..0ea018ebc3 100644
--- a/board/puff/board.c
+++ b/board/puff/board.c
@@ -523,8 +523,7 @@ static void board_tcpc_init(void)
* With EFSv2, it is possible to be in RW without
* having reset the TCPC.
*/
- if (system_get_reset_flags() &
- (EC_RESET_FLAG_RESET_PIN | EC_RESET_FLAG_POWER_ON))
+ if (system_get_reset_flags() & EC_RESET_FLAG_POWER_ON)
board_reset_pd_mcu();
/* Enable TCPC interrupts. */
gpio_enable_interrupt(GPIO_USB_C0_TCPPC_INT_ODL);