diff options
| author | Nicolas Boichat <drinkcat@chromium.org> | 2020-05-25 13:53:35 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-08-08 00:32:29 +0000 |
| commit | e03bbafca5d83361f32233a6bfd09c65702102b6 (patch) | |
| tree | 366b0befa6c626c810cd7959fb960259b3916e9d /board/poppy/board.c | |
| parent | 1e5ff897b351f7908c66325c88b4340b111a7962 (diff) | |
| download | chrome-ec-e03bbafca5d83361f32233a6bfd09c65702102b6.tar.gz | |
poppy: Disable PU on GPIO10
For NPCX5, when CR_SIN is selected via DEVALTC.UART_SL2,
the PU/PD is selected according to GPIO10 configuration
(and not according to GPIO64).
Also, disable the relevant WKIEN bit for GPIO10.
BRANCH=poppy
BUG=b:111215677
TEST=Boot soraka
Change-Id: Icee01043dcd562f9b72f2097b9a988d5535e0ffc
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2214454
Diffstat (limited to 'board/poppy/board.c')
| -rw-r--r-- | board/poppy/board.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/board/poppy/board.c b/board/poppy/board.c index cceff650b1..32d386f0a5 100644 --- a/board/poppy/board.c +++ b/board/poppy/board.c @@ -559,6 +559,16 @@ static void board_init(void) } #endif +#ifndef BOARD_LUX + /* + * see (b/111215677): setting the internal PU/PD of the unused pin + * GPIO10 affects the ball K10 when it is selected to CR_SIN. + * Disabing the WKINEN bit of GPIO10 insteading setting its PU/PD to + * bypass this issue. + */ + NPCX_WKINEN(MIWU_TABLE_1, MIWU_GROUP_2) &= 0xFE; +#endif + /* Enable Gyro interrupts */ gpio_enable_interrupt(GPIO_ACCELGYRO3_INT_L); |