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author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2019-10-02 14:27:47 -0600 |
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committer | Commit Bot <commit-bot@chromium.org> | 2019-11-01 18:43:42 +0000 |
commit | 9577704f30c7e824c0590264df22d95a2c706575 (patch) | |
tree | 566b5beeeae8b343803718101ba0b00c940506cb /board/pdeval-stm32f072 | |
parent | e8121e83e478fef2d5a29304be900311f3f020c4 (diff) | |
download | chrome-ec-9577704f30c7e824c0590264df22d95a2c706575.tar.gz |
Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT
Certain SKUs of certain boards have lesser number of USB PD ports than
defined by CONFIG_USB_PD_PORT_COUNT. Hence rename
CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT.
BUG=b:140816510, b:143196487
BRANCH=octopus
TEST=make -j buildall; Boot to ChromeOS
Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/pdeval-stm32f072')
-rw-r--r-- | board/pdeval-stm32f072/PD_evaluation.md | 2 | ||||
-rw-r--r-- | board/pdeval-stm32f072/board.c | 2 | ||||
-rw-r--r-- | board/pdeval-stm32f072/board.h | 2 | ||||
-rw-r--r-- | board/pdeval-stm32f072/usb_pd_policy.c | 6 |
4 files changed, 6 insertions, 6 deletions
diff --git a/board/pdeval-stm32f072/PD_evaluation.md b/board/pdeval-stm32f072/PD_evaluation.md index 395466f477..95e31996fc 100644 --- a/board/pdeval-stm32f072/PD_evaluation.md +++ b/board/pdeval-stm32f072/PD_evaluation.md @@ -35,7 +35,7 @@ then document the new `CONFIG_USB_PD_TCPM_` variable in the [include/config.h](. ### Board configuration -In [board/pdeval-stm32f072/board.h](board.h), you can update `CONFIG_USB_PD_PORT_COUNT` to the actual number of ports on your board. +In [board/pdeval-stm32f072/board.h](board.h), you can update `CONFIG_USB_PD_PORT_MAX_COUNT` to the actual number of ports on your board. You also need to create/delete the corresponding `PD_Cx` tasks in [board/pdeval-stm32f072/ec.tasklist](ec.tasklist). By default, the firmware is using I2C1 with SCL/SDA on pins PB6 and PB7, running with a 100kHz clock, and tries to talk to TCPCs at i2c slave addresses 0x9c and 0x9e. diff --git a/board/pdeval-stm32f072/board.c b/board/pdeval-stm32f072/board.c index d9462f4e1d..93f3f87082 100644 --- a/board/pdeval-stm32f072/board.c +++ b/board/pdeval-stm32f072/board.c @@ -57,7 +57,7 @@ const struct i2c_port_t i2c_ports[] = { }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { diff --git a/board/pdeval-stm32f072/board.h b/board/pdeval-stm32f072/board.h index 7d25def826..b008edc860 100644 --- a/board/pdeval-stm32f072/board.h +++ b/board/pdeval-stm32f072/board.h @@ -25,7 +25,7 @@ #define CONFIG_USB_PD_ALT_MODE #define CONFIG_USB_PD_ALT_MODE_DFP #define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USB_PD_TCPM_TCPCI #define CONFIG_USB_PD_VBUS_DETECT_TCPC #define CONFIG_USB_PD_TCPM_ANX7447 diff --git a/board/pdeval-stm32f072/usb_pd_policy.c b/board/pdeval-stm32f072/usb_pd_policy.c index 283483d566..5821437f20 100644 --- a/board/pdeval-stm32f072/usb_pd_policy.c +++ b/board/pdeval-stm32f072/usb_pd_policy.c @@ -36,7 +36,7 @@ const uint32_t pd_snk_pdo[] = { const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); #if defined(CONFIG_USB_PD_TCPM_MUX) && defined(CONFIG_USB_PD_TCPM_ANX7447) -struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { +struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { { .driver = &anx7447_usb_mux_driver, }, @@ -253,8 +253,8 @@ int pd_custom_vdm(int port, int cnt, uint32_t *payload, } #ifdef CONFIG_USB_PD_ALT_MODE_DFP -static int dp_flags[CONFIG_USB_PD_PORT_COUNT]; -static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT]; +static int dp_flags[CONFIG_USB_PD_PORT_MAX_COUNT]; +static uint32_t dp_status[CONFIG_USB_PD_PORT_MAX_COUNT]; static void svdm_safe_dp_mode(int port) { |