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author | Tommy Chung <tommy.chung@quanta.corp-partner.google.com> | 2022-06-29 10:57:58 +0800 |
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committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-04 06:50:24 +0000 |
commit | 1eb23b30eb80a9f7d47dd8490f155c0f453b227e (patch) | |
tree | bbb96784620b33a93c95029ccbfd468c6f2cfba6 /board/dojo/board.c | |
parent | 712c9294e62ff28c7ae8f8da7deda2d7b9551e87 (diff) | |
download | chrome-ec-1eb23b30eb80a9f7d47dd8490f155c0f453b227e.tar.gz |
dojo: Do enable/disable nvme separately
Enable/Disable nvme sould be done separately for specific SOC PCIE
function demand. Also, set enable nvme priority to HOOK_PRIO_FIRST
when chipset resume (see bug for more details).
BUG=b:236790585
BRANCH=cherry
TEST=make sure that nvme power on timing will not cause PCIe driver
timeout when chipset resume.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: I60b84b3f2c29f6886269cf5fbe78054d93a5a85e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3734209
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Diffstat (limited to 'board/dojo/board.c')
-rw-r--r-- | board/dojo/board.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/board/dojo/board.c b/board/dojo/board.c index 7ca737f337..690f9aa547 100644 --- a/board/dojo/board.c +++ b/board/dojo/board.c @@ -402,16 +402,26 @@ static void board_init(void) } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); -static void board_do_chipset_resume(void) +static void enable_nvme(void) { gpio_set_level(GPIO_EN_PP3300_SSD, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, enable_nvme, HOOK_PRIO_FIRST); + +static void disable_nvme(void) +{ + gpio_set_level(GPIO_EN_PP3300_SSD, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, disable_nvme, HOOK_PRIO_DEFAULT); + +static void board_do_chipset_resume(void) +{ gpio_set_level(GPIO_EN_KB_BL, 1); } DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_do_chipset_resume, HOOK_PRIO_DEFAULT); static void board_do_chipset_suspend(void) { - gpio_set_level(GPIO_EN_PP3300_SSD, 0); gpio_set_level(GPIO_EN_KB_BL, 0); } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_do_chipset_suspend, HOOK_PRIO_DEFAULT); |