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| author | Caveh Jalali <caveh@chromium.org> | 2023-03-10 22:51:18 -0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-04-02 00:47:17 +0000 |
| commit | fafe10a6fea351d7922ee68cff8c77066b8b8eca (patch) | |
| tree | cf175a6827d91102a81923bf5b04647d875b6c69 /CPPLINT.cfg | |
| parent | b201453a4d8be2fefbdab24de4d4e40c059b0099 (diff) | |
| download | chrome-ec-fafe10a6fea351d7922ee68cff8c77066b8b8eca.tar.gz | |
ppc/nx20p348x: Do not set reserved bit
When we configure the set of unmasked interrupts, we inadvertently also
set a reserved bit in the interrupt1 mask register that should remain at
its reset value.
BRANCH=none
BUG=none
TEST=verified bit is not set with ppc_dump
Change-Id: Ia90771e1556068ba37746f42f18bbd51c808d23b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4331570
Reviewed-by: Madhu 🌱 <mparuchuri@google.com>
Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'CPPLINT.cfg')
0 files changed, 0 insertions, 0 deletions