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author | Ting Shen <phoenixshen@google.com> | 2023-03-31 16:08:43 +0800 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-05-17 10:47:43 +0000 |
commit | 7ce45f8de9a0a91b1bbd1402acb3132abcd16cc3 (patch) | |
tree | 6f5aa82237cc95f06d3902a4e9161f3b2e10e0db | |
parent | 1a97702ae02f3127841c4a8cc6d8f94de4b38e9e (diff) | |
download | chrome-ec-7ce45f8de9a0a91b1bbd1402acb3132abcd16cc3.tar.gz |
power/mt8186: move ap-idle to highest priority at power_chipset_init
AP_IDLE should have higher priority over AP_OFF.
(note that in this version there's another bug that the S5->S0 hooks
are not invoked when sysjump to RW)
BUG=b:280408533
TEST=AP can boot to S0 after following steps:
1) dut-control power_state:rec
2) wait a few seconds to enter recovery screen
3) dut-control power_state:warm_reset
Change-Id: I0b69f082f09afac93275bef7d93ca7123ab1099f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4387555
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Sung-Chi Li <lschyi@chromium.org>
-rw-r--r-- | power/mt8186.c | 19 | ||||
-rw-r--r-- | zephyr/test/krabby/src/power_seq.c | 17 |
2 files changed, 24 insertions, 12 deletions
diff --git a/power/mt8186.c b/power/mt8186.c index 9550a28c8a..6e4c0b4945 100644 --- a/power/mt8186.c +++ b/power/mt8186.c @@ -83,7 +83,7 @@ static bool is_resetting; /* indicate MT8186 is AP reset is held by servo or GSC. */ test_export_static bool is_held; /* indicate MT8186 is processing a AP forcing shutdown. */ -static bool is_shutdown; +test_export_static bool is_shutdown; /* indicate MT8186 has been dropped to S5G3 from the last IN_AP_RST state . */ static bool is_s5g3_passed; /* @@ -290,6 +290,14 @@ enum power_state power_chipset_init(void) int exit_hard_off = 1; enum power_state init_state = power_get_signal_state(); + if (system_get_reset_flags() & EC_RESET_FLAG_AP_IDLE) { + if (init_state == POWER_S0) { + disable_sleep(SLEEP_MASK_AP_RUN); + } + + return init_state; + } + if (system_jumped_late()) { if (init_state == POWER_S0) { disable_sleep(SLEEP_MASK_AP_RUN); @@ -307,12 +315,6 @@ enum power_state power_chipset_init(void) * the only way is to ask GPIO_AC_PRESENT directly. */ exit_hard_off = 0; - } else if (system_get_reset_flags() & EC_RESET_FLAG_AP_IDLE) { - if (init_state == POWER_S0) { - disable_sleep(SLEEP_MASK_AP_RUN); - } - - return init_state; } /* If the init signal state is at S5, assigns it to G3 to match the @@ -335,9 +337,10 @@ enum power_state power_chipset_init(void) /* Auto-power on */ mt8186_exit_off(); - if (init_state != POWER_G3 && !exit_hard_off) + if (init_state != POWER_G3 && !exit_hard_off) { /* Force shutdown from S5 if the PMIC is already up. */ chipset_force_shutdown(CHIPSET_SHUTDOWN_INIT); + } return init_state; } diff --git a/zephyr/test/krabby/src/power_seq.c b/zephyr/test/krabby/src/power_seq.c index de88342831..200eb0e987 100644 --- a/zephyr/test/krabby/src/power_seq.c +++ b/zephyr/test/krabby/src/power_seq.c @@ -364,6 +364,9 @@ static void power_chipset_init_subtest(enum power_state signal_state, enum power_state expected_state, int line) { + const struct gpio_dt_spec *sys_rst_odl = + gpio_get_dt_spec(GPIO_SYS_RST_ODL); + set_signal_state(signal_state); system_jumped_late_fake.return_val = jumped_late; @@ -376,11 +379,10 @@ static void power_chipset_init_subtest(enum power_state signal_state, task_wake(TASK_ID_CHIPSET); k_sleep(K_SECONDS(1)); - /* need 10 seconds to drop from s5 to g3 */ - if (expected_state == POWER_G3) + if (signal_state == expected_state) { + /* need 10 seconds to drop from s5 to g3 */ k_sleep(K_SECONDS(S5_INACTIVE_SEC)); - if (signal_state == expected_state) { /* Expect nothing changed */ zassert_equal(chipset_pre_init_hook_fake.call_count, 0, "test_power_chipset_init line %d failed", line); @@ -389,6 +391,11 @@ static void power_chipset_init_subtest(enum power_state signal_state, /* Expect boot to S0 and fail at S5->S3 */ zassert_equal(chipset_pre_init_hook_fake.call_count, 1, "test_power_chipset_init line %d failed", line); + } else if (expected_state == POWER_G3 && signal_state == POWER_S0) { + zassert_equal(gpio_emul_output_get(sys_rst_odl->port, + sys_rst_odl->pin), + 0, "test_power_chipset_init line %d failed", + line); } else { zassert_unreachable(); } @@ -415,7 +422,7 @@ ZTEST(power_seq, test_power_chipset_init) power_chipset_init_subtest(POWER_S0, true, EC_RESET_FLAG_HIBERNATE, POWER_S0, __LINE__); power_chipset_init_subtest(POWER_G3, true, EC_RESET_FLAG_AP_IDLE, - POWER_S0, __LINE__); + POWER_G3, __LINE__); power_chipset_init_subtest(POWER_S0, true, EC_RESET_FLAG_AP_IDLE, POWER_S0, __LINE__); @@ -426,6 +433,8 @@ ZTEST(power_seq, test_power_chipset_init) /* AP off => stay at G3 */ power_chipset_init_subtest(POWER_G3, false, EC_RESET_FLAG_AP_OFF, POWER_G3, __LINE__); + power_chipset_init_subtest(POWER_S0, false, EC_RESET_FLAG_AP_OFF, + POWER_G3, __LINE__); /* Boot from hibernate => stay at G3 */ gpio_emul_input_set(ac_present->port, ac_present->pin, 1); |