npcx: Define CONFIG_DATA_RAM_SIZE

This patch defines CONFIG_DATA_RAM_SIZE, which indicates the size
of the RAM used for data, thus can be marked as non-executable.

If it's not defined, it defaults to CONFIG_RAM_SIZE. Thus, other chips
are not affected.

BUG=b:36037354
BRANCH=none
TEST=buildall. Run 'sysjump disable' on Reef and verify mpu_protect_ram
is successful.

Change-Id: I54d74fd1dabff7e1013fff2542fd02c3646803d1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/596518
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

5 files changed, 27 insertions, 14 deletions

diff --git a/board/reef/board.h b/board/reef/board.h
index f2af983408..5550928089 100644
--- a/board/reef/board.h
+++ b/board/reef/board.h
@@ -124,8 +124,6 @@
 #undef   CONFIG_EXTPOWER_DEBOUNCE_MS
 #define  CONFIG_EXTPOWER_DEBOUNCE_MS 1000
 #define CONFIG_FPU
-/* Region sizes are not a power of 2 so we can't use MPU */
-#undef  CONFIG_MPU
 #define CONFIG_HOSTCMD_FLASH_SPI_INFO
 #define CONFIG_I2C
 #define CONFIG_I2C_MASTER
diff --git a/chip/npcx/config_chip-npcx5.h b/chip/npcx/config_chip-npcx5.h
index 71c8d8d7af..98ea716646 100644
--- a/chip/npcx/config_chip-npcx5.h
+++ b/chip/npcx/config_chip-npcx5.h
@@ -27,11 +27,12 @@
 
 /*****************************************************************************/
 /* Memory mapping */
-#define NPCX_BTRAM_SIZE    0x800 /* 2KB data ram used by booter. */
-#define CONFIG_RAM_BASE    0x200C0000 /* memory address of data ram */
-#define CONFIG_RAM_SIZE    (0x0008000 - NPCX_BTRAM_SIZE) /* 30KB data ram */
-#define CONFIG_LPRAM_BASE  0x40001600 /* memory address of lpwr ram */
-#define CONFIG_LPRAM_SIZE  0x00000620 /* 1568B low power ram */
+#define NPCX_BTRAM_SIZE		0x800 /* 2KB data ram used by booter. */
+#define CONFIG_RAM_BASE		0x200C0000 /* memory address of data ram */
+#define CONFIG_DATA_RAM_SIZE	0x00008000 /* Size of data RAM */
+#define CONFIG_RAM_SIZE		(CONFIG_DATA_RAM_SIZE - NPCX_BTRAM_SIZE)
+#define CONFIG_LPRAM_BASE	0x40001600 /* memory address of lpwr ram */
+#define CONFIG_LPRAM_SIZE	0x00000620 /* 1568B low power ram */
 
 /* Use chip variant to specify the size and start address of program memory */
 #if defined(CHIP_VARIANT_NPCX5M5G)
@@ -49,8 +50,7 @@
 #endif
 
 /* Total RAM size checking for npcx ec */
-#define NPCX_RAM_SIZE (NPCX_BTRAM_SIZE + CONFIG_RAM_SIZE + \
-				NPCX_PROGRAM_MEMORY_SIZE)
+#define NPCX_RAM_SIZE (CONFIG_DATA_RAM_SIZE + NPCX_PROGRAM_MEMORY_SIZE)
 #if defined(CHIP_VARIANT_NPCX5M5G)
 /* 128KB RAM in NPCX5M5G */
 #if (NPCX_RAM_SIZE != 0x20000)
diff --git a/chip/npcx/config_chip-npcx7.h b/chip/npcx/config_chip-npcx7.h
index 1ccc2c64cb..5e0c538d8e 100644
--- a/chip/npcx/config_chip-npcx7.h
+++ b/chip/npcx/config_chip-npcx7.h
@@ -47,7 +47,8 @@
 /* Use chip variant to specify the size and start address of program memory */
 #if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G)
 /* 62KB data ram */
-#define CONFIG_RAM_SIZE    (0x00010000 - NPCX_BTRAM_SIZE)
+#define CONFIG_DATA_RAM_SIZE	0x00010000
+#define CONFIG_RAM_SIZE		(CONFIG_DATA_RAM_SIZE - NPCX_BTRAM_SIZE)
 /* 192KB RAM for FW code */
 #define NPCX_PROGRAM_MEMORY_SIZE (192 * 1024)
 /* program memory base address for 192KB Code RAM (ie. 0x100C0000 - 192KB) */
@@ -57,8 +58,7 @@
 #endif
 
 /* Total RAM size checking for npcx ec */
-#define NPCX_RAM_SIZE (NPCX_BTRAM_SIZE + CONFIG_RAM_SIZE + \
-				NPCX_PROGRAM_MEMORY_SIZE)
+#define NPCX_RAM_SIZE (CONFIG_DATA_RAM_SIZE + NPCX_PROGRAM_MEMORY_SIZE)
 #if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6G)
 /* 256KB RAM in NPCX7M6F */
 #if (NPCX_RAM_SIZE != 0x40000)
diff --git a/core/cortex-m/mpu.c b/core/cortex-m/mpu.c
index e49a8d533d..d12191dbdd 100644
--- a/core/cortex-m/mpu.c
+++ b/core/cortex-m/mpu.c
@@ -128,7 +128,7 @@ int mpu_protect_ram(void)
 {
 	int ret;
 	ret = mpu_lock_region(REGION_IRAM, CONFIG_RAM_BASE,
-			      CONFIG_RAM_SIZE, MPU_ATTR_INTERNAL_SRAM);
+			      CONFIG_DATA_RAM_SIZE, MPU_ATTR_INTERNAL_SRAM);
 	if (ret != EC_SUCCESS)
 		return ret;
 	ret = mpu_unlock_region(
diff --git a/include/config.h b/include/config.h
index 04f87de2d4..b557b7b8be 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1931,7 +1931,14 @@
 /* Base address of RAM for the chip */
 #undef CONFIG_RAM_BASE
 
-/* Size of RAM available on the chip, in bytes */
+/*
+ * CONFIG_DATA_RAM_SIZE and CONFIG_RAM_SIZE indicate size of all data RAM
+ * available on the chip in bytes and size of data RAM available for EC in
+ * bytes, respectively.
+ * Usually, CONFIG_DATA_RAM_SIZE = CONFIG_RAM_SIZE but some chips need to
+ * allocate RAM for the mask ROM. Then CONFIG_DATA_RAM_SIZE > CONFIG_RAM_SIZE.
+ */
+#undef CONFIG_DATA_RAM_SIZE
 #undef CONFIG_RAM_SIZE
 
 /* Enable rbox peripheral */
@@ -2866,6 +2873,14 @@
 
 /******************************************************************************/
 /*
+ * Set default data ram size unless it's customized by the chip.
+ */
+#ifndef CONFIG_DATA_RAM_SIZE
+#define CONFIG_DATA_RAM_SIZE	CONFIG_RAM_SIZE
+#endif
+
+/******************************************************************************/
+/*
  * Disable the built-in console history if using the experimental console.
  *
  * The experimental console keeps its own session-persistent history which