diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2021-08-03 17:24:46 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-05 22:08:48 +0000 |
| commit | 540c8f4113eed87b45dc0871e8862e12d3e19ade (patch) | |
| tree | f286d0e716b7b7adf21cecf35abbef8e62157c51 | |
| parent | c8af797e53fcacac5fde4c5f2beeb7bfce207146 (diff) | |
| download | chrome-ec-540c8f4113eed87b45dc0871e8862e12d3e19ade.tar.gz | |
Drop some obsolete boards
samus: AUE in M91, M92 pushed to stable already
samus_pd: samus pd chip
dragonegg: canceled
cheza: canceled
flapjack_scp: flapjack was canceled
atlas_ish: atlas shipped, but ish project canceled
sklrvp,glkrvp: these are pretty old intel reference boards and the
portage overlays were already deleted ... assume nobody needs the
EC firmware anymore either
BUG=none
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I794867ac82f37ffa2267e2e59ac02bc381688c57
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069716
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
84 files changed, 1 insertions, 11310 deletions
diff --git a/baseboard/dragonegg/baseboard.c b/baseboard/dragonegg/baseboard.c deleted file mode 100644 index acbeadcf32..0000000000 --- a/baseboard/dragonegg/baseboard.c +++ /dev/null @@ -1,369 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* DragonEgg family-specific configuration */ -#include "charge_manager.h" -#include "charge_state_v2.h" -#include "chipset.h" -#include "console.h" -#include "driver/bc12/max14637.h" -#include "driver/charger/bq25710.h" -#include "driver/ppc/nx20p348x.h" -#include "driver/ppc/sn5s330.h" -#include "driver/ppc/syv682x.h" -#include "driver/tcpm/it83xx_pd.h" -#include "driver/tcpm/tcpci.h" -#include "driver/tcpm/tcpm.h" -#include "driver/tcpm/tusb422.h" -#include "espi.h" -#include "gpio.h" -#include "hooks.h" -#include "i2c.h" -#include "keyboard_scan.h" -#include "power.h" -#include "power/icelake.h" -#include "timer.h" -#include "util.h" -#include "tcpm/tcpci.h" -#include "usbc_ppc.h" -#include "util.h" - -#define USB_PD_PORT_ITE_0 0 -#define USB_PD_PORT_ITE_1 1 -#define USB_PD_PORT_TUSB422_2 2 - -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) - -#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) - -/******************************************************************************/ -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - /* - * F3 key scan cycle completed but scan input is not - * charging to logic high when EC start scan next - * column for "T" key, so we set .output_settle_us - * to 80us from 50us. - */ - .output_settle_us = 80, - .debounce_down_us = 9 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ - }, -}; - -/******************************************************************************/ -/* Wake up pins */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_LID_OPEN, - GPIO_AC_PRESENT, - GPIO_POWER_BUTTON_L, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* I2C port map configuration */ -/* TODO(b/111125177): Increase these speeds to 400 kHz and verify operation */ -const struct i2c_port_t i2c_ports[] = { - {"eeprom", IT83XX_I2C_CH_A, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"sensor", IT83XX_I2C_CH_B, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"usbc12", IT83XX_I2C_CH_C, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"usbc0", IT83XX_I2C_CH_E, 100, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, - {"power", IT83XX_I2C_CH_F, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA} -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* Charger Chips */ -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS, - .drv = &bq25710_drv, - }, -}; - -/******************************************************************************/ -/* PWROK signal configuration */ -/* - * On Dragonegg the ALL_SYS_PWRGD, VCCST_PWRGD, PCH_PWROK, and SYS_PWROK - * signals are handled by the board. No EC control needed. - */ -const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = {}; -const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list); - -const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = {}; -const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_assert_list); - -/******************************************************************************/ -/* Chipset callbacks/hooks */ - -/* Called on AP S5 -> S3 transition */ -static void baseboard_chipset_startup(void) -{ - /* TODD(b/111121615): Need to fill out this hook */ -} -DECLARE_HOOK(HOOK_CHIPSET_STARTUP, baseboard_chipset_startup, - HOOK_PRIO_DEFAULT); - -/* Called on AP S0iX -> S0 transition */ -static void baseboard_chipset_resume(void) -{ - /* TODD(b/111121615): Need to fill out this hook */ - /* Enable display backlight. */ - gpio_set_level(GPIO_EDP_BKTLEN_OD, 1); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, baseboard_chipset_resume, HOOK_PRIO_DEFAULT); - -/* Called on AP S0 -> S0iX transition */ -static void baseboard_chipset_suspend(void) -{ - /* TODD(b/111121615): Need to fill out this hook */ - /* Enable display backlight. */ - gpio_set_level(GPIO_EDP_BKTLEN_OD, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, baseboard_chipset_suspend, - HOOK_PRIO_DEFAULT); - -/* Called on AP S3 -> S5 transition */ -static void baseboard_chipset_shutdown(void) -{ - /* TODD(b/111121615): Need to fill out this hook */ -} -DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, baseboard_chipset_shutdown, - HOOK_PRIO_DEFAULT); - -void board_hibernate(void) -{ - int timeout_ms = 20; - /* - * Disable the TCPC power rail and the PP5000 rail before going into - * hibernate. Note, these 2 rails are powered up as the default state in - * gpio.inc. - */ - gpio_set_level(GPIO_EN_PP5000, 0); - /* Wait for PP5000 to drop before disabling PP3300_TCPC */ - while (gpio_get_level(GPIO_PP5000_PG_OD) && timeout_ms > 0) { - msleep(1); - timeout_ms--; - } - if (!timeout_ms) - CPRINTS("PP5000_PG didn't go low after 20 msec"); - gpio_set_level(GPIO_EN_PP3300_TCPC, 0); -} -/******************************************************************************/ -/* USB-C TPCP Configuration */ -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USB_PD_PORT_ITE_0] = { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it83xx_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, - - [USB_PD_PORT_ITE_1] = { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it83xx_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, - - [USB_PD_PORT_TUSB422_2] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USBC1C2, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, -}; - -/******************************************************************************/ -/* USB-C PPC Configuration */ -struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USB_PD_PORT_ITE_0] = { - .i2c_port = I2C_PORT_USBC0, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv - }, - - [USB_PD_PORT_ITE_1] = { - .i2c_port = I2C_PORT_USBC1C2, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv - }, - - [USB_PD_PORT_TUSB422_2] = { - .i2c_port = I2C_PORT_USBC1C2, - .i2c_addr_flags = NX20P3481_ADDR2_FLAGS, - .drv = &nx20p348x_drv, - }, -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USB_PD_PORT_ITE_0] = { - .usb_port = USB_PD_PORT_ITE_0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - - [USB_PD_PORT_ITE_1] = { - .usb_port = USB_PD_PORT_ITE_1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - - [USB_PD_PORT_TUSB422_2] = { - .usb_port = USB_PD_PORT_TUSB422_2, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, -}; - -/******************************************************************************/ -/* BC 1.2 chip Configuration */ -const struct max14637_config_t max14637_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .chip_enable_pin = GPIO_USB_C0_BC12_VBUS_ON_ODL, - .chg_det_pin = GPIO_USB_C0_BC12_CHG_MAX, - .flags = MAX14637_FLAGS_ENABLE_ACTIVE_LOW, - }, - { - .chip_enable_pin = GPIO_USB_C1_BC12_VBUS_ON_ODL, - .chg_det_pin = GPIO_USB_C1_BC12_CHG_MAX, - .flags = MAX14637_FLAGS_ENABLE_ACTIVE_LOW, - }, - { - .chip_enable_pin = GPIO_USB_C2_BC12_VBUS_ON_ODL, - .chg_det_pin = GPIO_USB_C2_BC12_CHG_MAX, - .flags = MAX14637_FLAGS_ENABLE_ACTIVE_LOW, - }, -}; - -/* Power Delivery and charging functions */ - -void baseboard_tcpc_init(void) -{ - /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_TCPPC_INT_L); - gpio_enable_interrupt(GPIO_USB_C2_TCPPC_INT_ODL); - - /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C2_TCPC_INT_ODL); - -} -DECLARE_HOOK(HOOK_INIT, baseboard_tcpc_init, HOOK_PRIO_INIT_I2C + 1); - -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - /* - * Since C0/C1 TCPC are embedded within EC, we don't need the PDCMD - * tasks.The (embedded) TCPC status since chip driver code will - * handles its own interrupts and forward the correct events to - * the PD_C0 task. See it83xx/intc.c - */ - - if (!gpio_get_level(GPIO_USB_C2_TCPC_INT_ODL)) - status = PD_STATUS_TCPC_ALERT_2; - - return status; -} - -/** - * Reset all system PD/TCPC MCUs -- currently only called from - * handle_pending_reboot() in common/power.c just before hard - * resetting the system. This logic is likely not needed as the - * PP3300_A rail should be dropped on EC reset. - */ -void board_reset_pd_mcu(void) -{ - /* - * C0 & C1: The internal TCPC on ITE EC does not have a reset signal, - * but it will get reset when the EC gets reset. - */ -} -void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) -{ - /* - * We ignore the cc_pin because the polarity should already be set - * correctly in the PPC driver via the pd state machine. - */ - if (ppc_set_vconn(port, enabled) != EC_SUCCESS) - cprints(CC_USBPD, "C%d: Failed %sabling vconn", - port, enabled ? "en" : "dis"); -} - -int board_set_active_charge_port(int port) -{ - int is_valid_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); - int i; - - if (!is_valid_port && port != CHARGE_PORT_NONE) - return EC_ERROR_INVAL; - - if (port == CHARGE_PORT_NONE) { - CPRINTSUSB("Disabling all charger ports"); - - /* Disable all ports. */ - for (i = 0; i < ppc_cnt; i++) { - /* - * Do not return early if one fails otherwise we can - * get into a boot loop assertion failure. - */ - if (ppc_vbus_sink_enable(i, 0)) - CPRINTSUSB("Disabling C%d as sink failed.", i); - } - - return EC_SUCCESS; - } - - /* Check if the port is sourcing VBUS. */ - if (ppc_is_sourcing_vbus(port)) { - CPRINTFUSB("Skip enable C%d", port); - return EC_ERROR_INVAL; - } - - CPRINTSUSB("New charge port: C%d", port); - - /* - * Turn off the other ports' sink path FETs, before enabling the - * requested charge port. - */ - for (i = 0; i < ppc_cnt; i++) { - if (i == port) - continue; - - if (ppc_vbus_sink_enable(i, 0)) - CPRINTSUSB("C%d: sink path disable failed.", i); - } - - /* Enable requested charge port. */ - if (ppc_vbus_sink_enable(port, 1)) { - CPRINTSUSB("C%d: sink path enable failed.", port); - return EC_ERROR_UNKNOWN; - } - - return EC_SUCCESS; -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); -} diff --git a/baseboard/dragonegg/baseboard.h b/baseboard/dragonegg/baseboard.h deleted file mode 100644 index 47edb8f314..0000000000 --- a/baseboard/dragonegg/baseboard.h +++ /dev/null @@ -1,142 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* DragonEgg board configuration */ - -#ifndef __CROS_EC_BASEBOARD_H -#define __CROS_EC_BASEBOARD_H - -/* EC console commands */ -#define CONFIG_CMD_BATT_MFG_ACCESS - -#define CONFIG_CHIPSET_ICELAKE -#define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_EXTPOWER_GPIO -#define CONFIG_HOSTCMD_ESPI -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_USE_HOST_EVENT -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_BUTTON_X86 -#define CONFIG_POWER_PP5000_CONTROL -/* TODO(b/111155507): Don't enable SOiX for now */ -/* #define CONFIG_POWER_S0IX */ -/* #define CONFIG_POWER_TRACK_HOST_SLEEP_STATE */ - -/* EC Defines */ -#define CONFIG_ADC -#define CONFIG_PWM -#define CONFIG_VBOOT_HASH -#define CONFIG_VSTORE -#define CONFIG_VSTORE_SLOT_COUNT 1 - -/* CBI */ -/* - * TODO (b/117174246): When EEPROMs are programmed, can use EEPROM for board - * version. But for P0/P1 boards rely on GPIO signals. - */ -/* #define CONFIG_BOARD_VERSION_CBI */ -#define CONFIG_CBI_EEPROM -#define CONFIG_CRC8 - -/* Common Keyboard Defines */ -#define CONFIG_CMD_KEYBOARD - -#define CONFIG_KEYBOARD_PROTOCOL_8042 -#define CONFIG_KEYBOARD_COL2_INVERTED -#define CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI2 - -/* Common charger defines */ -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGE_RAMP_HW -#define CONFIG_CHARGER -#define CONFIG_CHARGER_BQ25710 -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_INPUT_CURRENT 512 /* Allow low-current USB charging */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 - -/* Common battery defines */ -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_DEVICE_CHEMISTRY "LION" -#define CONFIG_BATTERY_FUEL_GAUGE -#define CONFIG_BATTERY_HW_PRESENT_CUSTOM -#define CONFIG_BATTERY_PRESENT_CUSTOM -#define CONFIG_BATTERY_REVIVE_DISCONNECT -#define CONFIG_BATTERY_SMART - -/* BC 1.2 Detection */ -#define CONFIG_BC12_DETECT_MAX14637 -#define CONFIG_USB_CHARGER - -/* USB Type C and USB PD defines */ -#undef CONFIG_USB_PD_TCPC_LOW_POWER -#undef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#define CONFIG_USB_PD_VBUS_DETECT_PPC -#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP /* C0 & C1 TCPC: ITE EC */ -#define CONFIG_USB_PD_TCPM_TUSB422 /* C1 TCPC: TUSB422 */ -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_TCPMV1 -#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 2 - -/* - * TODO (b/111281797): DragonEgg has 3 ports. Only adding support for the port - * on the MLB for now. In addition, this config option will likely move to - * board.h as it likely board dependent and not same across all follower boards. - */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 3 -#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0 -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_DISCHARGE_PPC -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_PPC -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_MUX_VIRTUAL -#define CONFIG_USBC_PPC_SN5S330 /* C0 PPC */ -#define CONFIG_USBC_PPC_SYV682X /* C1 PPC */ -#define CONFIG_USBC_PPC_NX20P3481 /* C2 PPC */ -#define CONFIG_USBC_PPC_VCONN -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP - -#define CONFIG_HOSTCMD_PD_CONTROL -#define CONFIG_CMD_PPC_DUMP - -/* TODO(b/111281797): Use correct PD delay values */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* TODO(b/111281797): Use correct PD power values */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 45000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -/* IT83XX config */ -#define CONFIG_IT83XX_VCC_1P8V -/* I2C Bus Configuration */ -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define I2C_PORT_BATTERY IT83XX_I2C_CH_F /* Shared bus */ -#define I2C_PORT_CHARGER IT83XX_I2C_CH_F /* Shared bus */ -#define I2C_PORT_SENSOR IT83XX_I2C_CH_B -#define I2C_PORT_USBC0 IT83XX_I2C_CH_E -#define I2C_PORT_USBC1C2 IT83XX_I2C_CH_C -#define I2C_PORT_EEPROM IT83XX_I2C_CH_A -#define I2C_ADDR_EEPROM_FLAGS 0x50 - -#ifndef __ASSEMBLER__ - -/* Forward declare common (within DragonEgg) board-specific functions */ -void board_reset_pd_mcu(void); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/dragonegg/battery.c b/baseboard/dragonegg/battery.c deleted file mode 100644 index 0c4ec32903..0000000000 --- a/baseboard/dragonegg/battery.c +++ /dev/null @@ -1,92 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery.h" -#include "battery_fuel_gauge.h" -#include "battery_smart.h" -#include "gpio.h" -#include "system.h" - -static enum battery_present batt_pres_prev = BP_NOT_SURE; - -enum battery_present battery_hw_present(void) -{ - enum battery_present bp; - /* The GPIO is low when the battery is physically present */ - /* - * TODO(b/111704193): The signal GPIO_EC_BATT_PRES_ODL has an issue - * where it's floating (?) at ~2V when it should be low when the battery - * is connected. The signal will read correctly following a cold reset - * and the battery is connected, but following a warm reboot, it reads - * high. In order to allow charging to work, replacing this with the a - * check that the Operation Status register can be read. Once the HW - * issue is resolved then change this back to checking the physical - * presence pin. - * - */ - - if (system_get_board_version() == 0) - /* P0 boards can't use gpio signal */ - bp = (battery_get_disconnect_state() == - BATTERY_DISCONNECT_ERROR) ? BP_NO : BP_YES; - else - /* P1 boards can read presence from gpio signal */ - bp = gpio_get_level(GPIO_EC_BATT_PRES_ODL) ? BP_NO : BP_YES; - - return bp; -} - -static int battery_init(void) -{ - int batt_status; - - return battery_status(&batt_status) ? 0 : - !!(batt_status & STATUS_INITIALIZED); -} - -/* - * Physical detection of battery. - */ -static enum battery_present battery_check_present_status(void) -{ - enum battery_present batt_pres; - - /* Get the physical hardware status */ - batt_pres = battery_hw_present(); - - /* - * If the battery is not physically connected, then no need to perform - * any more checks. - */ - if (batt_pres != BP_YES) - return batt_pres; - - /* - * If the battery is present now and was present last time we checked, - * return early. - */ - if (batt_pres == batt_pres_prev) - return batt_pres; - - /* - * Ensure that battery is: - * 1. Not in cutoff - * 2. Initialized - */ - if (battery_is_cut_off() != BATTERY_CUTOFF_STATE_NORMAL || - battery_init() == 0) { - batt_pres = BP_NO; - } - - return batt_pres; -} - -enum battery_present battery_is_present(void) -{ - batt_pres_prev = battery_check_present_status(); - return batt_pres_prev; -} diff --git a/baseboard/dragonegg/build.mk b/baseboard/dragonegg/build.mk deleted file mode 100644 index 7f3c8a3669..0000000000 --- a/baseboard/dragonegg/build.mk +++ /dev/null @@ -1,11 +0,0 @@ -# -*- makefile -*- -# Copyright 2018 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# DragonEgg baseboard specific files build -# - -baseboard-y=baseboard.o -baseboard-$(CONFIG_BATTERY_SMART)+=battery.o -baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/baseboard/dragonegg/usb_pd_policy.c b/baseboard/dragonegg/usb_pd_policy.c deleted file mode 100644 index 85eeecdcf9..0000000000 --- a/baseboard/dragonegg/usb_pd_policy.c +++ /dev/null @@ -1,114 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Shared USB-C policy for DragonEgg boards */ - -#include "charge_manager.h" -#include "common.h" -#include "compile_time_macros.h" -#include "console.h" -#include "ec_commands.h" -#include "gpio.h" -#include "system.h" -#include "tcpm/tcpci.h" -#include "tcpm/tcpm.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usbc_ppc.h" -#include "util.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -int pd_check_vconn_swap(int port) -{ - /* Only allow vconn swap if pp5000_A rail is enabled */ - return gpio_get_level(GPIO_EN_PP5000); -} - -__override void pd_execute_data_swap(int port, - enum pd_data_role data_role) -{ - /* On DragonEgg, only the first port can act as OTG */ - if (port == 0) - gpio_set_level(GPIO_CHG_VAP_OTG_EN, (data_role == PD_ROLE_UFP)); -} - -void pd_power_supply_reset(int port) -{ - int prev_en; - - prev_en = ppc_is_sourcing_vbus(port); - - /* Disable VBUS. */ - ppc_vbus_source_enable(port, 0); - - /* Enable discharge if we were previously sourcing 5V */ - if (prev_en) - pd_set_vbus_discharge(port, 1); - -#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT - /* Give back the current quota we are no longer using */ - charge_manager_source_port(port, 0); -#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */ - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_set_power_supply_ready(int port) -{ - int rv; - - /* Disable charging. */ - rv = ppc_vbus_sink_enable(port, 0); - if (rv) - return rv; - - pd_set_vbus_discharge(port, 0); - - /* Provide Vbus. */ - rv = ppc_vbus_source_enable(port, 1); - if (rv) - return rv; - -#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT - /* Ensure we advertise the proper available current quota */ - charge_manager_source_port(port, 1); -#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */ - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; -} - -#ifdef CONFIG_USB_PD_VBUS_DETECT_PPC -int pd_snk_is_vbus_provided(int port) -{ - /* - * TODO(b/112661747): Until per port VBUS detection methods are - * supported, DragonEgg needs to have CONFIG_USB_PD_VBUS_DETECT_PPC - * defined, but the nx20p3481 PPC on port 2 does not support VBUS - * detection. In the meantime, check specifically for port 2, and rely - * on the TUSB422 TCPC for VBUS status. Note that the tcpm method can't - * be called directly here as it's not supported unless - * CONFIG_USB_PD_VBUS_DETECT_TCPC is defined. - */ - int reg; - - if (port == 2) { - if (tcpc_read(port, TCPC_REG_POWER_STATUS, ®)) - return 0; - return reg & TCPC_REG_POWER_STATUS_VBUS_PRES ? 1 : 0; - } - return ppc_is_vbus_present(port); -} -#endif - -int board_vbus_source_enabled(int port) -{ - return ppc_is_sourcing_vbus(port); -} diff --git a/board/atlas_ish/board.c b/board/atlas_ish/board.c deleted file mode 100644 index 066767638c..0000000000 --- a/board/atlas_ish/board.c +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Atlas ISH board-specific configuration */ - -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "math_util.h" -#include "task.h" -#include "uart.h" - -#include "gpio_list.h" /* has to be included last */ -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) - -/* I2C port map */ -const struct i2c_port_t i2c_ports[] = { - {"trackpad", I2C_PORT_TP, 1000, - GPIO_I2C_PORT_TP_SCL, GPIO_I2C_PORT_TP_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/board/atlas_ish/board.h b/board/atlas_ish/board.h deleted file mode 100644 index c9ee52395d..0000000000 --- a/board/atlas_ish/board.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Atlas ISH board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* - * Allow dangerous commands. - * TODO: Remove this config before production. - */ -#define CONFIG_SYSTEM_UNLOCKED - -/* - * By default, enable all console messages except HC, ACPI and event - * The sensor stack is generating a lot of activity. - */ -#undef CONFIG_HOSTCMD_DEBUG_MODE -#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF - -/* ISH specific*/ -#undef CONFIG_DEBUG_ASSERT -#define CONFIG_CLOCK_CRYSTAL -/* EC */ -#define CONFIG_FLASH_SIZE_BYTES 0x80000 -#define CONFIG_FPU -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER - -/* HID subsystem */ -#define CONFIG_HID_HECI - -/* I2C ports */ -#define I2C_PORT_TP ISH_I2C0 -#define GPIO_I2C_PORT_TP_SCL GPIO_ISH_I2C0_SCL -#define GPIO_I2C_PORT_TP_SDA GPIO_ISH_I2C0_SDA - -/* Undefine unfeatures */ -#undef CONFIG_CMD_HASH -#undef CONFIG_CMD_I2C_SCAN -#undef CONFIG_CMD_I2C_XFER -#undef CONFIG_CMD_KEYBOARD -#undef CONFIG_CMD_POWER_AP -#undef CONFIG_CMD_POWERINDEBUG -#undef CONFIG_CMD_SHMEM -#undef CONFIG_CMD_TIMERINFO -#undef CONFIG_EXTPOWER -#undef CONFIG_KEYBOARD_KSO_BASE -#undef CONFIG_FLASH_CROS -#undef CONFIG_FMAP -#undef CONFIG_LID_SWITCH -#undef CONFIG_SWITCH -#undef CONFIG_WATCHDOG - -/* Modules we want to exclude */ -#undef CONFIG_CMD_ACCELS -#undef CONFIG_CMD_HASH -#undef CONFIG_CMD_TEMP_SENSOR -#undef CONFIG_CMD_TIMERINFO -#undef CONFIG_ADC -#undef CONFIG_SHA256 - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/atlas_ish/build.mk b/board/atlas_ish/build.mk deleted file mode 100644 index 9cdcbb2253..0000000000 --- a/board/atlas_ish/build.mk +++ /dev/null @@ -1,13 +0,0 @@ -# -*- makefile -*- -# Copyright 2018 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=ish -CHIP_FAMILY:=ish3 -CHIP_VARIANT:=ish3p0 - -board-y=board.o diff --git a/board/atlas_ish/ec.tasklist b/board/atlas_ish/ec.tasklist deleted file mode 100644 index 15f856131a..0000000000 --- a/board/atlas_ish/ec.tasklist +++ /dev/null @@ -1,14 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, HUGE_TASK_STACK_SIZE, 0) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE, 0) \ - TASK_ALWAYS(HECI_RX, heci_rx_task, NULL, HUGE_TASK_STACK_SIZE, 0) \ - TASK_ALWAYS(IPC_MNG, ipc_mng_task, NULL, LARGER_TASK_STACK_SIZE, 0) diff --git a/board/atlas_ish/gpio.inc b/board/atlas_ish/gpio.inc deleted file mode 100644 index 0ddac6ccbe..0000000000 --- a/board/atlas_ish/gpio.inc +++ /dev/null @@ -1,15 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Trackpad interrupt pin */ -/*TODO: touchpad driver is not in gerrit yet, so comment out this for now */ -/*GPIO_INT(TOUCHPAD_INT, PIN(1), GPIO_INT_F_FALLING, touchpad_event)*/ - -/* Those are used by common code, don't change*/ -UNIMPLEMENTED(ENTERING_RW) -UNIMPLEMENTED(ISH_I2C0_SDA) -UNIMPLEMENTED(ISH_I2C0_SCL) diff --git a/board/cheza/base_detect.c b/board/cheza/base_detect.c deleted file mode 100644 index 1703588dd0..0000000000 --- a/board/cheza/base_detect.c +++ /dev/null @@ -1,216 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Lux base without battery detection code */ - -#include "adc.h" -#include "adc_chip.h" -#include "board.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "system.h" -#include "tablet_mode.h" -#include "task.h" -#include "timer.h" -#include "util.h" - -#define CPRINTS(format, args...) cprints(CC_USB, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USB, format, ## args) - -/* Base detection and debouncing */ -#define BASE_DETECT_DEBOUNCE_US (20 * MSEC) - -/* - * If the base status is unclear (i.e. not within expected ranges, read - * the ADC value again every 500ms. - */ -#define BASE_DETECT_RETRY_US (500 * MSEC) - -/* - * When base is disconnected, and gets connected: - * Lid has 1M pull-up, base has 200K pull-down, so the ADC - * value should be around 200/(200+1000)*3300 = 550. - * - * Idle value should be ~3300: lid has 1M pull-up, and nothing else (i.e. ADC - * maxing out at 2813). - */ -#define BASE_DISCONNECTED_CONNECT_MIN_MV 450 -#define BASE_DISCONNECTED_CONNECT_MAX_MV 650 - -#define BASE_DISCONNECTED_MIN_MV 2800 -#define BASE_DISCONNECTED_MAX_MV (ADC_MAX_VOLT+1) - -/* - * When base is connected, then gets disconnected: - * Lid has 1M pull-up, lid has 10.0K pull-down, so the ADC - * value should be around 10.0/(10.0+1000)*3300 = 33. - * - * Idle level when connected should be: - * Lid has 10K pull-down, base has 5.1K pull-up, so the ADC value should be - * around 10.0/(10.0+5.1)*3300 = 2185 (actual value is 2153 as there is still - * a 1M pull-up on lid, and 200K pull-down on base). - */ -#define BASE_CONNECTED_DISCONNECT_MIN_MV 20 -#define BASE_CONNECTED_DISCONNECT_MAX_MV 45 - -#define BASE_CONNECTED_MIN_MV 2050 -#define BASE_CONNECTED_MAX_MV 2300 - -static uint64_t base_detect_debounce_time; - -static void base_detect_deferred(void); -DECLARE_DEFERRED(base_detect_deferred); - -enum base_status { - BASE_UNKNOWN = 0, - BASE_DISCONNECTED = 1, - BASE_CONNECTED = 2, -}; - -static enum base_status current_base_status; - -/* - * This function is called whenever there is a change in the base detect - * status. Actions taken include: - * 1. Enable/disable pull-down on half-duplex UART line - * 2. Enable/disable power to base. - * 3. Indicate mode change to host. - * 4. Indicate tablet mode to host. Current assumption is that if base is - * disconnected then the system is in tablet mode, else if the base is - * connected, then the system is not in tablet mode. - */ -static void base_detect_change(enum base_status status) -{ - int connected = (status == BASE_CONNECTED); - - if (current_base_status == status) - return; - - current_base_status = status; - - /* Enable pull-down if connected. */ - gpio_set_level(GPIO_EN_CC_LID_BASE_PULLDN, !connected); - - /* We don't enable dual-battery support. Set the base power directly. */ - gpio_set_level(GPIO_EN_PPVAR_VAR_BASE, connected); - - tablet_set_mode(!connected, TABLET_TRIGGER_BASE); -} - -static void print_base_detect_value(const char *str, int v) -{ - CPRINTS("Base %s. ADC: %d", str, v); -} - -static void base_detect_deferred(void) -{ - uint64_t time_now = get_time().val; - int v; - - if (base_detect_debounce_time > time_now) { - hook_call_deferred(&base_detect_deferred_data, - base_detect_debounce_time - time_now); - return; - } - - v = adc_read_channel(ADC_BASE_DET); - if (v == ADC_READ_ERROR) - goto retry; - - if (current_base_status == BASE_CONNECTED) { - if (v >= BASE_CONNECTED_DISCONNECT_MIN_MV && - v <= BASE_CONNECTED_DISCONNECT_MAX_MV) { - print_base_detect_value("disconnected", v); - base_detect_change(BASE_DISCONNECTED); - return; - } else if (v >= BASE_CONNECTED_MIN_MV && - v <= BASE_CONNECTED_MAX_MV) { - /* Still connected. */ - return; - } - } else { /* Disconnected or unknown. */ - if (v >= BASE_DISCONNECTED_CONNECT_MIN_MV && - v <= BASE_DISCONNECTED_CONNECT_MAX_MV) { - print_base_detect_value("connected", v); - base_detect_change(BASE_CONNECTED); - return; - } else if (v >= BASE_DISCONNECTED_MIN_MV && - v <= BASE_DISCONNECTED_MAX_MV) { - if (current_base_status == BASE_UNKNOWN) { - print_base_detect_value("disconnected", v); - base_detect_change(BASE_DISCONNECTED); - } - /* Still disconnected. */ - return; - } - } - -retry: - print_base_detect_value("status unclear", v); - /* Unclear base status, schedule again in a while. */ - hook_call_deferred(&base_detect_deferred_data, - BASE_DETECT_RETRY_US); -} - -void base_detect_interrupt(enum gpio_signal signal) -{ - uint64_t time_now = get_time().val; - - if (base_detect_debounce_time <= time_now) - hook_call_deferred(&base_detect_deferred_data, - BASE_DETECT_DEBOUNCE_US); - - base_detect_debounce_time = time_now + BASE_DETECT_DEBOUNCE_US; -} - -static void base_detect_enable(void) -{ - /* Enable base detection interrupt. */ - base_detect_debounce_time = get_time().val; - hook_call_deferred(&base_detect_deferred_data, 0); - gpio_enable_interrupt(GPIO_CC_LID_BASE_ADC); -} -DECLARE_HOOK(HOOK_CHIPSET_STARTUP, base_detect_enable, HOOK_PRIO_DEFAULT); - -static void base_detect_disable(void) -{ - /* Disable base detection interrupt and disable power to base. */ - gpio_disable_interrupt(GPIO_CC_LID_BASE_ADC); - base_detect_change(BASE_DISCONNECTED); -} -DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, base_detect_disable, HOOK_PRIO_DEFAULT); - -static void base_init(void) -{ - /* - * Make sure base power and pull-down are off. This will reset the base - * if it is already connected. - */ - gpio_set_level(GPIO_EN_PPVAR_VAR_BASE, 0); - gpio_set_level(GPIO_EN_CC_LID_BASE_PULLDN, 1); -} -DECLARE_HOOK(HOOK_INIT, base_init, HOOK_PRIO_DEFAULT+1); - -void base_force_state(enum ec_set_base_state_cmd state) -{ - if (state == EC_SET_BASE_STATE_ATTACH) { - gpio_disable_interrupt(GPIO_CC_LID_BASE_ADC); - base_detect_change(BASE_CONNECTED); - CPRINTS("BD forced connected"); - } else if (state == EC_SET_BASE_STATE_DETACH) { - gpio_disable_interrupt(GPIO_CC_LID_BASE_ADC); - base_detect_change(BASE_DISCONNECTED); - CPRINTS("BD forced disconnected"); - } else { - hook_call_deferred(&base_detect_deferred_data, 0); - gpio_enable_interrupt(GPIO_CC_LID_BASE_ADC); - CPRINTS("BD forced reset"); - } -} diff --git a/board/cheza/battery.c b/board/cheza/battery.c deleted file mode 100644 index ab98864a9a..0000000000 --- a/board/cheza/battery.c +++ /dev/null @@ -1,45 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery.h" -#include "battery_smart.h" - -/* Shutdown mode parameter to write to manufacturer access register */ -#define SB_SHIP_MODE_REG SB_MANUFACTURER_ACCESS -#define SB_SHUTDOWN_DATA 0x0010 - -/* Battery info */ -static const struct battery_info info = { - .voltage_max = 8800, - .voltage_normal = 7700, - .voltage_min = 6000, - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -10, - .discharging_max_c = 60, -}; - -const struct battery_info *battery_get_info(void) -{ - return &info; -} - -int board_cut_off_battery(void) -{ - int rv; - - /* Ship mode command must be sent twice to take effect */ - rv = sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA); - - if (rv != EC_SUCCESS) - return rv; - - return sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA); -} diff --git a/board/cheza/board.c b/board/cheza/board.c deleted file mode 100644 index daf0a4af5c..0000000000 --- a/board/cheza/board.c +++ /dev/null @@ -1,707 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Cheza board-specific configuration */ - -#include "adc_chip.h" -#include "als.h" -#include "button.h" -#include "charge_manager.h" -#include "charge_state.h" -#include "chipset.h" -#include "extpower.h" -#include "driver/accelgyro_bmi_common.h" -#include "driver/als_opt3001.h" -#include "driver/charger/isl923x.h" -#include "driver/ppc/sn5s330.h" -#include "driver/tcpm/anx74xx.h" -#include "driver/tcpm/ps8xxx.h" -#include "driver/tcpm/tcpci.h" -#include "gpio.h" -#include "hooks.h" -#include "lid_switch.h" -#include "pi3usb9281.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "system.h" -#include "shi_chip.h" -#include "switch.h" -#include "task.h" -#include "usb_charge.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usbc_ocp.h" -#include "usbc_ppc.h" -#include "util.h" - -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) - -#define USB_PD_PORT_ANX3429 0 -#define USB_PD_PORT_PS8751 1 - -/* Forward declaration */ -static void tcpc_alert_event(enum gpio_signal signal); -static void vbus0_evt(enum gpio_signal signal); -static void vbus1_evt(enum gpio_signal signal); -static void usb0_evt(enum gpio_signal signal); -static void usb1_evt(enum gpio_signal signal); -static void ppc_interrupt(enum gpio_signal signal); -static void anx74xx_cable_det_interrupt(enum gpio_signal signal); -static void usb1_oc_evt(enum gpio_signal signal); - -#include "gpio_list.h" - -/* GPIO Interrupt Handlers */ -static void tcpc_alert_event(enum gpio_signal signal) -{ - int port = -1; - - switch (signal) { - case GPIO_USB_C0_PD_INT_ODL: - port = 0; - break; - case GPIO_USB_C1_PD_INT_ODL: - port = 1; - break; - default: - return; - } - - schedule_deferred_pd_interrupt(port); -} - -static void vbus0_evt(enum gpio_signal signal) -{ - /* VBUS present GPIO is inverted */ - usb_charger_vbus_change(0, !gpio_get_level(GPIO_USB_C0_VBUS_DET_L)); - task_wake(TASK_ID_PD_C0); -} - -static void vbus1_evt(enum gpio_signal signal) -{ - /* VBUS present GPIO is inverted */ - usb_charger_vbus_change(1, !gpio_get_level(GPIO_USB_C1_VBUS_DET_L)); - task_wake(TASK_ID_PD_C1); -} - -static void usb0_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); -} - -static void usb1_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); -} - -static void anx74xx_cable_det_handler(void) -{ - int cable_det = gpio_get_level(GPIO_USB_C0_CABLE_DET); - int reset_n = gpio_get_level(GPIO_USB_C0_PD_RST_R_L); - - /* - * A cable_det low->high transition was detected. If following the - * debounce time, cable_det is high, and reset_n is low, then ANX3429 is - * currently in standby mode and needs to be woken up. Set the - * TCPC_RESET event which will bring the ANX3429 out of standby - * mode. Setting this event is gated on reset_n being low because the - * ANX3429 will always set cable_det when transitioning to normal mode - * and if in normal mode, then there is no need to trigger a tcpc reset. - */ - if (cable_det && !reset_n) - task_set_event(TASK_ID_PD_C0, PD_EVENT_TCPC_RESET); -} -DECLARE_DEFERRED(anx74xx_cable_det_handler); - -static void anx74xx_cable_det_interrupt(enum gpio_signal signal) -{ - /* debounce for 2 msec */ - hook_call_deferred(&anx74xx_cable_det_handler_data, (2 * MSEC)); -} - -static void ppc_interrupt(enum gpio_signal signal) -{ - /* Only port-0 uses PPC chip */ - sn5s330_interrupt(0); -} - -static void usb1_oc_evt_deferred(void) -{ - /* Only port-1 has overcurrent GPIO interrupt */ - board_overcurrent_event(1, 1); -} -DECLARE_DEFERRED(usb1_oc_evt_deferred); - -static void usb1_oc_evt(enum gpio_signal signal) -{ - /* Switch the context to handle the event */ - hook_call_deferred(&usb1_oc_evt_deferred_data, 0); -} - -/* Wake-up pins for hibernate */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_LID_OPEN, - GPIO_AC_PRESENT, - GPIO_POWER_BUTTON_L, - GPIO_EC_RST_ODL, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* ADC channels */ -const struct adc_t adc_channels[] = { - /* Base detection */ - [ADC_BASE_DET] = { - "BASE_DET", - NPCX_ADC_CH0, - ADC_MAX_VOLT, - ADC_READ_MAX + 1, - 0 - }, - /* Measure VBUS through a 1/10 voltage divider */ - [ADC_VBUS] = { - "VBUS", - NPCX_ADC_CH1, - ADC_MAX_VOLT * 10, - ADC_READ_MAX + 1, - 0 - }, - /* - * Adapter current output or battery charging/discharging current (uV) - * 18x amplification on charger side. - */ - [ADC_AMON_BMON] = { - "AMON_BMON", - NPCX_ADC_CH2, - ADC_MAX_VOLT * 1000 / 18, - ADC_READ_MAX + 1, - 0 - }, - /* - * ISL9238 PSYS output is 1.44 uA/W over 5.6K resistor, to read - * 0.8V @ 99 W, i.e. 124000 uW/mV. Using ADC_MAX_VOLT*124000 and - * ADC_READ_MAX+1 as multiplier/divider leads to overflows, so we - * only divide by 2 (enough to avoid precision issues). - */ - [ADC_PSYS] = { - "PSYS", - NPCX_ADC_CH3, - ADC_MAX_VOLT * 124000 * 2 / (ADC_READ_MAX + 1), - 2, - 0 - }, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -const struct pwm_t pwm_channels[] = { - /* TODO(waihong): Assign a proper frequency. */ - [PWM_CH_DISPLIGHT] = { 5, 0, 4800 }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - - -/* Power signal list. Must match order of enum power_signal. */ -const struct power_signal_info power_signal_list[] = { - [SDM845_AP_RST_ASSERTED] = { - GPIO_AP_RST_L, - POWER_SIGNAL_ACTIVE_LOW | POWER_SIGNAL_DISABLE_AT_BOOT, - "AP_RST_ASSERTED"}, - [SDM845_PS_HOLD] = { - GPIO_PS_HOLD, - POWER_SIGNAL_ACTIVE_HIGH, - "PS_HOLD"}, - [SDM845_PMIC_FAULT_L] = { - GPIO_PMIC_FAULT_L, - POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT, - "PMIC_FAULT_L"}, - [SDM845_POWER_GOOD] = { - GPIO_POWER_GOOD, - POWER_SIGNAL_ACTIVE_HIGH, - "POWER_GOOD"}, - [SDM845_WARM_RESET] = { - GPIO_WARM_RESET_L, - POWER_SIGNAL_ACTIVE_HIGH, - "WARM_RESET_L"}, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - -/* I2C port map */ -const struct i2c_port_t i2c_ports[] = { - {"power", I2C_PORT_POWER, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - /* TODO(b/78189419): ANX7428 operates at 400kHz initially. */ - {"tcpc0", I2C_PORT_TCPC0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, - {"sensor", I2C_PORT_SENSOR, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* Power Path Controller */ -struct ppc_config_t ppc_chips[] = { - { - .i2c_port = I2C_PORT_TCPC0, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv - }, - /* - * Port 1 uses two power switches instead: - * NX5P3290: to source VBUS - * NX20P5090: to sink VBUS (charge battery) - * which are controlled directly by EC GPIOs. - */ -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* TCPC mux configuration */ -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - /* Alert is active-low, open-drain */ - [USB_PD_PORT_ANX3429] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_TCPC0, - .addr_flags = 0x28, - }, - .drv = &anx74xx_tcpm_drv, - .flags = TCPC_FLAGS_ALERT_OD, - }, - [USB_PD_PORT_PS8751] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_TCPC1, - .addr_flags = 0x0B, - }, - .drv = &ps8xxx_tcpm_drv, - }, -}; - -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = ISL923X_ADDR_FLAGS, - .drv = &isl923x_drv, - }, -}; - -/* - * Port-0 USB mux driver. - * - * The USB mux is handled by TCPC chip and the HPD is handled by AP. - * Redirect to anx74xx_tcpm_usb_mux_driver but override the get() function - * to check the HPD_IRQ mask from virtual_usb_mux_driver. - */ -static int port0_usb_mux_init(const struct usb_mux *me) -{ - return anx74xx_tcpm_usb_mux_driver.init(me); -} - -static int port0_usb_mux_set(const struct usb_mux *me, mux_state_t mux_state) -{ - return anx74xx_tcpm_usb_mux_driver.set(me, mux_state); -} - -static int port0_usb_mux_get(const struct usb_mux *me, mux_state_t *mux_state) -{ - int rv; - mux_state_t virtual_mux_state; - - rv = anx74xx_tcpm_usb_mux_driver.get(me, mux_state); - rv |= virtual_usb_mux_driver.get(me, &virtual_mux_state); - - if (virtual_mux_state & USB_PD_MUX_HPD_IRQ) - *mux_state |= USB_PD_MUX_HPD_IRQ; - return rv; -} - -const struct usb_mux_driver port0_usb_mux_driver = { - .init = port0_usb_mux_init, - .set = port0_usb_mux_set, - .get = port0_usb_mux_get, -}; - -/* - * Port-1 USB mux driver. - * - * The USB mux is handled by TCPC chip and the HPD is handled by AP. - * Redirect to tcpci_tcpm_usb_mux_driver but override the get() function - * to check the HPD_IRQ mask from virtual_usb_mux_driver. - */ -static int port1_usb_mux_init(const struct usb_mux *me) -{ - return tcpci_tcpm_usb_mux_driver.init(me); -} - -static int port1_usb_mux_set(const struct usb_mux *me, mux_state_t mux_state) -{ - return tcpci_tcpm_usb_mux_driver.set(me, mux_state); -} - -static int port1_usb_mux_get(const struct usb_mux *me, mux_state_t *mux_state) -{ - int rv; - mux_state_t virtual_mux_state; - - rv = tcpci_tcpm_usb_mux_driver.get(me, mux_state); - rv |= virtual_usb_mux_driver.get(me, &virtual_mux_state); - - if (virtual_mux_state & USB_PD_MUX_HPD_IRQ) - *mux_state |= USB_PD_MUX_HPD_IRQ; - return rv; -} - -static int port1_usb_mux_enter_low_power(const struct usb_mux *me) -{ - return tcpci_tcpm_usb_mux_driver.enter_low_power_mode(me); -} - -const struct usb_mux_driver port1_usb_mux_driver = { - .init = &port1_usb_mux_init, - .set = &port1_usb_mux_set, - .get = &port1_usb_mux_get, - .enter_low_power_mode = &port1_usb_mux_enter_low_power, -}; - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .driver = &port0_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - { - .usb_port = 1, - .driver = &port1_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - } -}; - -/* BC1.2 */ -struct pi3usb9281_config pi3usb9281_chips[] = { - { - .i2c_port = I2C_PORT_POWER, - }, - { - .i2c_port = I2C_PORT_EEPROM, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) == - CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT); - -/* Initialize board. */ -static void board_init(void) -{ - /* Enable BC1.2 VBUS detection */ - gpio_enable_interrupt(GPIO_USB_C0_VBUS_DET_L); - gpio_enable_interrupt(GPIO_USB_C1_VBUS_DET_L); - - /* Enable BC1.2 interrupts */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); - - /* Enable interrupt for BMI160 sensor */ - gpio_enable_interrupt(GPIO_ACCEL_GYRO_INT_L); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -void board_tcpc_init(void) -{ - /* Only reset TCPC if not sysjump */ - if (!system_jumped_late()) { - /* TODO(crosbug.com/p/61098): How long do we need to wait? */ - board_reset_pd_mcu(); - } - - /* Enable PPC interrupts */ - gpio_enable_interrupt(GPIO_USB_C0_SWCTL_INT_ODL); - - /* Enable TCPC interrupts */ - gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL); - - /* Enable CABLE_DET interrupt for ANX3429 wake from standby */ - gpio_enable_interrupt(GPIO_USB_C0_CABLE_DET); - - /* - * Initialize HPD to low; after sysjump SOC needs to see - * HPD pulse to enable video path - */ - for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port) - usb_mux_hpd_update(port, 0, 0); -} -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C+1); - -/* Called on AP S0 -> S3 transition */ -static void board_chipset_suspend(void) -{ - /* - * Turn off display backlight in S3. AP has its own control. The EC's - * and the AP's will be AND'ed together in hardware. - */ - gpio_set_level(GPIO_ENABLE_BACKLIGHT, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); - -/* Called on AP S3 -> S0 transition */ -static void board_chipset_resume(void) -{ - /* Turn on display backlight in S0. */ - gpio_set_level(GPIO_ENABLE_BACKLIGHT, 1); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); - -/* Called on AP S5 -> S3 transition */ -static void board_chipset_startup(void) -{ - gpio_set_flags(GPIO_USB_C1_OC_ODL, GPIO_INT_FALLING | GPIO_PULL_UP); - gpio_enable_interrupt(GPIO_USB_C1_OC_ODL); -} -DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); - -/* Called on AP S3 -> S5 transition */ -static void board_chipset_shutdown(void) -{ - /* 5V is off in S5. Disable pull-up to prevent current leak. */ - gpio_disable_interrupt(GPIO_USB_C1_OC_ODL); - gpio_set_flags(GPIO_USB_C1_OC_ODL, GPIO_INT_FALLING); -} -DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); - -/** - * Power on (or off) a single TCPC. - * minimum on/off delays are included. - * - * @param port Port number of TCPC. - * @param mode 0: power off, 1: power on. - */ -void board_set_tcpc_power_mode(int port, int mode) -{ - if (port != USB_PD_PORT_ANX3429) - return; - - if (mode) { - gpio_set_level(GPIO_EN_USB_C0_TCPC_PWR, 1); - msleep(ANX74XX_PWR_H_RST_H_DELAY_MS); - gpio_set_level(GPIO_USB_C0_PD_RST_R_L, 1); - } else { - gpio_set_level(GPIO_USB_C0_PD_RST_R_L, 0); - msleep(ANX74XX_RST_L_PWR_L_DELAY_MS); - gpio_set_level(GPIO_EN_USB_C0_TCPC_PWR, 0); - msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS); - } -} - -void board_reset_pd_mcu(void) -{ - /* Assert reset */ - gpio_set_level(GPIO_USB_C0_PD_RST_R_L, 0); - gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0); - - msleep(MAX(1, ANX74XX_RST_L_PWR_L_DELAY_MS)); - gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1); - /* Disable TCPC0 (anx3429) power */ - gpio_set_level(GPIO_EN_USB_C0_TCPC_PWR, 0); - - msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS); - board_set_tcpc_power_mode(USB_PD_PORT_ANX3429, 1); -} - -int board_vbus_sink_enable(int port, int enable) -{ - if (port == USB_PD_PORT_ANX3429) { - /* Port 0 is controlled by a PPC SN5S330 */ - return ppc_vbus_sink_enable(port, enable); - } else if (port == USB_PD_PORT_PS8751) { - /* Port 1 is controlled by a power switch NX20P5090 */ - gpio_set_level(GPIO_EN_USB_C1_CHARGE_EC_L, !enable); - return EC_SUCCESS; - } - return EC_ERROR_INVAL; -} - -int board_is_sourcing_vbus(int port) -{ - if (port == USB_PD_PORT_ANX3429) { - /* Port 0 is controlled by a PPC SN5S330 */ - return ppc_is_sourcing_vbus(port); - } else if (port == USB_PD_PORT_PS8751) { - /* Port 1 is controlled by a power switch NX5P3290 */ - return gpio_get_level(GPIO_EN_USB_C1_5V_OUT); - } - return EC_ERROR_INVAL; -} - -void board_overcurrent_event(int port, int is_overcurrented) -{ - /* TODO(b/120231371): Notify AP */ - CPRINTS("p%d: overcurrent!", port); -} - -int board_set_active_charge_port(int port) -{ - int is_real_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); - int i; - int rv; - - if (!is_real_port && port != CHARGE_PORT_NONE) - return EC_ERROR_INVAL; - - CPRINTS("New chg p%d", port); - - if (port == CHARGE_PORT_NONE) { - /* Disable all ports. */ - for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - rv = board_vbus_sink_enable(i, 0); - if (rv) { - CPRINTS("Disabling p%d sink path failed.", i); - return rv; - } - } - - return EC_SUCCESS; - } - - /* Check if the port is sourcing VBUS. */ - if (board_is_sourcing_vbus(port)) { - CPRINTF("Skip enable p%d", port); - return EC_ERROR_INVAL; - } - - /* - * Turn off the other ports' sink path FETs, before enabling the - * requested charge port. - */ - for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - if (i == port) - continue; - - if (board_vbus_sink_enable(i, 0)) - CPRINTS("p%d: sink path disable failed.", i); - } - - /* Enable requested charge port. */ - if (board_vbus_sink_enable(port, 1)) { - CPRINTS("p%d: sink path enable failed.", port); - return EC_ERROR_UNKNOWN; - } - - return EC_SUCCESS; -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - /* - * Ignore lower charge ceiling on PD transition if our battery is - * critical, as we may brownout. - */ - if (supplier == CHARGE_SUPPLIER_PD && - charge_ma < 1500 && - charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) { - CPRINTS("Using max ilim %d", max_ma); - charge_ma = max_ma; - } - - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); -} - -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) - if (gpio_get_level(GPIO_USB_C0_PD_RST_R_L)) - status |= PD_STATUS_TCPC_ALERT_0; - if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) - if (gpio_get_level(GPIO_USB_C1_PD_RST_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - - return status; -} - -/* Mutexes */ -static struct mutex g_lid_mutex; - -static struct bmi_drv_data_t g_bmi160_data; -static struct opt3001_drv_data_t g_opt3001_data = { - .scale = 1, - .uscale = 0, - .offset = 0, -}; - -/* Matrix to rotate accelerometer into standard reference frame */ -const mat33_fp_t base_standard_ref = { - { FLOAT_TO_FP(-1), 0, 0}, - { 0, FLOAT_TO_FP(-1), 0}, - { 0, 0, FLOAT_TO_FP(1)} -}; - -struct motion_sensor_t motion_sensors[] = { - /* - * Note: bmi160: supports accelerometer and gyro sensor - * Requirement: accelerometer sensor must init before gyro sensor - * DO NOT change the order of the following table. - */ - [LID_ACCEL] = { - .name = "Accel", - .active_mask = SENSOR_ACTIVE_S0_S3_S5, - .chip = MOTIONSENSE_CHIP_BMI160, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &bmi160_drv, - .mutex = &g_lid_mutex, - .drv_data = &g_bmi160_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, - .rot_standard_ref = &base_standard_ref, - .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ - .min_frequency = BMI_ACCEL_MIN_FREQ, - .max_frequency = BMI_ACCEL_MAX_FREQ, - .config = { - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, - [LID_GYRO] = { - .name = "Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3_S5, - .chip = MOTIONSENSE_CHIP_BMI160, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_LID, - .drv = &bmi160_drv, - .mutex = &g_lid_mutex, - .drv_data = &g_bmi160_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, - .default_range = 1000, /* dps */ - .rot_standard_ref = &base_standard_ref, - .min_frequency = BMI_GYRO_MIN_FREQ, - .max_frequency = BMI_GYRO_MAX_FREQ, - }, - [LID_ALS] = { - .name = "Light", - .active_mask = SENSOR_ACTIVE_S0, - .chip = MOTIONSENSE_CHIP_OPT3001, - .type = MOTIONSENSE_TYPE_LIGHT, - .location = MOTIONSENSE_LOC_LID, - .drv = &opt3001_drv, - .drv_data = &g_opt3001_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = OPT3001_I2C_ADDR_FLAGS, - .rot_standard_ref = NULL, - .default_range = 0x10000, /* scale = 1; uscale = 0 */ - .min_frequency = OPT3001_LIGHT_MIN_FREQ, - .max_frequency = OPT3001_LIGHT_MAX_FREQ, - .config = { - [SENSOR_CONFIG_EC_S0] = { - .odr = 1000, - }, - }, - }, -}; -const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); diff --git a/board/cheza/board.h b/board/cheza/board.h deleted file mode 100644 index 9246151698..0000000000 --- a/board/cheza/board.h +++ /dev/null @@ -1,224 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Cheza board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* TODO(waihong): Remove the following bringup features */ -#define CONFIG_BRINGUP -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands. */ -#define CONFIG_USB_PD_DEBUG_LEVEL 3 -#define CONFIG_CMD_AP_RESET_LOG -#define CONFIG_HOSTCMD_AP_RESET - -/* - * By default, enable all console messages excepted event and HC: - * The sensor stack is generating a lot of activity. - * They can be enabled through the console command 'chan'. - */ -#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_HOSTCMD))) - -/* NPCX7 config */ -#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ -#define NPCX_TACH_SEL2 0 /* No tach. */ -#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ - -/* Internal SPI flash on NPCX7 */ -#define CONFIG_FLASH_SIZE_BYTES (1024 * 1024) /* 1MB internal spi flash */ -#define CONFIG_SPI_FLASH_REGS -#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ -#define CONFIG_HOSTCMD_FLASH_SPI_INFO - -/* EC Modules */ -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_LED_COMMON -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_ADC -#define CONFIG_BACKLIGHT_LID -#define CONFIG_FPU -#define CONFIG_PWM -#define CONFIG_PWM_DISPLIGHT - -#define CONFIG_VBOOT_HASH - -#define CONFIG_DETACHABLE_BASE - -#undef CONFIG_PECI - -#define CONFIG_HOSTCMD_SHI -#define CONFIG_HOST_COMMAND_STATUS -#define CONFIG_HOSTCMD_SECTION_SORTED /* Host commands are sorted. */ -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_INPUT_DEVICES -#define CONFIG_MKBP_USE_GPIO - -#define CONFIG_BOARD_VERSION_GPIO -#define CONFIG_POWER_BUTTON -#define CONFIG_VOLUME_BUTTONS -#define CONFIG_BUTTON_TRIGGERED_RECOVERY -#define CONFIG_EMULATED_SYSRQ -#define CONFIG_CMD_BUTTON -#define CONFIG_SWITCH -#define CONFIG_LID_SWITCH -#define CONFIG_EXTPOWER_GPIO - -#define CONFIG_TABLET_MODE -#define CONFIG_TABLET_MODE_SWITCH - -/* Battery */ -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_PRES_ODL -#define CONFIG_BATTERY_SMART - -/* Charger */ -#define CONFIG_CHARGER -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGER_ISL9238 -#define CONFIG_CHARGE_RAMP_HW -#define CONFIG_USB_CHARGER -#define CONFIG_CMD_CHARGER_ADC_AMON_BMON -#define CONFIG_CHARGER_PSYS -#define CONFIG_CHARGER_PSYS_READ -#define CONFIG_CHARGER_DISCHARGE_ON_AC - -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 2 -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 7500 -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 - -/* BC 1.2 Charger */ -#define CONFIG_BC12_DETECT_PI3USB9281 -#define CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT 2 - -/* USB */ -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_TCPMV1 -#define CONFIG_HOSTCMD_PD_CONTROL -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_DISCHARGE_PPC -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#define CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0 -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_TCPC_LOW_POWER -#define CONFIG_USB_PD_TCPM_ANX3429 -#define CONFIG_USB_PD_TCPM_PS8751 -#define CONFIG_USB_PD_TCPM_MUX -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_CHARGER -#define CONFIG_USB_PD_5V_EN_CUSTOM -#define CONFIG_USB_MUX_VIRTUAL -#define CONFIG_USBC_PPC_SN5S330 -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP - -/* RTC */ -#define CONFIG_CMD_RTC -#define CONFIG_HOSTCMD_RTC - -/* Sensors */ -#define CONFIG_ACCELGYRO_BMI160 -#define CONFIG_ACCEL_INTERRUPTS -#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) -/* Enable sensor fifo, must also define the _SIZE and _THRES */ -#define CONFIG_ACCEL_FIFO -/* FIFO size is a power of 2. */ -#define CONFIG_ACCEL_FIFO_SIZE 256 -/* Depends on how fast the AP boots and typical ODRs. */ -#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) -#define CONFIG_CMD_ACCELS -#define CONFIG_CMD_ACCEL_INFO -#define CONFIG_ALS -#define CONFIG_ALS_OPT3001 -#define ALS_COUNT 1 -#define OPT3001_I2C_ADDR_FLAGS OPT3001_I2C_ADDR1_FLAGS - -/* PD */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000) -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -/* Chipset */ -#define CONFIG_CHIPSET_SDM845 -#define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_POWER_COMMON -#define CONFIG_POWER_PP5000_CONTROL - -/* NPCX Features */ -#define CONFIG_HIBERNATE_PSL - -/* I2C Ports */ -#define I2C_PORT_BATTERY I2C_PORT_POWER -#define I2C_PORT_CHARGER I2C_PORT_POWER -#define I2C_PORT_ACCEL I2C_PORT_SENSOR -#define I2C_PORT_POWER NPCX_I2C_PORT0_0 -#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0 -#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT5_0 -#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0 - -/* GPIO alias */ -#define GPIO_PMIC_RESIN_L GPIO_PM845_RESIN_L - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum power_signal { - SDM845_AP_RST_ASSERTED = 0, - SDM845_PS_HOLD, - SDM845_PMIC_FAULT_L, - SDM845_POWER_GOOD, - SDM845_WARM_RESET, - /* Number of power signals */ - POWER_SIGNAL_COUNT -}; - -enum adc_channel { - ADC_BASE_DET, - ADC_VBUS, - ADC_AMON_BMON, - ADC_PSYS, - ADC_CH_COUNT -}; - -/* Motion sensors */ -enum sensor_id { - LID_ACCEL = 0, - LID_GYRO, - LID_ALS, - SENSOR_COUNT, -}; - -enum pwm_channel { - PWM_CH_DISPLIGHT, - PWM_CH_COUNT -}; - -/* Reset all TCPCs. */ -void board_reset_pd_mcu(void); -/* Base detection interrupt handler */ -void base_detect_interrupt(enum gpio_signal signal); - -/* Sensors without hardware FIFO are in forced mode */ -#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ALS) - -#endif /* !defined(__ASSEMBLER__) */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/cheza/build.mk b/board/cheza/build.mk deleted file mode 100644 index 2e8e53ec88..0000000000 --- a/board/cheza/build.mk +++ /dev/null @@ -1,13 +0,0 @@ -# -*- makefile -*- -# Copyright 2018 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx7 -CHIP_VARIANT:=npcx7m7wb - -board-y=battery.o board.o led.o usb_pd_policy.o base_detect.o diff --git a/board/cheza/ec.tasklist b/board/cheza/ec.tasklist deleted file mode 100644 index ef70197bac..0000000000 --- a/board/cheza/ec.tasklist +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/board/cheza/gpio.inc b/board/cheza/gpio.inc deleted file mode 100644 index bc9d12ad79..0000000000 --- a/board/cheza/gpio.inc +++ /dev/null @@ -1,169 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* USB-C interrupts */ -GPIO_INT(USB_C0_PD_INT_ODL, PIN(A, 0), GPIO_INT_FALLING, tcpc_alert_event) /* Interrupt from port-0 TCPC */ -GPIO_INT(USB_C1_PD_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, tcpc_alert_event) /* Interrupt from port-1 TCPC */ -GPIO_INT(USB_C0_SWCTL_INT_ODL, PIN(0, 3), GPIO_INT_FALLING, ppc_interrupt) /* Interrupt from port-0 PPC */ -GPIO_INT(USB_C0_BC12_INT_L, PIN(6, 1), GPIO_INT_FALLING, usb0_evt) /* Interrupt from port-0 BC1.2 */ -GPIO_INT(USB_C1_BC12_INT_L, PIN(8, 2), GPIO_INT_FALLING, usb1_evt) /* Interrupt from port-1 BC1.2 */ -GPIO_INT(USB_C0_VBUS_DET_L, PIN(6, 2), GPIO_INT_BOTH | GPIO_PULL_UP, vbus0_evt) /* BC1.2 VBUS detection on port-0 */ -GPIO_INT(USB_C1_VBUS_DET_L, PIN(8, 3), GPIO_INT_BOTH | GPIO_PULL_UP, vbus1_evt) /* BC1.2 VBUS detection on port-1 */ -GPIO_INT(USB_C0_CABLE_DET, PIN(3, 7), GPIO_INT_RISING, anx74xx_cable_det_interrupt) /* Cable detection from port-0 TCPC */ -GPIO_INT(USB_C1_OC_ODL, PIN(7, 2), GPIO_INT_FALLING, usb1_oc_evt) /* Port-1 power switch over-current */ -GPIO_INT(ACCEL_GYRO_INT_L, PIN(D, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi160_interrupt) /* Accelerometer/gyro interrupt */ - -/* System interrupts */ -GPIO_INT(AC_PRESENT, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) /* ACOK_OD */ -GPIO_INT(POWER_BUTTON_L, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) /* EC_PWR_BTN_ODL */ -GPIO_INT(VOLUME_DOWN_L, PIN(7, 0), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) /* EC_VOLDN_BTN_ODL */ -GPIO_INT(VOLUME_UP_L, PIN(F, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) /* EC_VOLUP_BTN_ODL */ -GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ -GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) /* LID_OPEN_EC */ -GPIO_INT(AP_RST_REQ, PIN(C, 2), GPIO_INT_RISING | GPIO_PULL_DOWN | GPIO_SEL_1P8V, chipset_reset_request_interrupt) /* Reset request from AP */ -GPIO_INT(AP_RST_L, PIN(C, 1), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt) -GPIO_INT(PS_HOLD, PIN(D, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) /* Indicate when AP triggers reset/shutdown */ -GPIO_INT(PMIC_FAULT_L, PIN(7, 6), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt) /* Any PMIC fault? */ -/* - * When switch-cap is off, the POWER_GOOD signal is floating. Need a pull-down - * to make it low. Overload the interrupt function chipset_warm_reset_interrupt - * for not only signalling power_signal_interrupt but also handling the logic - * of WARM_RESET_L which is pulled-up by the same rail of POWER_GOOD. - */ -GPIO_INT(POWER_GOOD, PIN(5, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN, chipset_warm_reset_interrupt) /* SRC_PP1800_S4A from PMIC */ -GPIO_INT(WARM_RESET_L, PIN(F, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_warm_reset_interrupt) /* AP warm reset */ -GPIO_INT(SHI_CS_L, PIN(5, 3), GPIO_INT_FALLING | GPIO_PULL_DOWN, shi_cs_event) /* AP_EC_SPI_CS_L */ -GPIO_INT(CC_LID_BASE_ADC, PIN(4, 5), GPIO_INT_BOTH, base_detect_interrupt) /* Base detection */ - -/* - * EC_RST_ODL acts as a wake source from PSL hibernate mode. However, it does - * not need to be an interrupt for normal EC operations. Thus, configure it as - * GPIO_INT_BOTH with wake on low-to-high edge using GPIO_HIB_WAKE_HIGH so that - * PSL common code can configure PSL_IN correctly. - * - * Use the rising edge to wake EC up. If we chose the falling edge, it would - * still wake EC up, but EC is in an intermediate state until the signal goes - * back to high. - */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* Wake source: EC reset */ -GPIO(ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW) /* EC_ENTERING_RW: Indicate when EC is entering RW code */ -GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT) /* Case Closed Debug Mode */ -GPIO(BATT_PRES_ODL, PIN(E, 5), GPIO_INPUT) /* EC_BATT_PRES_ODL: Battery Present */ -GPIO(PROCHOT_L, PIN(3, 4), GPIO_INPUT) - -/* PMIC/AP 1.8V */ -GPIO(PM845_RESIN_L, PIN(3, 2), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PMIC reset trigger */ -GPIO(PMIC_KPD_PWR_ODL, PIN(D, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PMIC power button */ -GPIO(EC_INT_L, PIN(A, 2), GPIO_ODR_HIGH) /* Interrupt line between AP and EC */ -GPIO(AP_SUSPEND_L, PIN(5, 7), GPIO_INPUT) /* Suspend signal from AP */ - -/* Power enables */ -GPIO(SWITCHCAP_ON_L, PIN(D, 5), GPIO_OUT_LOW) /* Enable switch cap. XXX: It's active-high */ -GPIO(VBOB_EN, PIN(9, 5), GPIO_OUT_LOW) /* Enable VBOB */ -GPIO(EN_PP3300_A, PIN(A, 6), GPIO_OUT_LOW) /* Enable PP3300 */ -GPIO(EN_PP5000, PIN(6, 7), GPIO_OUT_LOW) /* EN_PP5000_A: Enable PP5000 */ -GPIO(ENABLE_BACKLIGHT, PIN(B, 6), GPIO_OUT_LOW) /* EC_BL_DISABLE_L: Backlight disable signal from EC */ - -/* Sensors */ -GPIO(ALS_INT_L, PIN(5, 0), GPIO_INPUT) /* ALS sensor interrupt */ -GPIO(P_SENSOR_INT_L, PIN(F, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* P-sensor interrupt */ -GPIO(RCAM_VSYNC, PIN(4, 0), GPIO_INPUT | GPIO_SEL_1P8V) /* VSYNC from rear camera */ - -/* Base */ -GPIO(EN_PPVAR_VAR_BASE, PIN(0, 4), GPIO_OUT_LOW) /* Power to the base */ -GPIO(EN_CC_LID_BASE_PH, PIN(D, 1), GPIO_ODR_HIGH) -GPIO(EN_CC_LID_BASE_PULLDN, PIN(D, 0), GPIO_ODR_HIGH) -GPIO(REVERSE_DOCK_EC, PIN(C, 6), GPIO_INPUT) /* Indicate if the dock is reversed */ -GPIO(CC_LID_RX_BASE_TX, PIN(7, 5), GPIO_INPUT) -GPIO(CC_LID_RX_BASE_RX, PIN(8, 6), GPIO_INPUT) - -/* LEDs */ -GPIO(CHG_LED_Y_C0, PIN(C, 3), GPIO_OUT_LOW) /* EC_CHG_LED_Y_C0 */ -GPIO(CHG_LED_W_C0, PIN(C, 4), GPIO_OUT_LOW) /* EC_CHG_LED_W_C0 */ -GPIO(CHG_LED_Y_C1, PIN(6, 0), GPIO_OUT_LOW) /* EC_CHG_LED_Y_C1 */ -GPIO(CHG_LED_W_C1, PIN(C, 0), GPIO_OUT_LOW) /* EC_CHG_LED_W_C1 */ - -/* - * USB HS muxes - * - * C0_MUX:D ----- C0_BC12 ---- C0_PORT - * AP --+------- C0_MUX:D1 - * | +--- C0_MUX:D2 - * | | - * | | - * | | C1_MUX:D ----- C1_BC12 ---- C1_PORT - * | | +- C1_MUX:D1 - * +------- C1_MUX:D2 - * | | - * AP --- USB_HUB - */ -/* Switch both port-0 and port-1 to the hub, which matches the SS path. */ -GPIO(USB_C0_HS_MUX_OE_L, PIN(A, 4), GPIO_OUT_LOW) -GPIO(USB_C0_HS_MUX_SEL, PIN(A, 3), GPIO_OUT_HIGH) /* L:D1(AP), H:D2(hub) */ -GPIO(USB_C1_HS_MUX_OE_L, PIN(7, 3), GPIO_OUT_LOW) -GPIO(USB_C1_HS_MUX_SEL, PIN(7, 4), GPIO_OUT_LOW) /* L:D1(hub), H:D2(AP) */ - -/* USB-C port-0 controls */ -GPIO(USB_C0_PD_RST_R_L, PIN(F, 1), GPIO_OUT_HIGH) /* Port-0 TCPC chip reset */ -GPIO(EN_USB_C0_TCPC_PWR, PIN(C, 5), GPIO_OUT_LOW) /* Port-0 TCPC power enable */ - -/* USB-C port-1 controls */ -GPIO(USB_C1_PD_RST_ODL, PIN(E, 4), GPIO_ODR_HIGH) /* Port-1 TCPC chip reset */ -GPIO(EN_USB_C1_5V_OUT, PIN(6, 3), GPIO_OUT_LOW) /* Port-1 power switch 5V output */ -GPIO(EN_USB_C1_3A, PIN(5, 6), GPIO_OUT_LOW) /* Port-1 power switch 3A current */ -GPIO(EN_USB_C1_CHARGE_EC_L, PIN(B, 1), GPIO_OUT_LOW) /* Port-1 enable charging */ -GPIO(USBC_MUX_CONF1, PIN(5, 1), GPIO_OUT_HIGH) /* Port-1 enable DP switch */ - -/* USB-C port-1 interrupts */ -GPIO(USB_C1_DP_HPD, PIN(9, 6), GPIO_INPUT) /* DP HPD from port-1 TCPC */ - -/* I2C */ -GPIO(I2C0_SCL, PIN(B, 5), GPIO_INPUT) /* EC_I2C_POWER_SCL */ -GPIO(I2C0_SDA, PIN(B, 4), GPIO_INPUT) /* EC_I2C_POWER_SDA */ -GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* EC_I2C_USB_C0_PD_SCL */ -GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* EC_I2C_USB_C0_PD_SDA */ -GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* EC_I2C_USB_C1_PD_SCL */ -GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* EC_I2C_USB_C1_PD_SDA */ -GPIO(I2C5_SCL, PIN(3, 3), GPIO_INPUT) /* EC_I2C_EEPROM_SCL */ -GPIO(I2C5_SDA, PIN(3, 6), GPIO_INPUT) /* EC_I2C_EEPROM_SDA */ -GPIO(I2C7_SCL, PIN(B, 3), GPIO_INPUT | - GPIO_SEL_1P8V) /* EC_I2C_SENSOR_SCL */ -GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT | - GPIO_SEL_1P8V) /* EC_I2C_SENSOR_SDA */ - -/* Board/SKU IDs */ -GPIO(BOARD_VERSION1, PIN(C, 7), GPIO_INPUT) /* BRD_ID1 */ -GPIO(BOARD_VERSION2, PIN(9, 3), GPIO_INPUT) /* BRD_ID2 */ -GPIO(BOARD_VERSION3, PIN(8, 0), GPIO_INPUT) /* BRD_ID3 */ -GPIO(SKU_ID1, PIN(F, 0), GPIO_INPUT) -GPIO(SKU_ID2, PIN(4, 1), GPIO_INPUT) - -/* Switchcap */ -/* - * GPIO0 is configured as PVC_PG. When the chip in power down mode, it outputs - * high-Z. Set pull-down to avoid floating. - */ -GPIO(DA9313_GPIO0, PIN(E, 2), GPIO_INPUT | GPIO_PULL_DOWN) /* Switchcap GPIO0 */ - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* UART (GPIO64/65) */ -ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* I2C0 (GPIOB4/B5) */ -ALTERNATE(PIN_MASK(9, 0x07), 1, MODULE_I2C, 0) /* I2C1 SDA (GPIO90), I2C2 (GPIO91/92) */ -ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1 SCL (GPIO87) */ -ALTERNATE(PIN_MASK(3, 0x48), 1, MODULE_I2C, 0) /* I2C5 (GPIO33/36) */ -ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C7 (GPIOB2/B3) - 1.8V */ -ALTERNATE(PIN_MASK(4, 0x1C), 0, MODULE_ADC, 0) /* ADC1 (GPIO44), ADC2 (GPIO43), ADC3 (GPIO42) */ -ALTERNATE(PIN_MASK(4, 0xC0), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SDO (GPIO47), SHI_SDI (GPIO46) */ -ALTERNATE(PIN_MASK(5, 0x28), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SCLK (GPIO55), SHI_CS# (GPIO53) */ -ALTERNATE(PIN_MASK(B, 0x80), 1, MODULE_PWM, 0) /* PWM5 (GPIOB7) */ -ALTERNATE(PIN_MASK(D, 0x04), 1, MODULE_PMU, 0) /* PSL_IN1 (GPIOD2) - LID_OPEN_EC */ -ALTERNATE(PIN_MASK(0, 0x01), 1, MODULE_PMU, 0) /* PSL_IN2 (GPIO00) - ACOK_OD */ -ALTERNATE(PIN_MASK(0, 0x02), 1, MODULE_PMU, 0) /* PSL_IN3 (GPIO01) - EC_PWR_BTN_ODL */ -ALTERNATE(PIN_MASK(0, 0x04), 1, MODULE_PMU, 0) /* PSL_IN4 (GPIO02) - EC_RST_ODL */ diff --git a/board/cheza/led.c b/board/cheza/led.c deleted file mode 100644 index 21ca78cb5c..0000000000 --- a/board/cheza/led.c +++ /dev/null @@ -1,163 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Power and battery LED control. - */ - -#include "battery.h" -#include "charge_manager.h" -#include "charge_state.h" -#include "chipset.h" -#include "ec_commands.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "led_common.h" -#include "system.h" -#include "util.h" - -#define BAT_LED_ON 1 -#define BAT_LED_OFF 0 - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_RIGHT_LED, - EC_LED_ID_LEFT_LED, -}; - -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -enum led_color { - LED_OFF = 0, - LED_AMBER, - LED_WHITE, - LED_COLOR_COUNT /* Number of colors, not a color itself */ -}; - -static void side_led_set_color(int port, enum led_color color) -{ - gpio_set_level(port ? GPIO_CHG_LED_Y_C1 : GPIO_CHG_LED_Y_C0, - (color == LED_AMBER) ? BAT_LED_ON : BAT_LED_OFF); - gpio_set_level(port ? GPIO_CHG_LED_W_C1 : GPIO_CHG_LED_W_C0, - (color == LED_WHITE) ? BAT_LED_ON : BAT_LED_OFF); -} - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - brightness_range[EC_LED_COLOR_AMBER] = 1; - brightness_range[EC_LED_COLOR_WHITE] = 1; -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - int port; - - switch (led_id) { - case EC_LED_ID_RIGHT_LED: - port = 0; - break; - case EC_LED_ID_LEFT_LED: - port = 1; - break; - default: - return EC_ERROR_PARAM1; - } - - if (brightness[EC_LED_COLOR_WHITE] != 0) - side_led_set_color(port, LED_WHITE); - else if (brightness[EC_LED_COLOR_AMBER] != 0) - side_led_set_color(port, LED_AMBER); - else - side_led_set_color(port, LED_OFF); - - return EC_SUCCESS; -} - -/* - * Set active charge port color to the parameter, turn off all others. - * If no port is active (-1), turn off all LEDs. - */ -static void set_active_port_color(enum led_color color) -{ - int port = charge_manager_get_active_charge_port(); - - if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) - side_led_set_color(0, (port == 0) ? color : LED_OFF); - if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) - side_led_set_color(1, (port == 1) ? color : LED_OFF); -} - -static void board_led_set_battery(void) -{ - static int battery_ticks; - uint32_t chflags = charge_get_flags(); - - battery_ticks++; - - switch (charge_get_state()) { - case PWR_STATE_CHARGE: - /* Always indicate when charging, even in suspend. */ - set_active_port_color(LED_AMBER); - break; - case PWR_STATE_DISCHARGE: - if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { - if (charge_get_percent() <= 10) - side_led_set_color(0, - (battery_ticks & 0x4) ? LED_WHITE : LED_OFF); - else - side_led_set_color(0, LED_OFF); - } - - if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) - side_led_set_color(1, LED_OFF); - break; - case PWR_STATE_ERROR: - set_active_port_color((battery_ticks & 0x2) ? - LED_WHITE : LED_OFF); - break; - case PWR_STATE_CHARGE_NEAR_FULL: - set_active_port_color(LED_WHITE); - break; - case PWR_STATE_IDLE: /* External power connected in IDLE */ - if (chflags & CHARGE_FLAG_FORCE_IDLE) - set_active_port_color((battery_ticks & 0x4) ? - LED_AMBER : LED_OFF); - else - set_active_port_color(LED_WHITE); - break; - default: - /* Other states don't alter LED behavior */ - break; - } -} - -/* Called by hook task every TICK */ -static void led_tick(void) -{ - board_led_set_battery(); -} -DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT); - -void led_control(enum ec_led_id led_id, enum ec_led_state state) -{ - enum led_color color; - - if ((led_id != EC_LED_ID_RECOVERY_HW_REINIT_LED) && - (led_id != EC_LED_ID_SYSRQ_DEBUG_LED)) - return; - - if (state == LED_STATE_RESET) { - led_auto_control(EC_LED_ID_LEFT_LED, 1); - led_auto_control(EC_LED_ID_RIGHT_LED, 1); - board_led_set_battery(); - return; - } - - color = state ? LED_WHITE : LED_OFF; - - led_auto_control(EC_LED_ID_LEFT_LED, 0); - led_auto_control(EC_LED_ID_RIGHT_LED, 0); - - side_led_set_color(0, color); - side_led_set_color(1, color); -} diff --git a/board/cheza/usb_pd_policy.c b/board/cheza/usb_pd_policy.c deleted file mode 100644 index 88fcded727..0000000000 --- a/board/cheza/usb_pd_policy.c +++ /dev/null @@ -1,205 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "charge_manager.h" -#include "console.h" -#include "gpio.h" -#include "pi3usb9281.h" -#include "system.h" -#include "usb_mux.h" -#include "usbc_ppc.h" -#include "util.h" - -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) - -int pd_check_vconn_swap(int port) -{ - /* TODO(waihong): Check any case we do not allow. */ - return 1; -} - -__override void pd_execute_data_swap(int port, - enum pd_data_role data_role) -{ - int enable = (data_role == PD_ROLE_UFP); - int type; - - /* - * Exclude the PD charger, in which the "USB Communications Capable" - * bit is unset in the Fixed Supply PDO. - */ - if (pd_capable(port)) - enable = enable && pd_get_partner_usb_comm_capable(port); - - /* - * The hub behind the BC1.2 chip may advertise a BC1.2 type. So - * disconnect the switch when getting the charger type to ensure - * the detected type is from external. - */ - usb_charger_set_switches(port, USB_SWITCH_DISCONNECT); - type = pi3usb9281_get_device_type(port); - usb_charger_set_switches(port, USB_SWITCH_RESTORE); - - /* Exclude the BC1.2 charger, which is not detected as CDP or SDP. */ - enable = enable && (type & (PI3USB9281_TYPE_CDP | PI3USB9281_TYPE_SDP)); - - /* Only mux one port to AP. If already muxed, return. */ - if (enable && (!gpio_get_level(GPIO_USB_C0_HS_MUX_SEL) || - gpio_get_level(GPIO_USB_C1_HS_MUX_SEL))) - return; - - /* Port-0 and port-1 have different polarities. */ - if (port == 0) - gpio_set_level(GPIO_USB_C0_HS_MUX_SEL, enable ? 0 : 1); - else if (port == 1) - gpio_set_level(GPIO_USB_C1_HS_MUX_SEL, enable ? 1 : 0); -} - -static uint8_t vbus_en[CONFIG_USB_PD_PORT_MAX_COUNT]; -static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5, - TYPEC_RP_1A5}; - -static void board_vbus_update_source_current(int port) -{ - if (port == 0) { - /* - * Port 0 is controlled by a USB-C PPC SN5S330. - */ - ppc_set_vbus_source_current_limit(port, vbus_rp[port]); - ppc_vbus_source_enable(port, vbus_en[port]); - } else if (port == 1) { - /* - * Port 1 is controlled by a USB-C current-limited power - * switch, NX5P3290. Change the GPIO driving the load switch. - * - * 1.5 vs 3.0 A limit is controlled by a dedicated gpio. - * If the GPIO is asserted, it shorts a n-MOSFET to put a - * 16.5k resistance (2x 33k in parallel) on the NX5P3290 load - * switch ILIM pin, setting a minimum OCP current of 3100 mA. - * If the GPIO is deasserted, the n-MOSFET is open that makes - * a single 33k resistor on ILIM, setting a minimum OCP - * current of 1505 mA. - */ - gpio_set_level(GPIO_EN_USB_C1_3A, - vbus_rp[port] == TYPEC_RP_3A0 ? 1 : 0); - gpio_set_level(GPIO_EN_USB_C1_5V_OUT, vbus_en[port]); - } -} - -void pd_power_supply_reset(int port) -{ - int prev_en; - - prev_en = vbus_en[port]; - - /* Disable VBUS */ - vbus_en[port] = 0; - board_vbus_update_source_current(port); - - /* Enable discharge if we were previously sourcing 5V */ - if (prev_en) - pd_set_vbus_discharge(port, 1); - -#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT - /* Give back the current quota we are no longer using */ - charge_manager_source_port(port, 0); -#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */ - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_set_power_supply_ready(int port) -{ - /* Disable charging */ - board_vbus_sink_enable(port, 0); - - pd_set_vbus_discharge(port, 0); - - /* Provide VBUS */ - vbus_en[port] = 1; - board_vbus_update_source_current(port); - - /* Ensure we advertise the proper available current quota */ - charge_manager_source_port(port, 1); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; /* we are ready */ -} - -int board_vbus_source_enabled(int port) -{ - return vbus_en[port]; -} - -__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) -{ - vbus_rp[port] = rp; - board_vbus_update_source_current(port); -} - -int pd_snk_is_vbus_provided(int port) -{ - return !gpio_get_level(port ? GPIO_USB_C1_VBUS_DET_L : - GPIO_USB_C0_VBUS_DET_L); -} - -/* ----------------- Vendor Defined Messages ------------------ */ -/** - * Is the port fine to be muxed its DisplayPort lines? - * - * Only one port can be muxed to DisplayPort at a time. - * - * @param port Port number of TCPC. - * @return 1 is fine; 0 is bad as other port is already muxed; - */ -static int is_dp_muxable(int port) -{ - int i; - - for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) - if (i != port) { - if (usb_mux_get(i) & USB_PD_MUX_DP_ENABLED) - return 0; - } - - return 1; -} - -extern uint32_t dp_status[CONFIG_USB_PD_PORT_MAX_COUNT]; -__override int svdm_dp_attention(int port, uint32_t *payload) -{ - int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); - int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); - int mf_pref = PD_VDO_DPSTS_MF_PREF(payload[1]); - - dp_status[port] = payload[1]; - - usb_mux_hpd_update(port, lvl, irq); - - if (lvl && is_dp_muxable(port)) { - /* - * The GPIO USBC_MUX_CONF1 enables the mux of the DP redriver - * for the port 1. - */ - gpio_set_level(GPIO_USBC_MUX_CONF1, port == 1); - - usb_mux_set(port, mf_pref ? - USB_PD_MUX_DOCK : USB_PD_MUX_DP_ENABLED, - USB_SWITCH_CONNECT, - polarity_rm_dts(pd_get_polarity(port))); - } else { - usb_mux_set(port, mf_pref ? - USB_PD_MUX_USB_ENABLED : USB_PD_MUX_NONE, - USB_SWITCH_CONNECT, - polarity_rm_dts(pd_get_polarity(port))); - } - - /* ack */ - return 1; -} diff --git a/board/cheza/vif_override.xml b/board/cheza/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/cheza/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/dragonegg/battery.c b/board/dragonegg/battery.c deleted file mode 100644 index ae583a0d40..0000000000 --- a/board/dragonegg/battery.c +++ /dev/null @@ -1,65 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery_fuel_gauge.h" -#include "common.h" -#include "util.h" - -/* - * Battery info for all DragonEgg battery types. Note that the fields - * start_charging_min/max and charging_min/max are not used for the charger. - * The effective temperature limits are given by discharging_min/max_c. - * - * Fuel Gauge (FG) parameters which are used for determining if the battery - * is connected, the appropriate ship mode (battery cutoff) command, and the - * charge/discharge FETs status. - * - * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery - * register. For some batteries, the charge/discharge FET bits are set when - * charging/discharging is active, in other types, these bits set mean that - * charging/discharging is disabled. Therefore, in addition to the mask for - * these bits, a disconnect value must be specified. Note that for TI fuel - * gauge, the charge/discharge FET status is found in Operation Status (0x54), - * but a read of Manufacturer Access (0x00) will return the lower 16 bits of - * Operation status which contains the FET status bits. - * - * The assumption for battery types supported is that the charge/discharge FET - * status can be read with a sb_read() command and therefore, only the register - * address, mask, and disconnect value need to be provided. - */ -const struct board_batt_params board_battery_info[] = { - /* Panasonic AP1505L Battery Information */ - [BATTERY_0RD] = { - .fuel_gauge = { - .manuf_name = "SMP-COS5940", - .ship_mode = { - .reg_addr = 0x0, - .reg_data = { 0x10, 0x10 }, - }, - .fet = { - .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, - } - }, - .batt_info = { - .voltage_max = 8800, - .voltage_normal = 7700, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 60, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = 0, - .discharging_max_c = 60, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); - -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_0RD; diff --git a/board/dragonegg/board.c b/board/dragonegg/board.c deleted file mode 100644 index 18b4c7c6dc..0000000000 --- a/board/dragonegg/board.c +++ /dev/null @@ -1,165 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* DragonEgg board-specific configuration */ -#include "adc.h" -#include "adc_chip.h" -#include "button.h" -#include "common.h" -#include "charger.h" -#include "console.h" -#include "driver/ppc/nx20p348x.h" -#include "driver/ppc/sn5s330.h" -#include "ec_commands.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "intc.h" -#include "lid_switch.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "spi.h" -#include "switch.h" -#include "system.h" -#include "uart.h" -#include "usb_pd.h" -#include "util.h" - -static void ppc_interrupt(enum gpio_signal signal) -{ - - switch (signal) { - case GPIO_USB_C0_TCPPC_INT_L: - sn5s330_interrupt(0); - break; - - case GPIO_USB_C2_TCPPC_INT_ODL: - nx20p348x_interrupt(2); - break; - - default: - break; - } -} - -static void tcpc_alert_event(enum gpio_signal signal) -{ - int port = -1; - - /* - * Since C0/C1 TCPC are embedded within EC, we don't need the PDCMD - * tasks.The (embedded) TCPC status since chip driver code will - * handles its own interrupts and forward the correct events to - * the PD_C0/1 task. See it83xx/intc.c - */ - switch (signal) { - case GPIO_USB_C2_TCPC_INT_ODL: - port = 2; - break; - default: - return; - } - - schedule_deferred_pd_interrupt(port); -} - -#include "gpio_list.h" /* Must come after other header files. */ - -/******************************************************************************/ -/* ADC channels */ -const struct adc_t adc_channels[] = { - /* Vbus C0 sensing (7.3x voltage divider). PPVAR_USB_C0_VBUS */ - [ADC_VBUS_C0] = {.name = "VBUS_C0", - .factor_mul = (ADC_MAX_MVOLT * 73) / 10, - .factor_div = ADC_READ_MAX + 1, - .shift = 0, - .channel = CHIP_ADC_CH1}, - /* Vbus C1 sensing (7.3x voltage divider). PPVAR_USB_C1_VBUS */ - [ADC_VBUS_C1] = {.name = "VBUS_C1", - .factor_mul = (ADC_MAX_MVOLT * 73) / 10, - .factor_div = ADC_READ_MAX + 1, - .shift = 0, - .channel = CHIP_ADC_CH0}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/******************************************************************************/ -/* SPI devices */ -/* TODO(b/110880394): Fill out correctly (SPI FLASH) */ -const struct spi_device_t spi_devices[] = { -}; -const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); - -/******************************************************************************/ -/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_KBLIGHT] = { .channel = 0, .flags = 0, .freq_hz = 100 }, - [PWM_CH_LED_RED] = { .channel = 2, .flags = PWM_CONFIG_DSLEEP | - PWM_CONFIG_ACTIVE_LOW, .freq_hz = 100 }, - [PWM_CH_LED_GREEN] = { .channel = 1, .flags = PWM_CONFIG_DSLEEP | - PWM_CONFIG_ACTIVE_LOW, .freq_hz = 100 }, - [PWM_CH_LED_BLUE] = { .channel = 3, .flags = PWM_CONFIG_DSLEEP | - PWM_CONFIG_ACTIVE_LOW, .freq_hz = 100 }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/* GPIO to enable/disable the USB Type-A port. */ -const int usb_port_enable[CONFIG_USB_PORT_POWER_SMART_PORT_COUNT] = { - GPIO_EN_USB_A_5V, -}; - -void board_overcurrent_event(int port) -{ - if (port == 0) { - /* TODO(b/111281797): When does this get set high again? */ - gpio_set_level(GPIO_USB_OC_ODL, 0); - cprints(CC_USBPD, "p%d: overcurrent!", port); - } -} - -static void board_disable_learn_mode(void) -{ - /* Disable learn mode after checking to make sure AC is still present */ - if (extpower_is_present()) - charger_discharge_on_ac(0); -} -DECLARE_DEFERRED(board_disable_learn_mode); - -static void board_extpower(void) -{ - /* - * For the bq25710 charger, we need the switching converter to remain - * disabled until ~130 msec from when VBUS present to allow the - * converter to be biased properly. Otherwise, there will be a reverse - * buck/boost until the converter is biased. The recommendation is to - * exit learn mode 200 msec after external charger is connected. - * - * TODO(b/112372451): When there are updated versions of the bq25710, - * this set of changes can be removed. - */ - if (extpower_is_present()) { - hook_call_deferred(&board_disable_learn_mode_data, 200 * MSEC); - } else { - /* Enable charger learn mode */ - charger_discharge_on_ac(1); - /* Cancel any pending call to disable learn mode */ - hook_call_deferred(&board_disable_learn_mode_data, -1); - } -} -DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT); - -/* Initialize board. */ -static void board_init(void) -{ - /* - * On EC reboot, need to always set battery learn mode to the correct - * state based on presence of AC. - */ - board_extpower(); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); diff --git a/board/dragonegg/board.h b/board/dragonegg/board.h deleted file mode 100644 index daf6f4c255..0000000000 --- a/board/dragonegg/board.h +++ /dev/null @@ -1,85 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* DragonEgg board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Baseboard features */ -#include "baseboard.h" - -/* Optional features */ -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ -#define CONFIG_LOW_POWER_IDLE -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* EC */ -#define CONFIG_BOARD_VERSION_GPIO - -/* Keyboard features */ -#define CONFIG_PWM_KBLIGHT -#define CONFIG_VOLUME_BUTTONS - -/* USB and USBC features */ -#define CONFIG_USB_PORT_POWER_SMART -#undef CONFIG_USB_PORT_POWER_SMART_PORT_COUNT -#define CONFIG_USB_PORT_POWER_SMART_PORT_COUNT 1 -#define CONFIG_USB_PORT_POWER_SMART_CDP_SDP_ONLY -#define GPIO_USB1_ILIM_SEL GPIO_EN_USB_A_HIGH_POWER - -/* LEDs */ -#define CONFIG_LED_COMMON -#define CONFIG_LED_PWM_COUNT 1 -#undef CONFIG_LED_PWM_SOC_ON_COLOR -#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_BLUE -#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR -#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_WHITE -#define CONFIG_CMD_LEDTEST - -/* - * Macros for GPIO signals used in common code that don't match the - * schematic names. Signal names in gpio.inc match the schematic and are - * then redefined here to so it's more clear which signal is being used for - * which purpose. - */ -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL -#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum adc_channel { - ADC_VBUS_C0, - ADC_VBUS_C1, - ADC_CH_COUNT -}; - -enum pwm_channel { - PWM_CH_KBLIGHT, - PWM_CH_LED_RED, - PWM_CH_LED_GREEN, - PWM_CH_LED_BLUE, - PWM_CH_COUNT -}; - -/* List of possible batteries */ -enum battery_type { - BATTERY_0RD, - BATTERY_TYPE_COUNT, -}; - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/dragonegg/build.mk b/board/dragonegg/build.mk deleted file mode 100644 index 6da7e2db93..0000000000 --- a/board/dragonegg/build.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -*- makefile -*- -# Copyright 2018 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=it83xx -CHIP_FAMILY:=it8320 -CHIP_VARIANT:=it8320dx -BASEBOARD:=dragonegg - -board-y=board.o -board-$(CONFIG_BATTERY_SMART)+=battery.o -board-$(CONFIG_LED_COMMON)+=led.o diff --git a/board/dragonegg/ec.tasklist b/board/dragonegg/ec.tasklist deleted file mode 100644 index 7f2b65261f..0000000000 --- a/board/dragonegg/ec.tasklist +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 2, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C2, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C2, pd_interrupt_handler_task, 2, TASK_STACK_SIZE) diff --git a/board/dragonegg/gpio.inc b/board/dragonegg/gpio.inc deleted file mode 100644 index ac46ccbd6f..0000000000 --- a/board/dragonegg/gpio.inc +++ /dev/null @@ -1,131 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(LID_OPEN, PIN(F, 3), GPIO_INT_BOTH, lid_interrupt) -GPIO_INT(WP_L, PIN(F, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ -GPIO_INT(POWER_BUTTON_L, PIN(E, 2), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */ -GPIO_INT(ACOK_OD, PIN(E, 3), GPIO_INT_BOTH, extpower_interrupt) -#ifdef CONFIG_LOW_POWER_IDLE -/* Used to wake up the EC from Deep Doze mode when writing to console */ -GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_BOTH, uart_deepsleep_interrupt) /* UART_SERVO_TX_EC_RX */ -#endif - -/* Power sequencing interrupts */ -GPIO_INT(SLP_S0_L, PIN(E, 4), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -GPIO_INT(SLP_S3_L, PIN(I, 4), GPIO_INT_BOTH, power_signal_interrupt) -#endif -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -GPIO_INT(SLP_S4_L, PIN(I, 5), GPIO_INT_BOTH, power_signal_interrupt) -#endif -GPIO_INT(SLP_SUS_L, PIN(G, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_RSMRST_ODL,PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_DSW_PWROK, PIN(D, 6), GPIO_INT_BOTH, power_signal_interrupt) - -/* USB-C interrupts */ -GPIO_INT(USB_C0_TCPPC_INT_L, PIN(B, 2), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(USB_C2_TCPPC_INT_ODL, PIN(L, 1), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(USB_C2_TCPC_INT_ODL, PIN(K, 6), GPIO_INT_FALLING, tcpc_alert_event) - -/* Misc. interrupts */ -GPIO_INT(VOLUME_DOWN_L, PIN(I, 6), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(VOLUME_UP_L, PIN(I, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -/* TODO (b:110947310) Uncomment this when sensor task is added to image */ -/* GPIO_INT(BASE_SIXAXIS_INT_L, PIN(J, 0), GPIO_INT_FALLING | GPIO_SEL_1P8V, lsm6dsm_interrupt) */ - -#ifdef CONFIG_HOSTCMD_ESPI -/* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ -GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ -#endif - -GPIO(SYS_RESET_L, PIN(D, 1), GPIO_ODR_HIGH) /* SYS_RST_ODL */ -GPIO(PCH_WAKE_L, PIN(D, 5), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */ -GPIO(PCH_PWRBTN_L, PIN(B, 6), GPIO_ODR_HIGH) /* EC_PCH_PWR_BTN_ODL */ - -/* Power Sequencing Signals */ -/* - * Both PP5000 and PP3300_TCPC should be powered up whenever the EC is not in - * hibernate mode. They are enabled by default here and disabled in the - * board_hibernate() callback when the EC goes into hibernate mode. - */ -GPIO(EN_PP5000, PIN(K, 5), GPIO_OUT_HIGH) -GPIO(EN_PP3300_TCPC, PIN(E, 6), GPIO_OUT_HIGH) -GPIO(EN_PP3300_A, PIN(C, 5), GPIO_OUT_LOW) -GPIO(EC_PCH_DSW_PWROK, PIN(L, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_RSMRST_L, PIN(H, 0), GPIO_OUT_LOW) -GPIO(EC_PROCHOT_ODL, PIN(D, 0), GPIO_ODR_HIGH) -GPIO(PP5000_PG_OD, PIN(F, 0), GPIO_INPUT) - -/* SYS_PWROK generation is done by the Dialog power good IC */ -UNIMPLEMENTED(PG_EC_ALL_SYS_PWRGD) - -/* USB and USBC Signals */ -GPIO(USB_OC_ODL, PIN(J, 6), GPIO_ODR_HIGH) -GPIO(EN_USB_A_5V, PIN(G, 6), GPIO_OUT_LOW) -GPIO(EN_USB_A_HIGH_POWER, PIN(D, 4), GPIO_OUT_LOW) - -/* BC 1.2 Detection Signals */ -GPIO(USB_C0_BC12_CHG_MAX, PIN(D, 3), GPIO_INPUT) /* C0 BC 1.2 CDP signal */ -GPIO(USB_C1_BC12_CHG_MAX, PIN(B, 7), GPIO_INPUT) /* C1 BC 1.2 CDP signal */ -GPIO(USB_C2_BC12_CHG_MAX, PIN(K, 0), GPIO_INPUT) /* C2 BC 1.2 CDP signal */ -GPIO(USB_C0_BC12_VBUS_ON_ODL, PIN(C, 0), GPIO_ODR_HIGH) /* C0 BC 1.2 enable signal */ -GPIO(USB_C1_BC12_VBUS_ON_ODL, PIN(E, 5), GPIO_ODR_HIGH) /* C1 BC 1.2 enable signal */ -GPIO(USB_C2_BC12_VBUS_ON_ODL, PIN(K, 1), GPIO_ODR_HIGH) /* C2 BC 1.2 enable signal */ - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(I2C0_SCL, PIN(B, 3), GPIO_INPUT) /* EC_PROG_SCL */ -GPIO(I2C0_SDA, PIN(B, 4), GPIO_INPUT) /* EC_PROG_SDA */ -GPIO(I2C1_SCL, PIN(C, 1), GPIO_INPUT) /* EC_I2C_SENSOR_KB_BL_SCL */ -GPIO(I2C1_SDA, PIN(C, 2), GPIO_INPUT) /* EC_I2C_SENSOR_KB_BL_SDA */ -GPIO(I2C2_SCL, PIN(F, 6), GPIO_INPUT) /* EC_I2C_USB_C1C2_SCL */ -GPIO(I2C2_SDA, PIN(F, 7), GPIO_INPUT) /* EC_I2C_USB_C1C2_SDA */ -GPIO(I2C4_SCL, PIN(E, 0), GPIO_INPUT) /* EC_I2C_USB_C0_SCL */ -GPIO(I2C4_SDA, PIN(E, 7), GPIO_INPUT) /* EC_I2C_USB_C0_SDA */ -GPIO(I2C5_SCL, PIN(A, 4), GPIO_INPUT) /* EC_I2C_POWER_SCL */ -GPIO(I2C5_SDA, PIN(A, 5), GPIO_INPUT) /* EC_I2C_POWER_SDA */ - -GPIO(CCD_MODE_ODL, PIN(H, 5), GPIO_INPUT) /* H1 Case Closed Debug */ -GPIO(CHG_VAP_OTG_EN, PIN(C, 3), GPIO_OUT_LOW) /* Charger VAP/OTG Mode_*/ -GPIO(EC_BATT_PRES_ODL, PIN(H, 3), GPIO_INPUT) -GPIO(ENTERING_RW, PIN(G, 0), GPIO_OUT_LOW) /* EC_ENTERING_RW */ -GPIO(EDP_BKTLEN_OD, PIN(K, 4), GPIO_ODR_LOW) /* Backlight Disable */ -GPIO(KB_BL_EN, PIN(J, 3), GPIO_OUT_LOW) -/* TODO (b:110947310) Convert this to interrupt when senor support is added */ -GPIO(LID_ACCEL_INT_L, PIN(J, 1), GPIO_INPUT | GPIO_SEL_1P8V) - -/* Board ID */ -GPIO(BOARD_VERSION1, PIN(H, 4), GPIO_INPUT) /* Board ID bit0 */ -GPIO(BOARD_VERSION2, PIN(K, 3), GPIO_INPUT) /* Board ID bit1 */ -GPIO(BOARD_VERSION3, PIN(H, 6), GPIO_INPUT) /* Board ID bit2 */ - -/* Fan Control Pins (connected to TP only, set as inputs) */ -GPIO(EC_FAN_TACH1, PIN(J, 2), GPIO_INPUT) -GPIO(EC_FAN_TACH2, PIN(D, 7), GPIO_INPUT) -GPIO(FAN_PWM1, PIN(A, 6), GPIO_INPUT) -GPIO(FAN_PWM2, PIN(A, 7), GPIO_INPUT) - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, 0x03), 0, MODULE_UART, 0) /* UART from EC to Servo */ -ALTERNATE(PIN_MASK(B, 0x18), 0, MODULE_I2C, 0) /* I2C0 */ -ALTERNATE(PIN_MASK(C, 0x06), 0, MODULE_I2C, 0) /* I2C1 */ -ALTERNATE(PIN_MASK(F, 0xC0), 0, MODULE_I2C, 0) /* I2C2 */ -ALTERNATE(PIN_MASK(E, 0x81), 0, MODULE_I2C, 0) /* I2C4 */ -ALTERNATE(PIN_MASK(A, 0x30), 0, MODULE_I2C, 0) /* I2C5 */ -/* Charger_IADP -> ADC15, CHARGER_PSYS -> ADC16 */ -ALTERNATE(PIN_MASK(L, 0x0C), 0, MODULE_ADC, 0) -/* Temp sensors 1 -> ADC2, 2 -> ADC3, 3 -> ADC13 */ -ALTERNATE(PIN_MASK(I, 0x0C), 0, MODULE_ADC, 0) -ALTERNATE(PIN_MASK(L, 0x01), 0, MODULE_ADC, 0) -/* Keyboard Backlight Control */ -ALTERNATE(PIN_MASK(A, 0x01), 0, MODULE_PWM, 0) -/* 3 Color LED Control */ -ALTERNATE(PIN_MASK(A, 0x0E), 0, MODULE_PWM, 0) -ALTERNATE(PIN_MASK(I, 0x03), 0, MODULE_ADC, 0) /* ADC1 & ADC0: ADC_USB_C0_VBUS & ADC_USB_C1_VBUS */ diff --git a/board/dragonegg/led.c b/board/dragonegg/led.c deleted file mode 100644 index 45e944619d..0000000000 --- a/board/dragonegg/led.c +++ /dev/null @@ -1,81 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Power and battery LED control for DragonEgg - */ - -#include "common.h" -#include "ec_commands.h" -#include "led_pwm.h" -#include "pwm.h" -#include "util.h" - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_POWER_LED, -}; -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -struct pwm_led led_color_map[EC_LED_COLOR_COUNT] = { - /* Red, Green, Blue */ - [EC_LED_COLOR_RED] = { 80, 0, 0 }, - [EC_LED_COLOR_GREEN] = { 0, 65, 0 }, - [EC_LED_COLOR_BLUE] = { 0, 0, 100 }, - [EC_LED_COLOR_YELLOW] = { 80, 80, 0 }, - [EC_LED_COLOR_WHITE] = { 80, 65, 100 }, - [EC_LED_COLOR_AMBER] = { 65, 20, 0 }, -}; - -/* - * One tri-color LEDs with red, green, and blue channels. - * - */ -struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = { - [PWM_LED0] = { - /* left port LEDs */ - .ch0 = PWM_CH_LED_RED, - .ch1 = PWM_CH_LED_GREEN, - .ch2 = PWM_CH_LED_BLUE, - .enable = &pwm_enable, - .set_duty = &pwm_set_duty, - }, -}; - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - brightness_range[EC_LED_COLOR_RED] = 100; - brightness_range[EC_LED_COLOR_GREEN] = 100; - brightness_range[EC_LED_COLOR_YELLOW] = 100; - brightness_range[EC_LED_COLOR_AMBER] = 100; - brightness_range[EC_LED_COLOR_BLUE] = 100; - brightness_range[EC_LED_COLOR_WHITE] = 100; -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - enum pwm_led_id pwm_id; - - /* Convert ec_led_id to pwm_led_id. */ - if (led_id == EC_LED_ID_POWER_LED) - pwm_id = PWM_LED0; - else - return EC_ERROR_UNKNOWN; - - if (brightness[EC_LED_COLOR_RED]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_RED); - else if (brightness[EC_LED_COLOR_GREEN]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_GREEN); - else if (brightness[EC_LED_COLOR_BLUE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_BLUE); - else if (brightness[EC_LED_COLOR_YELLOW]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_YELLOW); - else if (brightness[EC_LED_COLOR_WHITE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); - else if (brightness[EC_LED_COLOR_AMBER]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); - else - /* Otherwise, the "color" is "off". */ - set_pwm_led_color(pwm_id, -1); - - return EC_SUCCESS; -} diff --git a/board/dragonegg/vif_override.xml b/board/dragonegg/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/dragonegg/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/flapjack_scp b/board/flapjack_scp deleted file mode 120000 index 41dcc54c4d..0000000000 --- a/board/flapjack_scp +++ /dev/null @@ -1 +0,0 @@ -kukui_scp
\ No newline at end of file diff --git a/board/glkrvp/battery.c b/board/glkrvp/battery.c deleted file mode 100644 index cccf3c1016..0000000000 --- a/board/glkrvp/battery.c +++ /dev/null @@ -1,241 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery.h" -#include "charger_profile_override.h" -#include "console.h" -#include "pca9555.h" -#include "util.h" - -#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) - -#define I2C_PORT_PCA555_BATT_PRESENT_GPIO NPCX_I2C_PORT0_0 -#define I2C_ADDR_PCA555_BATT_PRESENT_GPIO_FLAGS 0x21 -#define PCA555_BATT_PRESENT_GPIO_READ(reg, data) \ - pca9555_read(I2C_PORT_PCA555_BATT_PRESENT_GPIO, \ - I2C_ADDR_PCA555_BATT_PRESENT_GPIO_FLAGS, (reg), (data)) - -/* Shutdown mode parameter to write to manufacturer access register */ -#define SB_SHUTDOWN_DATA 0x0010 - -enum fast_chg_voltage_ranges { - VOLTAGE_RANGE_0, - VOLTAGE_RANGE_1, - VOLTAGE_RANGE_2, -}; - -enum temp_range { - TEMP_RANGE_0, - TEMP_RANGE_1, - TEMP_RANGE_2, - TEMP_RANGE_3, - TEMP_RANGE_4, - TEMP_RANGE_5, -}; - -/* keep track of previous charge profile info */ -static const struct fast_charge_profile *prev_chg_profile_info; - -/* SMP-CA-445 battery & BQ30Z554 fuel gauge */ -static const struct battery_info batt_info_smp_ca445 = { - .voltage_max = 8700, /* mV */ - .voltage_normal = 7600, - - /* - * Actual value 6000mV, added 100mV for charger accuracy so that - * unwanted low VSYS_Prochot# assertion can be avoided. - */ - .voltage_min = 6100, - .precharge_current = 150, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -20, - .discharging_max_c = 60, -}; - -const struct battery_info *battery_get_info(void) -{ - static struct battery_info batt_info; - - if (battery_is_present() == BP_YES) - return &batt_info_smp_ca445; - - /* - * In no battery condition, to avoid voltage drop on VBATA set - * the battery minimum voltage to the battery maximum voltage. - */ - - batt_info = batt_info_smp_ca445; - batt_info.voltage_min = batt_info.voltage_max; - - return &batt_info; -} - -static const struct fast_charge_profile fast_charge_smp_ca445_info[] = { - /* < 0C */ - [TEMP_RANGE_0] = { - .temp_c = TEMPC_TENTHS_OF_DEG(-1), - .current_mA = { - [VOLTAGE_RANGE_0] = 0, - [VOLTAGE_RANGE_1] = 0, - [VOLTAGE_RANGE_2] = 0, - }, - }, - - /* 0C >= && <=15C */ - [TEMP_RANGE_1] = { - .temp_c = TEMPC_TENTHS_OF_DEG(15), - .current_mA = { - [VOLTAGE_RANGE_0] = 890, - [VOLTAGE_RANGE_1] = 445, - [VOLTAGE_RANGE_2] = 445, - }, - }, - - /* 15C > && <=20C */ - [TEMP_RANGE_2] = { - .temp_c = TEMPC_TENTHS_OF_DEG(20), - .current_mA = { - [VOLTAGE_RANGE_0] = 1335, - [VOLTAGE_RANGE_1] = 1335, - [VOLTAGE_RANGE_2] = 1335, - }, - }, - - /* 20C > && <=45C */ - [TEMP_RANGE_3] = { - .temp_c = TEMPC_TENTHS_OF_DEG(45), - .current_mA = { - [VOLTAGE_RANGE_0] = 2225, - [VOLTAGE_RANGE_1] = 2225, - [VOLTAGE_RANGE_2] = 2225, - }, - }, - - /* 45C > && <=55C */ - [TEMP_RANGE_4] = { - .temp_c = TEMPC_TENTHS_OF_DEG(55), - .current_mA = { - [VOLTAGE_RANGE_0] = 1335, - [VOLTAGE_RANGE_1] = 1335, - [VOLTAGE_RANGE_2] = 0, - }, - }, - - /* > 55C */ - [TEMP_RANGE_5] = { - .temp_c = TEMPC_TENTHS_OF_DEG(CHARGER_PROF_TEMP_C_LAST_RANGE), - .current_mA = { - [VOLTAGE_RANGE_0] = 0, - [VOLTAGE_RANGE_1] = 0, - [VOLTAGE_RANGE_2] = 0, - }, - }, -}; - -static const struct fast_charge_params fast_chg_params_smp_ca445 = { - .total_temp_ranges = ARRAY_SIZE(fast_charge_smp_ca445_info), - .default_temp_range_profile = TEMP_RANGE_3, - .voltage_mV = { - [VOLTAGE_RANGE_0] = 8000, - [VOLTAGE_RANGE_1] = 8200, - [VOLTAGE_RANGE_2] = CHARGER_PROF_VOLTAGE_MV_LAST_RANGE, - }, - .chg_profile_info = &fast_charge_smp_ca445_info[0], -}; - -/* - * This can override the smart battery's charging profile. To make a change, - * modify one or more of requested_voltage, requested_current, or state. - * Leave everything else unchanged. - * - * Return the next poll period in usec, or zero to use the default (which is - * state dependent). - */ -int charger_profile_override(struct charge_state_data *curr) -{ - /* - * If battery present and not in cut off and almost full - * then if it does not want charge then discharge on AC - */ - if ((battery_is_present() == BP_YES) && - !(curr->batt.flags & BATT_FLAG_WANT_CHARGE) && - (curr->batt.status & STATUS_FULLY_CHARGED)) { - charger_discharge_on_ac(1); - curr->state = ST_DISCHARGE; - return 0; - } - - charger_discharge_on_ac(0); - - return charger_profile_override_common(curr, - &fast_chg_params_smp_ca445, - &prev_chg_profile_info, - batt_info_smp_ca445.voltage_max); -} - -int board_cut_off_battery(void) -{ - int rv; - - /* Ship mode command must be sent twice to take effect */ - rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA); - if (rv != EC_SUCCESS) - return rv; - - return sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA); -} - -static inline int batt_smp_cos4870_is_initialized(void) -{ - int batt_status; - - return battery_status(&batt_status) ? 0 : - batt_status & STATUS_INITIALIZED; -} - -enum battery_present battery_hw_present(void) -{ - int data; - int rv; - - rv = PCA555_BATT_PRESENT_GPIO_READ(PCA9555_CMD_INPUT_PORT_0, &data); - - /* GPIO is low when the battery is physically present */ - return rv || (data & PCA9555_IO_5) ? BP_NO : BP_YES; -} - -/* - * Physical detection of battery. - */ -enum battery_present battery_is_present(void) -{ - static enum battery_present batt_pres_prev = BP_NOT_SURE; - enum battery_present batt_pres; - - /* Get the physical hardware status */ - batt_pres = battery_hw_present(); - - /* - * Make sure battery status is implemented, I2C transactions are - * success & the battery status is Initialized to find out if it - * is a working battery and it is not in the cut-off mode. - * - * FETs are turned off after Power Shutdown time. - * The device will wake up when a voltage is applied to PACK. - * Battery status will be inactive until it is initialized. - */ - if (batt_pres == BP_YES && batt_pres_prev != batt_pres && - !battery_is_cut_off() && !batt_smp_cos4870_is_initialized()) - batt_pres = BP_NO; - - batt_pres_prev = batt_pres; - - return batt_pres; -} diff --git a/board/glkrvp/board.c b/board/glkrvp/board.c deleted file mode 100644 index c4b3ce6e38..0000000000 --- a/board/glkrvp/board.c +++ /dev/null @@ -1,186 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel GLK-RVP board-specific configuration */ - -#include "button.h" -#include "charger.h" -#include "chipset.h" -#include "console.h" -#include "driver/charger/isl923x.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "pca9555.h" -#include "power.h" -#include "power_button.h" -#include "spi.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "uart.h" -#include "util.h" - -#include "gpio_list.h" - -#define I2C_PORT_PCA555_PMIC_GPIO NPCX_I2C_PORT0_0 -#define I2C_ADDR_PCA555_PMIC_GPIO_FLAGS 0x21 -#define PCA555_PMIC_GPIO_WRITE(reg, data) \ - pca9555_write(I2C_PORT_PCA555_PMIC_GPIO, \ - I2C_ADDR_PCA555_PMIC_GPIO_FLAGS, (reg), (data)) -#define PCA555_PMIC_GPIO_READ(reg, data) \ - pca9555_read(I2C_PORT_PCA555_PMIC_GPIO, \ - I2C_ADDR_PCA555_PMIC_GPIO_FLAGS, (reg), (data)) - -#define I2C_PORT_PCA555_BOARD_ID_GPIO NPCX_I2C_PORT0_0 -#define I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS 0x20 -#define PCA555_BOARD_ID_GPIO_READ(reg, data) \ - pca9555_read(I2C_PORT_PCA555_BOARD_ID_GPIO, \ - I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS, (reg), (data)) - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"pmic", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"typec", NPCX_I2C_PORT7_0, 400, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, - {"master1", NPCX_I2C_PORT1_0, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"master2", NPCX_I2C_PORT2_0, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, - {"charger", NPCX_I2C_PORT3_0, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* Charger chips */ -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = ISL923X_ADDR_FLAGS, - .drv = &isl923x_drv, - }, -}; - -/* Wake-up pins for hibernate */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_AC_PRESENT, - GPIO_LID_OPEN, - GPIO_POWER_BUTTON_L, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* Called by APL power state machine when transitioning from G3 to S5 */ -void chipset_pre_init_callback(void) -{ - int data; - - if (PCA555_PMIC_GPIO_READ(PCA9555_CMD_OUTPUT_PORT_0, &data)) - return; - - /* - * No need to re-init PMIC since settings are sticky across sysjump. - * However, be sure to check that PMIC is already enabled. If it is - * then there's no need to re-sequence the PMIC. - */ - if (system_jumped_to_this_image() && (data & PCA9555_IO_0)) - return; - - /* Enable SOC_3P3_EN_L: Set the Output port O0.1 to low level */ - data &= ~PCA9555_IO_1; - PCA555_PMIC_GPIO_WRITE(PCA9555_CMD_OUTPUT_PORT_0, data); - - /* TODO: Find out from the spec */ - msleep(10); - - /* Enable PMIC_EN: Set the Output port O0.0 to high level */ - PCA555_PMIC_GPIO_WRITE(PCA9555_CMD_OUTPUT_PORT_0, data | PCA9555_IO_0); -} - -/* Initialize board. */ -static void board_init(void) -{ -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_FIRST); - -/* Called on AP S5 -> S3 transition */ -static void board_chipset_startup(void) -{ -} -DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); - -/* Called on AP S3 -> S5 transition */ -static void board_chipset_shutdown(void) -{ -} -DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); - -void chipset_do_shutdown(void) -{ - int data; - - if (PCA555_PMIC_GPIO_READ(PCA9555_CMD_OUTPUT_PORT_0, &data)) - return; - - /* Disable SOC_3P3_EN_L: Set the Output port O0.1 to high level */ - data |= PCA9555_IO_1; - PCA555_PMIC_GPIO_WRITE(PCA9555_CMD_OUTPUT_PORT_0, data); - - /* TODO: Find out from the spec */ - msleep(10); - - /* Disable PMIC_EN: Set the Output port O0.0 to low level */ - PCA555_PMIC_GPIO_WRITE(PCA9555_CMD_OUTPUT_PORT_0, data & ~PCA9555_IO_0); -} - -void board_hibernate_late(void) -{ -} - -void board_hibernate(void) -{ - /* - * To support hibernate called from console commands, ectool commands - * and key sequence, shutdown the AP before hibernating. - */ - chipset_do_shutdown(); - - /* Added delay to allow AP to settle down */ - msleep(100); -} - -int board_get_version(void) -{ - int data; - - if (PCA555_BOARD_ID_GPIO_READ(PCA9555_CMD_INPUT_PORT_1, &data)) - return -1; - - return data & 0x0f; -} - -static void pmic_init(void) -{ - /* No need to re-init PMIC since settings are sticky across sysjump. */ - if (system_jumped_late()) - return; - - /* - * PMIC INIT - * Configure Port O0.0 as Output port - PMIC_EN - * Configure Port O0.1 as Output port - SOC_3P3_EN_L - */ - PCA555_PMIC_GPIO_WRITE(PCA9555_CMD_CONFIGURATION_PORT_0, 0xfc); - - /* - * Set the Output port O0.0 to low level - PMIC_EN - * Set the Output port O0.1 to high level - SOC_3P3_EN_L - * - * POR of PCA9555 port is input with high impedance hence explicitly - * configure the SOC_3P3_EN_L to high level. - */ - PCA555_PMIC_GPIO_WRITE(PCA9555_CMD_OUTPUT_PORT_0, 0xfe); -} -DECLARE_HOOK(HOOK_INIT, pmic_init, HOOK_PRIO_INIT_I2C + 1); diff --git a/board/glkrvp/board.h b/board/glkrvp/board.h deleted file mode 100644 index 6f1e7c3738..0000000000 --- a/board/glkrvp/board.h +++ /dev/null @@ -1,158 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel GLK-RVP board-specific configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* - * Allow dangerous commands. - * TODO: Remove this config before production. - */ -#define CONFIG_SYSTEM_UNLOCKED - -#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC))) -#undef CONFIG_HOSTCMD_DEBUG_MODE - -/* - * By default, enable all console messages excepted HC, ACPI and event: - * The sensor stack is generating a lot of activity. - */ -#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF - -/* EC console commands */ - -/* Battery */ -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_PRESENT_CUSTOM -#define CONFIG_BATTERY_SMART - -/* Charger */ -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGER -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_ISL9238 -#define CONFIG_CHARGER_PROFILE_OVERRIDE -#define CONFIG_CHARGER_PROFILE_OVERRIDE_COMMON -#undef CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES -#define CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES 3 -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 -#undef CONFIG_EXTPOWER_DEBOUNCE_MS -#define CONFIG_EXTPOWER_DEBOUNCE_MS 1000 -#define CONFIG_EXTPOWER_GPIO - -/* DC Jack charge ports */ -#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT -#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 -#define DEDICATED_CHARGE_PORT 2 - -/* Keyboard */ -#define CONFIG_KEYBOARD_PROTOCOL_8042 - -/* UART */ -#define NPCX_UART_MODULE2 1 /* 0:GPIO10/11 1:GPIO64/65 as UART */ -#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ - -/* USB-A config */ - -/* USB PD config */ -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0 -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_TCPC -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_TCPMV1 - -/* USB MUX */ -#define CONFIG_USBC_SS_MUX -#define CONFIG_USB_MUX_PS8743 - -/* SoC / PCH */ -#define CONFIG_HOSTCMD_ESPI -#define CONFIG_CHIPSET_GEMINILAKE -#define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_BUTTON_X86 -#define CONFIG_POWER_COMMON -#define CONFIG_POWER_S0IX -#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE - -/* EC */ -#define CONFIG_VOLUME_BUTTONS -#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL -#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL -#define CONFIG_WP_ALWAYS -#define CONFIG_FLASH_READOUT_PROTECTION -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER - -#define CONFIG_LID_SWITCH -#define CONFIG_LTO - -#define CONFIG_LOW_POWER_IDLE - -#define CONFIG_FLASH_SIZE_BYTES 524288 -#define CONFIG_SPI_FLASH_REGS -#define CONFIG_SPI_FLASH_W25Q40 - -/* Verified boot */ -#define CONFIG_SHA256_UNROLLED -#define CONFIG_VBOOT_HASH -/* - * Enable 1 slot of secure temporary storage to support - * suspend/resume with read/write memory training. - */ -#define CONFIG_VSTORE -#define CONFIG_VSTORE_SLOT_COUNT 1 - -/* Optional feature - used by nuvoton */ -#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 1:GPIOD5/E2/D4/E5 as JTAG*/ -#define NPCX_TACH_SEL2 0 /* 0:GPIO40/A4 1:GPIO93/D3 as TACH */ - -/* I2C ports */ -#define I2C_PORT_CHARGER NPCX_I2C_PORT3_0 -#define I2C_PORT_BATTERY NPCX_I2C_PORT3_0 -#define I2C_PORT_USB_MUX NPCX_I2C_PORT7_0 - -/* EC exclude modules */ -#undef CONFIG_ADC - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum adc_channel { - ADC_VBUS, - ADC_CH_COUNT, -}; - -int board_get_version(void); - -/* TODO: Verify the numbers below. */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 45000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 -#define DC_JACK_MAX_VOLTAGE_MV 19000 - -/* Reset PD MCU */ -void board_reset_pd_mcu(void); -void tcpc_alert_event(enum gpio_signal signal); -void board_charging_enable(int port, int enable); -void board_vbus_enable(int port, int enable); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/glkrvp/build.mk b/board/glkrvp/build.mk deleted file mode 100644 index 235514e22b..0000000000 --- a/board/glkrvp/build.mk +++ /dev/null @@ -1,15 +0,0 @@ -# -*- makefile -*- -# Copyright 2017 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx7 -CHIP_VARIANT:=npcx7m6g - -board-y=board.o -board-$(CONFIG_BATTERY_SMART)+=battery.o -board-$(CONFIG_USB_POWER_DELIVERY)+=chg_usb_pd.o usb_pd_policy.o diff --git a/board/glkrvp/chg_usb_pd.c b/board/glkrvp/chg_usb_pd.c deleted file mode 100644 index aea6e3eac5..0000000000 --- a/board/glkrvp/chg_usb_pd.c +++ /dev/null @@ -1,263 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "charge_manager.h" -#include "charge_state_v2.h" -#include "console.h" -#include "hooks.h" -#include "task.h" -#include "tcpm/tcpci.h" -#include "system.h" -#include "usb_mux.h" -#include "util.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -#define PTN5110_EXT_GPIO_CONFIG 0x92 -#define PTN5110_EXT_GPIO_CONTROL 0x93 - -#define PTN5110_EXT_GPIO_FRS_EN BIT(6) -#define PTN5110_EXT_GPIO_EN_SRC BIT(5) -#define PTN5110_EXT_GPIO_EN_SNK1 BIT(4) -#define PTN5110_EXT_GPIO_IILIM_5V_VBUS_L BIT(3) - -enum glkrvp_charge_ports { - TYPE_C_PORT_0, - TYPE_C_PORT_1, - DC_JACK_PORT_0 = DEDICATED_CHARGE_PORT, -}; - -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = NPCX_I2C_PORT7_0, - .addr_flags = 0x50, - }, - .drv = &tcpci_tcpm_drv, - }, - { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = NPCX_I2C_PORT7_0, - .addr_flags = 0x52, - }, - .drv = &tcpci_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_MAX_COUNT); - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = 0x10, - .driver = &ps8743_usb_mux_driver, - }, - { - .usb_port = 1, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = 0x11, - .driver = &ps8743_usb_mux_driver, - }, -}; - -static int board_charger_port_is_sourcing_vbus(int port) -{ - int reg; - - if (tcpc_read(port, PTN5110_EXT_GPIO_CONTROL, ®)) - return 0; - - return !!(reg & PTN5110_EXT_GPIO_EN_SRC); -} - -static int ptn5110_ext_gpio_enable(int port, int enable, int gpio) -{ - int reg; - int rv; - - rv = tcpc_read(port, PTN5110_EXT_GPIO_CONTROL, ®); - if (rv) - return rv; - - if (enable) - reg |= gpio; - else - reg &= ~gpio; - - return tcpc_write(port, PTN5110_EXT_GPIO_CONTROL, reg); -} - -void board_charging_enable(int port, int enable) -{ - ptn5110_ext_gpio_enable(port, enable, PTN5110_EXT_GPIO_EN_SNK1); -} - -void board_vbus_enable(int port, int enable) -{ - ptn5110_ext_gpio_enable(port, enable, PTN5110_EXT_GPIO_EN_SRC); -} - -void tcpc_alert_event(enum gpio_signal signal) -{ - int port = -1; - - switch (signal) { - case GPIO_USB_C0_PD_INT_ODL: - port = 0; - break; - case GPIO_USB_C1_PD_INT_ODL: - port = 1; - break; - default: - return; - } - - schedule_deferred_pd_interrupt(port); -} - -void board_tcpc_init(void) -{ - /* Only reset TCPC if not sysjump */ - if (!system_jumped_late()) - board_reset_pd_mcu(); - - /* Enable TCPC0/1 interrupt */ - gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL); -} -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); - -int board_tcpc_post_init(int port) -{ - int reg; - int rv; - - rv = tcpc_read(port, PTN5110_EXT_GPIO_CONFIG, ®); - if (rv) - return rv; - - /* Configure PTN5110 External GPIOs as output */ - reg |= PTN5110_EXT_GPIO_EN_SRC | PTN5110_EXT_GPIO_EN_SNK1 | - PTN5110_EXT_GPIO_IILIM_5V_VBUS_L; - rv = tcpc_write(port, PTN5110_EXT_GPIO_CONFIG, reg); - if (rv) - return rv; - - return ptn5110_ext_gpio_enable(port, 1, - PTN5110_EXT_GPIO_IILIM_5V_VBUS_L); -} - -/* Reset PD MCU */ -void board_reset_pd_mcu(void) -{ - /* TODO: Add reset logic */ -} - -static inline int board_dc_jack_present(void) -{ - return !gpio_get_level(GPIO_DC_JACK_PRESENT_L); -} - -static void board_dc_jack_handle(void) -{ - struct charge_port_info charge_dc_jack; - - /* System is booted from DC Jack */ - if (board_dc_jack_present()) { - charge_dc_jack.current = (PD_MAX_POWER_MW * 1000) / - DC_JACK_MAX_VOLTAGE_MV; - charge_dc_jack.voltage = DC_JACK_MAX_VOLTAGE_MV; - } else { - charge_dc_jack.current = 0; - charge_dc_jack.voltage = USB_CHARGER_VOLTAGE_MV; - } - - charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, - DC_JACK_PORT_0, &charge_dc_jack); -} -DECLARE_HOOK(HOOK_AC_CHANGE, board_dc_jack_handle, HOOK_PRIO_FIRST); - -static void board_charge_init(void) -{ - int port, supplier; - - /* Initialize all charge suppliers to seed the charge manager */ - for (port = 0; port < CHARGE_PORT_COUNT; port++) { - for (supplier = 0; supplier < CHARGE_SUPPLIER_COUNT; supplier++) - charge_manager_update_charge(supplier, port, NULL); - } - - board_dc_jack_handle(); -} -DECLARE_HOOK(HOOK_INIT, board_charge_init, HOOK_PRIO_DEFAULT); - -int board_set_active_charge_port(int port) -{ - /* if it's a PD port and sourcing VBUS, don't enable */ - if (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT) - if (board_charger_port_is_sourcing_vbus(port)) { - CPRINTS("Skip enable p%d", port); - return EC_ERROR_INVAL; - } - - /* - * Do not enable Type-C port if the DC Jack is present. - * When the Type-C is active port, hardware circuit will - * block DC jack from enabling +VADP_OUT. - */ - if (port != DC_JACK_PORT_0 && board_dc_jack_present()) { - CPRINTS("DC Jack present, Skip enable p%d", port); - return EC_ERROR_INVAL; - } - - /* Make sure non-charging port is disabled */ - switch (port) { - case TYPE_C_PORT_0: - board_charging_enable(TYPE_C_PORT_1, 0); - board_charging_enable(TYPE_C_PORT_0, 1); - break; - case TYPE_C_PORT_1: - board_charging_enable(TYPE_C_PORT_0, 0); - board_charging_enable(TYPE_C_PORT_1, 1); - break; - case DC_JACK_PORT_0: - case CHARGE_PORT_NONE: - default: - /* Disable both Type-C ports */ - board_charging_enable(TYPE_C_PORT_0, 0); - board_charging_enable(TYPE_C_PORT_1, 0); - break; - } - - return EC_SUCCESS; -} - -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_0; - - if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - - return status; -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), charge_mv); -} - -int adc_read_channel(enum adc_channel ch) -{ - return 0; -} diff --git a/board/glkrvp/ec.tasklist b/board/glkrvp/ec.tasklist deleted file mode 100644 index 8fecf61480..0000000000 --- a/board/glkrvp/ec.tasklist +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel RVP board-specific configuration */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/board/glkrvp/gpio.inc b/board/glkrvp/gpio.inc deleted file mode 100644 index a173ba6333..0000000000 --- a/board/glkrvp/gpio.inc +++ /dev/null @@ -1,180 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel GLK-RVP board-specific configuration */ - -/* - * Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. - */ - -/* Power sequencing interrupts */ -GPIO_INT(SUSPWRDNACK, PIN(0, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(RSMRST_L_PGOOD,PIN(3, 6), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(ALL_SYS_PGOOD, PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PCH_SLP_S0_L, PIN(8, 1), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PCH_SLP_S3_L, PIN(8, 5), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PCH_SLP_S4_L, PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt) - -/* Button interrupts */ -GPIO_INT(LID_OPEN, PIN(0, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) -GPIO_INT(EC_VOLUP_BTN_ODL, PIN(3, 4), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(EC_VOLDN_BTN_ODL, PIN(3, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(POWER_BUTTON_L, PIN(A, 6), GPIO_INT_BOTH, power_button_interrupt) - -/* Type-C interrupts */ -GPIO_INT(USB_C0_PD_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, tcpc_alert_event) -GPIO_INT(USB_C1_PD_INT_ODL, PIN(6, 3), GPIO_INT_FALLING, tcpc_alert_event) - -GPIO_INT(AC_PRESENT, PIN(D, 2), GPIO_INT_BOTH, extpower_interrupt) -GPIO_INT(WP_L, PIN(9, 3), GPIO_INT_BOTH | GPIO_SEL_1P8V, switch_interrupt) - -UNIMPLEMENTED(PP3300_PG) -UNIMPLEMENTED(PP5000_PG) - -/* Power sequencing GPIOs */ -GPIO(SYS_RESET_L, PIN(0, 0), GPIO_ODR_HIGH) -GPIO(PCH_RSMRST_L, PIN(0, 1), GPIO_OUT_LOW) -GPIO(SMC_SHUTDOWN, PIN(3, 3), GPIO_OUT_LOW | GPIO_PULL_DOWN) -GPIO(PCH_SYS_PWROK, PIN(3, 5), GPIO_OUT_LOW) -GPIO(PCH_PWRBTN_L, PIN(7, 5), GPIO_ODR_HIGH) -/* - * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is - * normally driven by the PMIC. The EC can also drive this signal in the event - * that the ambient or charger temperature sensors exceeds their thresholds. - */ -GPIO(CPU_PROCHOT, PIN(A, 3), GPIO_INPUT) /* PCH_PROCHOT_ODL */ - -/* Host communication GPIOs */ -GPIO(PCH_WAKE_L, PIN(C, 1), GPIO_ODR_HIGH) - -GPIO(DC_JACK_PRESENT_L, PIN(7, 0), GPIO_INPUT) /* DC Jack presence coming from +V3P3_A_KBC */ -GPIO(USBC_LDO_ENABLE, PIN(7, 1), GPIO_OUT_HIGH) /* USB TCPC to enable LDO in dead battery */ -GPIO(ENABLE_BACKLIGHT, PIN(9, 7), GPIO_ODR_HIGH) -GPIO(ENTERING_RW, PIN(A, 7), GPIO_OUTPUT) /* EC_ENTERING_RW */ - -/* - * I2C pins should be configured as inputs until I2C module is - * initialized. This will avoid driving the lines unintentionally. - */ -GPIO(I2C0_SCL, PIN(B, 5), GPIO_ODR_HIGH) -GPIO(I2C0_SDA, PIN(B, 4), GPIO_ODR_HIGH) -GPIO(I2C1_SCL, PIN(9, 0), GPIO_ODR_HIGH) -GPIO(I2C1_SDA, PIN(8, 7), GPIO_ODR_HIGH) -GPIO(I2C2_SCL, PIN(9, 2), GPIO_ODR_HIGH) -GPIO(I2C2_SDA, PIN(9, 1), GPIO_ODR_HIGH) -GPIO(I2C3_SCL, PIN(D, 1), GPIO_ODR_HIGH) -GPIO(I2C3_SDA, PIN(D, 0), GPIO_ODR_HIGH) -GPIO(I2C7_SCL, PIN(B, 3), GPIO_ODR_HIGH) -GPIO(I2C7_SDA, PIN(B, 2), GPIO_ODR_HIGH) - -/* LPC / eSPI signals */ -#if 0 -GPIO(LAD0_eSPI_IO0, PIN(4, 6), GPIO_INPUT) /* LAD0 / eSPI_IO0 */ -GPIO(LAD1_eSPI_IO1, PIN(4, 7), GPIO_INPUT) /* LAD1 / eSPI_IO1 */ -GPIO(LAD2_eSPI_IO2, PIN(5, 1), GPIO_INPUT) /* LAD2 / eSPI_IO2 */ -GPIO(LAD3_eSPI_IO3, PIN(5, 2), GPIO_INPUT) /* LAD3 / eSPI_IO3 */ -GPIO(LFRAME_eSPI_CS, PIN(5, 3), GPIO_INPUT) /* LFRAME / eSPI_CS */ -GPIO(LRESET_eSPI_RST, PIN(5, 4), GPIO_INPUT) /* LRESET / eSPI_RST */ -GPIO(PCI_CLK_eSPI_CLK, PIN(5, 5), GPIO_INPUT) /* PCI_CLK / eSPI_CLK */ -GPIO(CLKRUN, PIN(5, 6), GPIO_INPUT) /* CLKRUN */ -GPIO(SER_IRQ_eSPI_ALERT,PIN(5, 7), GPIO_INPUT) /* SER_IRQ / eSPI_ALERT */ -#endif - -/* Unused pins 3.3V & Interruptable */ -GPIO(NC_04, PIN(0, 4), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(NC_40, PIN(4, 0), GPIO_INPUT) /* TA1_TACH1 */ -GPIO(NC_41, PIN(4, 1), GPIO_INPUT | GPIO_PULL_UP) /* ADC4 */ -GPIO(NC_42, PIN(4, 2), GPIO_INPUT | GPIO_PULL_UP) /* ADC3 */ -GPIO(NC_43, PIN(4, 3), GPIO_INPUT | GPIO_PULL_UP) /* ADC2 */ -GPIO(NC_44, PIN(4, 4), GPIO_INPUT | GPIO_PULL_UP) /* ADC1 */ -GPIO(NC_45, PIN(4, 5), GPIO_INPUT | GPIO_PULL_UP) /* ADC5 */ - -GPIO(NC_60, PIN(6, 0), GPIO_INPUT) /* PWM7 */ -GPIO(NC_61, PIN(6, 1), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_67, PIN(6, 7), GPIO_INPUT) /* Wake-up button */ - -GPIO(NC_73, PIN(7, 3), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_74, PIN(7, 4), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_76, PIN(7, 6), GPIO_INPUT | GPIO_PULL_UP) /* SCI */ - -GPIO(NC_80, PIN(8, 0), GPIO_INPUT) /* PWM3 */ -GPIO(NC_82, PIN(8, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_83, PIN(8, 3), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_84, PIN(8, 4), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(NC_B1, PIN(B, 1), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_B7, PIN(B, 7), GPIO_INPUT) /* PWM5 */ - -GPIO(NC_C0, PIN(C, 0), GPIO_INPUT) /* PWM6 */ -GPIO(NC_C2, PIN(C, 2), GPIO_INPUT) /* PWM1 */ -GPIO(NC_C3, PIN(C, 3), GPIO_INPUT) /* PWM0 */ -GPIO(NC_C4, PIN(C, 4), GPIO_INPUT) /* PWM2 */ -GPIO(NC_C5, PIN(C, 5), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_C7, PIN(C, 7), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(NC_C6, PIN(C, 6), GPIO_INPUT | GPIO_PULL_UP) /* SMI */ - -GPIO(NC_D3, PIN(D, 3), GPIO_INPUT) /* TB1 */ - -GPIO(NC_E7, PIN(E, 7), GPIO_INPUT) /* 32K_CLKIN */ - -/* Unused pins: VSPI 3.3V or 1.8V & Interruptable */ -GPIO(NC_94, PIN(9, 4), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_95, PIN(9, 5), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(NC_A1, PIN(A, 1), GPIO_INPUT | GPIO_PULL_UP) -GPIO(NC_A5, PIN(A, 5), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(NC_B0, PIN(B, 0), GPIO_INPUT | GPIO_PULL_UP) - -/* Unused pins 3.3V & Non-Interruptable */ -GPIO(NC_32, PIN(3, 2), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(NC_66, PIN(6, 6), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(NC_B6, PIN(B, 6), GPIO_INPUT) /* PWM4 */ - -/* eSPI: VHIF Unused pins 1.8V & Interruptable */ -GPIO(NC_50, PIN(5, 0), GPIO_INPUT | GPIO_PULL_UP) - -/* Alternate pins for UART */ -ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0) /* GPIO64/65 */ - -/* Alternate pins for I2C */ -ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1:SDA GPIO87 */ -ALTERNATE(PIN_MASK(9, 0x01), 1, MODULE_I2C, 0) /* I2C1:SCL GPIO90 */ -ALTERNATE(PIN_MASK(9, 0x06), 1, MODULE_I2C, 0) /* I2C2:SDA/SCL GPIO91/92 */ -ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0) /* I2C7:SDA/SCL GPIOB2/B3 */ -ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* I2C0:SDA/SCL GPIOB4/B5 */ -ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* I2C3:SDA/SCL GPIOD0/D1 */ - -/* Keyboard pins */ -#define GPIO_KB_INPUT (GPIO_INPUT) -#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH) - -/* Keyboard Columns */ -/* GPIO05/06/07 */ -ALTERNATE(PIN_MASK(0, 0xE0), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -/* GPIO10/11/12/13/14/15/16/17 */ -ALTERNATE(PIN_MASK(1, 0xFF), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -/* GPIO20/21 */ -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) - -/* Keyboard Rows */ -/* GPIO22/23/24/25/26/27 */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) -/* GPIO30/31 */ -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) - -/* EC SPI chip */ -#if 0 -GPIO(F_CS0_EC_L, PIN(A, 0), GPIO_OUT_HIGH | GPIO_PULL_UP) -ALTERNATE(PIN_MASK(A, 0x14), 1, MODULE_SPI, 0) /* SPI:MOSI/SCLK GPIOA4/A2 */ -ALTERNATE(PIN_MASK(9, 0x40), 1, MODULE_SPI, 0) /* SPI:MISO GPIO96 */ -#endif diff --git a/board/glkrvp/usb_pd_policy.c b/board/glkrvp/usb_pd_policy.c deleted file mode 100644 index 19572f7063..0000000000 --- a/board/glkrvp/usb_pd_policy.c +++ /dev/null @@ -1,75 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "charge_manager.h" -#include "compile_time_macros.h" -#include "console.h" -#include "gpio.h" -#include "stddef.h" -#include "system.h" -#include "usb_mux.h" -#include "usb_pd_tcpm.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -int pd_set_power_supply_ready(int port) -{ - /* Disable charging */ - board_charging_enable(port, 0); - - /* Provide VBUS */ - board_vbus_enable(port, 1); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; /* we are ready */ -} - -void pd_power_supply_reset(int port) -{ - /* Disable VBUS */ - board_vbus_enable(port, 0); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_check_vconn_swap(int port) -{ - /* in G3, do not allow vconn swap since pp5000_A rail is off */ - /* TODO: return gpio_get_level(GPIO_PMIC_EN); */ - return 1; -} - -/* ----------------- Vendor Defined Messages ------------------ */ -#ifdef CONFIG_USB_PD_ALT_MODE_DFP -static void svdm_dp_post_config(int port) -{ - dp_flags[port] |= DP_FLAGS_DP_ON; - if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) - return; - /* TODO: Update HPD to host */ -} - -static int svdm_dp_attention(int port, uint32_t *payload) -{ - int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); - - /* TODO: Read HPD IRQ */ - - dp_status[port] = payload[1]; - if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { - if (lvl) - dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; - return 1; - } - /* TODO: Update HPD to host */ - - /* ack */ - return 1; -} -#endif /* CONFIG_USB_PD_ALT_MODE_DFP */ diff --git a/board/glkrvp/vif_override.xml b/board/glkrvp/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/glkrvp/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/glkrvp_ite/battery.c b/board/glkrvp_ite/battery.c deleted file mode 100644 index b2dc6a11c8..0000000000 --- a/board/glkrvp_ite/battery.c +++ /dev/null @@ -1,237 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery.h" -#include "charger_profile_override.h" -#include "console.h" -#include "pca9555.h" -#include "util.h" - -#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) - -/* Shutdown mode parameter to write to manufacturer access register */ -#define SB_SHUTDOWN_DATA 0x0010 - -enum fast_chg_voltage_ranges { - VOLTAGE_RANGE_0, - VOLTAGE_RANGE_1, - VOLTAGE_RANGE_2, -}; - -enum temp_range { - TEMP_RANGE_0, - TEMP_RANGE_1, - TEMP_RANGE_2, - TEMP_RANGE_3, - TEMP_RANGE_4, - TEMP_RANGE_5, -}; - -/* keep track of previous charge profile info */ -static const struct fast_charge_profile *prev_chg_profile_info; - -/* SMP-CA-445 battery & BQ30Z554 fuel gauge */ -static const struct battery_info batt_info_smp_ca445 = { - .voltage_max = 8700, /* mV */ - .voltage_normal = 7600, - - /* - * Actual value 6000mV, added 100mV for charger accuracy so that - * unwanted low VSYS_Prochot# assertion can be avoided. - */ - .voltage_min = 6100, - .precharge_current = 150, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -20, - .discharging_max_c = 60, -}; - -const struct battery_info *battery_get_info(void) -{ - static struct battery_info batt_info; - - if (battery_is_present() == BP_YES) - return &batt_info_smp_ca445; - - /* - * In no battery condition, to avoid voltage drop on VBATA set - * the battery minimum voltage to the battery maximum voltage. - */ - - batt_info = batt_info_smp_ca445; - batt_info.voltage_min = batt_info.voltage_max; - - return &batt_info; -} - -static const struct fast_charge_profile fast_charge_smp_ca445_info[] = { - /* < 0C */ - [TEMP_RANGE_0] = { - .temp_c = TEMPC_TENTHS_OF_DEG(-1), - .current_mA = { - [VOLTAGE_RANGE_0] = 0, - [VOLTAGE_RANGE_1] = 0, - [VOLTAGE_RANGE_2] = 0, - }, - }, - - /* 0C >= && <=15C */ - [TEMP_RANGE_1] = { - .temp_c = TEMPC_TENTHS_OF_DEG(15), - .current_mA = { - [VOLTAGE_RANGE_0] = 890, - [VOLTAGE_RANGE_1] = 445, - [VOLTAGE_RANGE_2] = 445, - }, - }, - - /* 15C > && <=20C */ - [TEMP_RANGE_2] = { - .temp_c = TEMPC_TENTHS_OF_DEG(20), - .current_mA = { - [VOLTAGE_RANGE_0] = 1335, - [VOLTAGE_RANGE_1] = 1335, - [VOLTAGE_RANGE_2] = 1335, - }, - }, - - /* 20C > && <=45C */ - [TEMP_RANGE_3] = { - .temp_c = TEMPC_TENTHS_OF_DEG(45), - .current_mA = { - [VOLTAGE_RANGE_0] = 2225, - [VOLTAGE_RANGE_1] = 2225, - [VOLTAGE_RANGE_2] = 2225, - }, - }, - - /* 45C > && <=55C */ - [TEMP_RANGE_4] = { - .temp_c = TEMPC_TENTHS_OF_DEG(55), - .current_mA = { - [VOLTAGE_RANGE_0] = 1335, - [VOLTAGE_RANGE_1] = 1335, - [VOLTAGE_RANGE_2] = 0, - }, - }, - - /* > 55C */ - [TEMP_RANGE_5] = { - .temp_c = TEMPC_TENTHS_OF_DEG(CHARGER_PROF_TEMP_C_LAST_RANGE), - .current_mA = { - [VOLTAGE_RANGE_0] = 0, - [VOLTAGE_RANGE_1] = 0, - [VOLTAGE_RANGE_2] = 0, - }, - }, -}; - -static const struct fast_charge_params fast_chg_params_smp_ca445 = { - .total_temp_ranges = ARRAY_SIZE(fast_charge_smp_ca445_info), - .default_temp_range_profile = TEMP_RANGE_3, - .voltage_mV = { - [VOLTAGE_RANGE_0] = 8000, - [VOLTAGE_RANGE_1] = 8200, - [VOLTAGE_RANGE_2] = CHARGER_PROF_VOLTAGE_MV_LAST_RANGE, - }, - .chg_profile_info = &fast_charge_smp_ca445_info[0], -}; - -/* - * This can override the smart battery's charging profile. To make a change, - * modify one or more of requested_voltage, requested_current, or state. - * Leave everything else unchanged. - * - * Return the next poll period in usec, or zero to use the default (which is - * state dependent). - */ -int charger_profile_override(struct charge_state_data *curr) -{ - /* - * If battery present and not in cut off and almost full - * then if it does not want charge then discharge on AC - */ - if ((battery_is_present() == BP_YES) && - !(curr->batt.flags & BATT_FLAG_WANT_CHARGE) && - (curr->batt.status & STATUS_FULLY_CHARGED)) { - charger_discharge_on_ac(1); - curr->state = ST_DISCHARGE; - return 0; - } - - charger_discharge_on_ac(0); - - return charger_profile_override_common(curr, - &fast_chg_params_smp_ca445, - &prev_chg_profile_info, - batt_info_smp_ca445.voltage_max); -} - -int board_cut_off_battery(void) -{ - int rv; - - /* Ship mode command must be sent twice to take effect */ - rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA); - if (rv != EC_SUCCESS) - return rv; - - return sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA); -} - -static inline int batt_smp_cos4870_is_initialized(void) -{ - int batt_status; - - return battery_status(&batt_status) ? 0 : - batt_status & STATUS_INITIALIZED; -} - -enum battery_present battery_hw_present(void) -{ - int data; - int rv; - - rv = pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_INPUT_PORT_0, &data); - - /* GPIO is low when the battery is physically present */ - return rv || (data & PCA9555_IO_5) ? BP_NO : BP_YES; -} - -/* - * Physical detection of battery. - */ -enum battery_present battery_is_present(void) -{ - static enum battery_present batt_pres_prev = BP_NOT_SURE; - enum battery_present batt_pres; - - /* Get the physical hardware status */ - batt_pres = battery_hw_present(); - - /* - * Make sure battery status is implemented, I2C transactions are - * success & the battery status is Initialized to find out if it - * is a working battery and it is not in the cut-off mode. - * - * FETs are turned off after Power Shutdown time. - * The device will wake up when a voltage is applied to PACK. - * Battery status will be inactive until it is initialized. - */ - if (batt_pres == BP_YES && batt_pres_prev != batt_pres && - !battery_is_cut_off() && !batt_smp_cos4870_is_initialized()) - batt_pres = BP_NO; - - batt_pres_prev = batt_pres; - - return batt_pres; -} diff --git a/board/glkrvp_ite/board.c b/board/glkrvp_ite/board.c deleted file mode 100644 index 2a222ada7b..0000000000 --- a/board/glkrvp_ite/board.c +++ /dev/null @@ -1,209 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel GLK-RVP-ITE board-specific configuration */ - -#include "button.h" -#include "chipset.h" -#include "charger.h" -#include "console.h" -#include "driver/charger/isl923x.h" -#include "ec2i_chip.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "intc.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "pca9555.h" -#include "power.h" -#include "power_button.h" -#include "spi.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "uart.h" -#include "util.h" - -#include "gpio_list.h" - -#define I2C_PORT_PCA555_BOARD_ID_GPIO IT83XX_I2C_CH_C -#define I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS 0x20 - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"charger", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"typec", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"pmic", IT83XX_I2C_CH_C, 100, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"ext_io", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* Charger Chips */ -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = ISL923X_ADDR_FLAGS, - .drv = &isl923x_drv, - }, -}; - -/* Wake-up pins for hibernate */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_AC_PRESENT, - GPIO_LID_OPEN, - GPIO_POWER_BUTTON_L, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* Called by APL power state machine when transitioning from G3 to S5 */ -void chipset_pre_init_callback(void) -{ - int data; - - if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_OUTPUT_PORT_0, &data)) - return; - - /* - * No need to re-init PMIC since settings are sticky across sysjump. - * However, be sure to check that PMIC is already enabled. If it is - * then there's no need to re-sequence the PMIC. - */ - if (system_jumped_to_this_image() && (data & PCA9555_IO_0)) - return; - - /* Enable SOC_3P3_EN_L: Set the Output port O0.1 to low level */ - data &= ~PCA9555_IO_1; - pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_OUTPUT_PORT_0, data); - - /* TODO: Find out from the spec */ - msleep(10); - - /* Enable PMIC_EN: Set the Output port O0.0 to high level */ - pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_OUTPUT_PORT_0, - data | PCA9555_IO_0); -} - -/* Initialize board. */ -static void board_init(void) -{ -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_FIRST); - -/* Called on AP S5 -> S3 transition */ -static void board_chipset_startup(void) -{ -} -DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); - -/* Called on AP S3 -> S5 transition */ -static void board_chipset_shutdown(void) -{ -} -DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); - -void chipset_do_shutdown(void) -{ - int data; - - if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_OUTPUT_PORT_0, &data)) - return; - - /* Disable SOC_3P3_EN_L: Set the Output port O0.1 to high level */ - data |= PCA9555_IO_1; - pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_OUTPUT_PORT_0, data); - - /* TODO: Find out from the spec */ - msleep(10); - - /* Disable PMIC_EN: Set the Output port O0.0 to low level */ - pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_OUTPUT_PORT_0, - data & ~PCA9555_IO_0); -} - -void board_hibernate_late(void) -{ -} - -void board_hibernate(void) -{ - /* - * To support hibernate called from console commands, ectool commands - * and key sequence, shutdown the AP before hibernating. - */ - chipset_do_shutdown(); - - /* Added delay to allow AP to settle down */ - msleep(100); -} - -int board_get_version(void) -{ - int data; - - if (pca9555_read(I2C_PORT_PCA555_BOARD_ID_GPIO, - I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS, - PCA9555_CMD_INPUT_PORT_1, &data)) - return -1; - - return data & 0x0f; -} - -static void pmic_init(void) -{ - /* No need to re-init PMIC since settings are sticky across sysjump. */ - if (system_jumped_late()) - return; - - /* - * PMIC INIT - * Configure Port O0.0 as Output port - PMIC_EN - * Configure Port O0.1 as Output port - SOC_3P3_EN_L - */ - pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_CONFIGURATION_PORT_0, 0xfc); - - /* - * Set the Output port O0.0 to low level - PMIC_EN - * Set the Output port O0.1 to high level - SOC_3P3_EN_L - * - * POR of PCA9555 port is input with high impedance hence explicitly - * configure the SOC_3P3_EN_L to high level. - */ - pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, - PCA9555_CMD_OUTPUT_PORT_0, 0xfe); -} -DECLARE_HOOK(HOOK_INIT, pmic_init, HOOK_PRIO_INIT_I2C + 1); - -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - .output_settle_us = 35, - .debounce_down_us = 5 * MSEC, - .debounce_up_us = 40 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ - }, -}; diff --git a/board/glkrvp_ite/board.h b/board/glkrvp_ite/board.h deleted file mode 100644 index da9313580b..0000000000 --- a/board/glkrvp_ite/board.h +++ /dev/null @@ -1,155 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel GLK-RVP-ITE board-specific configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* - * Allow dangerous commands. - * TODO: Remove this config before production. - */ -#define CONFIG_SYSTEM_UNLOCKED - -#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC))) -#undef CONFIG_HOSTCMD_DEBUG_MODE - -/* - * By default, enable all console messages excepted HC, ACPI and event: - * The sensor stack is generating a lot of activity. - */ -#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF - -/* EC console commands */ - -/* Battery */ -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_PRESENT_CUSTOM -#define CONFIG_BATTERY_SMART - -/* Charger */ -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGER -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_ISL9238 -#define CONFIG_CHARGER_PROFILE_OVERRIDE -#define CONFIG_CHARGER_PROFILE_OVERRIDE_COMMON -#undef CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES -#define CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES 3 -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 -#undef CONFIG_EXTPOWER_DEBOUNCE_MS -#define CONFIG_EXTPOWER_DEBOUNCE_MS 200 -#define CONFIG_EXTPOWER_GPIO - -/* DC Jack charge ports */ -#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT -#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 -#define DEDICATED_CHARGE_PORT 2 - -/* Keyboard */ - -#define CONFIG_KEYBOARD_PROTOCOL_8042 - -/* UART */ -#define CONFIG_LOW_POWER_IDLE - -/* USB-A config */ - -/* USB PD config */ -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0 -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_TCPC -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_TCPMV1 - -/* USB MUX */ -#define CONFIG_USBC_SS_MUX -#define CONFIG_USB_MUX_PS8743 - -/* SoC / PCH */ -#define CONFIG_HOSTCMD_ESPI -#define CONFIG_CHIPSET_GEMINILAKE -#define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_BUTTON_X86 -#define CONFIG_POWER_COMMON -#define CONFIG_POWER_S0IX -#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE - -/* EC */ -#define CONFIG_VOLUME_BUTTONS -#define CONFIG_LID_SWITCH -#define CONFIG_WP_ALWAYS -#define CONFIG_FLASH_READOUT_PROTECTION - -/* Verified boot */ -#define CONFIG_SHA256_UNROLLED -#define CONFIG_VBOOT_HASH -/* - * Enable 1 slot of secure temporary storage to support - * suspend/resume with read/write memory training. - */ -#define CONFIG_VSTORE -#define CONFIG_VSTORE_SLOT_COUNT 1 - -/* Optional feature - used by ITE */ -#define CONFIG_IT83XX_ENABLE_MOUSE_DEVICE -#define CONFIG_IT83XX_FLASH_CLOCK_48MHZ -#define CONFIG_IT83XX_VCC_1P8V - -/* I2C ports */ -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_IT83XX_SMCLK2_ON_GPC7 - -#define I2C_PORT_CHARGER IT83XX_I2C_CH_A -#define I2C_PORT_BATTERY IT83XX_I2C_CH_A -#define I2C_PORT_USB_MUX IT83XX_I2C_CH_B - -#define I2C_PORT_PCA555_PMIC_BATT_GPIO IT83XX_I2C_CH_C -#define I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS 0x21 - -/* EC exclude modules */ -#undef CONFIG_ADC -#undef CONFIG_WATCHDOG - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum adc_channel { - ADC_VBUS, - ADC_CH_COUNT, -}; - -int board_get_version(void); - -/* TODO: Verify the numbers below. */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 45000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 -#define DC_JACK_MAX_VOLTAGE_MV 19000 - -/* Reset PD MCU */ -void board_reset_pd_mcu(void); -void tcpc_alert_event(enum gpio_signal signal); -void board_charging_enable(int port, int enable); -void board_vbus_enable(int port, int enable); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/glkrvp_ite/build.mk b/board/glkrvp_ite/build.mk deleted file mode 100644 index b2e416c00b..0000000000 --- a/board/glkrvp_ite/build.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -*- makefile -*- -# Copyright 2018 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -#it8320 -CHIP:=it83xx -CHIP_FAMILY:=it8320 -CHIP_VARIANT:=it8320bx - -board-y=board.o -board-$(CONFIG_BATTERY_SMART)+=battery.o -board-$(CONFIG_USB_POWER_DELIVERY)+=chg_usb_pd.o usb_pd_policy.o diff --git a/board/glkrvp_ite/chg_usb_pd.c b/board/glkrvp_ite/chg_usb_pd.c deleted file mode 100644 index 67824fbf3c..0000000000 --- a/board/glkrvp_ite/chg_usb_pd.c +++ /dev/null @@ -1,261 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "charge_manager.h" -#include "charge_state_v2.h" -#include "console.h" -#include "hooks.h" -#include "task.h" -#include "tcpm/tcpci.h" -#include "system.h" -#include "usb_mux.h" -#include "util.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -#define PTN5110_EXT_GPIO_CONFIG 0x92 -#define PTN5110_EXT_GPIO_CONTROL 0x93 - -#define PTN5110_EXT_GPIO_FRS_EN BIT(6) -#define PTN5110_EXT_GPIO_EN_SRC BIT(5) -#define PTN5110_EXT_GPIO_EN_SNK1 BIT(4) -#define PTN5110_EXT_GPIO_IILIM_5V_VBUS_L BIT(3) - -enum glkrvp_charge_ports { - TYPE_C_PORT_0, - TYPE_C_PORT_1, - DC_JACK_PORT_0 = DEDICATED_CHARGE_PORT, -}; - -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = IT83XX_I2C_CH_B, - .addr_flags = 0x50, - }, - .drv = &tcpci_tcpm_drv, - }, - { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = IT83XX_I2C_CH_B, - .addr_flags = 0x52, - }, - .drv = &tcpci_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_MAX_COUNT); - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = 0x10, - .driver = &ps8743_usb_mux_driver, - }, - { - .usb_port = 1, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = 0x11, - .driver = &ps8743_usb_mux_driver, - }, -}; - -static int board_charger_port_is_sourcing_vbus(int port) -{ - int reg; - - /* DC Jack can't source VBUS */ - if (port == DC_JACK_PORT_0) - return 0; - - if (tcpc_read(port, PTN5110_EXT_GPIO_CONTROL, ®)) - return 0; - - return !!(reg & PTN5110_EXT_GPIO_EN_SRC); -} - -static int ptn5110_ext_gpio_enable(int port, int enable, int gpio) -{ - int reg; - int rv; - - rv = tcpc_read(port, PTN5110_EXT_GPIO_CONTROL, ®); - if (rv) - return rv; - - if (enable) - reg |= gpio; - else - reg &= ~gpio; - - return tcpc_write(port, PTN5110_EXT_GPIO_CONTROL, reg); -} - -void board_charging_enable(int port, int enable) -{ - ptn5110_ext_gpio_enable(port, enable, PTN5110_EXT_GPIO_EN_SNK1); -} - -void board_vbus_enable(int port, int enable) -{ - ptn5110_ext_gpio_enable(port, enable, PTN5110_EXT_GPIO_EN_SRC); -} - -void tcpc_alert_event(enum gpio_signal signal) -{ -#ifdef HAS_TASK_PDCMD - /* Exchange status with TCPCs */ - host_command_pd_send_status(PD_CHARGE_NO_CHANGE); -#endif -} - -void board_tcpc_init(void) -{ - /* Only reset TCPC if not sysjump */ - if (!system_jumped_late()) - board_reset_pd_mcu(); - - /* Enable TCPC0/1 interrupt */ - gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL); -} -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); - -int board_tcpc_post_init(int port) -{ - int reg; - int rv; - - rv = tcpc_read(port, PTN5110_EXT_GPIO_CONFIG, ®); - if (rv) - return rv; - - /* Configure PTN5110 External GPIOs as output */ - reg |= PTN5110_EXT_GPIO_EN_SRC | PTN5110_EXT_GPIO_EN_SNK1 | - PTN5110_EXT_GPIO_IILIM_5V_VBUS_L; - rv = tcpc_write(port, PTN5110_EXT_GPIO_CONFIG, reg); - if (rv) - return rv; - - return ptn5110_ext_gpio_enable(port, 1, - PTN5110_EXT_GPIO_IILIM_5V_VBUS_L); -} - -/* Reset PD MCU */ -void board_reset_pd_mcu(void) -{ - /* TODO: Add reset logic */ -} - -static inline int board_dc_jack_present(void) -{ - return !gpio_get_level(GPIO_DC_JACK_PRESENT_L); -} - -static void board_dc_jack_handle(void) -{ - struct charge_port_info charge_dc_jack; - - /* System is booted from DC Jack */ - if (board_dc_jack_present()) { - charge_dc_jack.current = (PD_MAX_POWER_MW * 1000) / - DC_JACK_MAX_VOLTAGE_MV; - charge_dc_jack.voltage = DC_JACK_MAX_VOLTAGE_MV; - } else { - charge_dc_jack.current = 0; - charge_dc_jack.voltage = USB_CHARGER_VOLTAGE_MV; - } - - charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, - DC_JACK_PORT_0, &charge_dc_jack); -} -DECLARE_HOOK(HOOK_AC_CHANGE, board_dc_jack_handle, HOOK_PRIO_FIRST); - -static void board_charge_init(void) -{ - int port, supplier; - - /* Initialize all charge suppliers to seed the charge manager */ - for (port = 0; port < CHARGE_PORT_COUNT; port++) { - for (supplier = 0; supplier < CHARGE_SUPPLIER_COUNT; supplier++) - charge_manager_update_charge(supplier, port, NULL); - } - - board_dc_jack_handle(); -} -DECLARE_HOOK(HOOK_INIT, board_charge_init, HOOK_PRIO_DEFAULT); - -int board_set_active_charge_port(int port) -{ - /* charge port is a realy physical port */ - int is_real_port = (port >= 0 && - port < CHARGE_PORT_COUNT); - /* check if we are source vbus on that port */ - int source = board_charger_port_is_sourcing_vbus(port); - - if (is_real_port && source) { - CPRINTS("Skip enable p%d", port); - return EC_ERROR_INVAL; - } - - /* - * Do not enable Type-C port if the DC Jack is present. - * When the Type-C is active port, hardware circuit will - * block DC jack from enabling +VADP_OUT. - */ - if (port != DC_JACK_PORT_0 && board_dc_jack_present()) { - CPRINTS("DC Jack present, Skip enable p%d", port); - return EC_ERROR_INVAL; - } - - /* Make sure non-charging port is disabled */ - switch (port) { - case TYPE_C_PORT_0: - board_charging_enable(TYPE_C_PORT_1, 0); - board_charging_enable(TYPE_C_PORT_0, 1); - break; - case TYPE_C_PORT_1: - board_charging_enable(TYPE_C_PORT_0, 0); - board_charging_enable(TYPE_C_PORT_1, 1); - break; - case DC_JACK_PORT_0: - case CHARGE_PORT_NONE: - default: - /* Disable both Type-C ports */ - board_charging_enable(TYPE_C_PORT_0, 0); - board_charging_enable(TYPE_C_PORT_1, 0); - break; - } - - return EC_SUCCESS; -} - -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_0; - - if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - - return status; -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), charge_mv); -} - -int adc_read_channel(enum adc_channel ch) -{ - return 0; -} diff --git a/board/glkrvp_ite/ec.tasklist b/board/glkrvp_ite/ec.tasklist deleted file mode 100644 index 086a352bcb..0000000000 --- a/board/glkrvp_ite/ec.tasklist +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel GLK-RVP-ITE board-specific configuration */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/glkrvp_ite/gpio.inc b/board/glkrvp_ite/gpio.inc deleted file mode 100644 index a4f21a64f4..0000000000 --- a/board/glkrvp_ite/gpio.inc +++ /dev/null @@ -1,118 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel GLK-RVP-ITE board-specific configuration */ - -/* - * Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. - */ - -/* Power sequencing interrupts */ -GPIO_INT(SUSPWRDNACK, PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PCH_SLP_S0_L, PIN(F, 0), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PCH_SLP_S3_L, PIN(F, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PCH_SLP_S4_L, PIN(F, 3), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(RSMRST_L_PGOOD,PIN(G, 6), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(ALL_SYS_PGOOD, PIN(I, 7), GPIO_INT_BOTH, power_signal_interrupt) - -/* Button interrupts */ -GPIO_INT(VOLUME_UP_L, PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(VOLUME_DOWN_L, PIN(D, 6), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) -GPIO_INT(POWER_BUTTON_L,PIN(E, 4), GPIO_INT_BOTH, power_button_interrupt) - -GPIO_INT(AC_PRESENT, PIN(A, 6), GPIO_INT_BOTH, extpower_interrupt) - -GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UART1 RX input */ -#ifdef CONFIG_HOSTCMD_ESPI -/* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ -GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ -#endif - -/* Type-C interrupts */ -UNIMPLEMENTED(USB_C0_PD_INT_ODL) -UNIMPLEMENTED(USB_C1_PD_INT_ODL) - -UNIMPLEMENTED(WP_L) -UNIMPLEMENTED(PP3300_PG) -UNIMPLEMENTED(PP5000_PG) - -/* Power sequencing GPIOs */ -UNIMPLEMENTED(SYS_RESET_L) -GPIO(PCH_RSMRST_L, PIN(C, 6), GPIO_OUT_LOW) -GPIO(PCH_PWRBTN_L, PIN(D, 0), GPIO_ODR_HIGH) -GPIO(PCH_SYS_PWROK, PIN(K, 4), GPIO_OUT_LOW) -GPIO(SMC_SHUTDOWN, PIN(K, 5), GPIO_OUT_LOW | GPIO_PULL_DOWN) -/* - * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is - * normally driven by the PMIC. The EC can also drive this signal in the event - * that the ambient or charger temperature sensors exceeds their thresholds. - */ -GPIO(CPU_PROCHOT, PIN(E, 5), GPIO_INPUT) /* PCH_PROCHOT_ODL */ - -/* Host communication GPIOs */ -GPIO(PCH_WAKE_L, PIN(L, 0), GPIO_ODR_HIGH) -GPIO(PCH_PLTRST_L, PIN(E, 3), GPIO_INPUT | GPIO_PULL_UP) - -GPIO(DC_JACK_PRESENT_L, PIN(C, 0), GPIO_INPUT) /* DC Jack presence coming from +V3P3_A_KBC */ -GPIO(USBC_LDO_ENABLE, PIN(K, 0), GPIO_OUT_HIGH) /* USB TCPC to enable LDO in dead battery */ -UNIMPLEMENTED(ENABLE_BACKLIGHT) -GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUTPUT) /* EC_ENTERING_RW */ - -/* - * I2C pins should be configured as inputs until I2C module is - * initialized. This will avoid driving the lines unintentionally. - */ -GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) -GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT) -GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT) -#ifdef CONFIG_IT83XX_SMCLK2_ON_GPC7 -GPIO(I2C_C_SCL, PIN(C, 7), GPIO_INPUT) -#else -GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) -#endif -GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) -GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) -GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) - -/* LPC / eSPI signals */ -#if 0 -GPIO(LPC_ESPI_RST, PIN(D, 2), GPIO_INPUT) -GPIO(LAD_EIO_0, PIN(M, 0), GPIO_INPUT) -GPIO(LAD_EIO_1, PIN(M, 1), GPIO_INPUT) -GPIO(LAD_EIO_2, PIN(M, 2), GPIO_INPUT) -GPIO(LAD_EIO_3, PIN(M, 3), GPIO_INPUT) -GPIO(LPC_ESPI_CLK, PIN(M, 4), GPIO_INPUT) -GPIO(LFRAME_ESPI_CS, PIN(M, 5), GPIO_INPUT) -GPIO(SERIRQ_ALERT, PIN(M, 6), GPIO_INPUT) -#endif - -/* Unused pins 3.3V & Interruptable */ - -/* Unused pins: VSPI 3.3V or 1.8V & Interruptable */ - -/* Unused pins 3.3V & Non-Interruptable */ - -/* eSPI: VHIF Unused pins 1.8V & Interruptable */ - -/* eSPI: VHIF Unused pins 1.8V & Non-Interruptable */ - -/* Alternate pins for UART */ -ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, GPIO_PULL_UP) /* UART1 */ - -/* Alternate pins for I2C */ -ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A SCL/SDA B3/B4 */ -ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, 0) /* I2C B SCL/SDA C1/C2 */ -#ifdef CONFIG_IT83XX_SMCLK2_ON_GPC7 -ALTERNATE(PIN_MASK(C, 0x80), 1, MODULE_I2C, 0) /* I2C C SCL C7 */ -#else -ALTERNATE(PIN_MASK(F, 0x40), 1, MODULE_I2C, 0) /* I2C C SCL F6 */ -#endif -ALTERNATE(PIN_MASK(F, 0x80), 1, MODULE_I2C, 0) /* I2C C SDA F7 */ -ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E SCL/SDA E0/E7 */ diff --git a/board/glkrvp_ite/usb_pd_policy.c b/board/glkrvp_ite/usb_pd_policy.c deleted file mode 100644 index bfb395baf4..0000000000 --- a/board/glkrvp_ite/usb_pd_policy.c +++ /dev/null @@ -1,52 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "charge_manager.h" -#include "compile_time_macros.h" -#include "console.h" -#include "gpio.h" -#include "stddef.h" -#include "system.h" -#include "usb_mux.h" -#include "usb_pd_tcpm.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -int pd_set_power_supply_ready(int port) -{ - /* Disable charging */ - board_charging_enable(port, 0); - - /* Provide VBUS */ - board_vbus_enable(port, 1); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; /* we are ready */ -} - -void pd_power_supply_reset(int port) -{ - /* Disable VBUS */ - board_vbus_enable(port, 0); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_check_vconn_swap(int port) -{ - /* in G3, do not allow vconn swap since pp5000_A rail is off */ - /* TODO: return gpio_get_level(GPIO_PMIC_EN); */ - return 1; -} - -void pd_execute_data_swap(int port, - enum pd_data_role data_role) -{ - /* Do nothing */ -} diff --git a/board/glkrvp_ite/vif_override.xml b/board/glkrvp_ite/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/glkrvp_ite/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/samus/battery.c b/board/samus/battery.c deleted file mode 100644 index bc73cbc1c3..0000000000 --- a/board/samus/battery.c +++ /dev/null @@ -1,301 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery_smart.h" -#include "charge_state.h" -#include "console.h" -#include "ec_commands.h" -#include "extpower.h" -#include "i2c.h" -#include "util.h" - -static const struct battery_info info = { - /* - * Design voltage - * max = 8.4V - * normal = 7.4V - * min = 6.0V - */ - .voltage_max = 8700, - .voltage_normal = 7400, - .voltage_min = 6000, - - /* Pre-charge current: I <= 0.01C */ - .precharge_current = 64, /* mA */ - - /* - * Operational temperature range - * 0 <= T_charge <= 50 deg C - * -20 <= T_discharge <= 60 deg C - */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 50, - .discharging_min_c = -20, - .discharging_max_c = 60, -}; - -const struct battery_info *battery_get_info(void) -{ - return &info; -} - -#ifdef CONFIG_CHARGER_PROFILE_OVERRIDE - -static int fast_charging_allowed = 1; - -/* - * This can override the smart battery's charging profile. To make a change, - * modify one or more of requested_voltage, requested_current, or state. - * Leave everything else unchanged. - * - * Return the next poll period in usec, or zero to use the default (which is - * state dependent). - */ -int charger_profile_override(struct charge_state_data *curr) -{ - /* temp in 0.1 deg C */ - int temp_c; - const struct charger_info *info; - - /* keep track of last temperature range for hysteresis */ - static enum { - TEMP_LOW, - TEMP_NORMAL, - TEMP_HIGH - } temp_range = TEMP_NORMAL, prev_temp_range = TEMP_NORMAL; - - /* charging voltage to use at high temp */ - static int high_temp_charging_voltage; - - /* custom profile phase at normal temp */ - static int normal_temp_phase; - - /* battery voltage and current and previous voltage and current */ - int batt_voltage, batt_current; - static int prev_batt_voltage, prev_batt_current; - - /* - * Determine temperature range: - * Low: Battery is <15C - * Normal: Battery is 15-45C - * High: Battery is >45C - * - * Add 0.2 degrees of hysteresis. - * If temp reading was bad use last range. - */ - if (!(curr->batt.flags & BATT_FLAG_BAD_TEMPERATURE)) { - temp_c = curr->batt.temperature - 2731; - if (temp_c < 149) - temp_range = TEMP_LOW; - else if (temp_c > 151 && temp_c < 449) - temp_range = TEMP_NORMAL; - else if (temp_c > 451) - temp_range = TEMP_HIGH; - } - - /* - * Treat voltage and current as a pair, if either is bad fall back to - * previous reading. - */ - if (curr->batt.flags & - (BATT_FLAG_BAD_VOLTAGE | BATT_FLAG_BAD_CURRENT)) { - batt_voltage = prev_batt_voltage; - batt_current = prev_batt_current; - } else { - batt_voltage = prev_batt_voltage = curr->batt.voltage; - batt_current = prev_batt_current = curr->batt.current; - } - - /* - * If we are not charging or we aren't using fast charging profiles, - * then do not override desired current and voltage and reset some - * fast charging profile static variables. - */ - if (curr->state != ST_CHARGE || !fast_charging_allowed) { - prev_temp_range = TEMP_NORMAL; - normal_temp_phase = 0; - return 0; - } - - /* - * Okay, impose our custom will: - * Normal temp: - * Phase 0: CC at 9515mA @ 8.3V - * CV at 8.3V until current drops to 4759mA - * Phase 1: CC at 4759mA @ 8.7V - * CV at 8.7V - * - * Low temp: - * CC at 2854mA @ 8.7V - * CV at 8.7V - * - * High temp: - * If battery voltage < 8.3V then: - * CC at 6660mA @ 8.3V - * CV at 8.3V (when battery is hot we don't go to fully charged) - * else: - * CV at just above battery voltage which will essentially - * terminate the charge and allow battery to cool. - * Note that if we ever request a voltage below the present battery - * voltage, then we will stop the BQ switching, which will power off - * the INA and we won't be able to charge again until AC is - * disconnected. see crbug.com/p/35491. - */ - switch (temp_range) { - case TEMP_LOW: - curr->requested_current = 2854; - curr->requested_voltage = 8700; - break; - case TEMP_NORMAL: - if (normal_temp_phase == 0) { - curr->requested_current = 9515; - curr->requested_voltage = 8300; - if (batt_current <= 4759 && batt_voltage >= 8200) - normal_temp_phase = 1; - } - if (normal_temp_phase == 1) { - curr->requested_current = 4759; - curr->requested_voltage = 8700; - } - break; - case TEMP_HIGH: - /* - * First time TEMP_HIGH is used, get the closest voltage - * just above the battery voltage. If it is above 8.3V, we - * will use that as the target, otherwise we will use 8.3V. - */ - if (prev_temp_range != TEMP_HIGH) { - info = charger_get_info(); - high_temp_charging_voltage = MAX(8300, - charger_closest_voltage(batt_voltage + - info->voltage_step)); - } - curr->requested_current = 6660; - curr->requested_voltage = high_temp_charging_voltage; - break; - } - prev_temp_range = temp_range; - - return 0; -} - -/* Customs options controllable by host command. */ -#define PARAM_FASTCHARGE (CS_PARAM_CUSTOM_PROFILE_MIN + 0) - -enum ec_status charger_profile_override_get_param(uint32_t param, - uint32_t *value) -{ - if (param == PARAM_FASTCHARGE) { - *value = fast_charging_allowed; - return EC_RES_SUCCESS; - } - return EC_RES_INVALID_PARAM; -} - -enum ec_status charger_profile_override_set_param(uint32_t param, - uint32_t value) -{ - if (param == PARAM_FASTCHARGE) { - fast_charging_allowed = value; - return EC_RES_SUCCESS; - } - return EC_RES_INVALID_PARAM; -} - -#ifdef CONFIG_CMD_FASTCHARGE -static int command_fastcharge(int argc, char **argv) -{ - if (argc > 1 && !parse_bool(argv[1], &fast_charging_allowed)) - return EC_ERROR_PARAM1; - - ccprintf("fastcharge %s\n", fast_charging_allowed ? "on" : "off"); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(fastcharge, command_fastcharge, - "[on|off]", - "Get or set fast charging profile"); -#endif /* CONFIG_CMD_FASTCHARGE */ - -#endif /* CONFIG_CHARGER_PROFILE_OVERRIDE */ - -#ifdef CONFIG_BATTERY_REVIVE_DISCONNECT -/* - * Check if battery is in disconnect state, a state entered by pulling - * BATT_DISCONN_N low, and clear that state if we have external power plugged - * and no battery faults are detected. Disconnect state resembles battery - * shutdown mode, but extra steps must be taken to get the battery out of this - * mode. - */ -enum battery_disconnect_state battery_get_disconnect_state(void) -{ - uint8_t data[6]; - int rv; - /* - * Take note if we find that the battery isn't in disconnect state, - * and always return NOT_DISCONNECTED without probing the battery. - * This assumes the battery will not go to disconnect state during - * runtime. - */ - static int not_disconnected; - - if (not_disconnected) - return BATTERY_NOT_DISCONNECTED; - - if (extpower_is_present()) { - /* Check if battery charging + discharging is disabled. */ - rv = sb_read_mfgacc(PARAM_OPERATION_STATUS, - SB_ALT_MANUFACTURER_ACCESS, data, sizeof(data)); - if (rv) - return BATTERY_DISCONNECT_ERROR; - if (~data[3] & (BATTERY_DISCHARGING_DISABLED | - BATTERY_CHARGING_DISABLED)) { - not_disconnected = 1; - return BATTERY_NOT_DISCONNECTED; - } - - /* - * Battery is neither charging nor discharging. Verify that - * we didn't enter this state due to a safety fault. - */ - rv = sb_read_mfgacc(PARAM_SAFETY_STATUS, - SB_ALT_MANUFACTURER_ACCESS, data, sizeof(data)); - if (rv || data[2] || data[3] || data[4] || data[5]) - return BATTERY_DISCONNECT_ERROR; - else - /* No safety fault -- clear disconnect state. */ - return BATTERY_DISCONNECTED; - } - not_disconnected = 1; - return BATTERY_NOT_DISCONNECTED; -} -#endif /* CONFIG_BATTERY_REVIVE_DISCONNECT */ - -#define PARAM_CUT_OFF_LOW 0x10 -#define PARAM_CUT_OFF_HIGH 0x00 - -int board_cut_off_battery(void) -{ - int rv; - uint8_t buf[3]; - - buf[0] = SB_MANUFACTURER_ACCESS & 0xff; - buf[1] = PARAM_CUT_OFF_LOW; - buf[2] = PARAM_CUT_OFF_HIGH; - - i2c_lock(I2C_PORT_BATTERY, 1); - rv = i2c_xfer_unlocked(I2C_PORT_BATTERY, BATTERY_ADDR_FLAGS, - buf, 3, NULL, 0, I2C_XFER_SINGLE); - rv |= i2c_xfer_unlocked(I2C_PORT_BATTERY, BATTERY_ADDR_FLAGS, - buf, 3, NULL, 0, I2C_XFER_SINGLE); - i2c_lock(I2C_PORT_BATTERY, 0); - - return rv; -} - diff --git a/board/samus/board.c b/board/samus/board.c deleted file mode 100644 index 0a25107960..0000000000 --- a/board/samus/board.c +++ /dev/null @@ -1,500 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* EC for Samus board configuration */ - -#include "als.h" -#include "adc.h" -#include "adc_chip.h" -#include "backlight.h" -#include "battery.h" -#include "capsense.h" -#include "charger.h" -#include "charge_state.h" -#include "common.h" -#include "console.h" -#include "driver/accel_kionix.h" -#include "driver/accel_kxcj9.h" -#include "driver/accelgyro_lsm6ds0.h" -#include "driver/als_isl29035.h" -#include "driver/charger/bq24773.h" -#include "driver/temp_sensor/tmp006.h" -#include "extpower.h" -#include "fan.h" -#include "gesture.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "keyboard_scan.h" -#include "keyboard_8042.h" -#include "keyboard_8042_sharedlib.h" -#include "lid_switch.h" -#include "lightbar.h" -#include "motion_sense.h" -#include "motion_lid.h" -#include "peci.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "registers.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "temp_sensor.h" -#include "temp_sensor_chip.h" -#include "timer.h" -#include "thermal.h" -#include "uart.h" -#include "util.h" - -static void pd_mcu_interrupt(enum gpio_signal signal) -{ - /* Exchange status with PD MCU. */ - host_command_pd_send_status(PD_CHARGE_NO_CHANGE); -} - -#include "gpio_list.h" - -/* power signal list. Must match order of enum power_signal. */ -const struct power_signal_info power_signal_list[] = { - {GPIO_PP1050_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "PGOOD_PP1050"}, - {GPIO_PP1200_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "PGOOD_PP1200"}, - {GPIO_PP1800_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "PGOOD_PP1800"}, - {GPIO_VCORE_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "PGOOD_VCORE"}, - {GPIO_PCH_SLP_S0_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S0_DEASSERTED"}, - {GPIO_PCH_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S3_DEASSERTED"}, - {GPIO_PCH_SLP_S5_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S5_DEASSERTED"}, - {GPIO_PCH_SLP_SUS_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_SUS_DEASSERTED"}, - {GPIO_PCH_SUSWARN_L, POWER_SIGNAL_ACTIVE_HIGH, "SUSWARN_DEASSERTED"}, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - -/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ -const struct adc_t adc_channels[] = { - /* - * EC internal temperature is calculated by - * 273 + (295 - 450 * ADC_VALUE / ADC_READ_MAX) / 2 - * = -225 * ADC_VALUE / ADC_READ_MAX + 420.5 - */ - {"ECTemp", LM4_ADC_SEQ0, -225, ADC_READ_MAX, 420, - LM4_AIN_NONE, 0x0e /* TS0 | IE0 | END0 */, 0, 0}, - /* - * TODO(crosbug.com/p/23827): We don't know what to expect here, but - * it's an analog input that's pulled high. We're using it as a battery - * presence indicator for now. We'll return just 0 - ADC_READ_MAX for - * now. - */ - {"BatteryTemp", LM4_ADC_SEQ2, 1, 1, 0, - LM4_AIN(10), 0x06 /* IE0 | END0 */, LM4_GPIO_B, BIT(4)}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ -const struct pwm_t pwm_channels[] = { - {4, 0}, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/* Physical fans. These are logically separate from pwm_channels. */ -const struct fan_conf fan_conf_0 = { - .flags = FAN_USE_RPM_MODE, - .ch = 2, /* Use MFT id to control fan */ - .pgood_gpio = -1, - .enable_gpio = -1, -}; - -const struct fan_conf fan_conf_1 = { - .flags = FAN_USE_RPM_MODE, - .ch = 3, /* Use MFT id to control fan */ - .pgood_gpio = -1, - .enable_gpio = -1, -}; - -const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1000, - .rpm_start = 1000, - .rpm_max = 6350, -}; - -const struct fan_t fans[] = { - { .conf = &fan_conf_0, .rpm = &fan_rpm_0, }, - { .conf = &fan_conf_1, .rpm = &fan_rpm_0, }, -}; -BUILD_ASSERT(ARRAY_SIZE(fans) == CONFIG_FANS); - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"batt_chg", 0, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, - {"lightbar", 1, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, - {"thermal", 5, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* Charger chips */ -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = I2C_ADDR_CHARGER_FLAGS, - .drv = &bq2477x_drv, - }, -}; - -#define TEMP_U40_REG_ADDR_FLAGS (0x40 | I2C_FLAG_BIG_ENDIAN) -#define TEMP_U41_REG_ADDR_FLAGS (0x44 | I2C_FLAG_BIG_ENDIAN) -#define TEMP_U42_REG_ADDR_FLAGS (0x41 | I2C_FLAG_BIG_ENDIAN) -#define TEMP_U43_REG_ADDR_FLAGS (0x45 | I2C_FLAG_BIG_ENDIAN) -#define TEMP_U115_REG_ADDR_FLAGS (0x42 | I2C_FLAG_BIG_ENDIAN) -#define TEMP_U116_REG_ADDR_FLAGS (0x43 | I2C_FLAG_BIG_ENDIAN) - -#define TEMP_U40_ADDR_FLAGS TMP006_ADDR(I2C_PORT_THERMAL,\ - TEMP_U40_REG_ADDR_FLAGS) -#define TEMP_U41_ADDR_FLAGS TMP006_ADDR(I2C_PORT_THERMAL,\ - TEMP_U41_REG_ADDR_FLAGS) -#define TEMP_U42_ADDR_FLAGS TMP006_ADDR(I2C_PORT_THERMAL,\ - TEMP_U42_REG_ADDR_FLAGS) -#define TEMP_U43_ADDR_FLAGS TMP006_ADDR(I2C_PORT_THERMAL,\ - TEMP_U43_REG_ADDR_FLAGS) -#define TEMP_U115_ADDR_FLAGS TMP006_ADDR(I2C_PORT_THERMAL,\ - TEMP_U115_REG_ADDR_FLAGS) -#define TEMP_U116_ADDR_FLAGS TMP006_ADDR(I2C_PORT_THERMAL,\ - TEMP_U116_REG_ADDR_FLAGS) - -const struct tmp006_t tmp006_sensors[TMP006_COUNT] = { - {"Charger", TEMP_U40_ADDR_FLAGS}, - {"CPU", TEMP_U41_ADDR_FLAGS}, - {"Left C", TEMP_U42_ADDR_FLAGS}, - {"Right C", TEMP_U43_ADDR_FLAGS}, - {"Right D", TEMP_U115_ADDR_FLAGS}, - {"Left D", TEMP_U116_ADDR_FLAGS}, -}; -BUILD_ASSERT(ARRAY_SIZE(tmp006_sensors) == TMP006_COUNT); - -/* Temperature sensors data; must be in same order as enum temp_sensor_id. */ -const struct temp_sensor_t temp_sensors[] = { - {"PECI", TEMP_SENSOR_TYPE_CPU, peci_temp_sensor_get_val, 0}, - {"ECInternal", TEMP_SENSOR_TYPE_BOARD, chip_temp_sensor_get_val, 0}, - {"I2C-Charger-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 0}, - {"I2C-Charger-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 1}, - {"I2C-CPU-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 2}, - {"I2C-CPU-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 3}, - {"I2C-Left C-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 4}, - {"I2C-Left C-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 5}, - {"I2C-Right C-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 6}, - {"I2C-Right C-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 7}, - {"I2C-Right D-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 8}, - {"I2C-Right D-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 9}, - {"I2C-Left D-Die", TEMP_SENSOR_TYPE_BOARD, tmp006_get_val, 10}, - {"I2C-Left D-Object", TEMP_SENSOR_TYPE_CASE, tmp006_get_val, 11}, - {"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_get_battery_temp, 0}, -}; -BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); - -/* ALS instances. Must be in same order as enum als_id. */ -struct als_t als[] = { - {"ISL", isl29035_init, isl29035_read_lux, 5}, -}; -BUILD_ASSERT(ARRAY_SIZE(als) == ALS_COUNT); - - -/* Thermal limits for each temp sensor. All temps are in degrees K. Must be in - * same order as enum temp_sensor_id. To always ignore any temp, use 0. - */ -struct ec_thermal_config thermal_params[] = { - /* {Twarn, Thigh, Thalt}, fan_off, fan_max */ - {{C_TO_K(95), C_TO_K(101), C_TO_K(104)}, - {0, 0, 0}, C_TO_K(55), C_TO_K(90)}, /* PECI */ - {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* EC */ - {{0, 0, 0}, {0, 0, 0}, C_TO_K(41), C_TO_K(55)}, /* Charger die */ - {{0, 0, 0}, {0, 0, 0}, 0, 0}, - {{0, 0, 0}, {0, 0, 0}, C_TO_K(35), C_TO_K(49)}, /* CPU die */ - {{0, 0, 0}, {0, 0, 0}, 0, 0}, - {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* Left C die */ - {{0, 0, 0}, {0, 0, 0}, 0, 0}, - {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* Right C die */ - {{0, 0, 0}, {0, 0, 0}, 0, 0}, - {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* Right D die */ - {{0, 0, 0}, {0, 0, 0}, 0, 0}, - {{0, 0, 0}, {0, 0, 0}, C_TO_K(43), C_TO_K(54)}, /* Left D die */ - {{0, 0, 0}, {0, 0, 0}, 0, 0}, - {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* Battery */ -}; -BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); - -__override struct keyboard_scan_config keyscan_config = { - .output_settle_us = 40, - .debounce_down_us = 6 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 1500, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = SECOND, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xf6, 0x55, 0xfa, 0xc8 /* full set */ - }, -}; - -/* Initialize board. */ -static void board_init(void) -{ - gpio_enable_interrupt(GPIO_PD_MCU_INT); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -#ifdef CONFIG_BATTERY_PRESENT_CUSTOM -/** - * Physical check of battery presence. - */ -enum battery_present battery_is_present(void) -{ - /* - * This pin has a pullup, so if it's not completely pegged there's - * something attached. Probably a battery. - */ - int analog_val = adc_read_channel(ADC_CH_BAT_TEMP); - return analog_val < (9 * ADC_READ_MAX / 10) ? BP_YES : BP_NO; -} -#endif - -static int discharging_on_ac; - -/** - * Discharge battery when on AC power for factory test. - */ -int board_discharge_on_ac(int enable) -{ - int rv = charger_discharge_on_ac(enable); - - if (rv == EC_SUCCESS) - discharging_on_ac = enable; - - return rv; -} - -/** - * Check if we are discharging while connected to AC - */ -int board_is_discharging_on_ac(void) -{ - return discharging_on_ac; -} - -/** - * Reset PD MCU - */ -void board_reset_pd_mcu(void) -{ - gpio_set_level(GPIO_USB_MCU_RST, 1); - usleep(100); - gpio_set_level(GPIO_USB_MCU_RST, 0); -} - -void sensor_board_proc_double_tap(void) -{ - lightbar_sequence(LIGHTBAR_TAP); -} - -const int usb_port_enable[CONFIG_USB_PORT_POWER_SMART_PORT_COUNT] = { - GPIO_USB1_ENABLE, - GPIO_USB2_ENABLE, -}; - -/* Base Sensor mutex */ -static struct mutex g_base_mutex; - -/* Lid Sensor mutex */ -static struct mutex g_lid_mutex; - -/* kxcj9 local/private data */ -struct kionix_accel_data g_kxcj9_data; - -/* lsm6ds0 local sensor data (per-sensor) */ -struct lsm6ds0_data g_saved_data[2]; - -/* Four Motion sensors */ -/* Matrix to rotate accelrator into standard reference frame */ -const mat33_fp_t base_standard_ref = { - {FLOAT_TO_FP(-1), 0, 0}, - { 0, FLOAT_TO_FP(-1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -const mat33_fp_t lid_standard_ref = { - { 0, FLOAT_TO_FP(1), 0}, - {FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -struct motion_sensor_t motion_sensors[] = { - /* - * Note: lsm6ds0: supports accelerometer and gyro sensor - * Requirement: accelerometer sensor must init before gyro sensor - * DO NOT change the order of the following table. - */ - {.name = "Base", - .active_mask = SENSOR_ACTIVE_S0_S3_S5, - .chip = MOTIONSENSE_CHIP_LSM6DS0, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &lsm6ds0_drv, - .mutex = &g_base_mutex, - .drv_data = &g_saved_data[0], - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = LSM6DS0_ADDR1_FLAGS, - .rot_standard_ref = &base_standard_ref, - .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ - .min_frequency = LSM6DS0_ACCEL_MIN_FREQ, - .max_frequency = LSM6DS0_ACCEL_MAX_FREQ, - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 119000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - /* Used for double tap */ - [SENSOR_CONFIG_EC_S3] = { - .odr = TAP_ODR_LSM6DS0 | ROUND_UP_FLAG, - .ec_rate = CONFIG_GESTURE_SAMPLING_INTERVAL_MS * MSEC, - }, - [SENSOR_CONFIG_EC_S5] = { - .odr = TAP_ODR_LSM6DS0 | ROUND_UP_FLAG, - .ec_rate = CONFIG_GESTURE_SAMPLING_INTERVAL_MS * MSEC, - }, - }, - }, - - {.name = "Lid", - .active_mask = SENSOR_ACTIVE_S0, - .chip = MOTIONSENSE_CHIP_KXCJ9, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &kionix_accel_drv, - .mutex = &g_lid_mutex, - .drv_data = &g_kxcj9_data, - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = KXCJ9_ADDR0_FLAGS, - .rot_standard_ref = &lid_standard_ref, - .default_range = 2, /* g, to support lid angle calculation. */ - .min_frequency = KXCJ9_ACCEL_MIN_FREQ, - .max_frequency = KXCJ9_ACCEL_MAX_FREQ, - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 100000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - }, - }, - - {.name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3_S5, - .chip = MOTIONSENSE_CHIP_LSM6DS0, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &lsm6ds0_drv, - .mutex = &g_base_mutex, - .drv_data = &g_saved_data[1], - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = LSM6DS0_ADDR1_FLAGS, - .rot_standard_ref = NULL, - .default_range = 2000, /* dps, enough for laptop. */ - .min_frequency = LSM6DS0_GYRO_MIN_FREQ, - .max_frequency = LSM6DS0_GYRO_MAX_FREQ, - }, - -}; -const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - -#ifdef CONFIG_LOW_POWER_IDLE -void jtag_interrupt(enum gpio_signal signal) -{ - /* - * This interrupt is the first sign someone is trying to use - * the JTAG. Disable slow speed sleep so that the JTAG action - * can take place. - */ - disable_sleep(SLEEP_MASK_JTAG); - - /* - * Once we get this interrupt, disable it from occurring again - * to avoid repeated interrupts when debugging via JTAG. - */ - gpio_disable_interrupt(GPIO_JTAG_TCK); -} -#endif /* CONFIG_LOW_POWER_IDLE */ - - -enum ec_error_list keyboard_scancode_callback(uint16_t *make_code, - int8_t pressed) -{ - const uint16_t k = *make_code; - static uint8_t s; - static const uint16_t a[] = { - SCANCODE_UP, SCANCODE_UP, SCANCODE_DOWN, SCANCODE_DOWN, - SCANCODE_LEFT, SCANCODE_RIGHT, SCANCODE_LEFT, SCANCODE_RIGHT, - SCANCODE_B, SCANCODE_A}; - - if (!pressed) - return EC_SUCCESS; - - /* Lightbar demo mode: keyboard can fake the battery state */ - switch (k) { - case SCANCODE_UP: - demo_battery_level(1); - break; - case SCANCODE_DOWN: - demo_battery_level(-1); - break; - case SCANCODE_LEFT: - demo_is_charging(0); - break; - case SCANCODE_RIGHT: - demo_is_charging(1); - break; - case SCANCODE_F6: /* dim */ - demo_brightness(-1); - break; - case SCANCODE_F7: /* bright */ - demo_brightness(1); - break; - case SCANCODE_T: - demo_tap(); - break; - } - - if (k == a[s]) - s++; - else if (k != a[0]) - s = 0; - else if (s != 2) - s = 1; - - if (s == ARRAY_SIZE(a)) { - s = 0; - lightbar_sequence(LIGHTBAR_KONAMI); - } - return EC_SUCCESS; -} - -/* - * Use to define going in to hibernate early if low on battery. - * HIBERNATE_BATT_PCT specifies the low battery threshold - * for going into hibernate early, and HIBERNATE_BATT_SEC defines - * the minimum amount of time to stay in G3 before checking for low - * battery hibernate. - */ -#define HIBERNATE_BATT_PCT 10 -#define HIBERNATE_BATT_SEC (3600 * 24) - -__override enum critical_shutdown board_system_is_idle( - uint64_t last_shutdown_time, uint64_t *target, uint64_t now) -{ - if (charge_get_percent() <= HIBERNATE_BATT_PCT) { - uint64_t t = last_shutdown_time + HIBERNATE_BATT_SEC * SEC_UL; - *target = MIN(*target, t); - } - return now > *target ? - CRITICAL_SHUTDOWN_HIBERNATE : CRITICAL_SHUTDOWN_IGNORE; -} diff --git a/board/samus/board.h b/board/samus/board.h deleted file mode 100644 index ed79e9876f..0000000000 --- a/board/samus/board.h +++ /dev/null @@ -1,231 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Configuration for Samus mainboard */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Debug features */ -#define CONFIG_CONSOLE_CMDHELP -#define CONFIG_TASK_PROFILING - -#undef HEY_USE_BUILTIN_CLKRUN - -/* Optional features */ -#define CONFIG_ACCELGYRO_LSM6DS0 -#define CONFIG_ACCEL_KXCJ9 -#define CONFIG_ACCEL_STD_REF_FRAME_OLD -#define CONFIG_ALS_ISL29035 -#define CONFIG_BOARD_VERSION_GPIO -#define CONFIG_CMD_ACCELS -#define CONFIG_CMD_ACCEL_INFO -#undef CONFIG_BATTERY_CRITICAL_SHUTDOWN_TIMEOUT -#define CONFIG_BATTERY_CRITICAL_SHUTDOWN_TIMEOUT 60 -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_POWER_COMMON -#define CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5 -#define CONFIG_CHIPSET_CAN_THROTTLE -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER - -#define CONFIG_KEYBOARD_PROTOCOL_8042 -#define CONFIG_KEYBOARD_COL2_INVERTED -#define CONFIG_KEYBOARD_SCANCODE_CALLBACK -#define CONFIG_LID_ANGLE -#define CONFIG_LIGHTBAR_POWER_RAILS -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_POWER_BUTTON -#define CONFIG_POWER_BUTTON_X86 -/* Note: not CONFIG_BACKLIGHT_LID. It's handled specially for Samus. */ -#define CONFIG_BACKLIGHT_REQ_GPIO GPIO_PCH_BL_EN -/* TODO(crosbug.com/p/29467): remove this workaround when possible. */ -#define CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD -#define CONFIG_CHARGER_PROFILE_OVERRIDE -#define CONFIG_BATTERY_SMART -#define CONFIG_BATTERY_REVIVE_DISCONNECT -#define CONFIG_CHARGER -#define CONFIG_CHARGER_BQ24773 -#define CONFIG_CHARGER_ILIM_PIN_DISABLED -#define CONFIG_CHARGER_SENSE_RESISTOR 5 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 -#define CONFIG_CHARGER_INPUT_CURRENT 320 -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM -#undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1 -#define CONFIG_FANS 2 -#define CONFIG_FAN_UPDATE_PERIOD 10 -#define CONFIG_FPU -#define CONFIG_GESTURE_DETECTION -/* SW gesture detection */ -#define CONFIG_GESTURE_DETECTION_MASK 0 -#define CONFIG_GESTURE_SW_DETECTION -#define CONFIG_GESTURE_SAMPLING_INTERVAL_MS 5 -#undef CONFIG_HIBERNATE_DELAY_SEC -#define CONFIG_HIBERNATE_DELAY_SEC (3600 * 24 * 7) -#define CONFIG_HOSTCMD_PD -#define CONFIG_HOSTCMD_PD_CHG_CTRL -#define CONFIG_HOSTCMD_PD_PANIC -#define CONFIG_PECI_TJMAX 105 -#define CONFIG_PWM -#define CONFIG_PWM_KBLIGHT -#define CONFIG_TEMP_SENSOR -#define CONFIG_TEMP_SENSOR_TMP006 -#define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_PP3300_DSW_GATED_EN -#define CONFIG_THROTTLE_AP -#define CONFIG_UART_HOST 2 -#define CONFIG_USB_PORT_POWER_SMART -#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_CDP -#define CONFIG_USB_PORT_POWER_SMART_INVERTED -#define GPIO_USB1_ILIM_SEL GPIO_USB1_ILIM_SEL_L -#define GPIO_USB2_ILIM_SEL GPIO_USB2_ILIM_SEL_L -#define CONFIG_VBOOT_HASH -#define CONFIG_WIRELESS -#define CONFIG_WIRELESS_SUSPEND \ - (EC_WIRELESS_SWITCH_WLAN | EC_WIRELESS_SWITCH_WLAN_POWER) -/* Do we want EC_WIRELESS_SWITCH_WWAN as well? */ - -#ifndef __ASSEMBLER__ - -/* I2C ports */ -#define I2C_PORT_BACKLIGHT 0 -#define I2C_PORT_BATTERY 0 -#define I2C_PORT_CHARGER 0 -#define I2C_PORT_PD_MCU 0 -#define I2C_PORT_ALS 1 -#define I2C_PORT_ACCEL 1 -#define I2C_PORT_LIGHTBAR 1 -#define I2C_PORT_THERMAL 5 - -/* 13x8 keyboard scanner uses an entire GPIO bank for row inputs */ -#define KB_SCAN_ROW_IRQ LM4_IRQ_GPIOK -#define KB_SCAN_ROW_GPIO LM4_GPIO_K - -/* Host connects to keyboard controller module via LPC */ -#define HOST_KB_BUS_LPC - -/* USB ports managed by the EC */ -#define USB_PORT_COUNT 2 - -#include "gpio_signal.h" - -/* x86 signal definitions */ -enum x86_signal { - X86_PGOOD_PP1050 = 0, - X86_PGOOD_PP1200, - X86_PGOOD_PP1800, - X86_PGOOD_VCORE, - - X86_SLP_S0_DEASSERTED, - X86_SLP_S3_DEASSERTED, - X86_SLP_S5_DEASSERTED, - X86_SLP_SUS_DEASSERTED, - X86_SUSWARN_DEASSERTED, - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT -}; - -enum adc_channel { - /* EC internal die temperature in degrees K. */ - ADC_CH_EC_TEMP = 0, - /* BAT_TEMP */ - ADC_CH_BAT_TEMP, - - ADC_CH_COUNT -}; - -enum pwm_channel { - PWM_CH_KBLIGHT, - - /* Number of PWM channels */ - PWM_CH_COUNT -}; - -enum temp_sensor_id { - /* CPU die temperature via PECI */ - TEMP_SENSOR_CPU_PECI, - /* EC internal temperature sensor */ - TEMP_SENSOR_EC_INTERNAL, - /* TMP006 U40, die/object temperature near battery charger */ - TEMP_SENSOR_I2C_U40_DIE, - TEMP_SENSOR_I2C_U40_OBJECT, - /* TMP006 U41, die/object temperature near CPU */ - TEMP_SENSOR_I2C_U41_DIE, - TEMP_SENSOR_I2C_U41_OBJECT, - /* TMP006 U42, die/object temperature left side of C-case */ - TEMP_SENSOR_I2C_U42_DIE, - TEMP_SENSOR_I2C_U42_OBJECT, - /* TMP006 U43, die/object temperature right side of C-case */ - TEMP_SENSOR_I2C_U43_DIE, - TEMP_SENSOR_I2C_U43_OBJECT, - /* TMP006 U115, die/object temperature right side of D-case */ - TEMP_SENSOR_I2C_U115_DIE, - TEMP_SENSOR_I2C_U115_OBJECT, - /* TMP006 U116, die/object temperature left side of D-case */ - TEMP_SENSOR_I2C_U116_DIE, - TEMP_SENSOR_I2C_U116_OBJECT, - - /* Battery temperature sensor */ - TEMP_SENSOR_BATTERY, - - TEMP_SENSOR_COUNT -}; - -enum sensor_id { - BASE_ACCEL, - LID_ACCEL, - BASE_GYRO, - SENSOR_COUNT, -}; - -/* The number of TMP006 sensor chips on the board. */ -#define TMP006_COUNT 6 - -/* Light sensors attached to the EC. */ -enum als_id { - ALS_ISL29035 = 0, - - ALS_COUNT, -}; - -/* Wireless signals */ -#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L -#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_WLAN_EN - -/* Discharge battery when on AC power for factory test. */ -int board_is_discharging_on_ac(void); - -/* Reset PD MCU */ -void board_reset_pd_mcu(void); - -/* Backboost detected interrupt */ -void bkboost_det_interrupt(enum gpio_signal signal); - -/* Interrupt handler for JTAG clock */ -void jtag_interrupt(enum gpio_signal signal); - -/* Bit masks for turning on PP5000 rail in G3 */ -#define PP5000_IN_G3_AC BIT(0) -#define PP5000_IN_G3_LIGHTBAR BIT(1) - -/* Enable/disable PP5000 rail mask in G3 */ -void set_pp5000_in_g3(int mask, int enable); - -/* Define for sensor tasks */ -#define CONFIG_GESTURE_SENSOR_DOUBLE_TAP -#define CONFIG_GESTURE_TAP_OUTER_WINDOW_T 200 -#define CONFIG_GESTURE_TAP_INNER_WINDOW_T 30 -#define CONFIG_GESTURE_TAP_MIN_INTERSTICE_T 120 -#define CONFIG_GESTURE_TAP_MAX_INTERSTICE_T 500 -#define CONFIG_GESTURE_TAP_SENSOR 0 - -#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL -#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/samus/build.mk b/board/samus/build.mk deleted file mode 100644 index 183605fc62..0000000000 --- a/board/samus/build.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -*- makefile -*- -# Copyright 2013 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -# the IC is TI Stellaris LM4 -CHIP:=lm4 - -# Samus has board-specific chipset code, and the tests don't -# compile with it. Disable them for now. -test-list-y= - -board-y=battery.o board.o power_sequence.o panel.o extpower.o diff --git a/board/samus/ec.tasklist b/board/samus/ec.tasklist deleted file mode 100644 index 345892a64b..0000000000 --- a/board/samus/ec.tasklist +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * See CONFIG_TASK_LIST in config.h for details. - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(ALS, als_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(LIGHTBAR, lightbar_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(EXTPOWER, extpower_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(MOTIONSENSE, motion_sense_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) diff --git a/board/samus/extpower.c b/board/samus/extpower.c deleted file mode 100644 index c6a7424fca..0000000000 --- a/board/samus/extpower.c +++ /dev/null @@ -1,433 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Pure GPIO-based external power detection, buffered to PCH. - * Drive high in S5-S0 when AC_PRESENT is high, otherwise drive low. - */ - -#include "bq24773.h" -#include "charge_state.h" -#include "charger.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "system.h" -#include "task.h" -#include "util.h" - -/* Console output macros */ -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) - -/* Max number of attempts to enable/disable NVDC charger */ -#define CHARGER_MODE_ATTEMPTS 3 - -/* Backboost has been detected */ -static int bkboost_detected; - -/* Charging is disabled */ -static int charge_is_disabled; - -/* Extpower task has been initialized */ -static int extpower_task_initialized; - -/* - * Charge circuit occasionally gets wedged and doesn't charge. - * This variable keeps track of the state of the circuit. - */ -static enum { - CHARGE_CIRCUIT_OK, - CHARGE_CIRCUIT_WEDGED, -} charge_circuit_state = CHARGE_CIRCUIT_OK; - -int extpower_is_present(void) -{ - return gpio_get_level(GPIO_AC_PRESENT); -} - -static void extpower_buffer_to_pch(void) -{ - if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) { - /* Drive low in G3 state */ - gpio_set_level(GPIO_PCH_ACOK, 0); - } else { - /* Buffer from extpower in S5+ (where 3.3DSW enabled) */ - gpio_set_level(GPIO_PCH_ACOK, extpower_is_present()); - } -} -DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, extpower_buffer_to_pch, HOOK_PRIO_DEFAULT); - -static void extpower_shutdown(void) -{ - /* Drive ACOK buffer to PCH low when shutting down */ - gpio_set_level(GPIO_PCH_ACOK, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, extpower_shutdown, HOOK_PRIO_DEFAULT); - -void extpower_interrupt(enum gpio_signal signal) -{ - /* Trigger notification of external power change */ - extpower_buffer_to_pch(); - - /* Wake extpower task only if task has been initialized */ - if (extpower_task_initialized) - task_wake(TASK_ID_EXTPOWER); -} - -static void extpower_init(void) -{ - extpower_buffer_to_pch(); - - /* Enable interrupts, now that we've initialized */ - gpio_enable_interrupt(GPIO_AC_PRESENT); -} -DECLARE_HOOK(HOOK_INIT, extpower_init, HOOK_PRIO_DEFAULT); - -/* - * Save power in S3/S5/G3 by disabling charging when the battery is - * full. Restore charging when battery is not full anymore. This saves - * power because our input AC path is inefficient. - */ - -static void check_charging_cutoff(void) -{ - /* If battery is full disable charging */ - if (charge_get_percent() == 100) { - charge_is_disabled = 1; - host_command_pd_send_status(PD_CHARGE_NONE); - } -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, check_charging_cutoff, HOOK_PRIO_DEFAULT); - -static void cancel_charging_cutoff(void) -{ - /* If charging is disabled, enable it */ - if (charge_is_disabled) { - charge_is_disabled = 0; - host_command_pd_send_status(PD_CHARGE_5V); - } -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, cancel_charging_cutoff, HOOK_PRIO_DEFAULT); - -static void batt_soc_change(void) -{ - /* If in S0, leave charging alone */ - if (chipset_in_state(CHIPSET_STATE_ON)) { - host_command_pd_send_status(PD_CHARGE_NO_CHANGE); - return; - } - - /* Check to disable or enable charging based on batt state of charge */ - if (!charge_is_disabled && charge_get_percent() == 100) { - host_command_pd_send_status(PD_CHARGE_NONE); - charge_is_disabled = 1; - } else if (charge_is_disabled && charge_get_percent() < 100) { - charge_is_disabled = 0; - host_command_pd_send_status(PD_CHARGE_5V); - } else { - /* Leave charging alone, but update battery SOC */ - host_command_pd_send_status(PD_CHARGE_NO_CHANGE); - } -} -DECLARE_HOOK(HOOK_BATTERY_SOC_CHANGE, batt_soc_change, HOOK_PRIO_DEFAULT); - -/** - * Enable/disable NVDC charger to control AC to system and battery. - */ -static void charger_disable(int disable) -{ - int i, rv; - - for (i = 0; i < CHARGER_MODE_ATTEMPTS; i++) { - rv = charger_discharge_on_ac(disable); - if (rv == EC_SUCCESS) - return; - } - - CPRINTS("Setting learn mode %d failed!", disable); -} - -static void allow_max_request(void) -{ - int prochot_status; - if (charge_circuit_state == CHARGE_CIRCUIT_WEDGED) { - /* Read PROCHOT status register to clear it */ - i2c_read8(I2C_PORT_CHARGER, BQ24773_ADDR_FLAGS, - BQ24773_PROCHOT_STATUS, &prochot_status); - charge_circuit_state = CHARGE_CIRCUIT_OK; - } - host_command_pd_send_status(PD_CHARGE_MAX); -} -DECLARE_DEFERRED(allow_max_request); - -static void allow_min_charging(void) -{ - if (!charge_is_disabled && charge_circuit_state == CHARGE_CIRCUIT_OK) - host_command_pd_send_status(PD_CHARGE_5V); -} -DECLARE_DEFERRED(allow_min_charging); - -static void extpower_board_hacks(int extpower, int extpower_prev) -{ - /* Cancel deferred attempt to enable max charge request */ - hook_call_deferred(&allow_max_request_data, -1); - - /* - * When AC is detected, delay briefly before allowing PD - * to negotiate up to the max voltage to give charge circuit - * time to settle down. When AC goes away, disable charging - * for a brief time, allowing charge state machine time to - * see AC has gone away, and then set PD to only allow - * 5V charging for the next time AC is connected. - * - * Use NVDC charger learn mode (charger_disable()) when AC - * is not present to avoid backboosting when AC is plugged in. - * - * When in G3, PP5000 needs to be enabled to accurately sense - * CC voltage when AC is attached. When AC is disconnceted - * it needs to be off to save power. - */ - if (extpower && !extpower_prev) { - /* AC connected */ - charger_disable(0); - hook_call_deferred(&allow_max_request_data, 500*MSEC); - set_pp5000_in_g3(PP5000_IN_G3_AC, 1); - } else if (extpower && extpower_prev) { - /* - * Glitch on AC_PRESENT, attempt to recover from - * backboost - */ - host_command_pd_send_status(PD_CHARGE_NONE); - } else { - /* AC disconnected */ - if (!charge_is_disabled && - charge_circuit_state == CHARGE_CIRCUIT_OK) - host_command_pd_send_status(PD_CHARGE_NONE); - - charger_disable(1); - - hook_call_deferred(&allow_min_charging_data, 100*MSEC); - set_pp5000_in_g3(PP5000_IN_G3_AC, 0); - } - extpower_prev = extpower; -} - -/* Return boostin_voltage or negative if error */ -static int get_boostin_voltage(void) -{ - /* Static structs to save stack space */ - static struct ec_response_usb_pd_power_info pd_power_ret; - static struct ec_params_usb_pd_power_info pd_power_args; - int ret; - int err; - - /* Boost-in voltage is maximum of voltage now on each port */ - pd_power_args.port = 0; - err = pd_host_command(EC_CMD_USB_PD_POWER_INFO, 0, - &pd_power_args, - sizeof(struct ec_params_usb_pd_power_info), - &pd_power_ret, - sizeof(struct ec_response_usb_pd_power_info)); - if (err < 0) - return err; - ret = pd_power_ret.meas.voltage_now; - - pd_power_args.port = 1; - err = pd_host_command(EC_CMD_USB_PD_POWER_INFO, 0, - &pd_power_args, - sizeof(struct ec_params_usb_pd_power_info), - &pd_power_ret, - sizeof(struct ec_response_usb_pd_power_info)); - if (err < 0) - return err; - - /* Get max of two measuremente */ - if (pd_power_ret.meas.voltage_now > ret) - ret = pd_power_ret.meas.voltage_now; - - return ret; -} - -/* - * Send command to PD to write a custom persistent log entry indicating that - * charging was wedged. Returns pd_host_command success status. - */ -static int log_charge_wedged(void) -{ - static struct ec_params_pd_write_log_entry log_args; - - log_args.type = PD_EVENT_MCU_BOARD_CUSTOM; - log_args.port = 0; - - return pd_host_command(EC_CMD_PD_WRITE_LOG_ENTRY, 0, - &log_args, - sizeof(struct ec_params_pd_write_log_entry), - NULL, 0); -} - -/* Time interval between checking if charge circuit is wedged */ -#define CHARGE_WEDGE_CHECK_INTERVAL (2*SECOND) - -/* - * Number of iterations through check_charge_wedged() with charging stalled - * before attempting unwedge. - */ -#define CHARGE_STALLED_COUNT 5 -/* - * Number of iterations through check_charge_wedged() with charging stalled - * after we already just tried unwedging the circuit, before we try again. - */ -#define CHARGE_STALLED_REPEATEDLY_COUNT 60 - -/* - * Minimum number of iterations through check_charge_wedged() between - * unwedge attempts. - */ -#define MIN_COUNTS_BETWEEN_UNWEDGES 3 - -static void check_charge_wedged(void) -{ - int rv, prochot_status, batt_discharging_on_ac, boostin_voltage = 0; - static int counts_since_wedged; - static int charge_stalled_count = CHARGE_STALLED_COUNT; - uint8_t *batt_flags = host_get_memmap(EC_MEMMAP_BATT_FLAG); - - if (charge_circuit_state == CHARGE_CIRCUIT_OK) { - /* Check PROCHOT warning */ - rv = i2c_read8(I2C_PORT_CHARGER, BQ24773_ADDR_FLAGS, - BQ24773_PROCHOT_STATUS, &prochot_status); - if (rv) - prochot_status = 0; - - batt_discharging_on_ac = - (*batt_flags & EC_BATT_FLAG_AC_PRESENT) && - (*batt_flags & EC_BATT_FLAG_DISCHARGING); - - /* - * If PROCHOT is set or we are discharging on AC, then we - * need to know boostin_voltage. - */ - if (prochot_status || batt_discharging_on_ac) - boostin_voltage = get_boostin_voltage(); - - /* - * If AC is present, and battery is discharging, and - * boostin voltage is above 5V, then we might be wedged. - */ - if (batt_discharging_on_ac) { - if (boostin_voltage > 6000) - charge_stalled_count--; - else if (boostin_voltage >= 0) - charge_stalled_count = CHARGE_STALLED_COUNT; - /* If boostin_voltage < 0, don't change stalled count */ - } else { - charge_stalled_count = CHARGE_STALLED_COUNT; - } - - /* - * If we were recently wedged, then give ourselves a free pass - * here. This gives an opportunity for reading the PROCHOT - * status to clear it if the error has gone away. - */ - if (counts_since_wedged < MIN_COUNTS_BETWEEN_UNWEDGES) - counts_since_wedged++; - - /* - * If PROCHOT is asserted AND boost_in voltage is above 5V, - * then charge circuit is wedged. If charging has been stalled - * long enough, then also consider the circuit wedged. - * - * To unwedge the charge circuit turn on learn mode and notify - * PD to disable charging on all ports. - * Note: learn mode is critical here because when in this state - * backboosting causes >20V on boostin even after PD disables - * CHARGE_EN lines. - */ - if ((prochot_status && boostin_voltage > 6000 && - counts_since_wedged >= MIN_COUNTS_BETWEEN_UNWEDGES) || - charge_stalled_count <= 0) { - counts_since_wedged = 0; - host_command_pd_send_status(PD_CHARGE_NONE); - charger_disable(1); - charge_circuit_state = CHARGE_CIRCUIT_WEDGED; - log_charge_wedged(); - CPRINTS("Charge wedged! PROCHOT %02x, Stalled: %d", - prochot_status, charge_stalled_count); - - /* - * If this doesn't clear the problem, then start - * the stall counter higher so that we don't retry - * unwedging for a while. Note, if we do start charging - * properly, then stall counter will be set to - * default, so that we will trigger faster the first - * time it stalls out. - */ - charge_stalled_count = CHARGE_STALLED_REPEATEDLY_COUNT; - } - } else { - /* - * Charge circuit is wedged and we already disabled charging, - * Now start to recover from wedged state by allowing 5V. - */ - host_command_pd_send_status(PD_CHARGE_5V); - } -} - -/** - * Task to handle external power change - */ -void extpower_task(void) -{ - int extpower = extpower_is_present(); - int extpower_prev = 0; - - extpower_board_hacks(extpower, extpower_prev); - extpower_prev = extpower; - extpower_task_initialized = 1; - - /* Enable backboost detection interrupt */ - gpio_enable_interrupt(GPIO_BKBOOST_DET); - - while (1) { - if (task_wait_event(CHARGE_WEDGE_CHECK_INTERVAL) == - TASK_EVENT_TIMER) { - /* - * If we are NOT purposely discharging on AC, then - * periodically check if charge circuit is wedged. - */ - if (!board_is_discharging_on_ac()) - check_charge_wedged(); - } else { - /* Must have received power change interrupt */ - extpower = extpower_is_present(); - - /* Various board hacks to run on extpower change */ - extpower_board_hacks(extpower, extpower_prev); - extpower_prev = extpower; - - extpower_handle_update(extpower); - } - } -} - -void bkboost_det_interrupt(enum gpio_signal signal) -{ - /* Backboost has been detected, save it, and disable interrupt */ - bkboost_detected = 1; - gpio_disable_interrupt(GPIO_BKBOOST_DET); -} - -static int command_backboost_det(int argc, char **argv) -{ - ccprintf("Backboost detected: %d\n", bkboost_detected); - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(bkboost, command_backboost_det, NULL, - "Read backboost detection"); diff --git a/board/samus/gpio.inc b/board/samus/gpio.inc deleted file mode 100644 index 1b49c58bd0..0000000000 --- a/board/samus/gpio.inc +++ /dev/null @@ -1,122 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -GPIO_INT(POWER_BUTTON_L, PIN(A, 2), GPIO_INT_BOTH_DSLEEP, power_button_interrupt) /* Power button */ -GPIO_INT(LID_OPEN, PIN(A, 3), GPIO_INT_BOTH_DSLEEP, lid_interrupt) /* Lid switch */ -GPIO_INT(AC_PRESENT, PIN(H, 3), GPIO_INT_BOTH_DSLEEP, extpower_interrupt) /* AC power present */ -GPIO_INT(PCH_SLP_S0_L, PIN(G, 6), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S0# signal from PCH */ -GPIO_INT(PCH_SLP_S3_L, PIN(G, 7), GPIO_INT_BOTH_DSLEEP, power_signal_interrupt) /* SLP_S3# signal from PCH */ -GPIO_INT(PCH_SLP_S5_L, PIN(H, 1), GPIO_INT_BOTH_DSLEEP, power_signal_interrupt) /* SLP_S5# signal from PCH */ -GPIO_INT(PCH_SLP_SUS_L, PIN(G, 3), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_SUS# signal from PCH */ -GPIO_INT(PCH_SUSWARN_L, PIN(G, 2), GPIO_INT_BOTH, power_signal_interrupt) /* SUSWARN# signal from PCH */ -GPIO_INT(PP1050_PGOOD, PIN(H, 4), GPIO_INT_BOTH, power_signal_interrupt) /* Power good on 1.05V */ -GPIO_INT(PP1200_PGOOD, PIN(H, 6), GPIO_INT_BOTH, power_signal_interrupt) /* Power good on 1.2V (DRAM) */ -GPIO_INT(PP1800_PGOOD, PIN(L, 7), GPIO_INT_BOTH, power_signal_interrupt) /* Power good on 1.8V (DRAM) */ -GPIO_INT(VCORE_PGOOD, PIN(C, 6), GPIO_INT_BOTH, power_signal_interrupt) /* Power good on core VR */ -GPIO_INT(WP_L, PIN(A, 4), GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ -GPIO_INT(PCH_BL_EN, PIN(M, 3), GPIO_INT_RISING, backlight_interrupt) /* PCH backlight input */ -GPIO_INT(JTAG_TCK, PIN(C, 0), GPIO_DEFAULT, jtag_interrupt) /* JTAG clock input */ -GPIO_INT(UART0_RX, PIN(A, 0), GPIO_PULL_UP | GPIO_INT_BOTH_DSLEEP, uart_deepsleep_interrupt) /* UART0 RX input */ -GPIO_INT(BKBOOST_DET, PIN(B, 5), GPIO_INT_RISING, bkboost_det_interrupt) /* Backboost detect */ - -/* Interrupt signal from PD MCU, external pull-down */ -GPIO_INT(PD_MCU_INT, PIN(J, 5), GPIO_INT_RISING | GPIO_INT_DSLEEP, pd_mcu_interrupt) - -/* - * Combined accelerometer input. This will become an interrupt, once we have - * support for it. - */ -GPIO(ACCEL_INT, PIN(F, 7), GPIO_INPUT) - -/* - * Ambient Light Sensor input. This could become an interrupt once supported. - */ -GPIO(ALS_INT_L, PIN(N, 0), GPIO_INPUT) - -/* Other inputs */ -GPIO(BOARD_VERSION1, PIN(Q, 7), GPIO_INPUT) /* Board version stuffing resistor 1 */ -GPIO(BOARD_VERSION2, PIN(Q, 6), GPIO_INPUT) /* Board version stuffing resistor 2 */ -GPIO(BOARD_VERSION3, PIN(Q, 5), GPIO_INPUT) /* Board version stuffing resistor 3 */ -GPIO(USB1_OC_L, PIN(E, 7), GPIO_INPUT) /* USB port overcurrent warning */ -GPIO(USB1_STATUS_L, PIN(E, 6), GPIO_INPUT) /* USB charger port 1 status output */ -GPIO(USB2_OC_L, PIN(E, 0), GPIO_INPUT) /* USB port overcurrent warning */ -GPIO(USB2_STATUS_L, PIN(D, 7), GPIO_INPUT) /* USB charger port 2 status output */ -GPIO(PD_IN_RW, PIN(A, 5), GPIO_INPUT) /* PD is in RW */ -GPIO(PCH_HDA_SDO_L, PIN(G, 1), GPIO_INPUT) /* HDA_SDO signal to PCH to disable ME */ - -/* Outputs; all unasserted by default except for reset signals */ -GPIO(CPU_PROCHOT, PIN(B, 1), GPIO_OUT_LOW) /* Force CPU to think it's overheated */ -GPIO(PP1200_EN, PIN(H, 5), GPIO_OUT_LOW) /* Enable 1.20V supply */ -GPIO(PP3300_DSW_EN, PIN(F, 6), GPIO_OUT_LOW) /* Enable 3.3V DSW rail */ -GPIO(PP3300_DSW_GATED_EN, PIN(J, 3), GPIO_OUT_LOW) /* Enable 3.3V Gated DSW and core VDD */ -GPIO(PP3300_LTE_EN, PIN(D, 2), GPIO_OUT_LOW) /* Enable LTE radio */ -GPIO(PP3300_WLAN_EN, PIN(J, 0), GPIO_OUT_LOW) /* Enable WiFi power */ -GPIO(PP1050_EN, PIN(C, 7), GPIO_OUT_LOW) /* Enable 1.05V regulator */ -GPIO(PP5000_USB_EN, PIN(C, 5), GPIO_OUT_LOW) /* Enable USB power */ -GPIO(PP5000_EN, PIN(H, 7), GPIO_OUT_LOW) /* Enable 5V supply */ -GPIO(PP1800_EN, PIN(L, 6), GPIO_OUT_LOW) /* Enable 1.8V supply */ -GPIO(SYS_PWROK, PIN(H, 2), GPIO_OUT_LOW) /* EC thinks everything is up and ready */ -GPIO(WLAN_OFF_L, PIN(J, 4), GPIO_OUT_LOW) /* Disable WiFi radio */ -GPIO(USB_MCU_RST, PIN(B, 0), GPIO_OUT_LOW) /* USB PD MCU reset */ -GPIO(ENABLE_BACKLIGHT, PIN(M, 7), GPIO_OUT_LOW) /* Enable backlight power */ -GPIO(ENABLE_TOUCHPAD, PIN(N, 1), GPIO_OUT_LOW) /* Enable touchpad power */ -GPIO(ENTERING_RW, PIN(D, 3), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ -GPIO(LIGHTBAR_RESET_L, PIN(J, 2), GPIO_ODR_LOW) /* Reset lightbar controllers */ -GPIO(PCH_DPWROK, PIN(G, 0), GPIO_OUT_LOW) /* Indicate when VccDSW is good */ -GPIO(PCH_RSMRST_L, PIN(C, 4), GPIO_OUT_LOW) /* Reset PCH resume power plane logic */ -GPIO(PCH_RTCRST_L, PIN(J, 1), GPIO_ODR_HIGH) /* Reset PCH RTC well */ -GPIO(PCH_WAKE_L, PIN(F, 0), GPIO_ODR_HIGH) /* Wake signal from EC to PCH */ -GPIO(PCH_NMI_L, PIN(F, 2), GPIO_ODR_HIGH) /* Non-maskable interrupt pin to PCH */ -GPIO(PCH_PWRBTN_L, PIN(H, 0), GPIO_ODR_HIGH) /* Power button output to PCH */ -GPIO(PCH_PWROK, PIN(F, 5), GPIO_OUT_LOW) /* PWROK / APWROK signals to PCH */ -GPIO(PCH_RCIN_L, PIN(F, 3), GPIO_ODR_HIGH) /* RCIN# line to PCH (for 8042 emulation) */ -GPIO(PCH_SYS_RST_L, PIN(F, 1), GPIO_ODR_HIGH) /* Reset PCH resume power plane logic */ -GPIO(PCH_SMI_L, PIN(F, 4), GPIO_ODR_HIGH) /* System management interrupt to PCH */ -GPIO(TOUCHSCREEN_RESET_L, PIN(N, 7), GPIO_ODR_LOW) /* Reset touch screen */ -GPIO(PCH_ACOK, PIN(M, 6), GPIO_OUT_LOW) /* AC present signal buffered to PCH */ -#ifndef HEY_USE_BUILTIN_CLKRUN -GPIO(LPC_CLKRUN_L, PIN(M, 2), GPIO_ODR_HIGH) /* Dunno. Probably important, though. */ -#endif -GPIO(USB1_CTL1, PIN(E, 1), GPIO_OUT_LOW) /* USB charger port 1 CTL1 output */ -GPIO(USB1_CTL2, PIN(E, 2), GPIO_OUT_HIGH) /* USB charger port 1 CTL2 output */ -GPIO(USB1_CTL3, PIN(E, 3), GPIO_OUT_LOW) /* USB charger port 1 CTL3 output */ -GPIO(USB1_ENABLE, PIN(E, 4), GPIO_OUT_HIGH) /* USB charger port 1 enable */ -GPIO(USB1_ILIM_SEL_L, PIN(E, 5), GPIO_OUT_HIGH) /* USB charger port 1 ILIM_SEL output */ -GPIO(USB2_CTL1, PIN(D, 0), GPIO_OUT_LOW) /* USB charger port 2 CTL1 output */ -GPIO(USB2_CTL2, PIN(D, 1), GPIO_OUT_HIGH) /* USB charger port 2 CTL2 output */ -GPIO(USB2_CTL3, PIN(D, 4), GPIO_OUT_LOW) /* USB charger port 2 CTL3 output */ -GPIO(USB2_ENABLE, PIN(D, 5), GPIO_OUT_HIGH) /* USB charger port 2 enable */ -GPIO(USB2_ILIM_SEL_L, PIN(D, 6), GPIO_OUT_HIGH) /* USB charger port 2 ILIM_SEL output */ - -GPIO(I2C0_SCL, PIN(B, 2), GPIO_ODR_HIGH) /* I2C port 0 SCL */ -GPIO(I2C0_SDA, PIN(B, 3), GPIO_ODR_HIGH) /* I2C port 0 SDA */ -GPIO(I2C1_SCL, PIN(A, 6), GPIO_ODR_HIGH) /* I2C port 1 SCL */ -GPIO(I2C1_SDA, PIN(A, 7), GPIO_ODR_HIGH) /* I2C port 1 SDA */ -GPIO(I2C5_SCL, PIN(B, 6), GPIO_ODR_HIGH) /* I2C port 5 SCL */ -GPIO(I2C5_SDA, PIN(B, 7), GPIO_ODR_HIGH) /* I2C port 5 SDA */ - -ALTERNATE(PIN_MASK(A, 0x03), 1, MODULE_UART, 0) /* UART0 */ -ALTERNATE(PIN_MASK(A, 0x40), 3, MODULE_I2C, 0) /* I2C1 SCL */ -ALTERNATE(PIN_MASK(A, 0x80), 3, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C1 SDA */ -ALTERNATE(PIN_MASK(B, 0x04), 3, MODULE_I2C, 0) /* I2C0 SCL */ -ALTERNATE(PIN_MASK(B, 0x08), 3, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C0 SDA */ -ALTERNATE(PIN_MASK(B, 0x40), 3, MODULE_I2C, 0) /* I2C5 SCL */ -ALTERNATE(PIN_MASK(B, 0x80), 3, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C5 SDA */ -ALTERNATE(PIN_MASK(G, 0x30), 1, MODULE_UART, 0) /* UART2 */ -ALTERNATE(PIN_MASK(J, 0x40), 1, MODULE_PECI, 0) /* PECI Tx */ -ALTERNATE(PIN_MASK(J, 0x80), 0, MODULE_PECI, GPIO_ANALOG) /* PECI Rx */ -ALTERNATE(PIN_MASK(L, 0x3f), 15, MODULE_LPC, 0) /* LPC */ -ALTERNATE(PIN_MASK(M, 0x33), 15, MODULE_LPC, 0) /* LPC */ -#ifdef HEY_USE_BUILTIN_CLKRUN -ALTERNATE(PIN_MASK(M, 0x04), 15, MODULE_LPC, GPIO_OPEN_DRAIN) /* LPC */ -#endif - -ALTERNATE(PIN_MASK(N, 0x3c), 1, MODULE_PWM, 0) /* FAN0PWM 2&3 */ -ALTERNATE(PIN_MASK(N, 0x40), 1, MODULE_PWM, 0) /* FAN0PWM4 */ diff --git a/board/samus/panel.c b/board/samus/panel.c deleted file mode 100644 index b3fe6060aa..0000000000 --- a/board/samus/panel.c +++ /dev/null @@ -1,195 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "lid_switch.h" -#include "timer.h" - -#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args) - -#define I2C_ADDR_BACKLIGHT_FLAGS (0x2C | I2C_FLAG_BIG_ENDIAN) -#define I2C_RETRIES 3 -#define I2C_RETRY_DELAY (5*MSEC) - -#define LP8555_REG_COMMAND 0x00 -#define LP8555_REG_COMMAND_ON 0x01 -#define LP8555_REG_CONFIG 0x10 -#define LP8555_REG_CONFIG_MODE_MASK 0x03 -#define LP8555_REG_CONFIG_MODE_PWM 0x00 -#define LP8555_REG_CURRENT 0x11 -#define LP8555_REG_CURRENT_MAXCURR_5MA 0x00 -#define LP8555_REG_CURRENT_MAXCURR_10MA 0x01 -#define LP8555_REG_CURRENT_MAXCURR_15MA 0x02 -#define LP8555_REG_CURRENT_MAXCURR_20MA 0x03 -#define LP8555_REG_CURRENT_MAXCURR_23MA 0x04 -#define LP8555_REG_CURRENT_MAXCURR_25MA 0x05 -#define LP8555_REG_CURRENT_MAXCURR_30MA 0x06 -#define LP8555_REG_CURRENT_MAXCURR_50MA 0x07 -#define LP8555_REG_STEP 0x15 -#define LP8555_REG_STEP_STEP_0MS (0 << 0) -#define LP8555_REG_STEP_STEP_8MS BIT(0) -#define LP8555_REG_STEP_STEP_16MS (2 << 0) -#define LP8555_REG_STEP_STEP_24MS (3 << 0) -#define LP8555_REG_STEP_STEP_28MS (4 << 0) -#define LP8555_REG_STEP_STEP_32MS (5 << 0) -#define LP8555_REG_STEP_STEP_100MS (6 << 0) -#define LP8555_REG_STEP_STEP_200MS (7 << 0) -#define LP8555_REG_STEP_PWM_IN_HYST_NONE (0 << 3) -#define LP8555_REG_STEP_PWM_IN_HYST_1LSB BIT(3) -#define LP8555_REG_STEP_PWM_IN_HYST_2LSB (2 << 3) -#define LP8555_REG_STEP_PWM_IN_HYST_4LSB (3 << 3) -#define LP8555_REG_STEP_PWM_IN_HYST_8LSB (4 << 3) -#define LP8555_REG_STEP_PWM_IN_HYST_16LSB (5 << 3) -#define LP8555_REG_STEP_PWM_IN_HYST_32LSB (6 << 3) -#define LP8555_REG_STEP_PWM_IN_HYST_64LSB (7 << 3) -#define LP8555_REG_STEP_SMOOTH_NONE (0 << 6) -#define LP8555_REG_STEP_SMOOTH_LIGHT BIT(6) -#define LP8555_REG_STEP_SMOOTH_MEDIUM (2 << 6) -#define LP8555_REG_STEP_SMOOTH_HEAVY (3 << 6) - -/* Read from lp8555 with automatic i2c retries */ -static int lp8555_read_with_retry(int reg, int *data) -{ - int i, rv; - - for (i = 0; i < I2C_RETRIES; i++) { - rv = i2c_read8(I2C_PORT_BACKLIGHT, - I2C_ADDR_BACKLIGHT_FLAGS, - reg, data); - if (rv == EC_SUCCESS) - return EC_SUCCESS; - usleep(I2C_RETRY_DELAY); - } - - CPRINTS("Backlight read fail: reg 0x%02x", reg); - return rv; -} - -/* Write to lp8555 with automatic i2c retries */ -static int lp8555_write_with_retry(int reg, int data) -{ - int i, rv; - - for (i = 0; i < I2C_RETRIES; i++) { - rv = i2c_write8(I2C_PORT_BACKLIGHT, - I2C_ADDR_BACKLIGHT_FLAGS, - reg, data); - if (rv == EC_SUCCESS) - return EC_SUCCESS; - usleep(I2C_RETRY_DELAY); - } - - CPRINTS("Backlight write fail: reg 0x%02x data %d", reg, data); - return rv; -} - -/** - * Setup backlight controller and turn it on. - */ -static void lp8555_enable_pwm_mode(void) -{ - int reg; - int rv; - - /* - * If not in S0, then PCH backlight enable will not be on, and if - * lid is closed EC backlight enable will not be on. Since these - * two signals are AND'ed together, no point in trying to talk to - * the lp8555 if either one of them is not true. - */ - if (!chipset_in_state(CHIPSET_STATE_ON) || !lid_is_open()) - return; - - /* Enable PWM mode. */ - rv = lp8555_read_with_retry(LP8555_REG_CONFIG, ®); - if (rv != EC_SUCCESS) - return; - reg &= ~LP8555_REG_CONFIG_MODE_MASK; - reg |= LP8555_REG_CONFIG_MODE_PWM; - rv = lp8555_write_with_retry(LP8555_REG_CONFIG, reg); - if (rv != EC_SUCCESS) - return; - - /* Set max LED current to 23mA. */ - rv = lp8555_write_with_retry(LP8555_REG_CURRENT, - LP8555_REG_CURRENT_MAXCURR_23MA); - if (rv != EC_SUCCESS) - return; - - /* Set the rate of brightness change. */ - rv = lp8555_write_with_retry(LP8555_REG_STEP, - LP8555_REG_STEP_STEP_200MS | - LP8555_REG_STEP_PWM_IN_HYST_8LSB | - LP8555_REG_STEP_SMOOTH_HEAVY); - if (rv != EC_SUCCESS) - return; - - /* Power on. */ - rv = lp8555_read_with_retry(LP8555_REG_COMMAND, ®); - if (rv != EC_SUCCESS) - return; - reg |= LP8555_REG_COMMAND_ON; - rv = lp8555_write_with_retry(LP8555_REG_COMMAND, reg); -} -DECLARE_DEFERRED(lp8555_enable_pwm_mode); - -/** - * Host command to toggle backlight. - */ -static enum ec_status -switch_command_enable_backlight(struct host_cmd_handler_args *args) -{ - const struct ec_params_switch_enable_backlight *p = args->params; - - gpio_set_level(GPIO_ENABLE_BACKLIGHT, p->enabled); - - if (p->enabled) - lp8555_enable_pwm_mode(); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_SWITCH_ENABLE_BKLIGHT, - switch_command_enable_backlight, - EC_VER_MASK(0)); - -void backlight_interrupt(enum gpio_signal signal) -{ - /* - * PCH indicates it is turning on backlight so we should - * attempt to put the backlight controller into PWM mode. - */ - hook_call_deferred(&lp8555_enable_pwm_mode_data, 0); -} - -/** - * Update backlight state. - */ -static void update_backlight(void) -{ - /* - * Enable backlight if lid is open; this is AND'd with the request from - * the AP in hardware. - */ - gpio_set_level(GPIO_ENABLE_BACKLIGHT, lid_is_open()); - if (lid_is_open()) - hook_call_deferred(&lp8555_enable_pwm_mode_data, 0); -} -DECLARE_HOOK(HOOK_LID_CHANGE, update_backlight, HOOK_PRIO_DEFAULT); - -/** - * Initialize backlight module. - */ -static void backlight_init(void) -{ - gpio_enable_interrupt(GPIO_PCH_BL_EN); - gpio_set_level(GPIO_ENABLE_BACKLIGHT, lid_is_open()); -} -DECLARE_HOOK(HOOK_INIT, backlight_init, HOOK_PRIO_DEFAULT); diff --git a/board/samus/power_sequence.c b/board/samus/power_sequence.c deleted file mode 100644 index c3643e5c23..0000000000 --- a/board/samus/power_sequence.c +++ /dev/null @@ -1,563 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* X86 chipset power control module for Chrome EC */ - -#include "battery.h" -#include "charge_state.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "extpower.h" -#include "i2c.h" -#include "lb_common.h" -#include "gpio.h" -#include "hooks.h" -#include "lid_switch.h" -#include "power.h" -#include "registers.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "util.h" -#include "wireless.h" - -/* Console output macros */ -#define CPUTS(outstr) cputs(CC_CHIPSET, outstr) -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) - -/* Input state flags */ -#define IN_PGOOD_PP1050 POWER_SIGNAL_MASK(X86_PGOOD_PP1050) -#define IN_PGOOD_PP1200 POWER_SIGNAL_MASK(X86_PGOOD_PP1200) -#define IN_PGOOD_PP1800 POWER_SIGNAL_MASK(X86_PGOOD_PP1800) -#define IN_PGOOD_VCORE POWER_SIGNAL_MASK(X86_PGOOD_VCORE) - -#define IN_PCH_SLP_S0_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S0_DEASSERTED) -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S5_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S5_DEASSERTED) -#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED) - - -/* All non-core power rails */ -#define IN_PGOOD_ALL_NONCORE (IN_PGOOD_PP1050) -/* All core power rails */ -#define IN_PGOOD_ALL_CORE (IN_PGOOD_VCORE) -/* Rails required for S3 */ -#define IN_PGOOD_S3 (IN_PGOOD_PP1200) -/* Rails required for S0 */ -#define IN_PGOOD_S0 (IN_PGOOD_ALL_NONCORE) -/* Rails used to detect if PP5000 is up. 1.8V PGOOD is not - * a reliable signal to use here with an internal pullup. */ -#define IN_PGOOD_PP5000 (IN_PGOOD_PP1050 | IN_PGOOD_PP1200) - - -/* All PM_SLP signals from PCH deasserted */ -#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \ - IN_PCH_SLP_S5_DEASSERTED | \ - IN_PCH_SLP_SUS_DEASSERTED) - -/* All inputs in the right state for S0 */ -#define IN_ALL_S0 (IN_PGOOD_ALL_NONCORE | IN_PGOOD_ALL_CORE | \ - IN_ALL_PM_SLP_DEASSERTED) - -static int throttle_cpu; /* Throttle CPU? */ -static uint32_t pp5000_in_g3; /* Turn PP5000 on in G3? */ - -void chipset_force_shutdown(enum chipset_shutdown_reason reason) -{ - CPRINTS("%s(%d)", __func__, reason); - report_ap_reset(reason); - - /* - * Force off. This condition will reset once the state machine - * transitions to G3. - */ - gpio_set_level(GPIO_PCH_DPWROK, 0); - gpio_set_level(GPIO_PCH_RSMRST_L, 0); -} - -static void chipset_force_g3(void) -{ - CPRINTS("Forcing G3"); - - gpio_disable_interrupt(GPIO_VCORE_PGOOD); - gpio_set_level(GPIO_PCH_PWROK, 0); - gpio_set_level(GPIO_SYS_PWROK, 0); - gpio_set_level(GPIO_PP1050_EN, 0); - gpio_set_level(GPIO_PP1200_EN, 0); - gpio_set_level(GPIO_PP1800_EN, 0); - gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 0); - gpio_set_level(GPIO_PP5000_USB_EN, 0); - /* Disable PP5000 if allowed */ - if (!pp5000_in_g3) - gpio_set_level(GPIO_PP5000_EN, 0); - gpio_set_level(GPIO_PCH_RSMRST_L, 0); - gpio_set_level(GPIO_PCH_DPWROK, 0); - gpio_set_level(GPIO_PP3300_DSW_EN, 0); - wireless_set_state(WIRELESS_OFF); -} - -static void chipset_reset_rtc(void) -{ - /* - * Assert RTCRST# to the PCH long enough for it to latch the - * assertion and reset the internal RTC backed state. - */ - CPRINTS("Asserting RTCRST# to PCH"); - gpio_set_level(GPIO_PCH_RTCRST_L, 0); - udelay(100); - gpio_set_level(GPIO_PCH_RTCRST_L, 1); - udelay(10 * MSEC); -} - -void chipset_reset(enum chipset_reset_reason reason) -{ - CPRINTS("%s(%d)", __func__, reason); - report_ap_reset(reason); - - /* - * Send a RCIN# pulse to the PCH. This just causes it to - * assert INIT# to the CPU without dropping power or asserting - * PLTRST# to reset the rest of the system. - */ - - /* - * Pulse must be at least 16 PCI clocks long = 500 ns. - */ - gpio_set_level(GPIO_PCH_RCIN_L, 0); - udelay(10); - gpio_set_level(GPIO_PCH_RCIN_L, 1); -} - -void chipset_throttle_cpu(int throttle) -{ - if (chipset_in_state(CHIPSET_STATE_ON)) - gpio_set_level(GPIO_CPU_PROCHOT, throttle); -} - -enum power_state power_chipset_init(void) -{ - /* - * If we're switching between images without rebooting, see if the x86 - * is already powered on; if so, leave it there instead of cycling - * through G3. - */ - if (system_jumped_to_this_image()) { - if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) { - /* Disable idle task deep sleep when in S0. */ - disable_sleep(SLEEP_MASK_AP_RUN); - CPRINTS("already in S0"); - return POWER_S0; - } else { - /* Force all signals to their G3 states */ - chipset_force_g3(); - } - } - - return POWER_G3; -} - -enum power_state power_handle_state(enum power_state state) -{ - struct batt_params batt; - - switch (state) { - case POWER_G3: - break; - - case POWER_S5: - - while ((power_get_signals() & IN_PCH_SLP_S5_DEASSERTED) == 0) { - if (task_wait_event(SECOND*4) == TASK_EVENT_TIMER) { - CPRINTS("timeout waiting for S5 exit"); - /* Put system in G3 and assert RTCRST# */ - chipset_force_g3(); - chipset_reset_rtc(); - /* Try to power back up after RTC reset */ - return POWER_G3S5; - } - } - return POWER_S5S3; /* Power up to next state */ - break; - - case POWER_S3: - /* Check for state transitions */ - if (!power_has_signals(IN_PGOOD_S3)) { - /* Required rail went away */ - chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL); - return POWER_S3S5; - } else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 1) { - /* Power up to next state */ - return POWER_S3S0; - } else if (gpio_get_level(GPIO_PCH_SLP_S5_L) == 0) { - /* Power down to next state */ - return POWER_S3S5; - } - break; - - case POWER_S0: - if (!power_has_signals(IN_PGOOD_S0)) { - /* Required rail went away */ - chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL); - return POWER_S0S3; - } else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) { - /* Power down to next state */ - return POWER_S0S3; - } - break; - - case POWER_G3S5: - /* Return to G3 if battery level is too low */ - if (charge_want_shutdown() || - charge_prevent_power_on(0)) { - CPRINTS("power-up inhibited"); - chipset_force_g3(); - return POWER_G3; - } - - /* Enable 3.3V DSW */ - gpio_set_level(GPIO_PP3300_DSW_EN, 1); - - /* - * Wait 10ms after +3VALW good, since that powers VccDSW and - * VccSUS. - */ - msleep(10); - - /* Enable PP5000 (5V) rail as 1.05V and 1.2V rails need 5V - * rail to regulate properly. */ - gpio_set_level(GPIO_PP5000_EN, 1); - - /* Wait for PP1050/PP1200 PGOOD to go LOW to - * indicate that PP5000 is stable */ - while ((power_get_signals() & IN_PGOOD_PP5000) != 0) { - if (task_wait_event(SECOND) == TASK_EVENT_TIMER) { - CPRINTS("timeout waiting for PP5000"); - chipset_force_g3(); - return POWER_G3; - } - } - - /* - * TODO(crosbug.com/p/31583): Temporary hack to allow booting - * without battery. If battery is not present here, then delay - * to give time for PD MCU to negotiate to 20V. - */ - battery_get_params(&batt); - if (batt.is_present != BP_YES && !system_is_locked()) { - CPRINTS("Attempting boot w/o battery, adding delay"); - msleep(500); - } - - /* Assert DPWROK */ - gpio_set_level(GPIO_PCH_DPWROK, 1); - - /* - * Wait for SLP_SUS before enabling 1.05V rail. - */ - if (power_wait_signals(IN_PCH_SLP_SUS_DEASSERTED)) { - CPRINTS("timeout waiting for SLP_SUS deassert"); - chipset_force_g3(); - return POWER_G3; - } - - /* Enable PP1050 rail. */ - gpio_set_level(GPIO_PP1050_EN, 1); - - /* Wait for 1.05V to come up and CPU to notice */ - if (power_wait_signals(IN_PGOOD_PP1050)) { - CPRINTS("timeout waiting for PP1050"); - chipset_force_g3(); - return POWER_G3; - } - - /* Add 10ms delay between SUSP_VR and RSMRST */ - msleep(10); - - /* Deassert RSMRST# */ - gpio_set_level(GPIO_PCH_RSMRST_L, 1); - - /* Wait 5ms for SUSCLK to stabilize */ - msleep(5); - - /* Call hook to indicate out of G3 state */ - hook_notify(HOOK_CHIPSET_PRE_INIT); - return POWER_S5; - - case POWER_S5S3: - /* Turn on power to RAM */ - gpio_set_level(GPIO_PP1800_EN, 1); - gpio_set_level(GPIO_PP1200_EN, 1); - if (power_wait_signals(IN_PGOOD_S3)) { - gpio_set_level(GPIO_PP1800_EN, 0); - gpio_set_level(GPIO_PP1200_EN, 0); - chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT); - return POWER_S5; - } - - /* - * Take lightbar out of reset, now that +5VALW is - * available and we won't leak +3VALW through the reset - * line. - */ - i2c_lock(I2C_PORT_LIGHTBAR, 1); - gpio_set_level(GPIO_LIGHTBAR_RESET_L, 1); - msleep(1); - lb_init(0); - msleep(100); - i2c_lock(I2C_PORT_LIGHTBAR, 0); - - /* - * Enable touchpad power so it can wake the system from - * suspend. - */ - gpio_set_level(GPIO_ENABLE_TOUCHPAD, 1); - - /* Turn on USB power rail. */ - gpio_set_level(GPIO_PP5000_USB_EN, 1); - - /* Call hooks now that rails are up */ - hook_notify(HOOK_CHIPSET_STARTUP); - return POWER_S3; - - case POWER_S3S0: - /* Turn on 3.3V DSW gated rail for core regulator */ - gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 1); - - /* Wait 20ms before allowing VCCST_PGOOD to rise. */ - msleep(20); - - /* Enable wireless. */ - wireless_set_state(WIRELESS_ON); - - /* Make sure the touchscreen is on, too. */ - gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 1); - - /* Wait for non-core power rails good */ - if (power_wait_signals(IN_PGOOD_S0)) { - gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0); - wireless_set_state(WIRELESS_OFF); - gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 1); - chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT); - return POWER_S3; - } - - /* Call hooks now that rails are up */ - hook_notify(HOOK_CHIPSET_RESUME); - - /* - * Disable idle task deep sleep. This means that the low - * power idle task will not go into deep sleep while in S0. - */ - disable_sleep(SLEEP_MASK_AP_RUN); - - /* - * Throttle CPU if necessary. This should only be asserted - * when +VCCP is powered (it is by now). - */ - gpio_set_level(GPIO_CPU_PROCHOT, throttle_cpu); - - /* - * VCORE_PGOOD signal buffer is powered by PP1050_VCCST which - * is gated by SLP_S3 assertion. Now the signal is valid and - * can be enabled as an interrupt source. - */ - gpio_enable_interrupt(GPIO_VCORE_PGOOD); - - /* Set PCH_PWROK */ - gpio_set_level(GPIO_PCH_PWROK, 1); - - /* Wait for VCORE_PGOOD before enabling SYS_PWROK */ - if (power_wait_signals(IN_PGOOD_VCORE)) { - gpio_disable_interrupt(GPIO_VCORE_PGOOD); - hook_notify(HOOK_CHIPSET_SUSPEND); - enable_sleep(SLEEP_MASK_AP_RUN); - gpio_set_level(GPIO_PCH_PWROK, 0); - gpio_set_level(GPIO_CPU_PROCHOT, 0); - gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0); - gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 1); - wireless_set_state(WIRELESS_OFF); - chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT); - return POWER_S3; - } - - /* - * Wait a bit for all voltages to be good. PCIe devices need - * 99ms, but mini-PCIe devices only need 1ms. Intel recommends - * at least 5ms between ALL_SYS_PWRGD and SYS_PWROK. - */ - msleep(5); - - /* Set SYS_PWROK */ - gpio_set_level(GPIO_SYS_PWROK, 1); - return POWER_S0; - - case POWER_S0S3: - /* Call hooks before we remove power rails */ - hook_notify(HOOK_CHIPSET_SUSPEND); - - /* Clear PCH_PWROK */ - gpio_set_level(GPIO_SYS_PWROK, 0); - gpio_set_level(GPIO_PCH_PWROK, 0); - - /* Wait 40ns */ - udelay(1); - - /* Suspend wireless */ - wireless_set_state(WIRELESS_SUSPEND); - - /* - * Enable idle task deep sleep. Allow the low power idle task - * to go into deep sleep in S3 or lower. - */ - enable_sleep(SLEEP_MASK_AP_RUN); - - /* Put touchscreen in reset */ - gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0); - - /* - * Deassert prochot since CPU is off and we're about to drop - * +VCCP. - */ - gpio_set_level(GPIO_CPU_PROCHOT, 0); - - /* Turn off DSW gated */ - gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 0); - - /* - * VCORE_PGOOD signal buffer is powered by PP1050_VCCST which - * is gated by SLP_S3 assertion. The signal is no longer - * valid and should be disabled as an interrupt source. - */ - gpio_disable_interrupt(GPIO_VCORE_PGOOD); - return POWER_S3; - - case POWER_S3S5: - /* Call hooks before we remove power rails */ - hook_notify(HOOK_CHIPSET_SHUTDOWN); - - /* Disable wireless */ - wireless_set_state(WIRELESS_OFF); - - /* Disable peripheral power */ - gpio_set_level(GPIO_ENABLE_TOUCHPAD, 0); - gpio_set_level(GPIO_PP5000_USB_EN, 0); - - /* Turn off power to RAM */ - gpio_set_level(GPIO_PP1800_EN, 0); - gpio_set_level(GPIO_PP1200_EN, 0); - - /* - * Put touchscreen and lightbar in reset, so we won't - * leak +3VALW through the reset line to chips powered - * by +5VALW. - * - * (Note that we're no longer powering down +5VALW due - * to crosbug.com/p/16600, but to minimize side effects - * of that change we'll still reset these components in - * S5.) - */ - gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0); - gpio_set_level(GPIO_LIGHTBAR_RESET_L, 0); - - /* Call hooks after we remove power rails */ - hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); - - return power_get_pause_in_s5() ? POWER_S5 : POWER_S5G3; - - case POWER_S5G3: - /* Deassert DPWROK */ - gpio_set_level(GPIO_PCH_DPWROK, 0); - - /* Assert RSMRST# */ - gpio_set_level(GPIO_PCH_RSMRST_L, 0); - - /* Turn off power rails enabled in S5 */ - gpio_set_level(GPIO_PP1050_EN, 0); - - /* Check if we can disable PP5000 */ - if (!pp5000_in_g3) - gpio_set_level(GPIO_PP5000_EN, 0); - - /* Disable 3.3V DSW */ - gpio_set_level(GPIO_PP3300_DSW_EN, 0); - return POWER_G3; - } - - return state; -} - -/** - * Set PP5000 rail in G3. The mask represents the reason for - * turning on/off the PP5000 rail in G3, and enable either - * enables or disables that mask. If any bit is enabled, then - * the PP5000 rail will remain on. If all bits are cleared, - * the rail will turn off. - * - * @param mask Mask to modify - * @param enable Enable flag - */ -void set_pp5000_in_g3(int mask, int enable) -{ - if (enable) - atomic_or(&pp5000_in_g3, mask); - else - atomic_clear_bits(&pp5000_in_g3, mask); - - /* if we are in G3 now, then set the rail accordingly */ - if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) - gpio_set_level(GPIO_PP5000_EN, !!pp5000_in_g3); -} - -#ifdef CONFIG_LIGHTBAR_POWER_RAILS -/* Returns true if a change was made, NOT the new state */ -int lb_power(int enabled) -{ - int ret = 0; - int pp5000_en = gpio_get_level(GPIO_PP5000_EN); - - set_pp5000_in_g3(PP5000_IN_G3_LIGHTBAR, enabled); - - /* If the AP is on, we don't change the rails. */ - if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) - return ret; - - /* Check if PP5000 rail changed */ - if (gpio_get_level(GPIO_PP5000_EN) != pp5000_en) - ret = 1; - - /* - * When turning on, we have to wait for the rails to come up - * fully before we the lightbar ICs will respond. There's not - * a reliable PGOOD signal for that (I tried), so we just - * have to wait. These delays seem to work. - * - * Note, we should delay even if the PP5000 rail was already - * enabled because we can't be sure it's been enabled long - * enough for lightbar IC to respond. - * - * Also, the lightbar do not expect other i2c traffic while - * being power up. Put a lock on the i2c bus. - * see chrome-os-partner:45223. - */ - if (enabled) { - i2c_lock(I2C_PORT_LIGHTBAR, 1); - msleep(10); - } - - if (enabled != gpio_get_level(GPIO_LIGHTBAR_RESET_L)) { - ret = 1; - gpio_set_level(GPIO_LIGHTBAR_RESET_L, enabled); - msleep(1); - } - if (enabled) { - lb_init(0); - msleep(100); - i2c_lock(I2C_PORT_LIGHTBAR, 0); - } - - return ret; -} -#endif diff --git a/board/samus_pd/board.c b/board/samus_pd/board.c deleted file mode 100644 index eb4d4c90c6..0000000000 --- a/board/samus_pd/board.c +++ /dev/null @@ -1,620 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* samus_pd board configuration */ - -#include "adc.h" -#include "adc_chip.h" -#include "battery.h" -#include "charge_manager.h" -#include "charge_ramp.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "pi3usb9281.h" -#include "power.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "registers.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "usb_charge.h" -#include "usb_descriptor.h" -#include "usb_pd.h" -#include "util.h" - -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) - -/* - * When battery is high, system may not be pulling full current. Also, when - * high AND input voltage is below boost bypass, then limit input current - * limit to HIGH_BATT_LIMIT_CURR_MA to reduce audible ringing. - */ -#define HIGH_BATT_THRESHOLD 90 -#define HIGH_BATT_LIMIT_BOOST_BYPASS_MV 11000 -#define HIGH_BATT_LIMIT_CURR_MA 2000 - -/* Chipset power state */ -static enum power_state ps; - -/* Battery state of charge */ -static int batt_soc; - -/* Default to 5V charging allowed for dead battery case */ -static enum pd_charge_state charge_state = PD_CHARGE_5V; - -/* PD MCU status and host event status for host command */ -static int32_t host_event_status_flags; -static int32_t pd_status_flags; - -static struct ec_response_pd_status pd_status; - -/* Desired input current limit */ -static int desired_charge_rate_ma = -1; - -/* PWM channels. Must be in the exact same order as in enum pwm_channel. */ -const struct pwm_t pwm_channels[] = { - {STM32_TIM(15), STM32_TIM_CH(2), 0}, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -struct mutex pericom_mux_lock; -struct pi3usb9281_config pi3usb9281_chips[] = { - { - .i2c_port = I2C_PORT_PERICOM, - .mux_gpio = GPIO_USB_C_BC12_SEL, - .mux_gpio_level = 0, - .mux_lock = &pericom_mux_lock, - }, - { - .i2c_port = I2C_PORT_PERICOM, - .mux_gpio = GPIO_USB_C_BC12_SEL, - .mux_gpio_level = 1, - .mux_lock = &pericom_mux_lock, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) == - CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT); - -static void pericom_port0_reenable_interrupts(void) -{ - CPRINTS("VBUS p0 %d", gpio_get_level(GPIO_USB_C0_VBUS_WAKE)); - pi3usb9281_enable_interrupts(0); -} -DECLARE_DEFERRED(pericom_port0_reenable_interrupts); - -static void pericom_port1_reenable_interrupts(void) -{ - CPRINTS("VBUS p1 %d", gpio_get_level(GPIO_USB_C1_VBUS_WAKE)); - pi3usb9281_enable_interrupts(1); -} -DECLARE_DEFERRED(pericom_port1_reenable_interrupts); - -void vbus0_evt(enum gpio_signal signal) -{ - usb_charger_vbus_change(0, gpio_get_level(signal)); - task_wake(TASK_ID_PD_C0); -} - -void vbus1_evt(enum gpio_signal signal) -{ - usb_charger_vbus_change(1, gpio_get_level(signal)); - task_wake(TASK_ID_PD_C1); -} - -void usb0_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); -} - -void usb1_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); -} - -static void chipset_s5_to_s3(void) -{ - ps = POWER_S3; - hook_notify(HOOK_CHIPSET_STARTUP); -} - -static void chipset_s3_to_s0(void) -{ - /* Disable deep sleep and restore charge override port */ - disable_sleep(SLEEP_MASK_AP_RUN); - ps = POWER_S0; - hook_notify(HOOK_CHIPSET_RESUME); -} - -static void chipset_s3_to_s5(void) -{ - ps = POWER_S5; - hook_notify(HOOK_CHIPSET_SHUTDOWN); - hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); -} - -static void chipset_s0_to_s3(void) -{ - /* Enable deep sleep and store charge override port */ - enable_sleep(SLEEP_MASK_AP_RUN); - ps = POWER_S3; - hook_notify(HOOK_CHIPSET_SUSPEND); -} - -static void pch_evt_deferred(void) -{ - /* Determine new chipset state, trigger corresponding transition */ - switch (ps) { - case POWER_S5: - if (gpio_get_level(GPIO_PCH_SLP_S5_L)) - chipset_s5_to_s3(); - if (gpio_get_level(GPIO_PCH_SLP_S3_L)) - chipset_s3_to_s0(); - break; - case POWER_S3: - if (gpio_get_level(GPIO_PCH_SLP_S3_L)) - chipset_s3_to_s0(); - else if (!gpio_get_level(GPIO_PCH_SLP_S5_L)) - chipset_s3_to_s5(); - break; - case POWER_S0: - if (!gpio_get_level(GPIO_PCH_SLP_S3_L)) - chipset_s0_to_s3(); - if (!gpio_get_level(GPIO_PCH_SLP_S5_L)) - chipset_s3_to_s5(); - break; - default: - break; - } -} -DECLARE_DEFERRED(pch_evt_deferred); - -void pch_evt(enum gpio_signal signal) -{ - hook_call_deferred(&pch_evt_deferred_data, 0); -} - -void board_config_pre_init(void) -{ - /* enable SYSCFG clock */ - STM32_RCC_APB2ENR |= BIT(0); - /* - * the DMA mapping is : - * Chan 2 : TIM1_CH1 (C0 RX) - * Chan 3 : SPI1_TX (C1 TX) - * Chan 4 : USART1_TX - * Chan 5 : USART1_RX - * Chan 6 : TIM3_CH1 (C1 RX) - * Chan 7 : SPI2_TX (C0 TX) - */ - - /* - * Remap USART1 RX/TX DMA to match uart driver. Remap SPI2 RX/TX and - * TIM3_CH1 for unique DMA channels. - */ - STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10) | BIT(24) | BIT(30); -} - -#include "gpio_list.h" - -/* Initialize board. */ -static void board_init(void) -{ - int slp_s5 = gpio_get_level(GPIO_PCH_SLP_S5_L); - int slp_s3 = gpio_get_level(GPIO_PCH_SLP_S3_L); - - /* - * Enable CC lines after all GPIO have been initialized. Note, it is - * important that this is enabled after the CC_ODL lines are set low - * to specify device mode. - */ - gpio_set_level(GPIO_USB_C_CC_EN, 1); - - /* Enable interrupts on VBUS transitions. */ - gpio_enable_interrupt(GPIO_USB_C0_VBUS_WAKE); - gpio_enable_interrupt(GPIO_USB_C1_VBUS_WAKE); - - /* Enable pericom BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); - - /* Determine initial chipset state */ - if (slp_s5 && slp_s3) { - disable_sleep(SLEEP_MASK_AP_RUN); - hook_notify(HOOK_CHIPSET_RESUME); - ps = POWER_S0; - } else if (slp_s5 && !slp_s3) { - enable_sleep(SLEEP_MASK_AP_RUN); - hook_notify(HOOK_CHIPSET_STARTUP); - ps = POWER_S3; - } else { - enable_sleep(SLEEP_MASK_AP_RUN); - hook_notify(HOOK_CHIPSET_SHUTDOWN); - hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); - ps = POWER_S5; - } - - /* Enable interrupts on PCH state change */ - gpio_enable_interrupt(GPIO_PCH_SLP_S3_L); - gpio_enable_interrupt(GPIO_PCH_SLP_S5_L); - - /* Initialize active charge port to none */ - pd_status.active_charge_port = CHARGE_PORT_NONE; - - /* Set PD MCU system status bits */ - if (system_jumped_to_this_image()) - pd_status_flags |= PD_STATUS_JUMPED_TO_IMAGE; - if (system_is_in_rw()) - pd_status_flags |= PD_STATUS_IN_RW; - -#ifdef CONFIG_PWM - /* Enable ILIM PWM: initial duty cycle 0% = 500mA limit. */ - pwm_enable(PWM_CH_ILIM, 1); - pwm_set_duty(PWM_CH_ILIM, 0); -#endif -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -/* ADC channels */ -const struct adc_t adc_channels[] = { - /* USB PD CC lines sensing. Converted to mV (3300mV/4096). */ - [ADC_C0_CC1_PD] = {"C0_CC1_PD", 3300, 4096, 0, STM32_AIN(0)}, - [ADC_C1_CC1_PD] = {"C1_CC1_PD", 3300, 4096, 0, STM32_AIN(2)}, - [ADC_C0_CC2_PD] = {"C0_CC2_PD", 3300, 4096, 0, STM32_AIN(4)}, - [ADC_C1_CC2_PD] = {"C1_CC2_PD", 3300, 4096, 0, STM32_AIN(5)}, - - /* Vbus sensing. Converted to mV, full ADC is equivalent to 25.774V. */ - [ADC_VBUS] = {"VBUS", 25774, 4096, 0, STM32_AIN(11)}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, - GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA}, - {"slave", I2C_PORT_SLAVE, 100, - GPIO_SLAVE_I2C_SCL, GPIO_SLAVE_I2C_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -int board_get_battery_soc(void) -{ - return batt_soc; -} - -enum battery_present battery_is_present(void) -{ - if (batt_soc >= 0) - return BP_YES; - return BP_NOT_SURE; -} - -static void pd_send_ec_int(void) -{ - gpio_set_level(GPIO_EC_INT, 1); - - /* - * Delay long enough to guarantee EC see's the change. Slowest - * EC clock speed is 250kHz in deep sleep -> 4us, and add 1us - * for buffer. - */ - usleep(5); - - gpio_set_level(GPIO_EC_INT, 0); -} - -/** - * Set active charge port -- only one port can be active at a time. - * - * @param charge_port Charge port to enable. - * - * Returns EC_SUCCESS if charge port is accepted and made active, - * EC_ERROR_* otherwise. - */ -int board_set_active_charge_port(int charge_port) -{ - /* charge port is a realy physical port */ - int is_real_port = (charge_port >= 0 && - charge_port < CONFIG_USB_PD_PORT_MAX_COUNT); - /* check if we are source vbus on that port */ - if (is_real_port && usb_charger_port_is_sourcing_vbus(charge_port)) { - CPRINTS("Skip enable p%d", charge_port); - return EC_ERROR_INVAL; - } - - CPRINTS("New chg p%d", charge_port); - - /* - * If charging and the active charge port is changed, then disable - * charging to guarantee charge circuit starts up cleanly. - */ - if (pd_status.active_charge_port != CHARGE_PORT_NONE && - (charge_port == CHARGE_PORT_NONE || - charge_port != pd_status.active_charge_port)) { - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1); - charge_state = PD_CHARGE_NONE; - pd_status.active_charge_port = charge_port; - CPRINTS("Chg: None"); - return EC_SUCCESS; - } - - /* Save active charge port and enable charging if allowed */ - pd_status.active_charge_port = charge_port; - if (charge_state != PD_CHARGE_NONE) { - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, !(charge_port == 0)); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, !(charge_port == 1)); - } - - return EC_SUCCESS; -} - -/** - * Return if max voltage charging is allowed. - */ -int pd_is_max_request_allowed(void) -{ - return charge_state == PD_CHARGE_MAX; -} - -/** - * Return if board is consuming full amount of input current - */ -int charge_is_consuming_full_input_current(void) -{ - return batt_soc >= 1 && batt_soc < HIGH_BATT_THRESHOLD; -} - -/* - * Number of VBUS samples to average when computing if VBUS is too low - * for the ramp stable state. - */ -#define VBUS_STABLE_SAMPLE_COUNT 4 - -/* VBUS too low threshold */ -#define VBUS_LOW_THRESHOLD_MV 4600 - -/** - * Return if VBUS is sagging too low - */ -int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) -{ - static int vbus[VBUS_STABLE_SAMPLE_COUNT]; - static int vbus_idx, vbus_samples_full; - int vbus_sum, i; - - /* - * If we are not allowing charging, it's because the EC saw - * ACOK go low, so we know VBUS is drooping too far. - */ - if (charge_state == PD_CHARGE_NONE) - return 1; - - /* If we are ramping, only look at one reading */ - if (ramp_state == CHG_RAMP_VBUS_RAMPING) { - /* Reset the VBUS array vars used for the stable state */ - vbus_idx = vbus_samples_full = 0; - return adc_read_channel(ADC_VBUS) < VBUS_LOW_THRESHOLD_MV; - } - - /* Fill VBUS array with ADC readings */ - vbus[vbus_idx] = adc_read_channel(ADC_VBUS); - vbus_idx = (vbus_idx == VBUS_STABLE_SAMPLE_COUNT-1) ? 0 : vbus_idx + 1; - if (vbus_idx == 0) - vbus_samples_full = 1; - - /* If VBUS array is not full yet, then return ok */ - if (!vbus_samples_full) - return 0; - - /* All VBUS samples are populated, take average */ - vbus_sum = 0; - for (i = 0; i < VBUS_STABLE_SAMPLE_COUNT; i++) - vbus_sum += vbus[i]; - - /* Return if average is lower than threshold */ - return vbus_sum < (VBUS_STABLE_SAMPLE_COUNT * VBUS_LOW_THRESHOLD_MV); -} - -static int board_update_charge_limit(int charge_ma) -{ -#ifdef CONFIG_PWM - int pwm_duty; -#endif - static int actual_charge_rate_ma = -1; - - desired_charge_rate_ma = charge_ma; - - if (batt_soc >= HIGH_BATT_THRESHOLD && - adc_read_channel(ADC_VBUS) < HIGH_BATT_LIMIT_BOOST_BYPASS_MV) - charge_ma = MIN(charge_ma, HIGH_BATT_LIMIT_CURR_MA); - - /* if current hasn't changed, don't do anything */ - if (charge_ma == actual_charge_rate_ma) - return 0; - - actual_charge_rate_ma = charge_ma; - -#ifdef CONFIG_PWM - pwm_duty = MA_TO_PWM(charge_ma); - if (pwm_duty < 0) - pwm_duty = 0; - else if (pwm_duty > 100) - pwm_duty = 100; - - pwm_set_duty(PWM_CH_ILIM, pwm_duty); -#endif - - pd_status.curr_lim_ma = charge_ma >= 500 ? - (charge_ma - 500) * 92 / 100 + 256 : 0; - - CPRINTS("New ilim %d", charge_ma); - return 1; -} - -/** - * Set the charge limit based upon desired maximum. - * - * @param port Port number. - * @param supplier Charge supplier type. - * @param charge_ma Desired charge limit (mA). - * @param charge_mv Negotiated charge voltage (mV). - */ -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - /* Update current limit and notify EC if it changed */ - if (board_update_charge_limit(charge_ma), charge_mv) - pd_send_ec_int(); -} - -static void board_update_battery_soc(int soc) -{ - if (batt_soc != soc) { - batt_soc = soc; - if (batt_soc >= CONFIG_CHARGE_MANAGER_BAT_PCT_SAFE_MODE_EXIT) - charge_manager_leave_safe_mode(); - board_update_charge_limit(desired_charge_rate_ma); - hook_notify(HOOK_BATTERY_SOC_CHANGE); - } -} - -/* Send host event up to AP */ -void pd_send_host_event(int mask) -{ - /* mask must be set */ - if (!mask) - return; - - atomic_or(&(host_event_status_flags), mask); - atomic_or(&(pd_status_flags), PD_STATUS_HOST_EVENT); - pd_send_ec_int(); -} - -int battery_is_cut_off(void) -{ - return 0; /* Always return NOT cut off */ -} - -/****************************************************************************/ -/* Console commands */ -static int command_ec_int(int argc, char **argv) -{ - pd_send_ec_int(); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(ecint, command_ec_int, - "", - "Toggle EC interrupt line"); - -static int command_pd_host_event(int argc, char **argv) -{ - int event_mask; - char *e; - - if (argc < 2) - return EC_ERROR_PARAM_COUNT; - - event_mask = strtoi(argv[1], &e, 10); - if (*e) - return EC_ERROR_PARAM1; - - pd_send_host_event(event_mask); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(pdevent, command_pd_host_event, - "event_mask", - "Send PD host event"); - -/****************************************************************************/ -/* Host commands */ -static enum ec_status ec_status_host_cmd(struct host_cmd_handler_args *args) -{ - const struct ec_params_pd_status *p = args->params; - struct ec_response_pd_status *r = args->response; - - /* update battery soc */ - board_update_battery_soc(p->batt_soc); - - if (p->charge_state != charge_state) { - switch (p->charge_state) { - case PD_CHARGE_NONE: - /* - * No current allowed in, set new power request - * so that PD negotiates down to vSafe5V. - */ - charge_state = p->charge_state; - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1); - pd_set_new_power_request( - pd_status.active_charge_port); - /* - * Wake charge ramp task so that it will check - * board_is_vbus_too_low() and stop ramping up. - */ - task_wake(TASK_ID_CHG_RAMP); - CPRINTS("Chg: None"); - break; - case PD_CHARGE_5V: - /* Allow current on the active charge port */ - charge_state = p->charge_state; - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, - !(pd_status.active_charge_port == 0)); - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, - !(pd_status.active_charge_port == 1)); - CPRINTS("Chg: 5V"); - break; - case PD_CHARGE_MAX: - /* - * Allow negotiation above vSafe5V. Should only - * ever get this command when 5V charging is - * already allowed. - */ - if (charge_state == PD_CHARGE_5V) { - charge_state = p->charge_state; - pd_set_new_power_request( - pd_status.active_charge_port); - CPRINTS("Chg: Max"); - } - break; - default: - break; - } - } - - *r = pd_status; - r->status = pd_status_flags; - - /* Clear host event */ - atomic_clear_bits(&(pd_status_flags), PD_STATUS_HOST_EVENT); - - args->response_size = sizeof(*r); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_PD_EXCHANGE_STATUS, ec_status_host_cmd, - EC_VER_MASK(EC_VER_PD_EXCHANGE_STATUS)); - -static enum ec_status -host_event_status_host_cmd(struct host_cmd_handler_args *args) -{ - struct ec_response_host_event_status *r = args->response; - - /* Clear host event bit to avoid sending more unnecessary events */ - atomic_clear_bits(&(pd_status_flags), PD_STATUS_HOST_EVENT); - - /* Read and clear the host event status to return to AP */ - r->status = atomic_clear(&(host_event_status_flags)); - - args->response_size = sizeof(*r); - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_PD_HOST_EVENT_STATUS, host_event_status_host_cmd, - EC_VER_MASK(0)); diff --git a/board/samus_pd/board.h b/board/samus_pd/board.h deleted file mode 100644 index 3996cf882f..0000000000 --- a/board/samus_pd/board.h +++ /dev/null @@ -1,160 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* samus_pd board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* 48 MHz SYSCLK clock frequency */ -#define CPU_CLOCK 48000000 - -/* the UART console is on USART1 (PA9/PA10) */ -#undef CONFIG_UART_CONSOLE -#define CONFIG_UART_CONSOLE 1 - -/* To save space */ -#undef CONFIG_SUPPRESSED_HOST_COMMANDS -#undef CONFIG_CMD_MFALLOW -#define CONFIG_USB_PD_DEBUG_LEVEL 1 - -/* Optional features */ -#define CONFIG_ADC -#undef CONFIG_ADC_WATCHDOG -#define CONFIG_BATTERY_PRESENT_CUSTOM -#define CONFIG_BOARD_PRE_INIT -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CHARGE_RAMP_SW -#undef CONFIG_CMD_ADC -#undef CONFIG_CMD_CHARGE_SUPPLIER_INFO -#undef CONFIG_CMD_CRASH -#undef CONFIG_CMD_FLASHINFO -#undef CONFIG_CMD_HASH -#undef CONFIG_CMD_HCDEBUG -#undef CONFIG_CMD_I2C_SCAN -#undef CONFIG_CMD_I2C_XFER -/* Minimum ilim = 500 mA */ -#define CONFIG_CHARGER_INPUT_CURRENT PWM_0_MA -#undef CONFIG_CMD_GETTIME -#undef CONFIG_CMD_IDLE_STATS -#undef CONFIG_CMD_MD -#undef CONFIG_CMD_RW -#undef CONFIG_CMD_SHMEM -#undef CONFIG_CMD_TIMERINFO -#define CONFIG_COMMON_GPIO_SHORTNAMES -#undef CONFIG_CONSOLE_CMDHELP -#undef CONFIG_CONSOLE_HISTORY -#undef CONFIG_DEBUG_ASSERT -#define CONFIG_FORCE_CONSOLE_RESUME -#define CONFIG_HIBERNATE_WAKEUP_PINS (STM32_PWR_CSR_EWUP3|STM32_PWR_CSR_EWUP8) -#define CONFIG_HOSTCMD_ALIGNED -#undef CONFIG_HOSTCMD_EVENTS -#define CONFIG_HW_CRC -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_I2C_PERIPHERAL -#undef CONFIG_LID_SWITCH -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_LTO -#undef CONFIG_PWM -#define CONFIG_STM_HWTIMER32 -#undef CONFIG_TASK_PROFILING -#define CONFIG_USB_CHARGER -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_TCPMV1 -#undef CONFIG_USB_PD_TCPMV1_DEBUG -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_CHECK_MAX_REQUEST_ALLOWED -#define CONFIG_USB_PD_COMM_LOCKED -#define CONFIG_USB_PD_CUSTOM_PDO -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_FLASH_ERASE_CHECK -#define CONFIG_USB_PD_INTERNAL_COMP -#undef CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_TCPC -#define CONFIG_USB_PD_TCPM_STUB -#define CONFIG_USB_PD_VBUS_DETECT_GPIO -#define CONFIG_BC12_DETECT_PI3USB9281 -#define CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT 2 -#define CONFIG_USBC_SS_MUX_DFP_ONLY -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP -#define CONFIG_VBOOT_HASH -#undef CONFIG_WATCHDOG_HELP - -/* Use PSTATE embedded in the RO image, not in its own erase block */ -#undef CONFIG_FLASH_PSTATE_BANK -#undef CONFIG_FW_PSTATE_SIZE -#define CONFIG_FW_PSTATE_SIZE 0 - -/* I2C ports configuration */ -#define I2C_PORT_MASTER 1 -#define I2C_PORT_SLAVE 0 -#define I2C_PORT_EC I2C_PORT_SLAVE -#define I2C_PORT_PERICOM I2C_PORT_MASTER - -/* peripheral address for host commands */ -#ifdef HAS_TASK_HOSTCMD -#define CONFIG_HOSTCMD_I2C_ADDR_FLAGS CONFIG_USB_PD_I2C_ADDR_FLAGS -#endif - -#ifndef __ASSEMBLER__ - -/* Timer selection */ -#define TIM_CLOCK32 2 -#define TIM_ADC 3 - -#include "gpio_signal.h" - -/* ADC signal */ -enum adc_channel { - ADC_C0_CC1_PD = 0, - ADC_C1_CC1_PD, - ADC_C0_CC2_PD, - ADC_C1_CC2_PD, - ADC_VBUS, - /* Number of ADC channels */ - ADC_CH_COUNT -}; - -enum pwm_channel { - PWM_CH_ILIM = 0, - /* Number of PWM channels */ - PWM_CH_COUNT -}; - -/* Standard-current Rp */ -#define PD_SRC_VNC PD_SRC_DEF_VNC_MV -#define PD_SRC_RD_THRESHOLD PD_SRC_DEF_RD_THRESH_MV - -/* - * delay to turn on the power supply max is ~16ms. - * delay to turn off the power supply max is about ~180ms. - */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* delay to turn on/off vconn */ - -/* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -/* Charge current limit min / max, based on PWM duty cycle */ -#define PWM_0_MA 500 -#define PWM_100_MA 4000 - -/* Map current in milli-amps to PWM duty cycle percentage */ -#define MA_TO_PWM(curr) (((curr) - PWM_0_MA) * 100 / (PWM_100_MA - PWM_0_MA)) - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/samus_pd/build.mk b/board/samus_pd/build.mk deleted file mode 100644 index 1946fc303c..0000000000 --- a/board/samus_pd/build.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -*- makefile -*- -# Copyright 2014 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build - -# the IC is STmicro STM32F072VBH6 -CHIP:=stm32 -CHIP_FAMILY:=stm32f0 -CHIP_VARIANT:=stm32f07x - -# Not enough SRAM: Disable all tests -test-list-y= - -board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_mux.o usb_pd_policy.o diff --git a/board/samus_pd/ec.tasklist b/board/samus_pd/ec.tasklist deleted file mode 100644 index 297661df0b..0000000000 --- a/board/samus_pd/ec.tasklist +++ /dev/null @@ -1,17 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * See CONFIG_TASK_LIST in config.h for details. - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/samus_pd/gpio.inc b/board/samus_pd/gpio.inc deleted file mode 100644 index a22f15375f..0000000000 --- a/board/samus_pd/gpio.inc +++ /dev/null @@ -1,137 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Interrupts */ -GPIO_INT(USB_C0_VBUS_WAKE, PIN(E, 6), GPIO_INT_BOTH, vbus0_evt) -GPIO_INT(USB_C1_VBUS_WAKE, PIN(F, 2), GPIO_INT_BOTH, vbus1_evt) -GPIO_INT(USB_C0_BC12_INT_L, PIN(B, 0), GPIO_INT_FALLING, usb0_evt) -GPIO_INT(USB_C1_BC12_INT_L, PIN(C, 11), GPIO_INT_FALLING, usb1_evt) -GPIO_INT(PCH_SLP_S0_L, PIN(C, 14), GPIO_INT_BOTH, pch_evt) -GPIO_INT(PCH_SLP_S3_L, PIN(C, 15), GPIO_INT_BOTH, pch_evt) -GPIO_INT(PCH_SLP_S5_L, PIN(D, 7), GPIO_INT_BOTH, pch_evt) -GPIO_INT(WP_L, PIN(D, 2), GPIO_INT_BOTH, switch_interrupt) - -/* PD RX/TX */ -GPIO(USB_C0_CC1_PD, PIN(A, 0), GPIO_ANALOG) -GPIO(USB_C0_REF, PIN(A, 1), GPIO_ANALOG) -GPIO(USB_C1_CC1_PD, PIN(A, 2), GPIO_ANALOG) -GPIO(USB_C0_CC2_PD, PIN(A, 4), GPIO_ANALOG) -GPIO(USB_C1_CC2_PD, PIN(A, 5), GPIO_ANALOG) -GPIO(USB_C0_REF_PD_ODL, PIN(A, 6), GPIO_ODR_LOW) - -GPIO(USB_C_CC_EN, PIN(C, 10), GPIO_OUT_LOW) -GPIO(USB_C1_CC_TX_EN, PIN(A, 15), GPIO_OUT_LOW) -GPIO(USB_C0_CC_TX_EN, PIN(B, 9), GPIO_OUT_LOW) -GPIO(USB_C1_CC1_TX_DATA, PIN(B, 4), GPIO_OUT_LOW) -GPIO(USB_C0_CC1_TX_DATA, PIN(B, 14), GPIO_OUT_LOW) -GPIO(USB_C1_CC2_TX_DATA, PIN(E, 14), GPIO_OUT_LOW) -GPIO(USB_C0_CC2_TX_DATA, PIN(D, 3), GPIO_OUT_LOW) - -#if 0 -/* Alternate functions */ -GPIO(USB_C1_TX_CLKOUT, PIN(B, 1), GPIO_OUT_LOW) -GPIO(USB_C0_TX_CLKOUT, PIN(E, 1), GPIO_OUT_LOW) -GPIO(USB_C1_TX_CLKIN, PIN(B, 3), GPIO_OUT_LOW) -GPIO(USB_C0_TX_CLKIN, PIN(B, 13), GPIO_OUT_LOW) -#endif - -/* Power and muxes control */ -GPIO(PPVAR_BOOSTIN_SENSE, PIN(C, 1), GPIO_ANALOG) -GPIO(PP3300_USB_PD_EN, PIN(A, 8), GPIO_OUT_HIGH) -GPIO(USB_C0_CHARGE_EN_L, PIN(D, 12), GPIO_OUT_LOW) -GPIO(USB_C1_CHARGE_EN_L, PIN(D, 13), GPIO_OUT_LOW) -GPIO(USB_C0_5V_EN, PIN(D, 14), GPIO_OUT_LOW) -GPIO(USB_C1_5V_EN, PIN(D, 15), GPIO_OUT_LOW) -GPIO(USB_C0_CC1_VCONN1_EN_L, PIN(D, 8), GPIO_OUT_HIGH) -GPIO(USB_C0_CC2_VCONN1_EN_L, PIN(D, 9), GPIO_OUT_HIGH) -GPIO(USB_C1_CC1_VCONN1_EN_L, PIN(D, 10), GPIO_OUT_HIGH) -GPIO(USB_C1_CC2_VCONN1_EN_L, PIN(D, 11), GPIO_OUT_HIGH) -GPIO(USB_C0_CC_1A5_EN, PIN(B, 12), GPIO_OUT_LOW) -GPIO(USB_C1_CC_1A5_EN, PIN(E, 12), GPIO_OUT_LOW) -GPIO(ILIM_ADJ_PWM, PIN(B, 15), GPIO_OUT_LOW) - -GPIO(USB_C0_CC1_ODL, PIN(B, 8), GPIO_ODR_LOW) -GPIO(USB_C0_CC2_ODL, PIN(E, 0), GPIO_ODR_LOW) -GPIO(USB_C1_CC1_ODL, PIN(F, 9), GPIO_ODR_LOW) -GPIO(USB_C1_CC2_ODL, PIN(F, 10), GPIO_ODR_LOW) - -GPIO(USB_C_BC12_SEL, PIN(C, 0), GPIO_OUT_LOW) -GPIO(USB_C0_SS1_EN_L, PIN(E, 2), GPIO_OUT_HIGH) -GPIO(USB_C0_SS2_EN_L, PIN(E, 3), GPIO_OUT_HIGH) -GPIO(USB_C1_SS1_EN_L, PIN(E, 9), GPIO_OUT_HIGH) -GPIO(USB_C1_SS2_EN_L, PIN(E, 10), GPIO_OUT_HIGH) -GPIO(USB_C0_SS1_DP_MODE, PIN(E, 4), GPIO_OUT_HIGH) -GPIO(USB_C0_SS2_DP_MODE, PIN(E, 5), GPIO_OUT_HIGH) -GPIO(USB_C1_SS1_DP_MODE, PIN(E, 11), GPIO_OUT_HIGH) -GPIO(USB_C1_SS2_DP_MODE, PIN(E, 13), GPIO_OUT_HIGH) -GPIO(USB_C0_DP_MODE_L, PIN(E, 8), GPIO_OUT_HIGH) -GPIO(USB_C1_DP_MODE_L, PIN(F, 6), GPIO_OUT_HIGH) -GPIO(USB_C0_DP_POLARITY, PIN(E, 7), GPIO_OUT_HIGH) -GPIO(USB_C1_DP_POLARITY, PIN(F, 3), GPIO_OUT_HIGH) -GPIO(USB_C0_DP_HPD, PIN(F, 0), GPIO_OUT_LOW) -GPIO(USB_C1_DP_HPD, PIN(F, 1), GPIO_OUT_LOW) - -#if 0 -/* Alternate functions */ -GPIO(USB_DM, PIN(A, 11), GPIO_ANALOG) -GPIO(USB_DP, PIN(A, 12), GPIO_ANALOG) -GPIO(UART_TX, PIN(A, 9), GPIO_OUT_LOW) -GPIO(UART_RX, PIN(A, 10), GPIO_OUT_LOW) -GPIO(TP64, PIN(A, 13), GPIO_ODR_HIGH) -GPIO(TP71, PIN(A, 14), GPIO_ODR_HIGH) -#endif - -/* - * I2C pins should be configured as inputs until I2C module is - * initialized. This will avoid driving the lines unintentionally. - */ -GPIO(SLAVE_I2C_SCL, PIN(B, 6), GPIO_INPUT) -GPIO(SLAVE_I2C_SDA, PIN(B, 7), GPIO_INPUT) -GPIO(MASTER_I2C_SCL, PIN(B, 10), GPIO_INPUT) -GPIO(MASTER_I2C_SDA, PIN(B, 11), GPIO_INPUT) - -/* Case closed debugging. */ -GPIO(EC_INT, PIN(B, 2), GPIO_OUT_LOW) -GPIO(EC_IN_RW, PIN(C, 12), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_RST_L, PIN(C, 13), GPIO_OUT_HIGH) -GPIO(SPI_FLASH_CS_L, PIN(D, 0), GPIO_INPUT) -GPIO(SPI_FLASH_CSK, PIN(D, 1), GPIO_INPUT) -GPIO(SPI_FLASH_MOSI, PIN(C, 3), GPIO_INPUT) -GPIO(SPI_FLASH_MISO, PIN(C, 2), GPIO_INPUT) -GPIO(EC_JTAG_TCK, PIN(C, 6), GPIO_INPUT) -GPIO(EC_JTAG_TMS, PIN(C, 7), GPIO_INPUT) -GPIO(EC_JTAG_TDO, PIN(C, 8), GPIO_INPUT) -GPIO(EC_JTAG_TDI, PIN(C, 9), GPIO_INPUT) -GPIO(ENTERING_RW, PIN(B, 5), GPIO_OUT_LOW) -GPIO(PD_DISABLE_DEBUG, PIN(E, 15), GPIO_OUT_HIGH) -GPIO(PD_DEBUG_EN_L, PIN(D, 4), GPIO_INPUT | GPIO_PULL_UP) -GPIO(PD_SPI_PP3300_EN_L, PIN(A, 7), GPIO_OUT_HIGH) -GPIO(BST_DISABLE, PIN(A, 3), GPIO_OUT_LOW) - -#if 0 -/* Alternate functions */ -GPIO(EC_UART_TX, PIN(C, 4), GPIO_OUT_LOW) -GPIO(EC_UART_RX, PIN(C, 5), GPIO_INPUT) -GPIO(AP_UART_TX, PIN(D, 5), GPIO_OUT_LOW) -GPIO(AP_UART_RX, PIN(D, 6), GPIO_INPUT) -#endif - -ALTERNATE(PIN_MASK(B, 0x0008), 0, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */ -ALTERNATE(PIN_MASK(B, 0x2000), 0, MODULE_USB_PD, 0) /* SPI2: SCK(PB13) */ -ALTERNATE(PIN_MASK(B, 0x0002), 0, MODULE_USB_PD, 0) /* TIM14_CH1: PB1) */ -ALTERNATE(PIN_MASK(E, 0x0002), 0, MODULE_USB_PD, 0) /* TIM17_CH1: PE1) */ -ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, 0) /* USART1: PA9/PA10 */ -ALTERNATE(PIN_MASK(D, 0x0060), 0, MODULE_UART, 0) /* USART2: PD5/PD6 */ -ALTERNATE(PIN_MASK(C, 0x0030), 1, MODULE_UART, 0) /* USART3: PC4/PC5 */ -ALTERNATE(PIN_MASK(B, 0x0cc0), 1, MODULE_I2C, 0) /* I2C SLAVE:PB6/7 MASTER:PB10/11 */ - -#ifdef CONFIG_PWM -ALTERNATE(PIN_MASK(B, 0x8000), 1, MODULE_PWM, 0) /* ILIM_PWM: PB15 */ -#endif diff --git a/board/samus_pd/usb_mux.c b/board/samus_pd/usb_mux.c deleted file mode 100644 index 2213fc41e0..0000000000 --- a/board/samus_pd/usb_mux.c +++ /dev/null @@ -1,117 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Samus PD-custom USB mux driver. */ - -#include "common.h" -#include "gpio.h" -#include "usb_mux.h" -#include "util.h" - -struct usb_port_mux { - enum gpio_signal ss1_en_l; - enum gpio_signal ss2_en_l; - enum gpio_signal dp_mode_l; - enum gpio_signal dp_polarity; - enum gpio_signal ss1_dp_mode; - enum gpio_signal ss2_dp_mode; -}; - -static const struct usb_port_mux mux_gpios[] = { - { - .ss1_en_l = GPIO_USB_C0_SS1_EN_L, - .ss2_en_l = GPIO_USB_C0_SS2_EN_L, - .dp_mode_l = GPIO_USB_C0_DP_MODE_L, - .dp_polarity = GPIO_USB_C0_DP_POLARITY, - .ss1_dp_mode = GPIO_USB_C0_SS1_DP_MODE, - .ss2_dp_mode = GPIO_USB_C0_SS2_DP_MODE, - }, - { - .ss1_en_l = GPIO_USB_C1_SS1_EN_L, - .ss2_en_l = GPIO_USB_C1_SS2_EN_L, - .dp_mode_l = GPIO_USB_C1_DP_MODE_L, - .dp_polarity = GPIO_USB_C1_DP_POLARITY, - .ss1_dp_mode = GPIO_USB_C1_SS1_DP_MODE, - .ss2_dp_mode = GPIO_USB_C1_SS2_DP_MODE, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(mux_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); - - -static int board_init_usb_mux(const struct usb_mux *me) -{ - return EC_SUCCESS; -} - -static int board_set_usb_mux(const struct usb_mux *me, mux_state_t mux_state) -{ - const struct usb_port_mux *usb_mux = mux_gpios + me->usb_port; - int polarity = mux_state & USB_PD_MUX_POLARITY_INVERTED; - - /* reset everything */ - gpio_set_level(usb_mux->ss1_en_l, 1); - gpio_set_level(usb_mux->ss2_en_l, 1); - gpio_set_level(usb_mux->dp_mode_l, 1); - gpio_set_level(usb_mux->dp_polarity, 1); - gpio_set_level(usb_mux->ss1_dp_mode, 1); - gpio_set_level(usb_mux->ss2_dp_mode, 1); - - if (!(mux_state & (USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED))) - /* everything is already disabled, we can return */ - return EC_SUCCESS; - - if (mux_state & USB_PD_MUX_USB_ENABLED) - /* USB 3.0 uses 2 superspeed lanes */ - gpio_set_level(polarity ? usb_mux->ss2_dp_mode : - usb_mux->ss1_dp_mode, 0); - - if (mux_state & USB_PD_MUX_DP_ENABLED) { - /* DP uses available superspeed lanes (x2 or x4) */ - gpio_set_level(usb_mux->dp_polarity, polarity); - gpio_set_level(usb_mux->dp_mode_l, 0); - } - - /* switch on superspeed lanes */ - gpio_set_level(usb_mux->ss1_en_l, 0); - gpio_set_level(usb_mux->ss2_en_l, 0); - - return EC_SUCCESS; -} - -static int board_get_usb_mux(const struct usb_mux *me, mux_state_t *mux_state) -{ - const struct usb_port_mux *usb_mux = mux_gpios + me->usb_port; - - *mux_state = 0; - - if (!gpio_get_level(usb_mux->ss1_dp_mode) || - !gpio_get_level(usb_mux->ss2_dp_mode)) - *mux_state |= USB_PD_MUX_USB_ENABLED; - - if (!gpio_get_level(usb_mux->dp_mode_l)) - *mux_state |= USB_PD_MUX_DP_ENABLED; - - if (gpio_get_level(usb_mux->dp_polarity)) - *mux_state |= USB_PD_MUX_POLARITY_INVERTED; - - return EC_SUCCESS; -} - -const struct usb_mux_driver board_custom_usb_mux_driver = { - .init = board_init_usb_mux, - .set = board_set_usb_mux, - .get = board_get_usb_mux, -}; - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .driver = &board_custom_usb_mux_driver, - }, - { - .usb_port = 1, - .driver = &board_custom_usb_mux_driver, - }, -}; diff --git a/board/samus_pd/usb_pd_config.h b/board/samus_pd/usb_pd_config.h deleted file mode 100644 index c81b0bf113..0000000000 --- a/board/samus_pd/usb_pd_config.h +++ /dev/null @@ -1,278 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "adc.h" -#include "chip/stm32/registers.h" -#include "gpio.h" -#include "usb_mux.h" - -/* USB Power delivery board configuration */ - -#ifndef __CROS_EC_USB_PD_CONFIG_H -#define __CROS_EC_USB_PD_CONFIG_H - -/* Timer selection for baseband PD communication */ -#define TIM_CLOCK_PD_TX_C0 17 -#define TIM_CLOCK_PD_RX_C0 1 -#define TIM_CLOCK_PD_TX_C1 14 -#define TIM_CLOCK_PD_RX_C1 3 - -#define TIM_CLOCK_PD_TX(p) ((p) ? TIM_CLOCK_PD_TX_C1 : TIM_CLOCK_PD_TX_C0) -#define TIM_CLOCK_PD_RX(p) ((p) ? TIM_CLOCK_PD_RX_C1 : TIM_CLOCK_PD_RX_C0) - -/* Timer channel */ -#define TIM_RX_CCR_C0 1 -#define TIM_RX_CCR_C1 1 -#define TIM_TX_CCR_C0 1 -#define TIM_TX_CCR_C1 1 - -/* RX timer capture/compare register */ -#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0)) -#define TIM_CCR_C1 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C1, TIM_RX_CCR_C1)) -#define TIM_RX_CCR_REG(p) ((p) ? TIM_CCR_C1 : TIM_CCR_C0) - -/* TX and RX timer register */ -#define TIM_REG_TX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C0)) -#define TIM_REG_RX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C0)) -#define TIM_REG_TX_C1 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C1)) -#define TIM_REG_RX_C1 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C1)) -#define TIM_REG_TX(p) ((p) ? TIM_REG_TX_C1 : TIM_REG_TX_C0) -#define TIM_REG_RX(p) ((p) ? TIM_REG_RX_C1 : TIM_REG_RX_C0) - -/* use the hardware accelerator for CRC */ -#define CONFIG_HW_CRC - -/* TX uses SPI1 on PB3-4 for port C1, SPI2 on PB 13-14 for port C0 */ -#define SPI_REGS(p) ((p) ? STM32_SPI1_REGS : STM32_SPI2_REGS) -static inline void spi_enable_clock(int port) -{ - if (port == 0) - STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; - else - STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1; -} - -/* DMA for transmit uses DMA CH7 for C0 and DMA_CH3 for C1 */ -#define DMAC_SPI_TX(p) ((p) ? STM32_DMAC_CH3 : STM32_DMAC_CH7) - -/* RX uses COMP1 and TIM1 CH1 on port C0 and COMP2 and TIM3_CH1 for port C1*/ -#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1 -#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM3_IC1 - -#define TIM_TX_CCR_IDX(p) ((p) ? TIM_TX_CCR_C1 : TIM_TX_CCR_C0) -#define TIM_RX_CCR_IDX(p) ((p) ? TIM_RX_CCR_C1 : TIM_RX_CCR_C0) -#define TIM_CCR_CS 1 -#define EXTI_COMP_MASK(p) ((p) ? BIT(22) : BIT(21)) -#define IRQ_COMP STM32_IRQ_COMP -/* triggers packet detection on comparator falling edge */ -#define EXTI_XTSR STM32_EXTI_FTSR - -/* DMA for receive uses DMA_CH2 for C0 and DMA_CH6 for C1 */ -#define DMAC_TIM_RX(p) ((p) ? STM32_DMAC_CH6 : STM32_DMAC_CH2) - -/* the pins used for communication need to be hi-speed */ -static inline void pd_set_pins_speed(int port) -{ - if (port == 0) { - /* 40 MHz pin speed on SPI PB13/14 */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x3C000000; - /* 40 MHz pin speed on TIM17_CH1 (PE1) */ - STM32_GPIO_OSPEEDR(GPIO_E) |= 0x0000000C; - } else { - /* 40 MHz pin speed on SPI PB3/4 */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x000003C0; - /* 40 MHz pin speed on TIM14_CH1 (PB1) */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C; - } -} - -/* Reset SPI peripheral used for TX */ -static inline void pd_tx_spi_reset(int port) -{ - if (port == 0) { - /* Reset SPI2 */ - STM32_RCC_APB1RSTR |= BIT(14); - STM32_RCC_APB1RSTR &= ~BIT(14); - } else { - /* Reset SPI1 */ - STM32_RCC_APB2RSTR |= BIT(12); - STM32_RCC_APB2RSTR &= ~BIT(12); - } -} - -/* Drive the CC line from the TX block */ -static inline void pd_tx_enable(int port, int polarity) -{ - if (port == 0) { - /* put SPI function on TX pin */ - if (polarity) /* PD3 is SPI2 MISO */ - gpio_set_alternate_function(GPIO_D, 0x0008, 1); - else /* PB14 is SPI2 MISO */ - gpio_set_alternate_function(GPIO_B, 0x4000, 0); - - /* set the low level reference */ - gpio_set_level(GPIO_USB_C0_CC_TX_EN, 1); - } else { - /* put SPI function on TX pin */ - if (polarity) /* PE14 is SPI1 MISO */ - gpio_set_alternate_function(GPIO_E, 0x4000, 1); - else /* PB4 is SPI1 MISO */ - gpio_set_alternate_function(GPIO_B, 0x0010, 0); - - /* set the low level reference */ - gpio_set_level(GPIO_USB_C1_CC_TX_EN, 1); - } -} - -/* Put the TX driver in Hi-Z state */ -static inline void pd_tx_disable(int port, int polarity) -{ - if (port == 0) { - /* output low on SPI TX to disable the FET */ - if (polarity) /* PD3 is SPI2 MISO */ - STM32_GPIO_MODER(GPIO_D) = (STM32_GPIO_MODER(GPIO_D) - & ~(3 << (2*3))) - | (1 << (2*3)); - else /* PB14 is SPI2 MISO */ - STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) - & ~(3 << (2*14))) - | (1 << (2*14)); - - /* put the low level reference in Hi-Z */ - gpio_set_level(GPIO_USB_C0_CC_TX_EN, 0); - } else { - /* output low on SPI TX to disable the FET */ - if (polarity) /* PE14 is SPI1 MISO */ - STM32_GPIO_MODER(GPIO_E) = (STM32_GPIO_MODER(GPIO_E) - & ~(3 << (2*14))) - | (1 << (2*14)); - else /* PB4 is SPI1 MISO */ - STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) - & ~(3 << (2*4))) - | (1 << (2*4)); - - /* put the low level reference in Hi-Z */ - gpio_set_level(GPIO_USB_C1_CC_TX_EN, 0); - } -} - -/* we know the plug polarity, do the right configuration */ -static inline void pd_select_polarity(int port, int polarity) -{ - uint32_t val = STM32_COMP_CSR; - - /* Use window mode so that COMP1 and COMP2 share non-inverting input */ - val |= STM32_COMP_CMP1EN | STM32_COMP_CMP2EN | STM32_COMP_WNDWEN; - - if (port == 0) { - /* use the right comparator inverted input for COMP1 */ - STM32_COMP_CSR = (val & ~STM32_COMP_CMP1INSEL_MASK) | - (polarity ? STM32_COMP_CMP1INSEL_INM4 - : STM32_COMP_CMP1INSEL_INM6); - } else { - /* use the right comparator inverted input for COMP2 */ - STM32_COMP_CSR = (val & ~STM32_COMP_CMP2INSEL_MASK) | - (polarity ? STM32_COMP_CMP2INSEL_INM5 - : STM32_COMP_CMP2INSEL_INM6); - } -} - -/* Initialize pins used for TX and put them in Hi-Z */ -static inline void pd_tx_init(void) -{ - gpio_config_module(MODULE_USB_PD, 1); -} - -static inline void pd_set_host_mode(int port, int enable) -{ - if (port == 0) { - if (enable) { - /* We never charging in power source mode */ - gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1); - /* High-Z is used for host mode. */ - gpio_set_level(GPIO_USB_C0_CC1_ODL, 1); - gpio_set_level(GPIO_USB_C0_CC2_ODL, 1); - } else { - /* Kill VBUS power supply */ - gpio_set_level(GPIO_USB_C0_5V_EN, 0); - /* Pull low for device mode. */ - gpio_set_level(GPIO_USB_C0_CC1_ODL, 0); - gpio_set_level(GPIO_USB_C0_CC2_ODL, 0); - /* Let charge_manager decide to enable the port */ - } - } else { - if (enable) { - /* We never charging in power source mode */ - gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1); - /* High-Z is used for host mode. */ - gpio_set_level(GPIO_USB_C1_CC1_ODL, 1); - gpio_set_level(GPIO_USB_C1_CC2_ODL, 1); - } else { - /* Kill VBUS power supply */ - gpio_set_level(GPIO_USB_C1_5V_EN, 0); - /* Pull low for device mode. */ - gpio_set_level(GPIO_USB_C1_CC1_ODL, 0); - gpio_set_level(GPIO_USB_C1_CC2_ODL, 0); - /* Let charge_manager decide to enable the port */ - } - } -} - -/** - * Initialize various GPIOs and interfaces to safe state at start of pd_task. - * - * These include: - * VBUS, charge path based on power role. - * Physical layer CC transmit. - * VCONNs disabled. - * - * @param port USB-C port number - * @param power_role Power role of device - */ -static inline void pd_config_init(int port, uint8_t power_role) -{ - /* - * Set CC pull resistors, and charge_en and vbus_en GPIOs to match - * the initial role. - */ - pd_set_host_mode(port, power_role); - - /* Initialize TX pins and put them in Hi-Z */ - pd_tx_init(); - - /* Reset mux ... for NONE polarity doesn't matter */ - usb_mux_set(port, USB_PD_MUX_NONE, USB_SWITCH_DISCONNECT, 0); - - if (port == 0) { - gpio_set_level(GPIO_USB_C0_CC1_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C0_CC2_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C0_DP_HPD, 0); - } else { - gpio_set_level(GPIO_USB_C1_CC1_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C1_CC2_VCONN1_EN_L, 1); - gpio_set_level(GPIO_USB_C1_DP_HPD, 0); - } -} - -static inline int pd_adc_read(int port, int cc) -{ - if (port == 0) - return adc_read_channel(cc ? ADC_C0_CC2_PD : ADC_C0_CC1_PD); - else - return adc_read_channel(cc ? ADC_C1_CC2_PD : ADC_C1_CC1_PD); -} - -static inline void pd_set_vconn(int port, int polarity, int enable) -{ - /* Set VCONN on the opposite CC line from the polarity */ - if (port == 0) - gpio_set_level(polarity ? GPIO_USB_C0_CC1_VCONN1_EN_L : - GPIO_USB_C0_CC2_VCONN1_EN_L, !enable); - else - gpio_set_level(polarity ? GPIO_USB_C1_CC1_VCONN1_EN_L : - GPIO_USB_C1_CC2_VCONN1_EN_L, !enable); -} - -#endif /* __CROS_EC_USB_PD_CONFIG_H */ diff --git a/board/samus_pd/usb_pd_policy.c b/board/samus_pd/usb_pd_policy.c deleted file mode 100644 index cdf234a743..0000000000 --- a/board/samus_pd/usb_pd_policy.c +++ /dev/null @@ -1,151 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "atomic.h" -#include "charge_manager.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "registers.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "util.h" -#include "usb_mux.h" -#include "usb_pd.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -/* Define typical operating power and max power */ -#define OPERATING_POWER_MW 15000 -#define MAX_POWER_MW 60000 -#define MAX_CURRENT_MA 3000 - -/* - * Do not request any voltage within this deadband region, where - * we're not sure whether or not the boost or the bypass will be on. - */ -#define INPUT_VOLTAGE_DEADBAND_MIN 9700 -#define INPUT_VOLTAGE_DEADBAND_MAX 11999 - -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_COMM_CAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 900, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(4750, 21000, 15000), - PDO_VAR(4750, 21000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - -__override int pd_is_valid_input_voltage(int mv) -{ - /* Allow any voltage not in the boost bypass deadband */ - return (mv < INPUT_VOLTAGE_DEADBAND_MIN) || - (mv > INPUT_VOLTAGE_DEADBAND_MAX); -} - -int pd_set_power_supply_ready(int port) -{ - /* provide VBUS */ - gpio_set_level(port ? GPIO_USB_C1_5V_EN : GPIO_USB_C0_5V_EN, 1); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; /* we are ready */ -} - -void pd_power_supply_reset(int port) -{ - /* Kill VBUS */ - gpio_set_level(port ? GPIO_USB_C1_5V_EN : GPIO_USB_C0_5V_EN, 0); - - /* notify host of power info change */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_snk_is_vbus_provided(int port) -{ - return gpio_get_level(port ? GPIO_USB_C1_VBUS_WAKE : - GPIO_USB_C0_VBUS_WAKE); -} - -int pd_check_vconn_swap(int port) -{ - /* in S5, do not allow vconn swap since pp5000 rail is off */ - return gpio_get_level(GPIO_PCH_SLP_S5_L); -} - -/* ----------------- Vendor Defined Messages ------------------ */ -#define PORT_TO_HPD(port) ((port) ? GPIO_USB_C1_DP_HPD : GPIO_USB_C0_DP_HPD) -__override void svdm_dp_post_config(int port) -{ - dp_flags[port] |= DP_FLAGS_DP_ON; - if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) - return; - - gpio_set_level(PORT_TO_HPD(port), 1); -} - -static void hpd0_irq_deferred(void) -{ - gpio_set_level(GPIO_USB_C0_DP_HPD, 1); -} - -static void hpd1_irq_deferred(void) -{ - gpio_set_level(GPIO_USB_C1_DP_HPD, 1); -} - -DECLARE_DEFERRED(hpd0_irq_deferred); -DECLARE_DEFERRED(hpd1_irq_deferred); -#define PORT_TO_HPD_IRQ_DEFERRED(port) ((port) ? \ - &hpd1_irq_deferred_data : \ - &hpd0_irq_deferred_data) - -__override int svdm_dp_attention(int port, uint32_t *payload) -{ - int cur_lvl; - int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); - int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); - enum gpio_signal hpd = PORT_TO_HPD(port); - cur_lvl = gpio_get_level(hpd); - - dp_status[port] = payload[1]; - - /* Its initial DP status message prior to config */ - if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { - if (lvl) - dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; - return 1; - } - - if (irq & cur_lvl) { - gpio_set_level(hpd, 0); - hook_call_deferred(PORT_TO_HPD_IRQ_DEFERRED(port), - HPD_DSTREAM_DEBOUNCE_IRQ); - } else if (irq & !cur_lvl) { - CPRINTF("ERR:HPD:IRQ&LOW\n"); - return 0; /* nak */ - } else { - gpio_set_level(hpd, lvl); - } - /* ack */ - return 1; -} - -__override void svdm_exit_dp_mode(int port) -{ - gpio_set_level(PORT_TO_HPD(port), 0); -} diff --git a/board/samus_pd/vif_override.xml b/board/samus_pd/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/samus_pd/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/sklrvp_mchp/battery.c b/board/sklrvp_mchp/battery.c deleted file mode 120000 index 569f81ec47..0000000000 --- a/board/sklrvp_mchp/battery.c +++ /dev/null @@ -1 +0,0 @@ -../tglrvpu_ite/battery.c
\ No newline at end of file diff --git a/board/sklrvp_mchp/board.c b/board/sklrvp_mchp/board.c deleted file mode 100644 index af286a7df0..0000000000 --- a/board/sklrvp_mchp/board.c +++ /dev/null @@ -1,344 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Microchip Evaluation Board(EVB) with - * MEC1521H 144-pin processor card. - * EVB connected to Intel eSPI host chipset. - */ - -/* #include "bb_retimer.h" */ -#include "button.h" /* */ -#include "charger.h" /* */ -#include "chipset.h" -#include "driver/charger/isl9241.h" /* */ -#include "espi.h" -#include "extpower.h" -#include "driver/tcpm/fusb307.h" /* */ -#include "driver/tcpm/tcpci.h" -#include "gpio_chip.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "espi.h" -#include "lpc_chip.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power.h" -#include "power/skylake.h" -#include "power_button.h" -#include "spi.h" -#include "spi_chip.h" -#include "switch.h" -#include "system.h" -#include "tablet_mode.h" -#include "task.h" -#include "timer.h" -#include "uart.h" -#include "usb_mux.h" /* */ -#include "usb_pd.h" -#include "usb_pd_tcpm.h" /* */ -#include "util.h" -#include "battery_smart.h" - -#include "gpio_list.h" - -#define CPUTS(outstr) cputs(CC_SYSTEM, outstr) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) - -/* - * NOTE: MCHP EVB + SKL RVP3 does not use BD99992 PMIC. - * RVP3 PMIC controlled by RVP3 logic. - */ -#define I2C_ADDR_BD99992_FLAGS 0x30 - -/* TCPC table of GPIO pins */ -const struct tcpc_gpio_config_t tcpc_gpios[] = { - [TYPE_C_PORT_0] = { - .vbus = { - .pin = GPIO_USB_C0_VBUS_INT, - .pin_pol = 1, - }, - .src = { - .pin = GPIO_USB_C0_SRC_EN, - .pin_pol = 1, - }, - .snk = { - .pin = GPIO_USB_C0_SNK_EN_L, - .pin_pol = 0, - }, - .src_ilim = { - .pin = GPIO_USB_C0_SRC_HI_ILIM, - .pin_pol = 1, - }, - }, - [TYPE_C_PORT_1] = { - .vbus = { - .pin = GPIO_USB_C1_VBUS_INT, - .pin_pol = 1, - }, - .src = { - .pin = GPIO_USB_C1_SRC_EN, - .pin_pol = 1, - }, - .snk = { - .pin = GPIO_USB_C1_SNK_EN_L, - .pin_pol = 0, - }, - .src_ilim = { - .pin = GPIO_USB_C1_SRC_HI_ILIM, - .pin_pol = 1, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* USB-C TPCP Configuration */ -const struct tcpc_config_t tcpc_config[] = { - [TYPE_C_PORT_0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = MCHP_I2C_PORT0, - .addr_flags = FUSB307_I2C_ADDR_FLAGS, - }, - .drv = &fusb307_tcpm_drv, - }, - [TYPE_C_PORT_1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = MCHP_I2C_PORT2, - .addr_flags = FUSB307_I2C_ADDR_FLAGS, - }, - .drv = &fusb307_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* USB MUX Configuration */ -const struct usb_mux usb_muxes[] = { - [TYPE_C_PORT_0] = { - .usb_port = TYPE_C_PORT_0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - [TYPE_C_PORT_1] = { - .usb_port = TYPE_C_PORT_1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - /* - * Port-80 Display, Charger, Battery, IO-expanders, EEPROM, - * IMVP9, AUX-rail, power-monitor. - */ - [I2C_CHAN_BATT_CHG] = { - .name = "batt_chg", - .port = MCHP_I2C_PORT4, - .kbps = 100, - .scl = GPIO_SMB04_SCL, - .sda = GPIO_SMB04_SDA, - }, - /* other I2C devices */ - [I2C_CHAN_MISC] = { - .name = "misc", - .port = MCHP_I2C_PORT5, - .kbps = 100, - .scl = GPIO_SMB05_SCL, - .sda = GPIO_SMB05_SDA, - }, - [I2C_CHAN_TCPC_0] = { - .name = "tcpci0", - .port = MCHP_I2C_PORT0, - .kbps = 100, - .scl = GPIO_SMB00_SCL, - .sda = GPIO_SMB00_SDA, - }, - [I2C_CHAN_TCPC_1] = { - .name = "tcpci1", - .port = MCHP_I2C_PORT2, - .kbps = 100, - .scl = GPIO_SMB02_SCL, - .sda = GPIO_SMB02_SDA, - } -}; -BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_CHAN_COUNT); -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* Charger Chips */ -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = ISL9241_ADDR_FLAGS, - .drv = &isl9241_drv, - }, -}; - -static void sklrvp_init(void) -{ - int extpwr = extpower_is_present(); - - /* Provide AC status to the PCH */ - CPRINTS("Set PCH_ACOK = %d", extpwr); - gpio_set_level(GPIO_PCH_ACOK, extpwr); -} -DECLARE_HOOK(HOOK_INIT, sklrvp_init, HOOK_PRIO_DEFAULT); - -static void sklrvp_interrupt_init(void) -{ - /* Enable ALL_SYS_PWRGD interrupt */ - CPUTS("IEN ALL_SYS_PWRGD"); - gpio_enable_interrupt(GPIO_ALL_SYS_PWRGD); -} -DECLARE_HOOK(HOOK_INIT, sklrvp_interrupt_init, HOOK_PRIO_DEFAULT); - -/* Will this work for SKL-RVP */ -/******************************************************************************/ -/* PWROK signal configuration */ -/* - * SKL with MCHP EVB uses EC to handle ALL_SYS_PWRGD signal. - * MEC170x/MEC152x connected to SKL/KBL RVP3 reference board - * is required to monitor ALL_SYS_PWRGD and drive SYS_RESET_L - * after a 10 to 100 ms delay. - */ -#ifdef CONFIG_BOARD_EC_HANDLES_ALL_SYS_PWRGD - -static void board_all_sys_pwrgd(void) -{ - int allsys_in = gpio_get_level(GPIO_ALL_SYS_PWRGD); - int allsys_out = gpio_get_level(GPIO_SYS_RESET_L); - - if (allsys_in == allsys_out) - return; - - CPRINTS("ALL_SYS_PWRGD=%d SYS_RESET_L=%d", allsys_in, allsys_out); - - /* - * Wait at least 10 ms between power signals going high - */ - if (allsys_in) - msleep(100); - - if (!allsys_out) { - gpio_set_level(GPIO_SYS_RESET_L, allsys_in); - /* Force fan on for kabylake RVP */ - gpio_set_level(GPIO_EC_FAN1_PWM, 1); - CPRINTS("Set SYS_RESET_L = %d", allsys_in); - } -} -DECLARE_DEFERRED(board_all_sys_pwrgd); - -void board_all_sys_pwrgd_interrupt(enum gpio_signal signal) -{ - CPUTS("ISR ALL_SYS_PWRGD"); - hook_call_deferred(&board_all_sys_pwrgd_data, 0); -} -#endif /* #ifdef CONFIG_BOARD_HAS_ALL_SYS_PWRGD */ - -/* - * Returns board information (board id[7:0] and Fab id[15:8]) on success - * -1 on error. - */ -int board_get_version(void) -{ - int port0, port1; - int fab_id, board_id, bom_id; - - if (ioexpander_read_intelrvp_version(&port0, &port1)) - return -1; - /* - * Port0: bit 0 - BOM ID(2) - * bit 2:1 - FAB ID(1:0) + 1 - * Port1: bit 7:6 - BOM ID(1:0) - * bit 5:0 - BOARD ID(5:0) - */ - bom_id = ((port1 & 0xC0) >> 6) | ((port0 & 0x01) << 2); - fab_id = ((port0 & 0x06) >> 1) + 1; - board_id = port1 & 0x3F; - - CPRINTS("BID:0x%x, FID:0x%x, BOM:0x%x", board_id, fab_id, bom_id); - - return board_id | (fab_id << 8); -} - -#ifdef CONFIG_BOARD_PRE_INIT -/* - * Used to enable JTAG debug during development. - * NOTE: UART2_TX on the same pin as SWV(JTAG_TDO). - * If UART2 is used for EC console you cannot enable SWV. - * For no SWV change mode to MCHP_JTAG_MODE_SWD. - * For low power idle testing enable GPIO060 as function 2(48MHZ_OUT) - * to check PLL is turning off in heavy sleep. Note, do not put GPIO060 - * in gpio.inc - * GPIO060 is port 1 bit[16]. - */ -void board_config_pre_init(void) -{ -#ifdef CONFIG_CHIPSET_DEBUG - MCHP_EC_JTAG_EN = MCHP_JTAG_ENABLE + MCHP_JTAG_MODE_SWD; -#endif - -#if defined(CONFIG_LOW_POWER_IDLE) && defined(CONFIG_MCHP_48MHZ_OUT) - gpio_set_alternate_function(1, 0x10000, 2); -#endif -} -#endif /* #ifdef CONFIG_BOARD_PRE_INIT */ - - -/* - * enable_input_devices() is called by the tablet_mode ISR, but changes the - * state of GPIOs, so its definition must reside after including gpio_list. - */ -static void enable_input_devices(void); -DECLARE_DEFERRED(enable_input_devices); - -void tablet_mode_interrupt(enum gpio_signal signal) -{ - hook_call_deferred(&enable_input_devices_data, 0); -} - -/* SPI devices */ -const struct spi_device_t spi_devices[] = { - { QMSPI0_PORT, 4, GPIO_QMSPI_CS0}, -}; -const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); - -/* - * Enable or disable input devices, - * based upon chipset state and tablet mode - */ -static void enable_input_devices(void) -{ - int kb_enable = 1; - int tp_enable = 1; - - /* Disable both TP and KB in tablet mode */ - if (!gpio_get_level(GPIO_TABLET_MODE_L)) - kb_enable = tp_enable = 0; - /* Disable TP if chipset is off */ - else if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) - tp_enable = 0; - - keyboard_scan_enable(kb_enable, KB_SCAN_DISABLE_LID_ANGLE); - gpio_set_level(GPIO_ENABLE_TOUCHPAD, tp_enable); -} - -#ifdef CONFIG_USBC_VCONN -void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) -{ -#ifndef CONFIG_USBC_PPC_VCONN - /* - * TODO: MCHP EC does not have built-in TCPC. Does external - * I2C based TCPC need this? - */ -#endif -} -#endif - diff --git a/board/sklrvp_mchp/board.h b/board/sklrvp_mchp/board.h deleted file mode 100644 index c415af8107..0000000000 --- a/board/sklrvp_mchp/board.h +++ /dev/null @@ -1,297 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Intel SKL RVP3 fly wired to MEC152x EVB board-specific configuration - * Microchip Evaluation Board (EVB) with - * MEC15211H 144-pin processor card. - * SKL RVP3 has Kabylake silicon. - */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* - * Use UART2 for EC console - */ -#undef CONFIG_UART_CONSOLE -#define CONFIG_UART_CONSOLE 0 - -/* - * Initial board bring-up and prevent power button task from - * generating event to exit G3 state. - */ -/* #define CONFIG_BRINGUP */ - -/* - * Debug on EVB with CONFIG_CHIPSET_DEBUG - * Keep WDG disabled and JTAG enabled. - * CONFIG_BOARD_PRE_INIT enables JTAG early - * #define CONFIG_CHIPSET_DEBUG - */ - -#ifdef CONFIG_CHIPSET_DEBUG -#ifndef CONFIG_BOARD_PRE_INIT -#define CONFIG_BOARD_PRE_INIT -#endif -#endif - -/* - * DEBUG: Add CRC32 in last 4 bytes of EC_RO/RW binaries - * in SPI. LFW will use DMA CRC32 HW to check data integrity. - * #define CONFIG_MCHP_LFW_DEBUG - */ - - -/* - * Override Boot-ROM JTAG mode - * 0x01 = 4-pin standard JTAG - * 0x03 = ARM 2-pin SWD + 1-pin SWV - * 0x05 = ARM 2-pin SWD no SWV. Required if UART2 is used. - */ -/* #define CONFIG_MCHP_JTAG_MODE 0x05 */ - -/* debug MCHP eSPI */ -/* #define CONFIG_ESPI_DEBUG */ - -/* - * Enable Trace FIFO Debug port - * When this is undefined all TRACEn() and tracen() - * macros are defined as blank. - * Uncomment this define to enable these messages. - * Only enable if GPIO's 0171 & 0171 are available therefore - * define this at the board level. - */ -/* #define CONFIG_MCHP_TFDP */ - -/* - * Enable MCHP specific GPIO EC UART commands - * for debug. - */ -/* #define CONFIG_MEC_GPIO_EC_CMDS */ - -/* - * Enable CPRINT in chip eSPI module - * and EC UART test command. - */ -/* #define CONFIG_MCHP_ESPI_DEBUG */ - -/* - * DEBUG - * Disable ARM Cortex-M4 write buffer so - * exceptions become synchronous. - * - * #define CONFIG_DEBUG_DISABLE_WRITE_BUFFER - */ - -/* - * DEBUG: Configure MEC152x GPIO060 as 48MHZ_OUT to - * verify & debug clock is shutdown in heavy sleep. - */ -/* #define CONFIG_MCHP_48MHZ_OUT */ - -/* - * EVB eSPI test mode (no eSPI master connected) - * #define EVB_NO_ESPI_TEST_MODE - */ - -/* - * Enable board specific ISR on ALL_SYS_PWRGD signal. - * Requires for handling Kabylake/Skylake RVP3 board's - * ALL_SYS_PWRGD signal. - */ -#define CONFIG_BOARD_EC_HANDLES_ALL_SYS_PWRGD - -/* - * Maximum clock frequence eSPI EC advertises - * Values in MHz are 20, 25, 33, 50, and 66 - */ -/* SKL/KBL + EVB fly-wire hook up only supports 20MHz */ -#define CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ MCHP_ESPI_CAP1_MAX_FREQ_20M - - -/* - * EC eSPI advertises IO lanes - * 0 = Single - * 1 = Single and Dual - * 2 = Single and Quad - * 3 = Single, Dual, and Quad - */ -/* KBL + EVB fly-wire hook up only support Single mode */ -#define CONFIG_HOSTCMD_ESPI_EC_MODE MCHP_ESPI_CAP1_SINGLE_MODE - -/* - * Bit map of eSPI channels EC advertises - * bit[0] = 1 Peripheral channel - * bit[1] = 1 Virtual Wire channel - * bit[2] = 1 OOB channel - * bit[3] = 1 Flash channel - */ -#define CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP MCHP_ESPI_CAP0_ALL_CHAN_SUPP - -/* MCHP EC variant */ -#define VARIANT_INTELRVP_EC_MCHP - -/* MECC config */ -#define CONFIG_INTEL_RVP_MECC_VERSION_0_9 - -/* USB MUX */ -#define CONFIG_USB_MUX_VIRTUAL - -/* Not using EC FAN control */ -#undef CONFIG_FANS -#define BOARD_FAN_MIN_RPM 3000 -#define BOARD_FAN_MAX_RPM 10000 - -/* Temperature sensor module has dependency on EC fan control */ -#undef CONFIG_TEMP_SENSOR - -#include "baseboard.h" - -/* - * Configuration after inclusion of base board. - * baseboard enables CONFIG_LOW_POWER_IDLE. - * Disable here. - * #undef CONFIG_LOW_POWER_IDLE - */ - -#define CONFIG_CHIPSET_SKYLAKE -#define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD -#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK -#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_ALL_SYS_PWRGD -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_L -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L -#define GPIO_BAT_LED_RED_L GPIO_BAT_LED_GREEN_L -#define GPIO_PWR_LED_WHITE_L GPIO_AC_LED_GREEN_L -/* MEC152x EVB pin used to enable SKL fan(s) */ -#define GPIO_FAN_POWER_EN GPIO_EC_FAN1_PWM - - -/* Charger */ -#define CONFIG_CHARGER_ISL9241 - -/* DC Jack charge ports */ -#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT -#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 - -/* USB ports */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define DEDICATED_CHARGE_PORT 2 - -#ifdef CONFIG_USBC_VCONN - #define CONFIG_USBC_VCONN_SWAP - /* delay to turn on/off vconn */ - #define PD_VCONN_SWAP_DELAY 5000 /* us */ -#endif - -/* - * USB PD configuration using FUSB307 chip on I2C as - * an example. - */ -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#define CONFIG_USB_PD_TCPM_FUSB307 -#define CONFIG_USB_PD_TCPM_TCPCI - -#define I2C_PORT_CHARGER MCHP_I2C_PORT2 -#define I2C_PORT_BATTERY MCHP_I2C_PORT2 -#define I2C_PORT_PCA9555_BOARD_ID_GPIO MCHP_I2C_PORT2 -#define I2C_PORT_PORT80 MCHP_I2C_PORT2 -#define I2C_ADDR_PCA9555_BOARD_ID_GPIO 0x22 -#define PORT80_I2C_ADDR MAX695X_I2C_ADDR1_FLAGS - -/* - * External parallel crystal between XTAL1 and XTAL2 pins. - * #define CONFIG_CLOCK_SRC_EXTERNAL - * #define CONFIG_CLOCK_CRYSTAL - * External single ended 32KHz 50% duty cycle input clock. - * #define CONFIG_CLOCK_SRC_EXTERNAL - * #undef CONFIG_CLOCK_CRYSTAL - * Use internal silicon 32KHz oscillator - * #undef CONFIG_CLOCK_SRC_EXTERNAL - * CONFIG_CLOCK_CRYSTAL is a don't care - * - * -#define CONFIG_CLOCK_SRC_EXTERNAL -*/ -#undef CONFIG_CLOCK_SRC_EXTERNAL -#define CONFIG_CLOCK_CRYSTAL - -/* - * MEC1521H loads firmware using QMSPI controller - * CONFIG_SPI_FLASH_PORT is the index into - * spi_devices[] in board.c - */ -#define CONFIG_SPI_FLASH_PORT 0 -#define CONFIG_SPI_FLASH -/* - * Google uses smaller flashes on chromebook boards - * MCHP SPI test dongle for EVB uses 16MB W25Q128F - * Configure for smaller flash is OK for testing except - * for SPI flash lock bit. - */ - #define CONFIG_FLASH_SIZE_BYTES 524288 - #define CONFIG_SPI_FLASH_W25X40 - -/* - * Enable extra SPI flash and generic SPI - * commands via EC UART - */ -#define CONFIG_CMD_SPI_FLASH -#define CONFIG_CMD_SPI_XFER - - -/* MEC152x does not have GP-SPI controllers */ -#undef CONFIG_MCHP_GPSPI - - -#ifndef __ASSEMBLER__ - -/* #include "gpio_signal.h" */ -/* #include "registers.h" */ - - -enum sklrvp_charge_ports { - TYPE_C_PORT_0, - TYPE_C_PORT_1, -}; - -enum sklrvp_i2c_channel { - I2C_CHAN_BATT_CHG, - I2C_CHAN_MISC, - I2C_CHAN_TCPC_0, - I2C_CHAN_TCPC_1, - I2C_CHAN_COUNT, -}; - -enum battery_type { - BATTERY_SIMPLO_SMP_HHP_408, - BATTERY_SIMPLO_SMP_CA_445, - BATTERY_TYPE_COUNT, -}; - -/* Map I2C port to controller */ -int board_i2c_p2c(int port); - -/* Reset PD MCU */ -void board_reset_pd_mcu(void); - -#ifdef CONFIG_LOW_POWER_IDLE -void board_prepare_for_deep_sleep(void); -void board_resume_from_deep_sleep(void); -#endif - -#ifdef CONFIG_BOARD_EC_HANDLES_ALL_SYS_PWRGD -void board_all_sys_pwrgd_interrupt(enum gpio_signal signal); -#endif - -int board_get_version(void); - -/* MCHP we need to define this for use by baseboard */ -#define PD_MAX_POWER_MW 60000 - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/sklrvp_mchp/build.mk b/board/sklrvp_mchp/build.mk deleted file mode 100644 index 81d62ff652..0000000000 --- a/board/sklrvp_mchp/build.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Intel SKL-RVP fly wired to MEC152x EVB board-specific configuration -# - -# the IC is Microchip MEC1521 -# external SPI is 512KB -# external clock is crystal -CHIP:=mchp -CHIP_FAMILY:=mec152x -CHIP_VARIANT:=mec1521 -CHIP_SPI_SIZE_KB:=512 -BASEBOARD:=intelrvp - -board-y=board.o -board-$(CONFIG_BATTERY_SMART)+=battery.o diff --git a/board/sklrvp_mchp/ec.tasklist b/board/sklrvp_mchp/ec.tasklist deleted file mode 100644 index b264f6522a..0000000000 --- a/board/sklrvp_mchp/ec.tasklist +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Intel SKL-RVP MCHP MEC152x EVB board-specific configuration. - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) - diff --git a/board/sklrvp_mchp/gpio.inc b/board/sklrvp_mchp/gpio.inc deleted file mode 100644 index 9f9dde51f9..0000000000 --- a/board/sklrvp_mchp/gpio.inc +++ /dev/null @@ -1,312 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * mec152x EVB board GPIO pins - * !!!!!!!!!!!!!!!!!!!!!!! IMPORTANT !!!!!!!!!!!!!!!!!!!!!!!!!!!! - * MEC152X data sheets GPIO numbers are OCTAL. - * Original glados MEC1322 used these octal numbers as base 10. - * mec152X and its boards will use OCTAL therefore make sure all - * numbers used below are written as C OCTAL with a leading 0. - * Signal names are based upon the MEC152x MECC schematic. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * - */ -/* NOTE: MEC152XH MECC JTAG - * GPIO_0145 is JTAG_TDI - * GPIO_0146 is JTAG_TDO - * GPIO_0147 is JTAG_CLK - * GPIO_0150 is JTAG_TMS - */ -/* NOTE: MEC152X QMSPI controller pins - * MEC152X implements one instance of QMSPI and one - * instance of SLV_SPI. It does not have the GP-SPI - * controllers that MEC1701 has. - * MEC152X QMSPI has three groups of pins that can be - * connected to QMSPI controller. - * PVT_CS#,IO0,IO1,IO2,IO3,CLK - * SHD_CS0#,CS1#,IO0,IO1,IO2,IO3,CLK - * GPSPI_CS#,IO0,IO1,IO2,IO3,CLK - * MEC152X EVB and MECC boards connect their external SPI flash - * to SHD_xxx QMSPI pins. This assumes the part's OTP and straps - * set to not force BootROM load from PVT_xxx SPI port. - * PVT_xxx and GPSPI_xxx are available other uses. - */ -/* NOTE: MEC152xH-SZ unimplemented GPIO pins. - * All MEC152x parts: 041, 0103, 0110, 0164 - * MEC1521H-SZ: 0213, 0211, 0212 - */ - -/* include common gpio.inc under chip/mchp/lfw/... */ -#include "chip/mchp/lfw/gpio.inc" - -#define GPIO_BOTH_EDGES_PU (GPIO_INT_BOTH | GPIO_PULL_UP) -#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW) - -/* MEC152x is eSPI only !!! - * MEC1521 MECC board GPIO_064 PCI_nRESET pulled high to VTR3. - * No signal connection possible. - */ - -GPIO_INT(LID_OPEN, PIN(015), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) - - -GPIO_INT(AC_PRESENT, PIN(014), GPIO_INT_BOTH, extpower_interrupt) - -/* DC jack handled by intelrvp base board */ -GPIO_INT(DC_JACK_PRESENT, PIN(0244), GPIO_INT_BOTH, board_dc_jack_interrupt) - -/* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */ -GPIO_INT(POWER_BUTTON_L, PIN(023), GPIO_INT_BOTH, power_button_interrupt) - -/* RSMRST from PMIC */ -GPIO_INT(RSMRST_L_PGOOD, PIN(0126), GPIO_INT_BOTH, power_signal_interrupt) - -GPIO_INT(PCH_SLP_SUS_L, PIN(0175), GPIO_INT_BOTH, power_signal_interrupt) - -/* - * Handle ALL_SYS_PWRGD from SKL RVP3 board - * MEC1521H-SZ GPIO_057/VCC_PWRGD OK - */ -GPIO_INT(ALL_SYS_PWRGD, PIN(057), GPIO_INT_BOTH, board_all_sys_pwrgd_interrupt) - -/* Kabylake bring up move to ordinary GPIO input */ -/* MEC1521H-SZ GPIO_0034/GPSPI_IO2 OK */ -/* - *GPIO_INT(VOLUME_UP_L, PIN(034), \ - *GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) - */ -/* MEC1521H-SZ GPIO_035/PWM8/CTOUT1/ICT15 OK */ -/* - *GPIO_INT(VOLUME_DOWN_L, PIN(035), GPIO_INT_BOTH | GPIO_PULL_UP, \ - * button_interrupt) - */ - -/* MEC1521H-SZ GPIO_0161/VCI_IN2# OK */ -GPIO_INT(PMIC_INT_L, PIN(0161), GPIO_INT_FALLING, power_signal_interrupt) - - /* MEC1521H-SZ GPIO_0162/VCI_IN1# OK */ -GPIO_INT(TABLET_MODE_L, PIN(0100), GPIO_INT_BOTH | GPIO_PULL_UP, \ - gmr_tablet_switch_isr) - -/* Delayed PWR_OK from PMIC */ -GPIO_INT(PMIC_DPWROK, PIN(0151), GPIO_INT_BOTH, power_signal_interrupt) - -/* UART input */ -/* MEC1521H-SZ UART0 pins are shared with MCHP TFDP. - * UART1 has one pin used as a Boot-ROM strap. - * UART2_RX is GPIO_0145/I2C09_SDA/JTAG_TDI/UART2_RX - * UART2_TX is GPIO_0146/I2C09_SCL/JTAG_TDO/UART2_TX - * We use ARM SWD on JTAG_TCK and JTAG_TMS freeing up UART2 pins. - */ -GPIO_INT(UART0_RX, PIN(0105), GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, \ - uart_deepsleep_interrupt) - -GPIO_INT(USB_C0_VBUS_INT, PIN(0101), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_VBUS_INT, PIN(0102), GPIO_INT_BOTH, tcpc_alert_event) - -/* GPIO Pins not interrupt enabled */ - -/* Kabylake bring up move to ordinary GPIO input */ -GPIO(VOLUME_UP_L, PIN(034), GPIO_INPUT | GPIO_PULL_UP) -GPIO(VOLUME_DOWN_L, PIN(035), GPIO_INPUT | GPIO_PULL_UP) -GPIO(WP_L, PIN(036), GPIO_INPUT) - -/* PCH and CPU pins */ - -/* - * This pull down should be removed and SLP_S0 should be enabled as a power - * signal interrupt in future hardware followers. The signal is pulled up - * in the SoC when the primary rails are on and/or ramping. - * In order to not get interrupt storms there should be external logic - * which makes this a true binary signal into the EC. - */ -GPIO(PCH_SLP_S0_L, PIN(0222), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(PCH_PWRBTN_L, PIN(043), GPIO_OUTPUT) -GPIO(PCH_SEC_DISABLE_L, PIN(022), GPIO_OUT_HIGH) - -GPIO(PCH_WAKE_L, PIN(0255), GPIO_ODR_HIGH) -GPIO(PCH_ACOK, PIN(0246), GPIO_OUT_LOW) -GPIO(PCH_RSMRST_L, PIN(012), GPIO_OUT_LOW) -GPIO(PCH_RTCRST, PIN(052), GPIO_OUT_LOW) - -GPIO(CPU_PROCHOT, PIN(0171), GPIO_OUT_LOW) - -GPIO(SYS_RESET_L, PIN(025), GPIO_OUT_LOW) - -GPIO(PMIC_SLP_SUS_L, PIN(033), GPIO_OUT_LOW) - -GPIO(EC_PCH_DSW_PWROK, PIN(013), GPIO_OUT_LOW) - -/* - * BATLOW_L and ROP_LDO_EN are stuffing options. Set as input to - * dynamically handle the stuffing option based on board id. - * As both signals have external pulls setting this pin as input - * won't harm anything. - */ -/* MEC1521H-SZ GPIO_0163/VCI_IN0# OK */ -GPIO(BATLOW_L_PMIC_LDO_EN, PIN(0163), GPIO_INPUT) - -/* I2C pins - these will be reconfigured for alternate function below */ -/* MEC1521H-SZ does not implement I2C08 pins */ -GPIO(SMB00_SCL, PIN(004), GPIO_INPUT) -GPIO(SMB00_SDA, PIN(003), GPIO_INPUT) -GPIO(SMB01_SCL, PIN(0131), GPIO_INPUT) -GPIO(SMB01_SDA, PIN(0130), GPIO_INPUT) -GPIO(SMB02_SCL, PIN(0155), GPIO_INPUT) -GPIO(SMB02_SDA, PIN(0154), GPIO_INPUT) -GPIO(SMB03_SCL, PIN(010), GPIO_INPUT) -GPIO(SMB03_SDA, PIN(007), GPIO_INPUT) -GPIO(SMB04_SCL, PIN(0144), GPIO_INPUT) -GPIO(SMB04_SDA, PIN(0143), GPIO_INPUT) -GPIO(SMB05_SCL, PIN(0142), GPIO_INPUT) -GPIO(SMB05_SDA, PIN(0141), GPIO_INPUT) - -/* usb related */ -GPIO(EN_PP3300_A, PIN(0153), GPIO_OUT_LOW) -GPIO(EN_PP5000, PIN(042), GPIO_OUT_LOW) -GPIO(USB_C0_SRC_EN, PIN(0206), GPIO_OUT_LOW) -GPIO(USB_C0_SNK_EN_L, PIN(0202), GPIO_ODR_LOW | GPIO_PULL_DOWN) -GPIO(USB_C0_SRC_HI_ILIM, PIN(0205), GPIO_OUT_LOW) -GPIO(USB_C1_SRC_EN, PIN(0226), GPIO_OUT_LOW) -GPIO(USB_C1_SNK_EN_L, PIN(0140), GPIO_ODR_LOW | GPIO_PULL_DOWN) -GPIO(USB_C1_SRC_HI_ILIM, PIN(0132), GPIO_OUT_LOW) - - -/* Fan PWM output and TACH input. PROCHOT input */ -GPIO(EC_FAN1_TTACH, PIN(050), GPIO_INPUT | GPIO_PULL_UP) -/* Fan PWM output - NC / testing only */ -GPIO(EC_FAN1_PWM, PIN(053), GPIO_OUT_LOW) - -/* prochot input from devices */ -GPIO(PLATFORM_EC_PROCHOT, PIN(051), GPIO_INPUT | GPIO_PULL_UP) - -/* Miscellaneous */ -GPIO(PWM_KBLIGHT, PIN(02), GPIO_OUT_LOW) -GPIO(ENTERING_RW, PIN(0221), GPIO_OUT_LOW) -GPIO(ENABLE_TOUCHPAD, PIN(0115), GPIO_OUT_LOW) -GPIO(EC_BATT_PRES_L, PIN(0200), GPIO_INPUT) -GPIO(WLAN_OFF_L, PIN(0245), GPIO_OUT_LOW) - -/* From lid sensor */ -GPIO(ENABLE_BACKLIGHT, PIN(00), GPIO_OUT_LOW) - -/* Board Version */ -GPIO(BOARD_VERSION1, PIN(0114), GPIO_INPUT) -GPIO(BOARD_VERSION2, PIN(0207), GPIO_INPUT) -GPIO(BOARD_VERSION3, PIN(0011), GPIO_INPUT) - -/* For LEDs */ -GPIO(BAT_LED_GREEN_L, PIN(0156), GPIO_OUT_HIGH) -GPIO(AC_LED_GREEN_L, PIN(0157), GPIO_OUT_HIGH) - -/* Used in baseboard/intelrvp */ -/* GPIO_0253 on EVB JP24-13. Jumper JP24 13-14 for 100K pull-up to Vbat */ -GPIO(EC_SPI_OE_N, PIN(0253), GPIO_OUT_LOW) - -/* Alternate functions GPIO definitions */ - -/* KB pins */ -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH) - -#if defined(CONFIG_CLOCK_SRC_EXTERNAL) && !defined(CONFIG_CLOCK_CRYSTAL) -/* 32KHZ_IN = GPIO_0165(Bank=3, bit=21) Func1 */ -ALTERNATE(PIN_MASK(3, 0x200000), 1, MODULE_PMU, 0) -#endif - -/* KB pins */ -/* - * MEC1521H-SZ (144 pin package) - * KSO00 = GPIO_0040 Func2 bank 1 bit 0 - * KSO01 = GPIO_0045 Func1 bank 1 bit 5 - * KSO02 = GPIO_0046 Func1 bank 1 bit 6 - * KSO03 = GPIO_0047 Func1 bank 1 bit 7 - * KSO04 = GPIO_0107 Func2 bank 2 bit 7 - * KSO05 = GPIO_0112 Func1 bank 2 bit 10 - * KSO06 = GPIO_0113 Func1 bank 2 bit 11 - * KSO07 = GPIO_0120 Func1 bank 2 bit 16 - * KSO08 = GPIO_0121 Func2 bank 2 bit 17 - * KSO09 = GPIO_0122 Func2 bank 2 bit 18 - * KSO10 = GPIO_0123 Func2 bank 2 bit 19 - * KSO11 = GPIO_0124 Func2 bank 2 bit 20 - * KSO12 = GPIO_0125 Func2 bank 2 bit 21 - * For 8x16 test keyboard add KSO13 - KSO15 - * KSO13 = GPIO_0126 Func2 bank 2 bit 22 - * KSO14 = GPIO_0152 Func1 bank 3 bit 10 - * KSO15 = GPIO_0151 Func2 bank 3 bit 9 - * - * KSI0 = GPIO_0017 Func1 bank 0 bit 15 - * KSI1 = GPIO_0020 Func1 bank 0 bit 16 - * KSI2 = GPIO_0021 Func1 bank 0 bit 17 - * KSI3 = GPIO_0026 Func1 bank 0 bit 22 - * KSI4 = GPIO_0027 Func1 bank 0 bit 23 - * KSI5 = GPIO_0030 Func1 bank 0 bit 24 - * KSI6 = GPIO_0031 Func1 bank 0 bit 25 - * KSI7 = GPIO_0032 Func1 bank 0 bit 26 - */ -/* KSO 0 Bank 1, Func2, bit 0 */ -ALTERNATE(PIN_MASK(1, 0x01), 2, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) - -#ifdef CONFIG_KEYBOARD_COL2_INVERTED -/* KSO 1-3 Bank 1, Func1, bits 5-7 */ -ALTERNATE(PIN_MASK(1, 0xA0), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -GPIO(KBD_KSO2, PIN(046), GPIO_KB_OUTPUT_COL2) -#else -/* KSO 1-3 Bank 1, Func1, bits 5-7 */ -ALTERNATE(PIN_MASK(1, 0xE0), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -#endif - -/* KSO 4, 8-12 Bank 2, Func2, bits 7, 17-21 */ -ALTERNATE(PIN_MASK(2, 0x003E0080), 2, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -/* KSO 5-7, Bank 2, Func1, bits 10-11, 16 */ -ALTERNATE(PIN_MASK(2, 0x00010C00), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) - -/* KSI 0-7, Bank 0, Func1, bit 15-17, 22-26 */ -ALTERNATE(PIN_MASK(0, 0x07C38000), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) - -/* - * ESPI_RESET# - GPIO_0061 Func 1, Bank 1 bit[17] - * ESPI_ALERT# - GPIO_0063 Func 1, Bank 1 bit[19] - * ESPI_CLK - GPIO_0065 Func 1, Bank 1 bit[21] - * ESPI_CS# - GPIO_0066 Func 1, Bank 1 bit[22] - * ESPI_IO0 - GPIO_0070 Func 1, Bank 1 bit[24] - * ESPI_IO1 - GPIO_0071 Func 1, Bank 1 bit[25] - * ESPI_IO2 - GPIO_0072 Func 1, Bank 1 bit[26] - * ESPI_IO3 - GPIO_0073 Func 1, Bank 1 bit[27] - */ -ALTERNATE(PIN_MASK(1, 0x0F6A0000), 1, MODULE_LPC, 0) - -/* I2C pins */ -/* MEC1521H-SZ does not implement I2C08 pins - * Configure I2C00-05 as I2C alternate function - * I2C00_SDA = GPIO_0003(Bank=0, bit=3) Func1 - * I2C00_SCL = GPIO_0004(Bank=0, bit=4) Func1 - * I2C01_SDA = GPIO_0130(Bank=2, bit=24) Func1 - * I2C01_SCL = GPIO_0131(Bank=2, bit=25) Func1 - * I2C02_SDA = GPIO_0154(Bank=3, bit=12) Func1 - * I2C02_SCL = GPIO_0155(Bank=3, bit=13) Func1 - * I2C03_SDA = GPIO_0007(Bank=0, bit=7) Func1 - * I2C03_SDL = GPIO_0010(Bank=0, bit=8) Func1 - * I2C04_SDA = GPIO_0143(Bank=3, bit=3) Func1 - * I2C04_SCL = GPIO_0144(Bank=3, bit=4) Func1 - * I2C05_SDA = GPIO_0141(Bank=3, bit=1) Func1 - * I2C05_SDL = GPIO_0142(Bank=3, bit=2) Func1 - */ -/* DEBUG with MECC not connected to motherboard. Enable internal pull-ups on I2C pins */ -ALTERNATE(PIN_MASK(0, 0x00000198), 1, MODULE_I2C, GPIO_ODR_HIGH) -ALTERNATE(PIN_MASK(2, 0x03000000), 1, MODULE_I2C, GPIO_ODR_HIGH) -ALTERNATE(PIN_MASK(3, 0x0000301E), 1, MODULE_I2C, GPIO_ODR_HIGH) - -/* ADC pins */ -/* ADC01 = GPIO_0201(Bank=4, bit=1) Func1 - * ADC03 = GPIO_0203(Bank=4, bit=3) Func1 - * ADC04 = GPIO_0204(Bank=4, bit=4) Func1 - * ADC07 = GPIO_0207/CMP_STRAP(Bank=4, bit=7) Func1 - */ -ALTERNATE(PIN_MASK(4, 0x009a), 1, MODULE_ADC, GPIO_ANALOG) - diff --git a/board/sklrvp_mchp/lfw/vif_override.xml b/board/sklrvp_mchp/lfw/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/sklrvp_mchp/lfw/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/sklrvp_mchp/vif_override.xml b/board/sklrvp_mchp/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/sklrvp_mchp/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/sklrvp_mchp1723/battery.c b/board/sklrvp_mchp1723/battery.c deleted file mode 120000 index 569f81ec47..0000000000 --- a/board/sklrvp_mchp1723/battery.c +++ /dev/null @@ -1 +0,0 @@ -../tglrvpu_ite/battery.c
\ No newline at end of file diff --git a/board/sklrvp_mchp1723/board.c b/board/sklrvp_mchp1723/board.c deleted file mode 100644 index 245f3c549a..0000000000 --- a/board/sklrvp_mchp1723/board.c +++ /dev/null @@ -1,344 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Microchip Evaluation Board(EVB) with - * MEC1521H 144-pin processor card. - * EVB connected to Intel eSPI host chipset. - */ - -/* #include "bb_retimer.h" */ -#include "button.h" /* */ -#include "charger.h" /* */ -#include "chipset.h" -#include "driver/charger/isl9241.h" /* */ -#include "espi.h" -#include "extpower.h" -#include "driver/tcpm/fusb307.h" /* */ -#include "driver/tcpm/tcpci.h" -#include "gpio_chip.h" -#include "gpio.h" -#include "hooks.h" -#include "host_command.h" -#include "i2c.h" -#include "espi.h" -#include "lpc_chip.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power.h" -#include "power/skylake.h" -#include "power_button.h" -#include "spi.h" -#include "spi_chip.h" -#include "switch.h" -#include "system.h" -#include "tablet_mode.h" -#include "task.h" -#include "timer.h" -#include "uart.h" -#include "usb_mux.h" /* */ -#include "usb_pd.h" -#include "usb_pd_tcpm.h" /* */ -#include "util.h" -#include "battery_smart.h" - -#include "gpio_list.h" - -#define CPUTS(outstr) cputs(CC_SYSTEM, outstr) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) - -/* - * NOTE: MCHP EVB + SKL RVP3 does not use BD99992 PMIC. - * RVP3 PMIC controlled by RVP3 logic. - */ -#define I2C_ADDR_BD99992_FLAGS 0x30 - -/* TCPC table of GPIO pins */ -const struct tcpc_gpio_config_t tcpc_gpios[] = { - [TYPE_C_PORT_0] = { - .vbus = { - .pin = GPIO_USB_C0_VBUS_INT, - .pin_pol = 1, - }, - .src = { - .pin = GPIO_USB_C0_SRC_EN, - .pin_pol = 1, - }, - .snk = { - .pin = GPIO_USB_C0_SNK_EN_L, - .pin_pol = 0, - }, - .src_ilim = { - .pin = GPIO_USB_C0_SRC_HI_ILIM, - .pin_pol = 1, - }, - }, - [TYPE_C_PORT_1] = { - .vbus = { - .pin = GPIO_USB_C1_VBUS_INT, - .pin_pol = 1, - }, - .src = { - .pin = GPIO_USB_C1_SRC_EN, - .pin_pol = 1, - }, - .snk = { - .pin = GPIO_USB_C1_SNK_EN_L, - .pin_pol = 0, - }, - .src_ilim = { - .pin = GPIO_USB_C1_SRC_HI_ILIM, - .pin_pol = 1, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* USB-C TPCP Configuration */ -const struct tcpc_config_t tcpc_config[] = { - [TYPE_C_PORT_0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = MCHP_I2C_PORT0, - .addr_flags = FUSB307_I2C_ADDR_FLAGS, - }, - .drv = &fusb307_tcpm_drv, - }, - [TYPE_C_PORT_1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = MCHP_I2C_PORT2, - .addr_flags = FUSB307_I2C_ADDR_FLAGS, - }, - .drv = &fusb307_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* USB MUX Configuration */ -const struct usb_mux usb_muxes[] = { - [TYPE_C_PORT_0] = { - .usb_port = TYPE_C_PORT_0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - [TYPE_C_PORT_1] = { - .usb_port = TYPE_C_PORT_1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - /* - * Port-80 Display, Charger, Battery, IO-expanders, EEPROM, - * IMVP9, AUX-rail, power-monitor. - */ - [I2C_CHAN_BATT_CHG] = { - .name = "batt_chg", - .port = MCHP_I2C_PORT4, - .kbps = 100, - .scl = GPIO_I2C02_SCL, - .sda = GPIO_I2C02_SDA, - }, - /* other I2C devices */ - [I2C_CHAN_MISC] = { - .name = "misc", - .port = MCHP_I2C_PORT5, - .kbps = 100, - .scl = GPIO_I2C00_SCL, - .sda = GPIO_I2C00_SDA, - }, - [I2C_CHAN_TCPC_0] = { - .name = "tcpci0", - .port = MCHP_I2C_PORT0, - .kbps = 100, - .scl = GPIO_I2C04_SCL, - .sda = GPIO_I2C04_SDA, - }, - [I2C_CHAN_TCPC_1] = { - .name = "tcpci1", - .port = MCHP_I2C_PORT2, - .kbps = 100, - .scl = GPIO_I2C05_SCL, - .sda = GPIO_I2C05_SDA, - } -}; -BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_CHAN_COUNT); -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* Charger Chips */ -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = ISL9241_ADDR_FLAGS, - .drv = &isl9241_drv, - }, -}; - -static void sklrvp_init(void) -{ - int extpwr = extpower_is_present(); - - /* Provide AC status to the PCH */ - CPRINTS("Set PCH_ACOK = %d", extpwr); - gpio_set_level(GPIO_PCH_ACOK, extpwr); -} -DECLARE_HOOK(HOOK_INIT, sklrvp_init, HOOK_PRIO_DEFAULT); - -static void sklrvp_interrupt_init(void) -{ - /* Enable ALL_SYS_PWRGD interrupt */ - CPUTS("IEN ALL_SYS_PWRGD"); - gpio_enable_interrupt(GPIO_ALL_SYS_PWRGD); -} -DECLARE_HOOK(HOOK_INIT, sklrvp_interrupt_init, HOOK_PRIO_DEFAULT); - -/* Will this work for SKL-RVP */ -/******************************************************************************/ -/* PWROK signal configuration */ -/* - * SKL with MCHP EVB uses EC to handle ALL_SYS_PWRGD signal. - * MEC170x/MEC152x connected to SKL/KBL RVP3 reference board - * is required to monitor ALL_SYS_PWRGD and drive SYS_RESET_L - * after a 10 to 100 ms delay. - */ -#ifdef CONFIG_BOARD_EC_HANDLES_ALL_SYS_PWRGD - -static void board_all_sys_pwrgd(void) -{ - int allsys_in = gpio_get_level(GPIO_ALL_SYS_PWRGD); - int allsys_out = gpio_get_level(GPIO_SYS_RESET_L); - - if (allsys_in == allsys_out) - return; - - CPRINTS("ALL_SYS_PWRGD=%d SYS_RESET_L=%d", allsys_in, allsys_out); - - /* - * Wait at least 10 ms between power signals going high - */ - if (allsys_in) - msleep(100); - - if (!allsys_out) { - gpio_set_level(GPIO_SYS_RESET_L, allsys_in); - /* Force fan on for kabylake RVP */ - gpio_set_level(GPIO_EC_FAN1_PWM, 1); - CPRINTS("Set SYS_RESET_L = %d", allsys_in); - } -} -DECLARE_DEFERRED(board_all_sys_pwrgd); - -void board_all_sys_pwrgd_interrupt(enum gpio_signal signal) -{ - CPUTS("ISR ALL_SYS_PWRGD"); - hook_call_deferred(&board_all_sys_pwrgd_data, 0); -} -#endif /* #ifdef CONFIG_BOARD_HAS_ALL_SYS_PWRGD */ - -/* - * Returns board information (board id[7:0] and Fab id[15:8]) on success - * -1 on error. - */ -int board_get_version(void) -{ - int port0, port1; - int fab_id, board_id, bom_id; - - if (ioexpander_read_intelrvp_version(&port0, &port1)) - return -1; - /* - * Port0: bit 0 - BOM ID(2) - * bit 2:1 - FAB ID(1:0) + 1 - * Port1: bit 7:6 - BOM ID(1:0) - * bit 5:0 - BOARD ID(5:0) - */ - bom_id = ((port1 & 0xC0) >> 6) | ((port0 & 0x01) << 2); - fab_id = ((port0 & 0x06) >> 1) + 1; - board_id = port1 & 0x3F; - - CPRINTS("BID:0x%x, FID:0x%x, BOM:0x%x", board_id, fab_id, bom_id); - - return board_id | (fab_id << 8); -} - -#ifdef CONFIG_BOARD_PRE_INIT -/* - * Used to enable JTAG debug during development. - * NOTE: UART2_TX on the same pin as SWV(JTAG_TDO). - * If UART2 is used for EC console you cannot enable SWV. - * For no SWV change mode to MCHP_JTAG_MODE_SWD. - * For low power idle testing enable GPIO060 as function 2(48MHZ_OUT) - * to check PLL is turning off in heavy sleep. Note, do not put GPIO060 - * in gpio.inc - * GPIO060 is port 1 bit[16]. - */ -void board_config_pre_init(void) -{ -#ifdef CONFIG_CHIPSET_DEBUG - MCHP_EC_JTAG_EN = MCHP_JTAG_ENABLE + MCHP_JTAG_MODE_SWD; -#endif - -#if defined(CONFIG_LOW_POWER_IDLE) && defined(CONFIG_MCHP_48MHZ_OUT) - gpio_set_alternate_function(1, 0x10000, 2); -#endif -} -#endif /* #ifdef CONFIG_BOARD_PRE_INIT */ - - -/* - * enable_input_devices() is called by the tablet_mode ISR, but changes the - * state of GPIOs, so its definition must reside after including gpio_list. - */ -static void enable_input_devices(void); -DECLARE_DEFERRED(enable_input_devices); - -void tablet_mode_interrupt(enum gpio_signal signal) -{ - hook_call_deferred(&enable_input_devices_data, 0); -} - -/* SPI devices */ -const struct spi_device_t spi_devices[] = { - { QMSPI0_PORT, 4, GPIO_QMSPI_CS0}, -}; -const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); - -/* - * Enable or disable input devices, - * based upon chipset state and tablet mode - */ -static void enable_input_devices(void) -{ - int kb_enable = 1; - int tp_enable = 1; - - /* Disable both TP and KB in tablet mode */ - if (!gpio_get_level(GPIO_TABLET_MODE_L)) - kb_enable = tp_enable = 0; - /* Disable TP if chipset is off */ - else if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) - tp_enable = 0; - - keyboard_scan_enable(kb_enable, KB_SCAN_DISABLE_LID_ANGLE); - gpio_set_level(GPIO_ENABLE_TOUCHPAD, tp_enable); -} - -#ifdef CONFIG_USBC_VCONN -void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) -{ -#ifndef CONFIG_USBC_PPC_VCONN - /* - * TODO: MCHP EC does not have built-in TCPC. Does external - * I2C based TCPC need this? - */ -#endif -} -#endif - diff --git a/board/sklrvp_mchp1723/board.h b/board/sklrvp_mchp1723/board.h deleted file mode 100644 index 4e9518a439..0000000000 --- a/board/sklrvp_mchp1723/board.h +++ /dev/null @@ -1,274 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Intel SKL RVP3 fly wired to MEC1723 EVB board-specific configuration - * Microchip Evaluation Board (EVB) with MEC1723-SZ (144-pin) - * processor card. - * SKL RVP3 has Kabylake silicon. - */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Use UART0 for EC console */ -#undef CONFIG_UART_CONSOLE -#define CONFIG_UART_CONSOLE 0 - -/* - * Initial board bring-up and prevent power button task from - * generating event to exit G3 state. - */ -/* #define CONFIG_BRINGUP */ - -/* - * Debug on EVB with CONFIG_CHIPSET_DEBUG - * Keep WDG disabled and JTAG enabled. - * CONFIG_BOARD_PRE_INIT enables JTAG early - * #define CONFIG_CHIPSET_DEBUG - */ -#define CONFIG_CHIPSET_DEBUG /* Enable JTAG/SWD */ -#ifdef CONFIG_CHIPSET_DEBUG -#ifndef CONFIG_BOARD_PRE_INIT -#define CONFIG_BOARD_PRE_INIT -#endif -#endif - -/* - * DEBUG: Add CRC32 in last 4 bytes of EC_RO/RW binaries - * in SPI. LFW will use DMA CRC32 HW to check data integrity. - * #define CONFIG_MCHP_LFW_DEBUG - */ - - -/* - * Override Boot-ROM JTAG mode - * 0x01 = 4-pin standard JTAG - * 0x03 = ARM 2-pin SWD + 1-pin SWV - * 0x05 = ARM 2-pin SWD no SWV. Required if UART2 is used. - */ -/* #define CONFIG_MCHP_JTAG_MODE 0x05 */ - -/* debug MCHP eSPI */ -/* #define CONFIG_ESPI_DEBUG */ - -/* - * Enable Trace FIFO Debug port - * When this is undefined all TRACEn() and tracen() - * macros are defined as blank. - * Uncomment this define to enable these messages. - * Only enable if GPIO's 0171 & 0171 are available therefore - * define this at the board level. - */ -/* #define CONFIG_MCHP_TFDP */ - -/* - * Enable MCHP specific GPIO EC UART commands - * for debug. - */ -/* #define CONFIG_MEC_GPIO_EC_CMDS */ - -/* - * Enable CPRINT in chip eSPI module - * and EC UART test command. - */ -/* #define CONFIG_MCHP_ESPI_DEBUG */ - -/* - * DEBUG - * Disable ARM Cortex-M4 write buffer so - * exceptions become synchronous. - * - * #define CONFIG_DEBUG_DISABLE_WRITE_BUFFER - */ - -/* - * DEBUG: Configure MEC152x GPIO060 as 48MHZ_OUT to - * verify & debug clock is shutdown in heavy sleep. - */ -/* #define CONFIG_MCHP_48MHZ_OUT */ - -/* - * EVB eSPI test mode (no eSPI master connected) - * #define EVB_NO_ESPI_TEST_MODE - */ - -/* - * Enable board specific ISR on ALL_SYS_PWRGD signal. - * Requires for handling Kabylake/Skylake RVP3 board's - * ALL_SYS_PWRGD signal. - */ -#define CONFIG_BOARD_EC_HANDLES_ALL_SYS_PWRGD - -/* - * Maximum clock frequency eSPI EC advertises - * Values in MHz are 20, 25, 33, 50, and 66 - */ -/* SKL/KBL + EVB fly-wire hook up only supports 20MHz */ -#define CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ MCHP_ESPI_CAP1_MAX_FREQ_20M - - -/* - * EC eSPI advertises IO lanes - * 0 = Single - * 1 = Single and Dual - * 2 = Single and Quad - * 3 = Single, Dual, and Quad - */ -/* KBL + EVB fly-wire hook up only support Single mode */ -#define CONFIG_HOSTCMD_ESPI_EC_MODE MCHP_ESPI_CAP1_SINGLE_MODE - -/* - * Bit map of eSPI channels EC advertises - * bit[0] = 1 Peripheral channel - * bit[1] = 1 Virtual Wire channel - * bit[2] = 1 OOB channel - * bit[3] = 1 Flash channel - */ -#define CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP MCHP_ESPI_CAP0_ALL_CHAN_SUPP - -/* MCHP EC variant */ -#define VARIANT_INTELRVP_EC_MCHP - -/* MECC configuration */ -#define CONFIG_INTEL_RVP_MECC_VERSION_0_9 - -/* USB MUX */ -#define CONFIG_USB_MUX_VIRTUAL - -/* Not using EC FAN control */ -#undef CONFIG_FANS -#define BOARD_FAN_MIN_RPM 3000 -#define BOARD_FAN_MAX_RPM 10000 - -/* Temperature sensor module has dependency on EC fan control */ -#undef CONFIG_TEMP_SENSOR - -#include "baseboard.h" - -/* - * Configuration after inclusion of base board. - * baseboard enables CONFIG_LOW_POWER_IDLE. - * Disable here. - * #undef CONFIG_LOW_POWER_IDLE - */ - -#define CONFIG_CHIPSET_SKYLAKE -#define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD -#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK -#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_ALL_SYS_PWRGD -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_L -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L -#define GPIO_BAT_LED_RED_L GPIO_BAT_LED_GREEN_L -#define GPIO_PWR_LED_WHITE_L GPIO_AC_LED_GREEN_L -/* MEC152x EVB pin used to enable SKL fan(s) */ -#define GPIO_FAN_POWER_EN GPIO_EC_FAN1_PWM - - -/* Charger */ -#define CONFIG_CHARGER_ISL9241 - -/* DC Jack charge ports */ -#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT -#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 - -/* USB ports */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define DEDICATED_CHARGE_PORT 2 - -#ifdef CONFIG_USBC_VCONN - #define CONFIG_USBC_VCONN_SWAP - /* delay to turn on/off vconn */ - #define PD_VCONN_SWAP_DELAY 5000 /* us */ -#endif - -/* - * USB PD configuration using FUSB307 chip on I2C as - * an example. - */ -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -#define CONFIG_USB_PD_TCPM_FUSB307 -#define CONFIG_USB_PD_TCPM_TCPCI - -#define I2C_PORT_CHARGER MCHP_I2C_PORT2 -#define I2C_PORT_BATTERY MCHP_I2C_PORT2 -#define I2C_PORT_PCA9555_BOARD_ID_GPIO MCHP_I2C_PORT2 -#define I2C_PORT_PORT80 MCHP_I2C_PORT2 -#define I2C_ADDR_PCA9555_BOARD_ID_GPIO 0x22 -#define PORT80_I2C_ADDR MAX695X_I2C_ADDR1_FLAGS - -/* - * External parallel crystal between XTAL1 and XTAL2 pins. - * #define CONFIG_CLOCK_SRC_EXTERNAL - * #define CONFIG_CLOCK_CRYSTAL - * External single ended 32KHz 50% duty cycle input clock. - * #define CONFIG_CLOCK_SRC_EXTERNAL - * #undef CONFIG_CLOCK_CRYSTAL - * Use internal silicon 32KHz oscillator - * #undef CONFIG_CLOCK_SRC_EXTERNAL - * CONFIG_CLOCK_CRYSTAL is a don't care - */ -#undef CONFIG_CLOCK_SRC_EXTERNAL - -/* - * Google uses smaller flashes on chromebook boards - * MCHP SPI test dongle for EVB uses 16MB W25Q128F - * Configure for smaller flash is OK for testing except - * for SPI flash lock bit. - */ -#define CONFIG_FLASH_SIZE_BYTES 524288 -#define CONFIG_SPI_FLASH_W25X40 - -/* - * Enable extra SPI flash and generic SPI - * commands via EC UART - */ -#define CONFIG_CMD_SPI_FLASH -#define CONFIG_CMD_SPI_XFER - - -/* MEC172x has two GP-SPI controllers. Not used on this board */ -#undef CONFIG_MCHP_GPSPI - - -#ifndef __ASSEMBLER__ - -enum sklrvp_charge_ports { - TYPE_C_PORT_0, - TYPE_C_PORT_1, -}; - -enum sklrvp_i2c_channel { - I2C_CHAN_BATT_CHG, - I2C_CHAN_MISC, - I2C_CHAN_TCPC_0, - I2C_CHAN_TCPC_1, - I2C_CHAN_COUNT, -}; - -enum battery_type { - BATTERY_SIMPLO_SMP_HHP_408, - BATTERY_SIMPLO_SMP_CA_445, - BATTERY_TYPE_COUNT, -}; - -#ifdef CONFIG_LOW_POWER_IDLE -void board_prepare_for_deep_sleep(void); -void board_resume_from_deep_sleep(void); -#endif - -#ifdef CONFIG_BOARD_EC_HANDLES_ALL_SYS_PWRGD -void board_all_sys_pwrgd_interrupt(enum gpio_signal signal); -#endif - -int board_get_version(void); - -/* MCHP we need to define this for use by baseboard */ -#define PD_MAX_POWER_MW 60000 - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/sklrvp_mchp1723/build.mk b/board/sklrvp_mchp1723/build.mk deleted file mode 100644 index 1a8cf34a09..0000000000 --- a/board/sklrvp_mchp1723/build.mk +++ /dev/null @@ -1,21 +0,0 @@ -# -*- makefile -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Intel SKL-RVP fly wired to MEC152x EVB board-specific configuration -# - -# the IC is Microchip MEC172x 416 KB total SRAM -# MEC1723SZ variant is 144 pin, loads from external SPI flash -# MEC1727SZ variant is 144 pin, loads from 512KB internal SPI flash -# external SPI is 512KB -# external clock is crystal -CHIP:=mchp -CHIP_FAMILY:=mec172x -CHIP_VARIANT:=mec1723sz -CHIP_SPI_SIZE_KB:=512 -BASEBOARD:=intelrvp - -board-y=board.o -board-$(CONFIG_BATTERY_SMART)+=battery.o diff --git a/board/sklrvp_mchp1723/ec.tasklist b/board/sklrvp_mchp1723/ec.tasklist deleted file mode 100644 index b264f6522a..0000000000 --- a/board/sklrvp_mchp1723/ec.tasklist +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Intel SKL-RVP MCHP MEC152x EVB board-specific configuration. - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) - diff --git a/board/sklrvp_mchp1723/gpio.inc b/board/sklrvp_mchp1723/gpio.inc deleted file mode 100644 index d3c3336f10..0000000000 --- a/board/sklrvp_mchp1723/gpio.inc +++ /dev/null @@ -1,259 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * mec172x EVB board GPIO pins - * !!!!!!!!!!!!!!!!!!!!!!! IMPORTANT !!!!!!!!!!!!!!!!!!!!!!!!!!!! - * MCHP MEC data sheet data sheet GPIO numbers are OCTAL. - * Original glados MEC1322 used these octal numbers as base 10. - * MCHP MEC and its boards will use OCTAL therefore make sure all - * numbers used below are written as C OCTAL with a leading 0. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * - */ -/* NOTE: MEC172x JTAG - * GPIO_0145 is JTAG_TDI - * GPIO_0146 is JTAG_TDO (SWV) - * GPIO_0147 is JTAG_CLK (SWD_CLK) - * GPIO_0150 is JTAG_TMS (SWD_IO) - */ -/* NOTE: MEC172x SZ(144 pin) and LJ(176 pin) do not implement: - * 0037, 0077, 0136, 0163, 0164, 0167, 0176, 0177, 0237, 0247, 0251, 0252, - * 0256, 0257 - * SZ 144-pin package does not implement: - * 0001, 0005, 0006, 0041, 0110, 0111, 0133 - 0135, 0160, 0166, 0172 - 0174, - * 0210 - 0217, 0220, 0225, 0230 - 0236, 0250, 0253 - */ - -/* include common gpio.inc under chip/mchp/lfw/... */ -#include "chip/mchp/lfw/gpio.inc" - -#define GPIO_BOTH_EDGES_PU (GPIO_INT_BOTH | GPIO_PULL_UP) -#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW) -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH) - -/* MEC172x Host interfaces are eSPI, SPI peripheral, or I2C */ - -GPIO_INT(LID_OPEN, PIN(015), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) - - -GPIO_INT(AC_PRESENT, PIN(014), GPIO_INT_BOTH, extpower_interrupt) - -/* DC jack handled by intelrvp base board */ -GPIO_INT(DC_JACK_PRESENT, PIN(0244), GPIO_INT_BOTH, board_dc_jack_interrupt) - -/* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */ -GPIO_INT(POWER_BUTTON_L, PIN(023), GPIO_INT_BOTH, power_button_interrupt) - -/* RSMRST from PMIC */ -GPIO_INT(RSMRST_L_PGOOD, PIN(0126), GPIO_INT_BOTH, power_signal_interrupt) - -GPIO_INT(PCH_SLP_SUS_L, PIN(0175), GPIO_INT_BOTH, power_signal_interrupt) - -GPIO_INT(PMIC_INT_L, PIN(0161), GPIO_INT_FALLING, power_signal_interrupt) - -/* Delayed PWR_OK from PMIC */ -GPIO_INT(PMIC_DPWROK, PIN(0151), GPIO_INT_BOTH, power_signal_interrupt) - -/* Handle ALL_SYS_PWRGD from SKL RVP3 board */ -GPIO_INT(ALL_SYS_PWRGD, PIN(057), GPIO_INT_BOTH, board_all_sys_pwrgd_interrupt) - - -GPIO_INT(TABLET_MODE_L, PIN(0100), GPIO_INT_BOTH | GPIO_PULL_UP, \ - gmr_tablet_switch_isr) - - -/* UART0 RX input wake event */ -GPIO_INT(UART0_RX, PIN(0105), GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, \ - uart_deepsleep_interrupt) - -/* - * NOTE: GPIO 0101 and 0102 are BGPO control by default. Chip level - * GPIO code will switch these pins to GPIO mode. BGPO default state - * is push-pull drive low. - */ -GPIO_INT(USB_C0_VBUS_INT, PIN(0101), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_VBUS_INT, PIN(0102), GPIO_INT_BOTH, tcpc_alert_event) - -/*---- GPIO Pins not interrupt enabled ----*/ - -GPIO(VOLUME_UP_L, PIN(034), GPIO_INPUT | GPIO_PULL_UP) -GPIO(VOLUME_DOWN_L, PIN(035), GPIO_INPUT | GPIO_PULL_UP) -GPIO(WP_L, PIN(036), GPIO_INPUT) - -/* PCH and CPU pins */ - -GPIO(PCH_SLP_S0_L, PIN(0222), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(PCH_PWRBTN_L, PIN(043), GPIO_OUTPUT) -GPIO(PCH_SEC_DISABLE_L, PIN(022), GPIO_OUT_HIGH) - -GPIO(PCH_WAKE_L, PIN(0255), GPIO_ODR_HIGH) -GPIO(PCH_ACOK, PIN(0246), GPIO_OUT_LOW) -GPIO(PCH_RSMRST_L, PIN(012), GPIO_OUT_LOW) -GPIO(PCH_RTCRST, PIN(052), GPIO_OUT_LOW) - -GPIO(CPU_PROCHOT, PIN(0171), GPIO_OUT_LOW) - -GPIO(SYS_RESET_L, PIN(025), GPIO_OUT_LOW) - -GPIO(PMIC_SLP_SUS_L, PIN(033), GPIO_OUT_LOW) - -GPIO(EC_PCH_DSW_PWROK, PIN(013), GPIO_OUT_LOW) - -GPIO(BATLOW_L_PMIC_LDO_EN, PIN(0240), GPIO_INPUT) - -/* - * I2C pins - these will be reconfigured for alternate function below - * SZ package does not implement I2C11 pins. - * Ports 0, 2 - 6, 9, 10, 12, 15 on VTR1 (3.3V only) - * Ports 1, 7, 8 on VTR2 (auto-detect 3.3V or 1.8V) - * Port 11 SDA on VBAT and SCL on VTR1 - * Ports 13, 14 on VTR3 (1.8V) - * MEC172x has five I2C controllers. Assign one port per controller. - */ -GPIO(I2C00_SCL, PIN(004), GPIO_INPUT) -GPIO(I2C00_SDA, PIN(003), GPIO_INPUT) -GPIO(I2C02_SCL, PIN(0155), GPIO_INPUT) -GPIO(I2C02_SDA, PIN(0154), GPIO_INPUT) -GPIO(I2C03_SCL, PIN(010), GPIO_INPUT) -GPIO(I2C03_SDA, PIN(007), GPIO_INPUT) -GPIO(I2C04_SCL, PIN(0144), GPIO_INPUT) -GPIO(I2C04_SDA, PIN(0143), GPIO_INPUT) -GPIO(I2C05_SCL, PIN(0142), GPIO_INPUT) -GPIO(I2C05_SDA, PIN(0141), GPIO_INPUT) - -/* usb related */ -GPIO(EN_PP3300_A, PIN(0153), GPIO_OUT_LOW) -GPIO(EN_PP5000, PIN(042), GPIO_OUT_LOW) -GPIO(USB_C0_SRC_EN, PIN(0206), GPIO_OUT_LOW) -GPIO(USB_C0_SNK_EN_L, PIN(0202), GPIO_ODR_LOW | GPIO_PULL_DOWN) -GPIO(USB_C0_SRC_HI_ILIM, PIN(0205), GPIO_OUT_LOW) -GPIO(USB_C1_SRC_EN, PIN(0226), GPIO_OUT_LOW) -GPIO(USB_C1_SNK_EN_L, PIN(0140), GPIO_ODR_LOW | GPIO_PULL_DOWN) -GPIO(USB_C1_SRC_HI_ILIM, PIN(0132), GPIO_OUT_LOW) - - -/* Fan PWM output and TACH input. PROCHOT input */ -GPIO(EC_FAN1_TTACH, PIN(050), GPIO_INPUT | GPIO_PULL_UP) -/* Fan PWM output - NC / testing only */ -GPIO(EC_FAN1_PWM, PIN(053), GPIO_OUT_LOW) - -/* prochot input from devices */ -GPIO(PLATFORM_EC_PROCHOT, PIN(051), GPIO_INPUT | GPIO_PULL_UP) - -/* Miscellaneous */ -GPIO(PWM_KBLIGHT, PIN(02), GPIO_OUT_LOW) -GPIO(ENTERING_RW, PIN(0221), GPIO_OUT_LOW) -GPIO(ENABLE_TOUCHPAD, PIN(0115), GPIO_OUT_LOW) -GPIO(EC_BATT_PRES_L, PIN(0200), GPIO_INPUT) -GPIO(WLAN_OFF_L, PIN(0245), GPIO_OUT_LOW) - -/* From lid sensor */ -GPIO(ENABLE_BACKLIGHT, PIN(024), GPIO_OUT_LOW) - -/* For LEDs */ -GPIO(BAT_LED_GREEN_L, PIN(0156), GPIO_OUT_HIGH) -GPIO(AC_LED_GREEN_L, PIN(0157), GPIO_OUT_HIGH) - -/* Used in baseboard/intelrvp */ -GPIO(EC_SPI_OE_N, PIN(054), GPIO_OUT_LOW) - -#ifdef CONFIG_KEYBOARD_COL2_INVERTED -/* KSO 1-3 Bank 1, Func1, bits 5-7 */ -GPIO(KBD_KSO2, PIN(046), GPIO_KB_OUTPUT_COL2) -#endif - -/*---- Alternate functions GPIO definitions ----*/ - -#if defined(CONFIG_CLOCK_SRC_EXTERNAL) && !defined(CONFIG_CLOCK_CRYSTAL) -/* 32KHZ_IN = GPIO_0165(Bank=3, bit=21) Func1 */ -ALTERNATE(PIN_MASK(3, 0x200000), 1, MODULE_PMU, 0) -#endif - -/* KB pins 8 x 13 */ -/* - * KSO00 = GPIO_0040 Func2 bank 1 bit 0 - * KSO01 = GPIO_0045 Func1 bank 1 bit 5 - * KSO02 = GPIO_0046 Func1 bank 1 bit 6 - * KSO03 = GPIO_0047 Func1 bank 1 bit 7 - * KSO04 = GPIO_0107 Func2 bank 2 bit 7 - * KSO05 = GPIO_0112 Func1 bank 2 bit 10 - * KSO06 = GPIO_0113 Func1 bank 2 bit 11 - * KSO07 = GPIO_0120 Func1 bank 2 bit 16 - * KSO08 = GPIO_0121 Func2 bank 2 bit 17 - * KSO09 = GPIO_0122 Func2 bank 2 bit 18 - * KSO10 = GPIO_0123 Func2 bank 2 bit 19 - * KSO11 = GPIO_0124 Func2 bank 2 bit 20 - * KSO12 = GPIO_0125 Func2 bank 2 bit 21 - * - * KSI0 = GPIO_0017 Func1 bank 0 bit 15 - * KSI1 = GPIO_0020 Func1 bank 0 bit 16 - * KSI2 = GPIO_0021 Func1 bank 0 bit 17 - * KSI3 = GPIO_0026 Func1 bank 0 bit 22 - * KSI4 = GPIO_0027 Func1 bank 0 bit 23 - * KSI5 = GPIO_0030 Func1 bank 0 bit 24 - * KSI6 = GPIO_0031 Func1 bank 0 bit 25 - * KSI7 = GPIO_0032 Func1 bank 0 bit 26 - */ -/* KSO 0 Bank 1, Func2, bit 0 */ -ALTERNATE(PIN_MASK(1, 0x01), 2, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) - -#ifdef CONFIG_KEYBOARD_COL2_INVERTED -/* KSO 1-3 Bank 1, Func1, bits 5-7 */ -ALTERNATE(PIN_MASK(1, 0xA0), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -#else -/* KSO 1-3 Bank 1, Func1, bits 5-7 */ -ALTERNATE(PIN_MASK(1, 0xE0), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -#endif - -/* KSO 4, 8-12 Bank 2, Func2, bits 7, 17-21 */ -ALTERNATE(PIN_MASK(2, 0x003E0080), 2, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -/* KSO 5-7, Bank 2, Func1, bits 10-11, 16 */ -ALTERNATE(PIN_MASK(2, 0x00010C00), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) - -/* KSI 0-7, Bank 0, Func1, bit 15-17, 22-26 */ -ALTERNATE(PIN_MASK(0, 0x07C38000), 1, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) - -/* - * ESPI_RESET# - GPIO_0061 Func 1, Bank 1 bit[17] - * ESPI_ALERT# - GPIO_0063 Func 1, Bank 1 bit[19] - * ESPI_CLK - GPIO_0065 Func 1, Bank 1 bit[21] - * ESPI_CS# - GPIO_0066 Func 1, Bank 1 bit[22] - * ESPI_IO0 - GPIO_0070 Func 1, Bank 1 bit[24] - * ESPI_IO1 - GPIO_0071 Func 1, Bank 1 bit[25] - * ESPI_IO2 - GPIO_0072 Func 1, Bank 1 bit[26] - * ESPI_IO3 - GPIO_0073 Func 1, Bank 1 bit[27] - */ -ALTERNATE(PIN_MASK(1, 0x0F6A0000), 1, MODULE_LPC, 0) - -/* I2C pins alternate functions for ports 0, 2-5 - * Configure I2C00-05 as I2C alternate function. - * If board does not use external pull-ups then change GPIO flags - * to enable internal pull-ups. - * I2C00_SDA = GPIO_0003(Bank=0, bit=3) Func1 - * I2C00_SCL = GPIO_0004(Bank=0, bit=4) Func1 - * I2C02_SDA = GPIO_0154(Bank=3, bit=12) Func1 - * I2C02_SCL = GPIO_0155(Bank=3, bit=13) Func1 - * I2C03_SDA = GPIO_0007(Bank=0, bit=7) Func1 - * I2C03_SDL = GPIO_0010(Bank=0, bit=8) Func1 - * I2C04_SDA = GPIO_0143(Bank=3, bit=3) Func1 - * I2C04_SCL = GPIO_0144(Bank=3, bit=4) Func1 - * I2C05_SDA = GPIO_0141(Bank=3, bit=1) Func1 - * I2C05_SDL = GPIO_0142(Bank=3, bit=2) Func1 - */ -ALTERNATE(PIN_MASK(0, 0x00000198), 1, MODULE_I2C, GPIO_ODR_HIGH) -ALTERNATE(PIN_MASK(3, 0x0000301E), 1, MODULE_I2C, GPIO_ODR_HIGH) - -/* ADC pins - * ADC01 = GPIO_0201(Bank=4, bit=1) Func1 - * ADC03 = GPIO_0203(Bank=4, bit=3) Func1 - * ADC04 = GPIO_0204(Bank=4, bit=4) Func1 - * ADC07 = GPIO_0207(Bank=4, bit=7) Func1 - */ -ALTERNATE(PIN_MASK(4, 0x009a), 1, MODULE_ADC, GPIO_ANALOG) - diff --git a/board/sklrvp_mchp1723/vif_override.xml b/board/sklrvp_mchp1723/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/sklrvp_mchp1723/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/common/keyboard_scan.c b/common/keyboard_scan.c index a1e17bc61d..6584a55d84 100644 --- a/common/keyboard_scan.c +++ b/common/keyboard_scan.c @@ -376,47 +376,6 @@ static int check_runtime_keys(const uint8_t *state) int num_press = 0; int c; -#ifdef BOARD_SAMUS - int16_t chg_override; - - /* - * TODO(crosbug.com/p/34850): remove these hot-keys for samus, should - * be done at higher level than this. - */ - /* - * On samus, ctrl + search + 0|1|2 sets the active charge port - * by sending the charge override host command. Should only be sent - * when chipset is in S0. Note that 'search' and '1' keys are on - * the same column. - */ - if ((state[KEYBOARD_COL_LEFT_CTRL] == KEYBOARD_MASK_LEFT_CTRL || - state[KEYBOARD_COL_RIGHT_CTRL] == KEYBOARD_MASK_RIGHT_CTRL) && - ((state[KEYBOARD_COL_SEARCH] & KEYBOARD_MASK_SEARCH) == - KEYBOARD_MASK_SEARCH) && - chipset_in_state(CHIPSET_STATE_ON)) { - if (state[KEYBOARD_COL_KEY_0] == KEYBOARD_MASK_KEY_0) { - /* Charge from neither port */ - chg_override = -2; - pd_host_command(EC_CMD_PD_CHARGE_PORT_OVERRIDE, 0, - &chg_override, 2, NULL, 0); - return 0; - } else if (state[KEYBOARD_COL_KEY_1] == - (KEYBOARD_MASK_KEY_1 | KEYBOARD_MASK_SEARCH)) { - /* Charge from port 0 (left side) */ - chg_override = 0; - pd_host_command(EC_CMD_PD_CHARGE_PORT_OVERRIDE, 0, - &chg_override, 2, NULL, 0); - return 0; - } else if (state[KEYBOARD_COL_KEY_2] == KEYBOARD_MASK_KEY_2) { - /* Charge from port 1 (right side) */ - chg_override = 1; - pd_host_command(EC_CMD_PD_CHARGE_PORT_OVERRIDE, 0, - &chg_override, 2, NULL, 0); - return 0; - } - } -#endif - /* * All runtime key combos are (right or left ) alt + volume up + (some * key NOT on the same col as alt or volume up ) diff --git a/common/lb_common.c b/common/lb_common.c index 08783997fa..019e0e254f 100644 --- a/common/lb_common.c +++ b/common/lb_common.c @@ -153,15 +153,6 @@ static inline uint8_t controller_read(int ctrl_num, uint8_t reg) #define MAX_GREEN 0x30 #define MAX_BLUE 0x67 #endif -#if defined(BOARD_SAMUS) -/* Samus uses completely different LEDs, so the numbers are different. The - * Samus LEDs can handle much higher currents, but these constants were - * calibrated to provide uniform intensity at the level used by Link. - * See crosbug.com/p/33017 before making any changes. */ -#define MAX_RED 0x34 -#define MAX_GREEN 0x2c -#define MAX_BLUE 0x40 -#endif #ifdef BOARD_HOST /* For testing only */ #define MAX_RED 0xff @@ -199,9 +190,6 @@ static const uint8_t led_to_ctrl[] = { 1, 1, 0, 0 }; #ifdef BOARD_BDS static const uint8_t led_to_isc[] = { 0x18, 0x15, 0x18, 0x15 }; #endif -#ifdef BOARD_SAMUS -static const uint8_t led_to_isc[] = { 0x15, 0x18, 0x15, 0x18 }; -#endif #ifdef BOARD_HOST /* For testing only */ static const uint8_t led_to_isc[] = { 0x15, 0x18, 0x15, 0x18 }; diff --git a/driver/charger/bq24773.c b/driver/charger/bq24773.c index d72faa3bed..d242f105c6 100644 --- a/driver/charger/bq24773.c +++ b/driver/charger/bq24773.c @@ -244,22 +244,13 @@ static enum ec_error_list bq2477x_post_init(int chgnum) if (rv) return rv; -#ifndef BOARD_SAMUS /* Turn off PROCHOT warning */ rv = raw_read16(chgnum, REG_PROCHOT_OPTION1, &option); if (rv) return rv; option &= ~PROCHOT_OPTION1_SELECTOR_MASK; - rv = raw_write16(chgnum, REG_PROCHOT_OPTION1, option); -#else - /* On Samus, use PROCHOT warning to detect charging problems */ - /* Turn on PROCHOT warning */ - rv = raw_write16(chgnum, REG_PROCHOT_OPTION1, 0x8120); - /* Set PROCHOT ICRIT warning when IADP is >120% of IDPM */ - rv |= raw_write16(chgnum, REG_PROCHOT_OPTION0, 0x1b54); -#endif if (rv) return rv; diff --git a/util/flash_ec b/util/flash_ec index 6a91fd08e7..9b55da1ad8 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -51,7 +51,6 @@ die() { BOARDS_IT83XX=( adlrvpm_ite adlrvpp_ite - glkrvp_ite it83xx_evb jslrvp_ite reef_it8320 @@ -83,7 +82,6 @@ BOARDS_STM32=( pit plankton rainier - samus_pd strago_pd zinger ) @@ -123,7 +121,6 @@ BOARDS_NPCX_7M7X_JTAG=( ) BOARDS_NPCX_SPI=( - glkrvp ) BOARDS_SPI_1800MV=( @@ -135,7 +132,6 @@ BOARDS_RAIDEN=( coral eve fizz - flapjack kukui nami nautilus @@ -368,7 +364,7 @@ fi # Servo variables management case "${BOARD}" in chocodile_bec ) MCU="usbpd" ;; - oak_pd|samus_pd|strago_pd ) MCU="usbpd" ;; + oak_pd|strago_pd ) MCU="usbpd" ;; chell_pd|glados_pd ) MCU="usbpd" ;; bloonchipper|dartmonkey|hatch_fp|nami_fp|nocturne_fp ) MCU="fpmcu" ;; dingdong|hoho|twinkie ) DUT_CONTROL_CMD=( "true" ); MCU="ec" ;; |