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authorJun Lin <CHLin56@nuvoton.com>2021-04-19 19:22:21 +0800
committerCommit Bot <commit-bot@chromium.org>2021-04-23 02:56:01 +0000
commit8d411971acc3a9ebf35918a40e6814a430121b8b (patch)
tree8b38c7e67d451e41987d93e18121a814f507ed8b
parent0121fb418dd855982af442824ed1d3b89486ae0c (diff)
downloadchrome-ec-stabilize-RUST-13932.B-main.tar.gz
zephyr: shi: npcx: Improve SHI driverstabilize-RUST-13932.B-main
This CL fixes some potential leaks for the SHI driver: 1. Replace irq_lock/irq_unlock with __disable_irq/__enable_irq because irq_lock/irq_unlock leave some system exceptions still enabled. These may block the SHI driver's execution which requires hard timing. 2. Change the interrupt priority of SHI from 2 to 1. BRANCH=none BUG=b:182600858 TEST=Verify the SHI function on Lazor Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: If0ea355b5f300054ce8f7ae53de12f99a6d6aba6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2835526 Tested-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: CH Lin <chlin56@nuvoton.com>
-rw-r--r--zephyr/drivers/cros_shi/cros_shi_npcx.c17
-rw-r--r--zephyr/include/cros/nuvoton/npcx.dtsi2
2 files changed, 11 insertions, 8 deletions
diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c
index 4bf86eab73..40e6341c93 100644
--- a/zephyr/drivers/cros_shi/cros_shi_npcx.c
+++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c
@@ -254,10 +254,14 @@ static void shi_fill_out_status(struct shi_reg *const inst, uint8_t status)
volatile uint8_t *fill_ptr;
volatile uint8_t *fill_end;
volatile uint8_t *obuf_end;
- int key;
- /* Disable interrupts in case the interfere by the other interrupts */
- key = irq_lock();
+ /*
+ * Disable interrupts in case the interfere by the other interrupts.
+ * Use __disable_irq/__enable_irq instead of using irq_lock/irq_unlock
+ * here because irq_lock/irq_unlock leave some system exceptions (like
+ * SVC, NMI, and faults) still enabled.
+ */
+ __disable_irq();
/*
* Fill out output buffer with status byte and leave a gap for PREAMBLE.
@@ -278,7 +282,7 @@ static void shi_fill_out_status(struct shi_reg *const inst, uint8_t status)
}
/* End of critical section */
- irq_unlock(key);
+ __enable_irq();
}
/* This routine handles shi received unexpected data */
@@ -354,7 +358,6 @@ static void shi_write_first_pkg_outbuf(struct shi_reg *const inst,
static void shi_send_response_packet(struct host_packet *pkt)
{
struct shi_reg *const inst = (struct shi_reg *)(cros_shi_cfg.base);
- int key;
/*
* Disable interrupts. This routine is not called from interrupt
@@ -363,7 +366,7 @@ static void shi_send_response_packet(struct host_packet *pkt)
* sure our state doesn't unexpectedly change, in case we're expected
* to take RESP_NOT_RDY actions.
*/
- key = irq_lock();
+ __disable_irq();
if (state == SHI_STATE_PROCESSING) {
/* Append our past-end byte, which we reserved space for. */
@@ -390,7 +393,7 @@ static void shi_send_response_packet(struct host_packet *pkt)
} else
DEBUG_CPRINTS("Unexpected state %d in response handler", state);
- irq_unlock(key);
+ __enable_irq();
}
void shi_handle_host_package(struct shi_reg *const inst)
diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi
index 30a4e402c8..62f4b6b861 100644
--- a/zephyr/include/cros/nuvoton/npcx.dtsi
+++ b/zephyr/include/cros/nuvoton/npcx.dtsi
@@ -90,7 +90,7 @@
shi: shi@4000f000 {
compatible = "nuvoton,npcx-cros-shi";
reg = <0x4000f000 0x120>;
- interrupts = <18 2>;
+ interrupts = <18 1>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>;
pinctrl-0 = <&altc_shi_sl>;
shi-cs-wui =<&wui_io53>;