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| author | Vic Yang <victoryang@chromium.org> | 2015-02-28 00:09:12 +0000 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-02-28 03:46:47 +0000 |
| commit | 179fcb3f1d0916f3cacea64c1d78b9644d6fa6ef (patch) | |
| tree | 4c1c539e6f1b9adfd1d446743faaf68638c5da05 | |
| parent | 51910da94cfd68b323873271d55147e613b2ed16 (diff) | |
| download | chrome-ec-stabilize-6835.B.tar.gz | |
Revert "mec1322: Fix LPC interrupt bit mask"stabilize-6835.B
This reverts commit 9ed4434ad8770ca3edd6bccd456738019c9e08b0.
According to MEC1322 errata, LRESET# interrupt is indeed GIRQ 19 bit 1.
BRANCH=None
BUG=chrome-os-partner:36326
TEST=None
Change-Id: I9d0dc0ef3abac1ace59b46eafae04f6b9e5c0b9b
Reviewed-on: https://chromium-review.googlesource.com/254771
Reviewed-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
| -rw-r--r-- | chip/mec1322/lpc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index ba7e83a9ba..07e75f2a09 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -193,8 +193,8 @@ static void setup_lpc(void) gpio_config_module(MODULE_LPC, 1); /* Set up interrupt on LRESET# deassert */ - MEC1322_INT_SOURCE(19) |= 1 << 0; - MEC1322_INT_ENABLE(19) |= 1 << 0; + MEC1322_INT_SOURCE(19) |= 1 << 1; + MEC1322_INT_ENABLE(19) |= 1 << 1; MEC1322_INT_BLK_EN |= 1 << 19; task_enable_irq(MEC1322_IRQ_GIRQ19); @@ -257,7 +257,7 @@ DECLARE_HOOK(HOOK_INIT, lpc_init, HOOK_PRIO_INIT_LPC); void girq19_interrupt(void) { /* Check interrupt result for LRESET# trigger */ - if (MEC1322_INT_RESULT(19) & (1 << 0)) { + if (MEC1322_INT_RESULT(19) & (1 << 1)) { /* Initialize LPC module when LRESET# is deasserted */ if (!lpc_get_pltrst_asserted()) { setup_lpc(); @@ -270,7 +270,7 @@ void girq19_interrupt(void) lpc_get_pltrst_asserted() ? "" : "de"); /* Clear interrupt source */ - MEC1322_INT_SOURCE(19) |= 1 << 0; + MEC1322_INT_SOURCE(19) |= 1 << 1; } } DECLARE_IRQ(MEC1322_IRQ_GIRQ19, girq19_interrupt, 1); |