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authorSue Chen <sue.chen@quanta.corp-partner.google.com>2019-03-26 09:34:43 +0800
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2019-03-26 15:12:46 +0000
commit9062ff5999c03fc5b4fb06336346f19415875aff (patch)
tree910be76c0b4b1216b6ea949a1b47d03932abdbe2
parent89639c06a6613764aa521c80918e7df2e4c8fde1 (diff)
downloadchrome-ec-9062ff5999c03fc5b4fb06336346f19415875aff.tar.gz
Kalista: PMIC TPS650830 VR1 setting for hang up issue
The issue was found from Fizz series. (BUG=b:128960577) Set PMIC register V100ACNT (0x37) to 0x1B [1:0] : 11b Forced PWM Operation. [5:4] : 01b Output Voltage Selet Vnom (1V) To improve +V1P00A ripple around 18mV. BUG=none BRANCH=firmware-kalista-11343.B TEST=make buildall -j Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I1c348712a5e2d5661cb1211c83fb17f329f61b48 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1538101 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Sue Chen <sue.chen@quanta.corp-partner.google.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
-rw-r--r--baseboard/kalista/baseboard.c9
-rw-r--r--driver/pmic_tps650x30.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/baseboard/kalista/baseboard.c b/baseboard/kalista/baseboard.c
index bc722afa19..c0c9b4ad77 100644
--- a/baseboard/kalista/baseboard.c
+++ b/baseboard/kalista/baseboard.c
@@ -387,6 +387,15 @@ static void board_pmic_init(void)
if (err)
goto pmic_error;
+ /*
+ * V100ACNT Register Field Description. Default: 0x2A
+ * [1:0] : 11b Forced PWM Operation.
+ * [5:4] : 01b Output Voltage Select Vnom (1V)
+ */
+ err = I2C_PMIC_WRITE(TPS650X30_REG_V100ACNT, 0x1B);
+ if (err)
+ goto pmic_error;
+
CPRINTS("PMIC init done");
pmic_initialized = 1;
return;
diff --git a/driver/pmic_tps650x30.h b/driver/pmic_tps650x30.h
index 5198686800..861f1d8d14 100644
--- a/driver/pmic_tps650x30.h
+++ b/driver/pmic_tps650x30.h
@@ -22,6 +22,7 @@
#define TPS650X30_REG_V33ADSWCNT 0x32
#define TPS650X30_REG_V18ACNT 0x34
#define TPS650X30_REG_V1P2UCNT 0x36
+#define TPS650X30_REG_V100ACNT 0x37
#define TPS650X30_REG_VRMODECTRL 0x3B
#define TPS650X30_REG_DISCHCNT1 0x3C
#define TPS650X30_REG_DISCHCNT2 0x3D