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authorkevin3.yang <kevin3.yang@lcfc.corp-partner.google.com>2023-04-19 11:52:52 +0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2023-05-04 07:35:45 +0000
commit284d33e92ee48a06888ace962ea573c969e07899 (patch)
treead84c594d10c3a6ca3b5f8770e7bbe9601205a4b
parenta510225252d6f70c5b78c30c704dd6d7256fe2c4 (diff)
downloadchrome-ec-firmware-dedede-13606.B-master.tar.gz
boxy: Modify Boxy initial EC code.firmware-dedede-13606.B-master
Modify Boxy initial EC code following dibbi code base. BUG=b:279375284 BRANCH=None TEST=make -j BOARD=boxy Change-Id: Ia7279fb3d0193893792a25e4a571608769603aaa Signed-off-by: jimmy.wu <jimmy.wu@lcfc.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4464579 Reviewed-by: Derek Huang <derekhuang@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4506013 Tested-by: Kevin3 Yang <kevin3.yang@lcfc.corp-partner.google.com> Commit-Queue: Derek Huang <derekhuang@google.com>
-rw-r--r--baseboard/dedede/variant_ec_it8320.c2
-rw-r--r--board/boxy/board.c410
-rw-r--r--board/boxy/board.h168
-rw-r--r--board/boxy/build.mk15
-rw-r--r--board/boxy/ec.tasklist16
-rw-r--r--board/boxy/gpio.inc179
-rw-r--r--board/boxy/led.c80
-rw-r--r--board/boxy/usb_pd_policy.c85
-rw-r--r--board/boxy/vif_override.xml3
-rwxr-xr-xutil/build_with_clang.py1
10 files changed, 958 insertions, 1 deletions
diff --git a/baseboard/dedede/variant_ec_it8320.c b/baseboard/dedede/variant_ec_it8320.c
index 9668911978..f03af6ccd9 100644
--- a/baseboard/dedede/variant_ec_it8320.c
+++ b/baseboard/dedede/variant_ec_it8320.c
@@ -73,7 +73,7 @@ const struct vcmp_t vcmp_list[] = {
BUILD_ASSERT(ARRAY_SIZE(vcmp_list) <= CHIP_VCMP_COUNT);
BUILD_ASSERT(ARRAY_SIZE(vcmp_list) == VCMP_COUNT);
-#if !defined(BOARD_DIBBI) && !defined(BOARD_TARANZA)
+#if !defined(BOARD_DIBBI) && !defined(BOARD_TARANZA) && !defined(BOARD_BOXY)
/* I2C Ports */
const struct i2c_port_t i2c_ports[] = {
{ .name = "eeprom",
diff --git a/board/boxy/board.c b/board/boxy/board.c
new file mode 100644
index 0000000000..134eece8cc
--- /dev/null
+++ b/board/boxy/board.c
@@ -0,0 +1,410 @@
+/* Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Boxy board-specific configuration */
+
+#include "adc_chip.h"
+#include "board.h"
+#include "button.h"
+#include "charge_manager.h"
+#include "charge_state_v2.h"
+#include "charger.h"
+#include "driver/ppc/syv682x_public.h"
+#include "driver/tcpm/it83xx_pd.h"
+#include "driver/temp_sensor/thermistor.h"
+#include "driver/usb_mux/it5205.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "intc.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "switch.h"
+#include "system.h"
+#include "tablet_mode.h"
+#include "task.h"
+#include "tcpm/tcpci.h"
+#include "temp_sensor.h"
+#include "uart.h"
+#include "usb_charge.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usb_pd_tcpm.h"
+#include "usbc_ppc.h"
+
+#define CPRINTUSB(format, args...) cprints(CC_USBCHARGE, format, ##args)
+
+/* ADC channels */
+const struct adc_t adc_channels[] = {
+ [ADC_VSNS_PP3300_A] = { .name = "PP3300_A_PGOOD",
+ .factor_mul = ADC_MAX_MVOLT,
+ .factor_div = ADC_READ_MAX + 1,
+ .shift = 0,
+ .channel = CHIP_ADC_CH0 },
+ [ADC_TEMP_SENSOR_1] = { .name = "TEMP_SENSOR1",
+ .factor_mul = ADC_MAX_MVOLT,
+ .factor_div = ADC_READ_MAX + 1,
+ .shift = 0,
+ .channel = CHIP_ADC_CH2 },
+ [ADC_TEMP_SENSOR_2] = { .name = "TEMP_SENSOR2",
+ .factor_mul = ADC_MAX_MVOLT,
+ .factor_div = ADC_READ_MAX + 1,
+ .shift = 0,
+ .channel = CHIP_ADC_CH3 },
+ [ADC_TEMP_SENSOR_3] = { .name = "TEMP_SENSOR3",
+ .factor_mul = ADC_MAX_MVOLT,
+ .factor_div = ADC_READ_MAX + 1,
+ .shift = 0,
+ .channel = CHIP_ADC_CH13 },
+ [ADC_PPVAR_PWR_IN_IMON] = { .name = "ADC_PPVAR_PWR_IN_IMON",
+ .factor_mul = ADC_MAX_MVOLT,
+ .factor_div = ADC_READ_MAX + 1,
+ .shift = 0,
+ .channel = CHIP_ADC_CH15 },
+ [ADC_SNS_PPVAR_PWR_IN] = { .name = "ADC_SNS_PPVAR_PWR_IN",
+ .factor_mul = ADC_MAX_MVOLT,
+ .factor_div = ADC_READ_MAX + 1,
+ .shift = 0,
+ .channel = CHIP_ADC_CH16 },
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+/* TCPCs */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+ {
+ .bus_type = EC_BUS_TYPE_EMBEDDED,
+ .drv = &it83xx_tcpm_drv,
+ },
+};
+
+/* PPCs */
+struct ppc_config_t ppc_chips[] = {
+ [USBC_PORT_C0] = {
+ .i2c_port = I2C_PORT_USB_C0,
+ .i2c_addr_flags = SYV682X_ADDR0_FLAGS,
+ .frs_en = GPIO_EC_USB_C0_FRS_EN,
+ .drv = &syv682x_drv,
+ },
+};
+BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
+
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+/* USB Muxes */
+const struct usb_mux_chain usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+ {
+ .mux =
+ &(const struct usb_mux){
+ .usb_port = 0,
+ .i2c_port = I2C_PORT_USB_C0,
+ .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS,
+ .driver = &it5205_usb_mux_driver,
+ },
+ },
+};
+
+/* USB-A ports */
+const int usb_port_enable[USB_PORT_COUNT] = {
+ GPIO_EN_USB_A0_VBUS,
+ GPIO_EN_USB_A1_VBUS,
+ GPIO_EN_USB_A2_VBUS,
+ GPIO_EN_USB_A3_VBUS,
+};
+
+/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
+const struct pwm_t pwm_channels[] = {
+ [PWM_CH_LED_RED] = {
+ .channel = 1,
+ .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW,
+ .freq_hz = 2400,
+ },
+
+ [PWM_CH_LED_GREEN] = {
+ .channel = 2,
+ .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW,
+ .freq_hz = 2400,
+ },
+
+ [PWM_CH_LED_BLUE] = {
+ .channel = 3,
+ .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW,
+ .freq_hz = 2400,
+ }
+
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+/* Thermistors */
+const struct temp_sensor_t temp_sensors[] = {
+ [TEMP_SENSOR_1] = { .name = "Memory",
+ .type = TEMP_SENSOR_TYPE_BOARD,
+ .read = get_temp_3v3_51k1_47k_4050b,
+ .idx = ADC_TEMP_SENSOR_1 },
+ [TEMP_SENSOR_2] = { .name = "SoC power",
+ .type = TEMP_SENSOR_TYPE_BOARD,
+ .read = get_temp_3v3_51k1_47k_4050b,
+ .idx = ADC_TEMP_SENSOR_2 },
+ [TEMP_SENSOR_3] = { .name = "Ambient",
+ .type = TEMP_SENSOR_TYPE_BOARD,
+ .read = get_temp_3v3_51k1_47k_4050b,
+ .idx = ADC_TEMP_SENSOR_3 },
+};
+BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
+
+void board_init(void)
+{
+ gpio_enable_interrupt(GPIO_BJ_ADP_PRESENT);
+
+ /* Enable PPC interrupt */
+ gpio_enable_interrupt(GPIO_USB_C0_FAULT_L);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+void board_reset_pd_mcu(void)
+{
+ /*
+ * Nothing to do. TCPC C0 is internal.
+ */
+}
+
+__override void board_power_5v_enable(int enable)
+{
+ /*
+ * Nothing to do. 5V should always be enabled while in Z1 or above.
+ */
+}
+
+void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma,
+ int charge_mv)
+{
+ int insufficient_power =
+ (charge_ma * charge_mv) <
+ (CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON * 1000);
+ /* TODO(b/259467280) blink LED on error */
+ (void)insufficient_power;
+}
+
+int board_vbus_source_enabled(int port)
+{
+ if (port != CHARGE_PORT_TYPEC0)
+ return 0;
+
+ return ppc_is_sourcing_vbus(port);
+}
+
+/* Vconn control for integrated ITE TCPC */
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
+{
+ /*
+ * We ignore the cc_pin and PPC vconn because polarity and PPC vconn
+ * should already be set correctly in the PPC driver via the pd
+ * state machine.
+ */
+}
+
+/******************************************************************************/
+/*
+ * Since boxy has no battery, it must source all of its power from either
+ * USB-C or the barrel jack (preferred). Fizz operates in continuous safe
+ * mode (charge_manager_leave_safe_mode() will never be called), which
+ * modifies port selection as follows:
+ *
+ * - Dual-role / dedicated capability of the port partner is ignored.
+ * - Charge ceiling on PD voltage transition is ignored.
+ * - CHARGE_PORT_NONE will never be selected.
+ */
+
+/* List of BJ adapters */
+enum bj_adapter {
+ BJ_NONE,
+ BJ_65W_19V,
+};
+
+/* Barrel-jack power adapter ratings. */
+static const struct charge_port_info bj_adapters[] = {
+ [BJ_NONE] = { .current = 0, .voltage = 0 },
+ [BJ_65W_19V] = { .current = 3420, .voltage = 19000 },
+};
+#define BJ_ADP_RATING_DEFAULT BJ_65W_19V /* BJ power ratings default */
+#define ADP_DEBOUNCE_MS 1000 /* Debounce time for BJ plug/unplug */
+
+/* Debounced connection state of the barrel jack */
+static int8_t bj_adp_connected = -1;
+static void adp_connect_deferred(void)
+{
+ const struct charge_port_info *pi;
+ int connected = gpio_get_level(GPIO_BJ_ADP_PRESENT);
+
+ /* Debounce */
+ if (connected == bj_adp_connected)
+ return;
+
+ if (connected) {
+ pi = &bj_adapters[BJ_ADP_RATING_DEFAULT];
+ } else {
+ /* No barrel-jack, zero out this power supply */
+ pi = &bj_adapters[BJ_NONE];
+ }
+ /* This will result in a call to board_set_active_charge_port */
+ charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED,
+ DEDICATED_CHARGE_PORT, pi);
+ bj_adp_connected = connected;
+}
+DECLARE_DEFERRED(adp_connect_deferred);
+
+/* IRQ for BJ plug/unplug. It shouldn't be called if BJ is the power source. */
+void adp_connect_interrupt(enum gpio_signal signal)
+{
+ hook_call_deferred(&adp_connect_deferred_data, ADP_DEBOUNCE_MS * MSEC);
+}
+
+int board_set_active_charge_port(int port)
+{
+ const int active_port = charge_manager_get_active_charge_port();
+
+ CPRINTUSB("Requested charge port change to %d", port);
+
+ if (port < 0 || CHARGE_PORT_COUNT <= port)
+ return EC_ERROR_INVAL;
+
+ if (port == active_port)
+ return EC_SUCCESS;
+
+ /* Don't sink from a source port */
+ if (board_vbus_source_enabled(port))
+ return EC_ERROR_INVAL;
+
+ if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) {
+ int bj_requested;
+
+ if (charge_manager_get_active_charge_port() != CHARGE_PORT_NONE)
+ /* Change is only permitted while the system is off */
+ return EC_ERROR_INVAL;
+
+ /*
+ * Current setting is no charge port but the AP is on, so the
+ * charge manager is out of sync (probably because we're
+ * reinitializing after sysjump). Reject requests that aren't
+ * in sync with our outputs.
+ */
+ bj_requested = port == CHARGE_PORT_BARRELJACK;
+ if (bj_adp_connected != bj_requested)
+ return EC_ERROR_INVAL;
+ }
+
+ CPRINTUSB("New charger p%d", port);
+
+ switch (port) {
+ case CHARGE_PORT_TYPEC0:
+ ppc_vbus_sink_enable(USBC_PORT_C0, 1);
+ gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_OD, 0);
+ break;
+ case CHARGE_PORT_BARRELJACK:
+ /* Make sure BJ adapter is sourcing power */
+ if (!gpio_get_level(GPIO_BJ_ADP_PRESENT))
+ return EC_ERROR_INVAL;
+ gpio_set_level(GPIO_EN_PPVAR_BJ_ADP_OD, 1);
+ ppc_vbus_sink_enable(USBC_PORT_C0, 1);
+ break;
+ default:
+ return EC_ERROR_INVAL;
+ }
+
+ return EC_SUCCESS;
+}
+
+static void board_charge_manager_init(void)
+{
+ enum charge_port port;
+
+ /*
+ * Initialize all charge suppliers to 0. The charge manager waits until
+ * all ports have reported in before doing anything.
+ */
+ for (int i = 0; i < CHARGE_PORT_COUNT; i++) {
+ for (int j = 0; j < CHARGE_SUPPLIER_COUNT; j++)
+ charge_manager_update_charge(j, i, NULL);
+ }
+
+ port = gpio_get_level(GPIO_BJ_ADP_PRESENT) ? CHARGE_PORT_BARRELJACK :
+ CHARGE_PORT_TYPEC0;
+ CPRINTUSB("Power source is p%d (%s)", port,
+ port == CHARGE_PORT_TYPEC0 ? "USB-C" : "BJ");
+
+ /* Initialize the power source supplier */
+ switch (port) {
+ case CHARGE_PORT_TYPEC0:
+ typec_set_input_current_limit(port, 3000, 5000);
+ break;
+ case CHARGE_PORT_BARRELJACK:
+ charge_manager_update_charge(
+ CHARGE_SUPPLIER_DEDICATED, DEDICATED_CHARGE_PORT,
+ &bj_adapters[BJ_ADP_RATING_DEFAULT]);
+ break;
+ }
+
+ /* Report charge state from the barrel jack. */
+ adp_connect_deferred();
+}
+DECLARE_HOOK(HOOK_INIT, board_charge_manager_init,
+ HOOK_PRIO_INIT_CHARGE_MANAGER + 1);
+
+__override int extpower_is_present(void)
+{
+ /*
+ * There's no battery, so running this method implies we have power.
+ */
+ return 1;
+}
+
+void ppc_interrupt(enum gpio_signal signal)
+{
+ if (signal == GPIO_USB_C0_FAULT_L)
+ syv682x_interrupt(USBC_PORT_C0);
+}
+
+/* I2C Ports */
+const struct i2c_port_t i2c_ports[] = {
+ { .name = "eeprom",
+ .port = I2C_PORT_EEPROM,
+ .kbps = 400,
+ .scl = GPIO_EC_I2C_EEPROM_SCL,
+ .sda = GPIO_EC_I2C_EEPROM_SDA },
+
+ { .name = "hdmi2_edid",
+ .port = I2C_PORT_HDMI2_EDID,
+ .kbps = 100,
+ .scl = GPIO_EC_I2C_HDMI2_EDID_SCL,
+ .sda = GPIO_EC_I2C_HDMI2_EDID_SDA },
+
+ { .name = "usbc0",
+ .port = I2C_PORT_USB_C0,
+ .kbps = 1000,
+ .scl = GPIO_EC_I2C_USB_C0_SCL,
+ .sda = GPIO_EC_I2C_USB_C0_SDA },
+
+ { .name = "hdmi2_src_ddc",
+ .port = I2C_PORT_HDMI2_SRC_DDC,
+ .kbps = 100,
+ .scl = GPIO_EC_I2C_HDMI2_SRC_DDC_SCL,
+ .sda = GPIO_EC_I2C_HDMI2_SRC_DDC_SDA },
+
+ { .name = "hdmi1_edid",
+ .port = I2C_PORT_HDMI1_EDID,
+ .kbps = 100,
+ .scl = GPIO_EC_I2C_HDMI1_EDID_SCL,
+ .sda = GPIO_EC_I2C_HDMI1_EDID_SDA },
+
+ { .name = "hdmi1_src_ddc",
+ .port = I2C_PORT_HDMI1_SRC_DDC,
+ .kbps = 100,
+ .scl = GPIO_EC_I2C_HDMI1_SRC_DDC_SCL,
+ .sda = GPIO_EC_I2C_HDMI1_SRC_DDC_SDA },
+};
+
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+/* Must come after other header files and interrupt handler declarations */
+#include "gpio_list.h"
diff --git a/board/boxy/board.h b/board/boxy/board.h
new file mode 100644
index 0000000000..c9f3989e11
--- /dev/null
+++ b/board/boxy/board.h
@@ -0,0 +1,168 @@
+/* Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Boxy board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+/* Select Baseboard features */
+#define VARIANT_DEDEDE_EC_IT8320
+#include "baseboard.h"
+
+/* System unlocked in early development */
+#define CONFIG_SYSTEM_UNLOCKED
+
+#define CONFIG_CMD_CHARGER_DUMP
+
+/* I2C Bus Configuration */
+#define I2C_PORT_HDMI2_EDID IT83XX_I2C_CH_B
+#undef I2C_PORT_USB_C0
+#define I2C_PORT_USB_C0 IT83XX_I2C_CH_C
+#define I2C_PORT_HDMI2_SRC_DDC IT83XX_I2C_CH_D
+#define I2C_PORT_HDMI1_EDID IT83XX_I2C_CH_E
+#define I2C_PORT_HDMI1_SRC_DDC IT83XX_I2C_CH_F
+
+/* Power */
+#undef CONFIG_CHARGER
+#undef CONFIG_CHARGER_DISCHARGE_ON_AC
+#undef CONFIG_USB_PD_VBUS_MEASURE_CHARGER
+#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 16000
+#define PD_MAX_VOLTAGE_MV 20000
+#undef PD_MAX_CURRENT_MA
+#define PD_MAX_CURRENT_MA 3250
+#undef PD_MAX_POWER_MW
+#define PD_MAX_POWER_MW 65000
+#define CONFIG_USB_PD_VBUS_DETECT_GPIO
+/* ADC sensors could measure VBUS on this board, but components are DNS */
+#define CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT
+
+/* Override macro for C0 only */
+#define PORT_TO_HPD(port) (GPIO_USB_C0_DP_HPD)
+
+/* Power: Dedicated barreljack charger port */
+#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT
+#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1
+#define DEDICATED_CHARGE_PORT 1
+
+/* USB Type-C */
+#undef CONFIG_USB_CHARGER
+#undef CONFIG_USB_MUX_PI3USB31532
+
+/* TCPC */
+#define CONFIG_USB_PD_PORT_MAX_COUNT 1
+#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP /* C0: ITE EC TCPC */
+#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 1
+
+/* PPC */
+#define CONFIG_USB_PD_DISCHARGE_PPC
+#define CONFIG_USB_PD_VBUS_DETECT_PPC
+#define CONFIG_USBC_PPC
+#define CONFIG_USBC_PPC_SYV682X
+
+/* USB Mux and Retimer */
+#define CONFIG_USB_MUX_IT5205 /* C0: ITE Mux */
+#define I2C_PORT_USB_MUX I2C_PORT_USB_C0 /* Required for ITE Mux */
+
+/* USB Type A Features */
+#define CONFIG_USB_PORT_POWER_DUMB
+#define USB_PORT_COUNT 4 /* Type A ports */
+
+/* No battery */
+#undef CONFIG_BATTERY_CUT_OFF
+#undef CONFIG_BATTERY_PRESENT_GPIO
+#undef CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD
+#undef CONFIG_BATTERY_REVIVE_DISCONNECT
+#undef CONFIG_BATTERY_SMART
+
+/* LED */
+#define CONFIG_LED_PWM
+#define CONFIG_LED_PWM_COUNT 1
+
+/* PWM */
+#define CONFIG_PWM
+
+/* Thermistors */
+#define CONFIG_TEMP_SENSOR
+#define CONFIG_THERMISTOR
+#define CONFIG_STEINHART_HART_3V3_51K1_47K_4050B
+
+/* Buttons */
+#define CONFIG_DEDICATED_RECOVERY_BUTTON
+#define CONFIG_DEDICATED_RECOVERY_BUTTON_2
+#define CONFIG_DEDICATED_RECOVERY_BUTTON_FLAGS BUTTON_FLAG_ACTIVE_HIGH
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_IGNORE_LID
+#define CONFIG_POWER_BUTTON_X86
+#define CONFIG_EMULATED_SYSRQ
+
+/* No Keyboard */
+#undef CONFIG_KEYBOARD_COL2_INVERTED
+#undef CONFIG_KEYBOARD_PROTOCOL_8042
+#undef CONFIG_CMD_KEYBOARD
+#undef CONFIG_KEYBOARD_BOOT_KEYS
+#undef CONFIG_KEYBOARD_RUNTIME_KEYS
+
+/* No backlight */
+#undef CONFIG_BACKLIGHT_LID
+#undef GPIO_ENABLE_BACKLIGHT
+
+/* Unused features - Misc */
+#undef CONFIG_HIBERNATE
+#undef CONFIG_VOLUME_BUTTONS
+#undef CONFIG_LID_SWITCH
+#undef CONFIG_TABLET_MODE
+#undef CONFIG_TABLET_MODE_SWITCH
+#undef CONFIG_GMR_TABLET_MODE
+#undef GPIO_TABLET_MODE_L
+
+/* Unused GPIOs */
+#undef GPIO_USB_C1_DP_HPD
+
+/* Pin renaming */
+#define GPIO_RECOVERY_L GPIO_EC_RECOVERY_BTN_OD
+#define GPIO_RECOVERY_L_2 GPIO_H1_EC_RECOVERY_BTN_ODL
+#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+enum charge_port {
+ CHARGE_PORT_TYPEC0,
+ CHARGE_PORT_BARRELJACK,
+};
+
+enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_COUNT };
+
+enum pwm_channel {
+ PWM_CH_LED_RED,
+ PWM_CH_LED_GREEN,
+ PWM_CH_LED_BLUE,
+ PWM_CH_COUNT,
+};
+
+/* ADC channels */
+enum adc_channel {
+ ADC_VSNS_PP3300_A, /* ADC0 */
+ ADC_TEMP_SENSOR_1, /* ADC2 */
+ ADC_TEMP_SENSOR_2, /* ADC3 */
+ ADC_TEMP_SENSOR_3, /* ADC13 */
+ ADC_PPVAR_PWR_IN_IMON, /* ADC15 */
+ ADC_SNS_PPVAR_PWR_IN, /* ADC16 */
+ ADC_CH_COUNT
+};
+
+enum temp_sensor_id {
+ TEMP_SENSOR_1,
+ TEMP_SENSOR_2,
+ TEMP_SENSOR_3,
+ TEMP_SENSOR_COUNT
+};
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BOARD_H */
diff --git a/board/boxy/build.mk b/board/boxy/build.mk
new file mode 100644
index 0000000000..5593502527
--- /dev/null
+++ b/board/boxy/build.mk
@@ -0,0 +1,15 @@
+# -*- makefile -*-
+# Copyright 2023 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+CHIP:=it83xx
+CHIP_FAMILY:=it8320
+CHIP_VARIANT:=it8320dx
+BASEBOARD:=dedede
+BOARD:=boxy
+
+board-y=board.o led.o usb_pd_policy.o
diff --git a/board/boxy/ec.tasklist b/board/boxy/ec.tasklist
new file mode 100644
index 0000000000..4aad682d14
--- /dev/null
+++ b/board/boxy/ec.tasklist
@@ -0,0 +1,16 @@
+/* Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * See CONFIG_TASK_LIST in config.h for details.
+ */
+
+#define CONFIG_TASK_LIST \
+ TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \
+ TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \
+ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, VENTI_TASK_STACK_SIZE) \
+ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
+ TASK_ALWAYS(POWERBTN, power_button_task, NULL, ULTRA_TASK_STACK_SIZE) \
+ TASK_ALWAYS(PD_C0, pd_task, NULL, ULTRA_TASK_STACK_SIZE)
diff --git a/board/boxy/gpio.inc b/board/boxy/gpio.inc
new file mode 100644
index 0000000000..0e5d0ba917
--- /dev/null
+++ b/board/boxy/gpio.inc
@@ -0,0 +1,179 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first. */
+
+/* Power State interrupts */
+GPIO_INT(SLP_S4_L, PIN(I, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_S3_L, PIN(H, 3), GPIO_INT_BOTH, baseboard_all_sys_pgood_interrupt)
+GPIO_INT(SLP_S0_L, PIN(E, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_SUS_L, PIN(G, 2), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(VCCIN_AUX_VID0, PIN(D, 0), GPIO_INT_BOTH | GPIO_SEL_1P8V,
+ power_signal_interrupt)
+GPIO_INT(VCCIN_AUX_VID1, PIN(K, 1), GPIO_INT_BOTH | GPIO_SEL_1P8V,
+ power_signal_interrupt)
+GPIO_INT(RSMRST_PWRGD_L, PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(CPU_C10_GATE_L, PIN(G, 1), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_DRAM_OD, PIN(D, 3), GPIO_INT_BOTH,
+ baseboard_all_sys_pgood_interrupt)
+GPIO_INT(PG_PP1050_ST_OD, PIN(L, 1), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(EC_VSNS_PP3300_S5, PIN(I, 0), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_VCCIO_EXT_OD, PIN(D, 7), GPIO_INT_BOTH,
+ baseboard_all_sys_pgood_interrupt)
+GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V,
+ espi_reset_pin_asserted_interrupt)
+
+GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_UP,
+ power_button_interrupt)
+#ifdef CONFIG_LOW_POWER_IDLE
+/* Used to wake up the EC from Deep Doze mode when writing to console */
+GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_BOTH,
+ uart_deepsleep_interrupt) /* UART_DBG_TX_EC_RX
+ */
+#endif
+
+/* Other interrupts */
+GPIO_INT(EC_WP_OD, PIN(A, 6), GPIO_INT_BOTH, switch_interrupt)
+/* Directly connected recovery button */
+GPIO_INT(EC_RECOVERY_BTN_OD, PIN(K, 7), GPIO_INT_BOTH, button_interrupt)
+/* Recovery button input from H1 */
+GPIO_INT(H1_EC_RECOVERY_BTN_ODL, PIN(K, 4), GPIO_INT_BOTH, button_interrupt)
+GPIO_INT(BJ_ADP_PRESENT, PIN(A, 7), GPIO_INT_BOTH, adp_connect_interrupt)
+GPIO_INT(USB_C0_FAULT_L, PIN(K, 0), GPIO_INT_FALLING, ppc_interrupt)
+
+/* Power sequence GPIOs */
+GPIO(EC_AP_PSYS, PIN(J, 2), GPIO_OUT_LOW)
+GPIO(EC_AP_RTCRST, PIN(K, 2), GPIO_OUT_LOW)
+GPIO(EC_AP_PWR_BTN_ODL, PIN(B, 6), GPIO_ODR_HIGH)
+GPIO(EC_AP_DPWROK, PIN(L, 7), GPIO_OUT_LOW)
+GPIO(EC_AP_RSMRST_L, PIN(H, 0), GPIO_OUT_LOW)
+GPIO(EC_AP_WAKE_ODL, PIN(D, 5), GPIO_ODR_HIGH)
+GPIO(SYS_RST_ODL, PIN(D, 1), GPIO_ODR_HIGH)
+GPIO(EC_AP_SYS_PWROK, PIN(F, 2), GPIO_OUT_LOW)
+GPIO(PG_PP5000_U_OD, PIN(J, 0), GPIO_INPUT)
+GPIO(EN_PP5000_U, PIN(K, 5), GPIO_OUT_HIGH)
+GPIO(PG_PP3300_A, PIN(B, 5), GPIO_INPUT)
+GPIO(EN_PP3300_A, PIN(C, 5), GPIO_OUT_LOW)
+GPIO(EC_AP_PCH_PWROK_OD, PIN(D, 6), GPIO_ODR_LOW)
+/* TODO(b:149775160) - Modify if needed if we ever use this signal. */
+GPIO(EN_VCCST, PIN(D, 4), GPIO_INPUT)
+GPIO(EN_VCCIO_EXT, PIN(B, 2), GPIO_OUT_LOW)
+GPIO(EC_PROCHOT_ODL, PIN(I, 1), GPIO_ODR_HIGH | GPIO_SEL_1P8V)
+GPIO(EC_AP_VCCST_PWRGD_OD, PIN(E, 5), GPIO_ODR_LOW)
+GPIO(ALL_SYS_PWRGD, PIN(B, 7), GPIO_OUT_LOW)
+GPIO(EN_PPVAR_BJ_ADP_OD, PIN(E, 3), GPIO_ODR_HIGH)
+GPIO(ACK_PPVAR_BJ_ADP_ODL, PIN(A, 0), GPIO_INPUT)
+
+/* Required for icelake chipset code, but implemented through other means for
+ * dedede */
+UNIMPLEMENTED(AC_PRESENT)
+UNIMPLEMENTED(PG_EC_DSW_PWROK)
+UNIMPLEMENTED(PG_EC_ALL_SYS_PWRGD)
+
+/* Required for dedede baseboard but not used in boxy */
+UNIMPLEMENTED(USB_C0_INT_ODL)
+UNIMPLEMENTED(EN_SLP_Z)
+UNIMPLEMENTED(EC_BATTERY_PRES_ODL)
+
+/* I2C pins - Alternate function below configures I2C module on these pins */
+GPIO(EC_I2C_EEPROM_SCL, PIN(B, 3), GPIO_INPUT)
+GPIO(EC_I2C_EEPROM_SDA, PIN(B, 4), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_SCL, PIN(F, 6), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_SDA, PIN(F, 7), GPIO_INPUT)
+GPIO(EC_I2C_HDMI1_EDID_SCL, PIN(E, 0), GPIO_INPUT)
+GPIO(EC_I2C_HDMI1_EDID_SDA, PIN(E, 7), GPIO_INPUT)
+GPIO(EC_I2C_HDMI2_EDID_SCL, PIN(C, 1), GPIO_INPUT)
+GPIO(EC_I2C_HDMI2_EDID_SDA, PIN(C, 2), GPIO_INPUT)
+GPIO(EC_I2C_HDMI1_SRC_DDC_SCL, PIN(A, 4), GPIO_INPUT)
+GPIO(EC_I2C_HDMI1_SRC_DDC_SDA, PIN(A, 5), GPIO_INPUT)
+GPIO(EC_I2C_HDMI2_SRC_DDC_SCL, PIN(H, 1), GPIO_INPUT)
+GPIO(EC_I2C_HDMI2_SRC_DDC_SDA, PIN(H, 2), GPIO_INPUT)
+
+/* USB pins */
+GPIO(EC_AP_USB_C0_HPD, PIN(L, 4), GPIO_OUT_LOW)
+GPIO(EN_USB_A0_VBUS, PIN(L, 6), GPIO_OUT_LOW)
+GPIO(EN_USB_A1_VBUS, PIN(C, 6), GPIO_OUT_LOW)
+GPIO(EN_USB_A2_VBUS, PIN(C, 4), GPIO_OUT_LOW)
+GPIO(EN_USB_A3_VBUS, PIN(J, 5), GPIO_OUT_LOW)
+GPIO(EC_USB_C0_FRS_EN, PIN(K, 6), GPIO_OUT_LOW)
+GPIO(USB_C0_SBU_MUX_FAULT, PIN(I, 7), GPIO_INPUT)
+
+/* MKBP event synchronization */
+/* TODO(b/257833880) Check whether this pin is needed */
+GPIO(EC_AP_MKBP_INT_L, PIN(L, 5), GPIO_ODR_HIGH)
+
+/* HDMI */
+GPIO(HDMI1_CEC, PIN(F, 0), GPIO_OUT_LOW)
+GPIO(HDMI2_CEC_IN, PIN(J, 3), GPIO_INPUT)
+GPIO(HDMI2_CEC, PIN(F, 1), GPIO_OUT_LOW)
+GPIO(HDMI1_SRC_HPD, PIN(F, 3), GPIO_INPUT)
+GPIO(HDMI2_SRC_HPD, PIN(KSO_L, 3), GPIO_INPUT)
+GPIO(EC_HDMI1_SRC_HPD_OUT, PIN(I, 6), GPIO_OUT_LOW)
+GPIO(EC_HDMI2_SRC_HPD_OUT, PIN(KSO_L, 4), GPIO_OUT_LOW)
+GPIO(HDMI1_EDID_SEL, PIN(J, 1), GPIO_OUT_LOW)
+GPIO(HDMI2_EDID_SEL, PIN(KSO_L, 5), GPIO_OUT_LOW)
+GPIO(EDID_BTN_ODL, PIN(C, 3), GPIO_INPUT)
+GPIO(EC_EN_PP5000_HDMI1, PIN(KSO_L, 6), GPIO_OUT_LOW)
+GPIO(EC_EN_PP5000_HDMI2, PIN(KSO_L, 7), GPIO_OUT_LOW)
+
+/* Misc */
+GPIO(EC_ENTERING_RW, PIN(C, 7), GPIO_OUT_LOW)
+GPIO(CCD_MODE_ODL, PIN(H, 5), GPIO_ODR_HIGH)
+GPIO(ECH1_PACKET_MODE, PIN(C, 0), GPIO_OUT_LOW)
+GPIO(EN_RS232_X, PIN(E, 6), GPIO_OUT_LOW)
+GPIO(UART0_RX, PIN(B, 1), GPIO_OUT_LOW) /* UART_EC_TX_DBG_RX */
+
+/* NC pins, enable internal pull-down to avoid floating state. */
+GPIO(GPIOG0_NC, PIN(G, 0), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOG3_NC, PIN(G, 3), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOG4_NC, PIN(G, 4), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOG5_NC, PIN(G, 5), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOG6_NC, PIN(G, 6), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOG7_NC, PIN(G, 7), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOH4_NC, PIN(H, 4), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOH6_NC, PIN(H, 6), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOI4_NC, PIN(I, 4), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOJ4_NC, PIN(J, 4), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOJ6_NC, PIN(J, 6), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOK3_NC, PIN(K, 3), GPIO_INPUT | GPIO_PULL_DOWN)
+GPIO(GPIOM6_NC, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN)
+
+/* Alternate functions GPIO definitions */
+/* UART */
+ALTERNATE(PIN_MASK(B, BIT(0) | BIT(1)), 0, MODULE_UART, 0) /* UART for debug */
+
+/* I2C */
+ALTERNATE(PIN_MASK(B, BIT(3) | BIT(4)), 0, MODULE_I2C, 0) /* I2C0 - EEPROM */
+ALTERNATE(PIN_MASK(C, BIT(1) | BIT(2)), 0, MODULE_I2C, 0) /* I2C1 - HDMI2_EDID
+ */
+ALTERNATE(PIN_MASK(F, BIT(6) | BIT(7)), 0, MODULE_I2C, 0) /* I2C2 - USB_C0 */
+ALTERNATE(PIN_MASK(E, BIT(0) | BIT(7)), 0, MODULE_I2C, 0) /* I2C4 - HDMI1_EDID
+ */
+ALTERNATE(PIN_MASK(A, BIT(4) | BIT(5)), 0, MODULE_I2C, 0) /* I2C5 -
+ HDMI1_SRC_DDC */
+ALTERNATE(PIN_MASK(H, BIT(1) | BIT(2)), 0, MODULE_I2C, 0) /* I2C3 -
+ HDMI2_SRC_DDC */
+
+/* ADC */
+ALTERNATE(PIN_MASK(I, BIT(2) | BIT(3)), 0, MODULE_ADC, 0) /* ADC2:
+ TEMP_SENSOR_1,
+ ADC3: TEMP_SENSOR_2
+ */
+ALTERNATE(PIN_MASK(L, BIT(0) | BIT(2) | BIT(3)), 0, MODULE_ADC,
+ 0) /* ADC13:
+ TEMP_SENSOR_3,
+ ADC15:
+ ANALOG_PPVAR_PWR_IN_IMON,
+ ADC16:
+ SNS_PPVAR_PWR_IN
+ */
+
+/* PWM */
+ALTERNATE(PIN_MASK(A, BIT(1) | BIT(2) | BIT(3)), 0, MODULE_PWM,
+ 0) /* LED_[R,G,B]_ODL
+ */
diff --git a/board/boxy/led.c b/board/boxy/led.c
new file mode 100644
index 0000000000..9ed4f3c413
--- /dev/null
+++ b/board/boxy/led.c
@@ -0,0 +1,80 @@
+/* Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Boxy specific PWM LED settings. */
+
+#include "common.h"
+#include "ec_commands.h"
+#include "led_pwm.h"
+#include "pwm.h"
+#include "util.h"
+
+const enum ec_led_id supported_led_ids[] = {
+ EC_LED_ID_POWER_LED,
+};
+const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
+
+/* One physical LED with red, green, and blue. */
+struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = {
+ /* Red, Green, Blue */
+ [EC_LED_COLOR_RED] = { 100, 0, 0 },
+ [EC_LED_COLOR_GREEN] = { 0, 100, 0 },
+ [EC_LED_COLOR_BLUE] = { 0, 0, 100 },
+ [EC_LED_COLOR_YELLOW] = { 50, 50, 0 },
+ [EC_LED_COLOR_WHITE] = { 50, 50, 50 },
+ [EC_LED_COLOR_AMBER] = { 70, 30, 0 },
+};
+
+/* One logical LED with red, green, and blue channels. */
+struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = {
+ {
+ .ch0 = PWM_CH_LED_RED,
+ .ch1 = PWM_CH_LED_GREEN,
+ .ch2 = PWM_CH_LED_BLUE,
+ .enable = &pwm_enable,
+ .set_duty = &pwm_set_duty,
+ },
+};
+
+void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+{
+ memset(brightness_range, '\0',
+ sizeof(*brightness_range) * EC_LED_COLOR_COUNT);
+ brightness_range[EC_LED_COLOR_RED] = 100;
+ brightness_range[EC_LED_COLOR_GREEN] = 100;
+ brightness_range[EC_LED_COLOR_BLUE] = 100;
+ brightness_range[EC_LED_COLOR_YELLOW] = 100;
+ brightness_range[EC_LED_COLOR_WHITE] = 100;
+ brightness_range[EC_LED_COLOR_AMBER] = 100;
+}
+
+int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
+{
+ enum pwm_led_id pwm_id;
+
+ /* Convert ec_led_id to pwm_led_id. */
+ if (led_id == EC_LED_ID_POWER_LED)
+ pwm_id = PWM_LED0;
+ else
+ return EC_ERROR_UNKNOWN;
+
+ if (brightness[EC_LED_COLOR_RED])
+ set_pwm_led_color(pwm_id, EC_LED_COLOR_RED);
+ else if (brightness[EC_LED_COLOR_GREEN])
+ set_pwm_led_color(pwm_id, EC_LED_COLOR_GREEN);
+ else if (brightness[EC_LED_COLOR_BLUE])
+ set_pwm_led_color(pwm_id, EC_LED_COLOR_BLUE);
+ else if (brightness[EC_LED_COLOR_YELLOW])
+ set_pwm_led_color(pwm_id, EC_LED_COLOR_YELLOW);
+ else if (brightness[EC_LED_COLOR_WHITE])
+ set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE);
+ else if (brightness[EC_LED_COLOR_AMBER])
+ set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER);
+ else
+ /* Otherwise, the "color" is "off". */
+ set_pwm_led_color(pwm_id, -1);
+
+ return EC_SUCCESS;
+}
diff --git a/board/boxy/usb_pd_policy.c b/board/boxy/usb_pd_policy.c
new file mode 100644
index 0000000000..e95e5f7a85
--- /dev/null
+++ b/board/boxy/usb_pd_policy.c
@@ -0,0 +1,85 @@
+/* Copyright 2023 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "charge_manager.h"
+#include "charger.h"
+#include "chipset.h"
+#include "common.h"
+#include "console.h"
+#include "gpio.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args)
+
+__override int pd_check_power_swap(int port)
+{
+ /* If type-c port is supplying power, we never swap PR (to source) */
+ if (port == charge_manager_get_active_charge_port())
+ return 0;
+ /*
+ * Allow power swap as long as we are acting as a dual role device,
+ * otherwise assume our role is fixed (not in S0 or console command
+ * to fix our role).
+ */
+ return (pd_get_dual_role(port) == PD_DRP_TOGGLE_ON ? 1 : 0);
+}
+
+int pd_check_vconn_swap(int port)
+{
+ /* Allow VCONN swaps if the AP is on */
+ return gpio_get_level(GPIO_EN_PP5000_U);
+}
+
+void pd_power_supply_reset(int port)
+{
+ int prev_en;
+
+ if (port < 0 || port >= board_get_usb_pd_port_count())
+ return;
+
+ prev_en = ppc_is_sourcing_vbus(port);
+
+ /* Disable VBUS source */
+ ppc_vbus_source_enable(port, 0);
+
+ /* Enable discharge if we were previously sourcing 5V */
+ if (prev_en)
+ pd_set_vbus_discharge(port, 1);
+
+ /* Notify host of power info change. */
+ pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+int pd_set_power_supply_ready(int port)
+{
+ int rv;
+
+ /* Disable charging */
+ rv = ppc_vbus_sink_enable(port, 0);
+ if (rv)
+ return rv;
+
+ pd_set_vbus_discharge(port, 0);
+
+ /* Enable VBUS source */
+ rv = ppc_vbus_source_enable(port, 1);
+ if (rv)
+ return rv;
+
+ /* Notify host of power info change. */
+ pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+ return EC_SUCCESS;
+}
+
+__override int pd_snk_is_vbus_provided(int port)
+{
+ if (port != CHARGE_PORT_TYPEC0)
+ return 0;
+
+ return ppc_is_vbus_present(port);
+}
diff --git a/board/boxy/vif_override.xml b/board/boxy/vif_override.xml
new file mode 100644
index 0000000000..32736caf64
--- /dev/null
+++ b/board/boxy/vif_override.xml
@@ -0,0 +1,3 @@
+<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File
+ Definition from the USB-IF.
+-->
diff --git a/util/build_with_clang.py b/util/build_with_clang.py
index 910e6ab96b..d219e77ab4 100755
--- a/util/build_with_clang.py
+++ b/util/build_with_clang.py
@@ -252,6 +252,7 @@ NDS32_BOARDS = [
"beetley",
"blipper",
"boten",
+ "boxy",
"dibbi",
"drawcia",
"galtic",