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authorDino Li <Dino.Li@ite.com.tw>2021-08-23 13:28:38 +0800
committerCommit Bot <commit-bot@chromium.org>2021-09-03 10:28:49 +0000
commitf4e055743b196792d4502814d666c3e446847060 (patch)
treefa86dd4a19f75d975f94e46bb42f22fbe2859704
parentc0ab944cd75aaeee180f5396fed34fa6b118f911 (diff)
downloadchrome-ec-f4e055743b196792d4502814d666c3e446847060.tar.gz
riscv: panic: S0/S1 are clobbered registers in software_panic()
So compiler won't use these two registers to store any other value in the function. This fixed software panic info isn't correct issue when LTO is enabled. BRANCH=asurada BUG=b:179206540 TEST=Run "crash assert" on hayato, the software panic info is correct. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I4a94e7ea94ebc0bf4f056de58edb66c2962d669d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3113485 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> (cherry picked from commit 5a6406cf2ec23b0c28dfd8bb8d1db4edb810ebcf) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115605 Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Commit-Queue: Hung-Te Lin <hungte@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
-rw-r--r--core/riscv-rv32i/panic.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/core/riscv-rv32i/panic.c b/core/riscv-rv32i/panic.c
index 3d8cec1b06..b339fdf76c 100644
--- a/core/riscv-rv32i/panic.c
+++ b/core/riscv-rv32i/panic.c
@@ -41,8 +41,8 @@ static const char * const exc_type[16] = {
void software_panic(uint32_t reason, uint32_t info)
{
- asm volatile ("mv s0, %0" : : "r"(reason));
- asm volatile ("mv s1, %0" : : "r"(info));
+ asm volatile ("mv s0, %0" : : "r"(reason) : "s0");
+ asm volatile ("mv s1, %0" : : "r"(info) : "s1");
if (in_interrupt_context())
asm("j excep_handler");
else