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authorRandall Spangler <rspangler@chromium.org>2014-01-23 14:14:20 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-01-24 19:37:41 +0000
commit2d39c66ee9083ff83a3121e2b4654af7a4b17542 (patch)
tree7a460c21f7107c8c01a6f78e6d5d320341f9b4f2
parent75857e80d0ef0426fd80fd7cb526ff7b895ba9a0 (diff)
downloadchrome-ec-2d39c66ee9083ff83a3121e2b4654af7a4b17542.tar.gz
rambi: Increase REST# pulse length for warm reboot
The PCH uses a 16 ms debounce, so need to assert the signal for twice that to be assured of a reboot. BUG=chrome-os-partner:25088 BRANCH=rambi TEST=Alt+VolUp+R reboots the system Change-Id: I51fd54fd992e4e54e6c3bc9c13f9fd59e9bf55ac Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/183726 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org>
-rw-r--r--power/baytrail.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/power/baytrail.c b/power/baytrail.c
index 8615964705..04f0795a95 100644
--- a/power/baytrail.c
+++ b/power/baytrail.c
@@ -89,11 +89,11 @@ void chipset_reset(int cold_reset)
/*
* Send a reset pulse to the PCH. This just causes it to
* assert INIT# to the CPU without dropping power or asserting
- * PLTRST# to reset the rest of the system. Pulse must be at
- * least 16 PCI clocks long = 500 ns.
+ * PLTRST# to reset the rest of the system. The PCH uses a 16
+ * ms debounce time, so assert the signal for twice that.
*/
gpio_set_level(GPIO_PCH_RCIN_L, 0);
- udelay(10);
+ usleep(32 * MSEC);
gpio_set_level(GPIO_PCH_RCIN_L, 1);
}
}