From 2d39c66ee9083ff83a3121e2b4654af7a4b17542 Mon Sep 17 00:00:00 2001 From: Randall Spangler Date: Thu, 23 Jan 2014 14:14:20 -0800 Subject: rambi: Increase REST# pulse length for warm reboot The PCH uses a 16 ms debounce, so need to assert the signal for twice that to be assured of a reboot. BUG=chrome-os-partner:25088 BRANCH=rambi TEST=Alt+VolUp+R reboots the system Change-Id: I51fd54fd992e4e54e6c3bc9c13f9fd59e9bf55ac Signed-off-by: Randall Spangler Reviewed-on: https://chromium-review.googlesource.com/183726 Reviewed-by: Aaron Durbin Reviewed-by: Benson Leung --- power/baytrail.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/power/baytrail.c b/power/baytrail.c index 8615964705..04f0795a95 100644 --- a/power/baytrail.c +++ b/power/baytrail.c @@ -89,11 +89,11 @@ void chipset_reset(int cold_reset) /* * Send a reset pulse to the PCH. This just causes it to * assert INIT# to the CPU without dropping power or asserting - * PLTRST# to reset the rest of the system. Pulse must be at - * least 16 PCI clocks long = 500 ns. + * PLTRST# to reset the rest of the system. The PCH uses a 16 + * ms debounce time, so assert the signal for twice that. */ gpio_set_level(GPIO_PCH_RCIN_L, 0); - udelay(10); + usleep(32 * MSEC); gpio_set_level(GPIO_PCH_RCIN_L, 1); } } -- cgit v1.2.1