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-rw-r--r--drivers/brcm/emmc/emmc_chal_sd.c4
-rw-r--r--drivers/brcm/emmc/emmc_csl_sdcard.c6
-rw-r--r--drivers/brcm/i2c/i2c.c4
-rw-r--r--drivers/brcm/sotp.c4
4 files changed, 9 insertions, 9 deletions
diff --git a/drivers/brcm/emmc/emmc_chal_sd.c b/drivers/brcm/emmc/emmc_chal_sd.c
index 34d761c73..5379ec1a7 100644
--- a/drivers/brcm/emmc/emmc_chal_sd.c
+++ b/drivers/brcm/emmc/emmc_chal_sd.c
@@ -119,7 +119,7 @@ static int32_t chal_sd_set_power(struct sd_dev *handle,
mmio_setbits_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL_OFFSET,
SD4_EMMC_TOP_CTRL_SDPWR_MASK);
- /* dummy write & ack to verify if the sdio is ready to send commads */
+ /* dummy write & ack to verify if the sdio is ready to send commands */
mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_ARG_OFFSET, 0);
mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CMD_OFFSET, 0);
@@ -600,7 +600,7 @@ uint32_t chal_sd_freq_2_div_ctrl_setting(uint32_t desired_freq)
if (actual_freq > desired_freq) {
/*
- * Division does not result in exact freqency match.
+ * Division does not result in exact frequency match.
* Make sure resulting frequency does not exceed requested freq.
*/
div_ctrl_setting++;
diff --git a/drivers/brcm/emmc/emmc_csl_sdcard.c b/drivers/brcm/emmc/emmc_csl_sdcard.c
index 40bc4a058..789ed9c82 100644
--- a/drivers/brcm/emmc/emmc_csl_sdcard.c
+++ b/drivers/brcm/emmc/emmc_csl_sdcard.c
@@ -244,7 +244,7 @@ static int abort_err(struct sd_handle *handle)
* The function handles real data transmission on both DMA and
* none DMA mode, In None DMA mode the data transfer starts
* when the command is sent to the card, data has to be written
- * into the host contollers buffer at this time one block
+ * into the host controllers buffer at this time one block
* at a time.
* In DMA mode, the real data transfer is done by the DMA engine
* and this functions just waits for the data transfer to complete.
@@ -318,7 +318,7 @@ int select_blk_sz(struct sd_handle *handle, uint16_t size)
/*
- * The function initalizes the SD/SDIO/MMC/CEATA and detects
+ * The function initializes the SD/SDIO/MMC/CEATA and detects
* the card according to the flag of detection.
* Once this function is called, the card is put into ready state
* so application can do data transfer to and from the card.
@@ -393,7 +393,7 @@ int init_card(struct sd_handle *handle, int detection)
/*
- * The function handles MMC/CEATA card initalization.
+ * The function handles MMC/CEATA card initialization.
*/
int init_mmc_card(struct sd_handle *handle)
{
diff --git a/drivers/brcm/i2c/i2c.c b/drivers/brcm/i2c/i2c.c
index 2096a8259..b45c0e771 100644
--- a/drivers/brcm/i2c/i2c.c
+++ b/drivers/brcm/i2c/i2c.c
@@ -612,7 +612,7 @@ int i2c_probe(uint32_t bus_id, uint8_t devaddr)
*
* Description:
* This function reads I2C data from a device without specifying
- * a command regsiter.
+ * a command register.
*
* Parameters:
* bus_id - I2C bus ID
@@ -647,7 +647,7 @@ int i2c_recv_byte(uint32_t bus_id, uint8_t devaddr, uint8_t *value)
*
* Description:
* This function send I2C data to a device without specifying
- * a command regsiter.
+ * a command register.
*
* Parameters:
* bus_id - I2C bus ID
diff --git a/drivers/brcm/sotp.c b/drivers/brcm/sotp.c
index 63c482066..20c644129 100644
--- a/drivers/brcm/sotp.c
+++ b/drivers/brcm/sotp.c
@@ -168,7 +168,7 @@ void sotp_mem_write(uint32_t addr, uint32_t sotp_add_ecc, uint64_t wdata)
BIT(SOTP_STATUS__FDONE))
;
- /* Enable OTP acces by CPU */
+ /* Enable OTP access by CPU */
mmio_setbits_32(SOTP_PROG_CONTROL,
BIT(SOTP_PROG_CONTROL__OTP_CPU_MODE_EN));
@@ -244,7 +244,7 @@ void sotp_mem_write(uint32_t addr, uint32_t sotp_add_ecc, uint64_t wdata)
/* Command done is cleared w1c */
mmio_setbits_32(SOTP_STATUS_1, BIT(SOTP_STATUS_1__CMD_DONE));
- /* disable OTP acces by CPU */
+ /* disable OTP access by CPU */
mmio_clrbits_32(SOTP_PROG_CONTROL,
BIT(SOTP_PROG_CONTROL__OTP_CPU_MODE_EN));