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path: root/opcodes/i386-opc.h
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* x86: drop FloatDJan Beulich2018-03-081-3/+0
* x86: Add -O[2|s] assembler command-line optionsH.J. Lu2018-02-271-0/+4
* Enable Intel PCONFIG instruction.Igor Tsimbalist2018-01-231-0/+3
* Enable Intel WBNOINVD instruction.Igor Tsimbalist2018-01-231-0/+3
* Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist2018-01-171-3/+5
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* x86: fold certain AVX and AVX2 templatesJan Beulich2017-12-181-1/+1
* x86: fold RegXMM/RegYMM/RegZMM into RegSIMDJan Beulich2017-12-181-13/+4
* x86: drop FloatReg and FloatAccJan Beulich2017-12-181-7/+1
* x86: replace Reg8, Reg16, Reg32, and Reg64Jan Beulich2017-12-181-12/+3
* x86: drop Vec_Disp8Jan Beulich2017-11-301-4/+0
* Enable Intel AVX512_BITALG instructions.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel AVX512_VNNI instructions.Igor Tsimbalist2017-10-231-1/+4
* Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist2017-10-231-1/+4
* Enable Intel VAES instructions.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel GFNI instructions.Igor Tsimbalist2017-10-231-2/+3
* Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist2017-10-231-2/+5
* x86: Add NOTRACK prefix supportH.J. Lu2017-05-221-0/+3
* X86: Add pseudo prefixes to control encodingH.J. Lu2017-03-091-4/+3
* Add support for Intel CET instructionsH.J. Lu2017-03-061-0/+5
* Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist2017-01-121-0/+3
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist2016-11-021-0/+3
* Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist2016-11-021-0/+9
* X86: Remove pcommit instructionH.J. Lu2016-10-211-3/+0
* X86: Add ptwrite instructionH.J. Lu2016-08-241-0/+3
* Update x86 CPU_XXX_FLAGS handlingH.J. Lu2016-05-271-0/+15
* Replace CpuAMD64/CpuIntel64 with AMD64/Intel64H.J. Lu2016-05-271-7/+7
* Correct CpuMax in i386-opc.hH.J. Lu2016-05-271-1/+1
* Enable Intel RDPID instruction.Alexander Fomin2016-05-101-0/+3
* Copyright update for binutilsAlan Modra2016-01-011-1/+1
* Implement Intel OSPKE instructionsH.J. Lu2015-12-091-0/+3
* Remove trailing spaces in opcodesH.J. Lu2015-08-121-1/+1
* Add support for monitorx/mwaitx instructionsAmit Pawar2015-06-301-0/+3
* Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu2015-05-151-0/+6
* Add Intel MCU support to opcodesH.J. Lu2015-05-111-0/+3
* Add znver1 processorGanesh Gopalasubramanian2015-03-171-0/+3
* ChangeLog rotatation and copyright year updateAlan Modra2015-01-021-1/+1
* Add AVX512VBMI instructionsIlya Tocar2014-11-171-0/+3
* Add AVX512IFMA instructionsIlya Tocar2014-11-171-0/+3
* Add pcommit instructionIlya Tocar2014-11-171-0/+3
* Add clwb instructionIlya Tocar2014-11-171-0/+3
* Add AVX512DQ instructions and their AVX512VL variants.Ilya Tocar2014-07-221-0/+3
* Add support for AVX512BW instructions and their AVX512VL versions.Ilya Tocar2014-07-221-0/+3
* Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.Ilya Tocar2014-07-221-0/+5
* Add support for Intel SGX instructionsIlya Tocar2014-04-041-0/+3
* Update copyright yearsAlan Modra2014-03-051-2/+1
* Add support for CPUID PREFETCHWT1Ilya Tocar2014-02-211-0/+3
* Add clflushopt, xsaves, xsavec, xrstorsIlya Tocar2014-02-121-0/+9
* Add Intel AVX-512 supportH.J. Lu2013-07-261-0/+91
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