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path: root/opcodes/i386-opc.h
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* x86: drop Vec_Imm4Jan Beulich2019-07-011-4/+0
* Enable Intel AVX512_VP2INTERSECT insnH.J. Lu2019-06-041-0/+3
* Add support for Intel ENQCMD[S] instructionsH.J. Lu2019-06-041-0/+3
* x86: Support Intel AVX512 BF16Xuepeng Guo2019-04-051-0/+3
* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* x86: fold Size{16,32,64} template attributesJan Beulich2018-10-101-6/+5
* x86: Support VEX/EVEX WIG encodingH.J. Lu2018-09-141-0/+2
* x86: use D attribute also for SIMD templatesJan Beulich2018-09-131-0/+2
* x86: Add CpuCMOV and CpuFXSRH.J. Lu2018-08-111-0/+6
* x86: fold RegEip/RegRip and RegEiz/RegRizJan Beulich2018-08-061-4/+2
* x86: drop "mem" operand type attributeJan Beulich2018-08-031-1/+0
* x86: fold various AVX512 templates with so far differing Masking attributesJan Beulich2018-07-311-2/+2
* x86: drop CpuVREXJan Beulich2018-07-311-3/+0
* x86: Expand Broadcast to 3 bitsH.J. Lu2018-07-251-1/+12
* x86: fold various AVX512VL templates into their AVX512F counterpartsJan Beulich2018-07-191-1/+2
* x86: Split vcvtps2{,u}qq and vcvttps2{,u}qqH.J. Lu2018-07-181-9/+9
* x86: replace off-by-one OTMaxJan Beulich2018-07-111-4/+4
* Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu2018-05-071-0/+6
* x86: Replace AddrPrefixOp0 with AddrPrefixOpRegH.J. Lu2018-05-071-3/+3
* Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."Igor Tsimbalist2018-04-271-24/+0
* Enable Intel MOVDIRI, MOVDIR64B instructions.Igor Tsimbalist2018-04-261-0/+24
* x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMaskJan Beulich2018-04-261-15/+0
* x86: drop VexImmExtJan Beulich2018-04-261-3/+0
* Enable Intel CLDEMOTE instruction.Igor Tsimbalist2018-04-171-0/+3
* Enable Intel WAITPKG instructions.Igor Tsimbalist2018-04-111-0/+3
* x86: drop VecESizeJan Beulich2018-03-281-7/+0
* x86: convert broadcast insn attribute to booleanJan Beulich2018-03-281-11/+1
* x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu2018-03-081-3/+0
* x86: fold several AVX512VL templatesJan Beulich2018-03-081-0/+2
* x86: drop FloatDJan Beulich2018-03-081-3/+0
* x86: Add -O[2|s] assembler command-line optionsH.J. Lu2018-02-271-0/+4
* Enable Intel PCONFIG instruction.Igor Tsimbalist2018-01-231-0/+3
* Enable Intel WBNOINVD instruction.Igor Tsimbalist2018-01-231-0/+3
* Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist2018-01-171-3/+5
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* x86: fold certain AVX and AVX2 templatesJan Beulich2017-12-181-1/+1
* x86: fold RegXMM/RegYMM/RegZMM into RegSIMDJan Beulich2017-12-181-13/+4
* x86: drop FloatReg and FloatAccJan Beulich2017-12-181-7/+1
* x86: replace Reg8, Reg16, Reg32, and Reg64Jan Beulich2017-12-181-12/+3
* x86: drop Vec_Disp8Jan Beulich2017-11-301-4/+0
* Enable Intel AVX512_BITALG instructions.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel AVX512_VNNI instructions.Igor Tsimbalist2017-10-231-1/+4
* Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist2017-10-231-1/+4
* Enable Intel VAES instructions.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel GFNI instructions.Igor Tsimbalist2017-10-231-2/+3
* Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist2017-10-231-2/+5
* x86: Add NOTRACK prefix supportH.J. Lu2017-05-221-0/+3
* X86: Add pseudo prefixes to control encodingH.J. Lu2017-03-091-4/+3
* Add support for Intel CET instructionsH.J. Lu2017-03-061-0/+5
* Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist2017-01-121-0/+3
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