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path: root/opcodes/i386-init.h
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* x86: minor improvements to optimize_imm() (part III)Jan Beulich2022-10-311-4/+0
* Support Intel PREFETCHICui, Lili2022-10-311-252/+261
* Support Intel AMX-FP16Cui,Lili2022-10-211-233/+242
* x86: Disable AVX-VNNI when disabling AVX2H.J. Lu2022-10-181-2/+2
* x86: correct CPU_AMX_{BF16,INT8}_FLAGSJan Beulich2022-10-181-2/+2
* x86: fold Disp32S and Disp32Jan Beulich2022-07-041-73/+69
* x86: restore masking of displacement kindsJan Beulich2022-07-041-6/+6
* x86: never set i386_cpu_flags' "unused" fieldJan Beulich2022-03-171-1/+1
* x86: unify CPU flag on/off processingJan Beulich2022-03-171-1/+1
* x86: drop L1OM/K1OM support from gasJan Beulich2022-03-171-390/+372
* x86: assorted IAMCU CPU checking fixesJan Beulich2022-03-171-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2022-01-021-1/+1
* [PATCH 1/2] Enable Intel AVX512_FP16 instructionsCui,Lili2021-08-051-251/+269
* Update year range in copyright notice of binutils filesAlan Modra2021-01-011-1/+1
* Add AMD znver3 processor supportGanesh Gopalasubramanian2020-10-201-193/+229
* Enhancement for avx-vnni patchCui,Lili2020-10-161-242/+242
* x86: Support Intel AVX VNNIH.J. Lu2020-10-141-241/+259
* x86: Add support for Intel HRESET instructionLili Cui2020-10-141-192/+210
* x86: Support Intel UINTRLili Cui2020-10-141-187/+392
* Add support for Intel TDX instructions.Cui,Lili2020-09-241-204/+220
* Enable support to Intel Keylocker instructionsTerry Guo2020-09-231-181/+213
* x86: Add support for Intel AMX instructionsLili Cui2020-07-101-227/+279
* Add support for intel TSXLDTRK instructions$Cui,Lili2020-04-071-173/+189
* Add support for intel SERIALIZE instructionLiliCui2020-04-021-171/+187
* x86: support VMGEXITJan Beulich2020-03-041-170/+178
* x86: Remove CpuABM and add CpuPOPCNTH.J. Lu2020-02-171-116/+124
* x86: Don't disable SSE3 when disabling SSE4aH.J. Lu2020-02-161-1/+1
* x86: Don't disable SSE4a when disabling SSE4H.J. Lu2020-02-161-2/+2
* x86: fix SSE4a dependencies of ".arch .nosse*"Jan Beulich2020-02-131-2/+10
* Update year range in copyright notice of binutils filesAlan Modra2020-01-011-1/+1
* x86: make JumpAbsolute an insn attributeJan Beulich2019-11-141-61/+57
* x86: fold EsSeg into IsStringJan Beulich2019-11-121-60/+56
* x86: introduce operand type "instance"Jan Beulich2019-11-121-84/+84
* x86: convert RegMask and RegBND from bitfield to enumeratorJan Beulich2019-11-081-87/+87
* x86: convert RegSIMD and RegMMX from bitfield to enumeratorJan Beulich2019-11-081-87/+87
* x86: convert Control/Debug/Test from bitfield to enumeratorJan Beulich2019-11-081-83/+83
* x86: convert SReg from bitfield to enumeratorJan Beulich2019-11-081-78/+78
* x86: introduce operand type "class"Jan Beulich2019-11-081-0/+4
* x86: support further AMD Zen2 instructionsJan Beulich2019-11-071-166/+182
* x86: make RegMem an opcode modifierJan Beulich2019-07-161-48/+48
* x86: fold SReg{2,3}Jan Beulich2019-07-161-124/+71
* x86: drop Vec_Imm4Jan Beulich2019-07-011-55/+50
* x86: correct / adjust debug printingJan Beulich2019-06-251-9/+14
* Enable Intel AVX512_VP2INTERSECT insnH.J. Lu2019-06-041-184/+200
* Add support for Intel ENQCMD[S] instructionsH.J. Lu2019-06-041-162/+178
* x86: Support Intel AVX512 BF16Xuepeng Guo2019-04-051-181/+197
* ix86: Disable AVX512F when disabling AVX2H.J. Lu2019-03-191-6/+6
* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* x86: Add CpuCMOV and CpuFXSRH.J. Lu2018-08-111-417/+449
* x86: drop "mem" operand type attributeJan Beulich2018-08-031-62/+62
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