| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Support Intel AMX-COMPLEX | Haochen Jiang | 2023-04-07 | 1 | -262/+280 |
| * | x86: MONITOR/MWAIT are not SSE3 insns | Jan Beulich | 2023-02-24 | 1 | -524/+533 |
| * | x86-64: don't permit LAHF/SAHF with "generic64" | Jan Beulich | 2023-02-24 | 1 | -394/+403 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2023-01-01 | 1 | -1/+1 |
| * | x86: correct/improve TSX controls | Jan Beulich | 2022-12-22 | 1 | -1/+28 |
| * | x86: add dependencies on SVME | Jan Beulich | 2022-12-22 | 1 | -7/+43 |
| * | x86: add dependencies on VMX | Jan Beulich | 2022-12-22 | 1 | -2/+29 |
| * | x86: correct XSAVE* dependencies | Jan Beulich | 2022-12-22 | 1 | -7/+7 |
| * | x86: correct dependencies of a few AVX512 sub-features | Jan Beulich | 2022-12-22 | 1 | -6/+6 |
| * | x86: add dependencies on AVX2 | Jan Beulich | 2022-12-22 | 1 | -9/+27 |
| * | x86: correct SSE dependencies | Jan Beulich | 2022-12-22 | 1 | -48/+84 |
| * | x86: re-work ISA extension dependency handling | Jan Beulich | 2022-12-22 | 1 | -528/+555 |
| * | x86: drop most OPERAND_TYPE_* (and rework the rest) | Jan Beulich | 2022-12-02 | 1 | -184/+0 |
| * | Add AMD znver4 processor support | Tejas Joshi | 2022-11-15 | 1 | -213/+231 |
| * | Support Intel RAO-INT | Kong Lingling | 2022-11-08 | 1 | -250/+268 |
| * | Support Intel AVX-NE-CONVERT | konglin1 | 2022-11-04 | 1 | -251/+269 |
| * | Support Intel MSRLIST | Hu, Lin1 | 2022-11-02 | 1 | -248/+266 |
| * | Support Intel WRMSRNS | Hu, Lin1 | 2022-11-02 | 1 | -247/+265 |
| * | Support Intel CMPccXADD | Haochen Jiang | 2022-11-02 | 1 | -247/+265 |
| * | Support Intel AVX-VNNI-INT8 | Cui,Lili | 2022-11-02 | 1 | -61/+79 |
| * | Support Intel AVX-IFMA | Hongyu Wang | 2022-11-02 | 1 | -252/+270 |
| * | x86: minor improvements to optimize_imm() (part III) | Jan Beulich | 2022-10-31 | 1 | -4/+0 |
| * | Support Intel PREFETCHI | Cui, Lili | 2022-10-31 | 1 | -252/+261 |
| * | Support Intel AMX-FP16 | Cui,Lili | 2022-10-21 | 1 | -233/+242 |
| * | x86: Disable AVX-VNNI when disabling AVX2 | H.J. Lu | 2022-10-18 | 1 | -2/+2 |
| * | x86: correct CPU_AMX_{BF16,INT8}_FLAGS | Jan Beulich | 2022-10-18 | 1 | -2/+2 |
| * | x86: fold Disp32S and Disp32 | Jan Beulich | 2022-07-04 | 1 | -73/+69 |
| * | x86: restore masking of displacement kinds | Jan Beulich | 2022-07-04 | 1 | -6/+6 |
| * | x86: never set i386_cpu_flags' "unused" field | Jan Beulich | 2022-03-17 | 1 | -1/+1 |
| * | x86: unify CPU flag on/off processing | Jan Beulich | 2022-03-17 | 1 | -1/+1 |
| * | x86: drop L1OM/K1OM support from gas | Jan Beulich | 2022-03-17 | 1 | -390/+372 |
| * | x86: assorted IAMCU CPU checking fixes | Jan Beulich | 2022-03-17 | 1 | -1/+1 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2022-01-02 | 1 | -1/+1 |
| * | [PATCH 1/2] Enable Intel AVX512_FP16 instructions | Cui,Lili | 2021-08-05 | 1 | -251/+269 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2021-01-01 | 1 | -1/+1 |
| * | Add AMD znver3 processor support | Ganesh Gopalasubramanian | 2020-10-20 | 1 | -193/+229 |
| * | Enhancement for avx-vnni patch | Cui,Lili | 2020-10-16 | 1 | -242/+242 |
| * | x86: Support Intel AVX VNNI | H.J. Lu | 2020-10-14 | 1 | -241/+259 |
| * | x86: Add support for Intel HRESET instruction | Lili Cui | 2020-10-14 | 1 | -192/+210 |
| * | x86: Support Intel UINTR | Lili Cui | 2020-10-14 | 1 | -187/+392 |
| * | Add support for Intel TDX instructions. | Cui,Lili | 2020-09-24 | 1 | -204/+220 |
| * | Enable support to Intel Keylocker instructions | Terry Guo | 2020-09-23 | 1 | -181/+213 |
| * | x86: Add support for Intel AMX instructions | Lili Cui | 2020-07-10 | 1 | -227/+279 |
| * | Add support for intel TSXLDTRK instructions$ | Cui,Lili | 2020-04-07 | 1 | -173/+189 |
| * | Add support for intel SERIALIZE instruction | LiliCui | 2020-04-02 | 1 | -171/+187 |
| * | x86: support VMGEXIT | Jan Beulich | 2020-03-04 | 1 | -170/+178 |
| * | x86: Remove CpuABM and add CpuPOPCNT | H.J. Lu | 2020-02-17 | 1 | -116/+124 |
| * | x86: Don't disable SSE3 when disabling SSE4a | H.J. Lu | 2020-02-16 | 1 | -1/+1 |
| * | x86: Don't disable SSE4a when disabling SSE4 | H.J. Lu | 2020-02-16 | 1 | -2/+2 |
| * | x86: fix SSE4a dependencies of ".arch .nosse*" | Jan Beulich | 2020-02-13 | 1 | -2/+10 |
