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path: root/opcodes/arc-dis.c
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* Update year range in copyright notice of binutils filesAlan Modra2022-01-021-1/+1
* arc: Construct disassembler options dynamicallyShahab Vahedi2021-06-021-27/+153
* Use bool in opcodesAlan Modra2021-03-311-55/+55
* opcodes int vs bfd_boolean fixesAlan Modra2021-03-291-1/+1
* Add startswith function and use it instead of CONST_STRNEQ.Martin Liska2021-03-221-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2021-01-011-1/+1
* arc: Detect usage of illegal double register pairsClaudiu Zissulescu2020-07-141-3/+11
* Fix spelling mistakes in some of the binutils sub-directories.Nick Clifton2020-07-061-1/+1
* Re: ARC: Use of uninitialised valueAlan Modra2020-03-261-2/+2
* ARC: Use of uninitialised valueAlan Modra2020-03-221-3/+4
* [ARC] [COMMITTED] Change ACCL/ACCH reg name to generic.Claudiu Zissulescu2020-01-131-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2020-01-011-1/+1
* Remove more shifts for sign/zero extensionAlan Modra2019-12-111-2/+1
* ubsan: arc: shift exponent 32 is too large for 32-bit type 'int'Alan Modra2019-12-111-1/+1
* Prevent objdump from aborting when asked to disassemble an unknown type of AR...Phillipe Antoine2019-08-071-6/+11
* [ARC] Update disassembler opcode selectionClaudiu Zissulescu2019-07-241-1/+23
* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* opcodes error messagesAlan Modra2018-03-031-2/+4
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* [ARC] Improve printing of pc-relative instructions.claziss2017-11-211-16/+46
* [ARC] Force the disassam to use the hexadecimal number for printingclaziss2017-11-031-1/+13
* [ARC] Sync opcode data base.claziss2017-11-031-0/+1
* [ARC] Use FOR_EACH_DISASSEMBLER_OPTION to iterate over optionsAnton Kolesov2017-06-291-14/+6
* [ARC] Fix handling of cpu=... disassembler option valueAnton Kolesov2017-06-291-8/+8
* [ARC] Allow CPU to be enforced via disassemble_info optionsAnton Kolesov2017-05-301-26/+105
* [ARC] Object attributes.Claudiu Zissulescu2017-05-101-1/+2
* [ARC] Enhance enter/leave mnemonics.Claudiu Zissulescu2017-04-251-3/+16
* -Wwrite-strings: Constify struct disassemble_info's disassembler_options fieldPedro Alves2017-04-051-2/+2
* [ARC] Provide an interface to decode ARC instructions.Claudiu Zissulescu2017-02-061-37/+174
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* [ARC] Add checking for LP_COUNT reg usage, improve error reporting.Claudiu Zissulescu2016-11-291-1/+3
* [ARC] Fix disassembler option.Claudiu Zissulescu2016-11-291-55/+40
* arc: Implement NPS-400 dcmac instructionGraham Markall2016-11-031-0/+4
* arc: Change max instruction length to 64-bitsAndrew Burgess2016-11-031-282/+189
* arc: Swap highbyte and lowbyte in print_insn_arcGraham Markall2016-11-031-4/+4
* arc: Replace ARC_SHORT macro with arc_opcode_len functionGraham Markall2016-11-031-4/+4
* [ARC] Disassembler: fix LIMM detection for short instructions.Claudiu Zissulescu2016-10-141-2/+3
* -Wimplicit-fallthrough warning fixesAlan Modra2016-10-061-0/+1
* [ARC] Disassemble correctly extension instructions.Claudiu Zissulescu2016-09-161-3/+3
* Stop the ARC disassembler from seg-faulting if initialised without a BFD pres...Anton Kolesov2016-09-141-3/+8
* Fixed issue with NULL pointer access on header var.Cupertino Miranda2016-08-301-1/+4
* Begin implementing ARC NPS-400 Accelerator instructionsGraham Markall2016-07-271-5/+40
* Add support to the ARC disassembler for selecting instruction classes.Claudiu Zissulescu2016-07-201-127/+342
* Arc assembler: Convert nps400 from a machine type to an extension.Graham Markall2016-06-211-6/+6
* Add support for 48 and 64 bit ARC instructions.Andrew Burgess2016-06-021-92/+377
* [ARC] Update instruction type and delay slot info.Claudiu Zissulescu2016-05-231-6/+25
* [ARC] Rename "class" named attributes.Claudiu Zissulescu2016-05-231-4/+4
* opcodes/arc: Move instruction length logic to new functionAndrew Burgess2016-04-141-13/+44
* Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu2016-04-121-62/+153
* Add support for .extInstruction pseudo-op.Claudiu Zissulescu2016-04-121-99/+129
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