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authorAlan Modra <amodra@gmail.com>2018-03-02 08:23:50 +1030
committerAlan Modra <amodra@gmail.com>2018-03-03 11:34:26 +1030
commita6743a5420aa02a0550b0f7be004f6c06e90ce21 (patch)
treec77d94209c8c3079ae8a19916bb82aad775b5941 /opcodes/arc-dis.c
parent5c1f594e585818719d5c19346e73a1cca3bbce2b (diff)
downloadbinutils-gdb-a6743a5420aa02a0550b0f7be004f6c06e90ce21.tar.gz
opcodes error messages
Another patch aimed at making binutils comply with the GNU coding standard. The generated files require https://sourceware.org/ml/cgen/2018-q1/msg00004.html cpu/ * frv.opc: Include opintl.h. (add_next_to_vliw): Use opcodes_error_handler to print error. Standardize error message. (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. opcodes/ * sysdep.h (opcodes_error_handler): Define. (_bfd_error_handler): Declare. * Makefile.am: Remove stray #. * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT EDIT" comment. * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c, * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c, * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use opcodes_error_handler to print errors. Standardize error messages. * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise, and include opintl.h. * nds32-asm.c: Likewise, and include sysdep.h and opintl.h. * i386-gen.c: Standardize error messages. * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate. * Makefile.in: Regenerate. * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c, * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c, * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c, * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c, * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c, * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c, * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c, * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c, * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c, * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c, * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c, * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
Diffstat (limited to 'opcodes/arc-dis.c')
-rw-r--r--opcodes/arc-dis.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index cb725427f12..feb4ca8cbe2 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -778,7 +778,8 @@ parse_option (const char *option)
else if (CONST_STRNEQ (option, "hex"))
print_hex = TRUE;
else
- fprintf (stderr, _("Unrecognised disassembler option: %s\n"), option);
+ /* xgettext:c-format */
+ opcodes_error_handler (_("unrecognised disassembler option: %s"), option);
}
#define ARC_CPU_TYPE_A6xx(NAME,EXTRA) \
@@ -820,7 +821,8 @@ parse_cpu_option (const char *option)
}
}
- fprintf (stderr, _("Unrecognised disassembler CPU option: %s\n"), option);
+ /* xgettext:c-format */
+ opcodes_error_handler (_("unrecognised disassembler CPU option: %s"), option);
return ARC_OPCODE_NONE;
}