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path: root/opcodes/aarch64-opc-2.c
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* [AArch64] Additional SVE instructionsRichard Sandiford2017-02-241-0/+6
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* [Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm fieldRenlin Li2016-12-131-2/+2
* [AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy2016-11-181-53/+57
* [AArch64] Add ARMv8.3 weaker release consistency load instructionsSzabolcs Nagy2016-11-181-18/+18
* [AArch64] Add ARMv8.3 javascript floating-point conversion instructionSzabolcs Nagy2016-11-181-25/+25
* [AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy2016-11-181-15/+16
* [AArch64] Add ARMv8.3 combined pointer authentication branch instructionsSzabolcs Nagy2016-11-111-52/+52
* [AArch64] Add ARMv8.3 PACGA instructionSzabolcs Nagy2016-11-111-26/+27
* [AArch64] Add ARMv8.3 single source PAC instructionsSzabolcs Nagy2016-11-111-49/+49
* [AArch64] Add ARMv8.3 instructions which are in the NOP spaceSzabolcs Nagy2016-11-111-10/+10
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-211-0/+11
* [AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford2016-09-211-0/+6
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-211-0/+4
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-211-0/+18
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-211-0/+6
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-211-0/+31
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-211-0/+1
* [AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford2016-09-211-0/+2
* [AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford2016-09-211-0/+18
* Copyright update for binutilsAlan Modra2016-01-011-1/+1
* [AArch64][PATCH 14/14] Support FP16 Adv.SIMD Scalar Shift By Immediate instru...Matthew Wahab2015-12-141-43/+43
* [AArch64][PATCH 13/14] Support FP16 Adv.SIMD Shift By Immediate instructions.Matthew Wahab2015-12-141-45/+45
* [AArch64][PATCH 12/14] Support FP16 Adv.SIMD Scalar Pairwise instructions.Matthew Wahab2015-12-141-43/+43
* [AArch64][PATCH 9/14] Support FP16 Adv.SIMD Modified Immediate instructions.Matthew Wahab2015-12-141-37/+37
* [AArch64][PATCH 8/14] Support FP16 Adv.SIMD Across Lanes instructions.Matthew Wahab2015-12-141-53/+53
* [AArch64][PATCH 7/14] Support FP16 Scalar Indexed Element instructions.Matthew Wahab2015-12-141-44/+44
* [AArch64][PATCH 6/14] Support FP16 Vector Indexed Element instructions.Matthew Wahab2015-12-141-53/+53
* [AArch64][PATCH 5/14] Support FP16 Scalar Two Register Misc. instructions.Matthew Wahab2015-12-141-56/+56
* [AArch64][PATCH 4/14] Support FP16 Vector Two Register Misc. instructions.Matthew Wahab2015-12-141-56/+56
* [AArch64][PATCH 3/14] Support ARMv8.2 FP16 Scalar Three Same instructions.Matthew Wahab2015-12-141-50/+50
* [AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three Same instructions.Matthew Wahab2015-12-141-57/+57
* [AArch64][Patch 5/5] Add instruction PSB CSYNCMatthew Wahab2015-12-111-0/+1
* [AArch64][Patch 4/5] Support HINT aliases taking operands.Matthew Wahab2015-12-111-2/+2
* [AArch64][PATCH 3/3] Add floating-point FP16 instructionsMatthew Wahab2015-11-271-34/+34
* [AArch64] Add ARMv8.2 instruction alias REV64.Matthew Wahab2015-11-271-18/+18
* [AArch64] Add ARMv8.2 instructions BFC and REV64.Matthew Wahab2015-11-271-27/+28
* [AArch64] Support for ARMv8.1a Adv.SIMD instructionsMatthew Wahab2015-06-021-54/+54
* [AArch64] Support for ARMv8.1a Limited Ordering Regions extensionMatthew Wahab2015-06-021-12/+12
* [AARCH64] Remove Load/Store register (unscaled immediate) alias.Jiong Wang2015-03-101-19/+19
* ChangeLog rotatation and copyright year updateAlan Modra2015-01-021-1/+1
* [PATCH/AArch64] Implement LSE featureJiong Wang2014-09-031-5/+6
* Update copyright yearsAlan Modra2014-03-051-1/+1
* gas/Yufeng Zhang2013-11-051-1/+2
* include/opcode/Yufeng Zhang2013-02-281-33/+33
* include/opcode/Yufeng Zhang2013-01-301-47/+50
* Add support for 64-bit ARM architecture: AArch64Nick Clifton2012-08-131-0/+195
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