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* Update year range in copyright notice of binutils filesAlan Modra2019-01-01561-563/+567
* ChangeLog rotationAlan Modra2019-01-012-5874/+5888
* x86: Properly handle PLT expression in directiveH.J. Lu2018-12-198-3/+34
* elf: Add PT_GNU_PROPERTY segment typeH.J. Lu2018-12-143-3/+9
* Fix typo/thinko in last change.Jeff Law2018-12-132-1/+6
* Move aarch64 CIE code to aarch64 backendSam Tebbs2018-12-134-13/+70
* [GAS][Arm] Skip Local BLX Thumb tests for arm-netbsdelf and arm-ntoAndre Vieira2018-12-122-1/+6
* RISC-V: Don't segfault for two regs in auipc or lui.Jim Wilson2018-12-105-1/+27
* Correct gas/ChangeLog entry for PR gas/23968H.J. Lu2018-12-101-1/+1
* x86: Put back BFD_RELOC_X86_64_GOTPCRELH.J. Lu2018-12-096-0/+39
* RISC-V: Fix 4-arg add parsing.Jim Wilson2018-12-075-3/+43
* PowerPC @l, @h and @ha warnings, plus VLE e_liAlan Modra2018-12-062-33/+61
* opcodes/riscv: Hide '.L0 ' fake symbolsAndrew Burgess2018-12-062-2/+8
* [aarch64] Add support for pointer authentication B keySam Tebbs2018-12-057-16/+150
* PR23939, Check frch_cfi_data before usewu.heng2018-12-042-1/+15
* RISC-V: Accept version, supervisor ext and more than one NSE for -march.Jim Wilson2018-12-0329-141/+159
* [aarch64] - Only use MOV for disassembly when shifter op is LSL #0Egeyar Bagcioglu2018-12-033-2/+16
* Update the assembler to use a version of 3 when generating the header of the ...Nick Clifton2018-12-0319-19/+41
* PR23938, should not free memory alloced in obstack by free()Alan Modra2018-12-018-44/+67
* GAS/MIPS: Add `-mfix-r5900' option for the R5900 short loop erratumFredrik Noring2018-11-309-1/+161
* RISC-V: Add .insn CA support.Jim Wilson2018-11-275-13/+65
* [ARM] Update knowledge of bfd architecturesThomas Preud'homme2018-11-27150-0/+1145
* Tighten the constraints for warning about NOPs for the MSP 430 ISA, so NOPs a...Jozef Lawrynowicz2018-11-2724-71/+751
* [GAS][ARM] Fix testism for bl local v4t testAndre Vieira2018-11-234-1/+61
* S12Z opcodes: Fix bug disassembling certain shift instructions.John Darrington2018-11-213-1/+10
* S12Z: Add alias instructions BHS and BLO.John Darrington2018-11-214-2/+14
* [ARM] Improve indentation of ARM architecture declarationsThomas Preud'homme2018-11-132-51/+55
* [BINUTILS, AARCH64, 8/8] Add data cache instructions for Memory Tagging Exten...Sudakshina Das2018-11-124-0/+68
* [BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging ExtensionSudakshina Das2018-11-124-1/+75
* [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das2018-11-126-3/+70
* [BINUTILS, AARCH64, 5/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das2018-11-125-1/+33
* [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das2018-11-126-0/+140
* [BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Taggin...Sudakshina Das2018-11-125-0/+66
* [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das2018-11-127-0/+120
* [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-ASudakshina Das2018-11-123-0/+10
* S/390: Fix optional operand handling after memory addressesAndreas Krebbel2018-11-094-24/+42
* PowerPC, don't use bfd reloc howto in md_assembleAlan Modra2018-11-092-11/+255
* Add updated French and Portuguese translations.Nick Clifton2018-11-072-2994/+3076
* rx: Add target rx-*-linux.Yoshinori Sato2018-11-075-2/+13
* [arm] fix testsuite breakage on pe-coffMatthew Malcomson2018-11-062-2/+8
* [arm] Check for neon and condition in vcvt.f16.f32Matthew Malcomson2018-11-067-14/+40
* PowerPC instruction mask checksAlan Modra2018-11-062-14/+29
* PowerPC instruction operand flag validationAlan Modra2018-11-062-0/+14
* x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit modeJan Beulich2018-11-064-0/+10
* x86: correctly handle VMOVD with EVEX.W set outside of 64-bit modeJan Beulich2018-11-064-0/+20
* x86: correctly handle KMOVD with VEX.W set outside of 64-bit modeJan Beulich2018-11-063-0/+9
* x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*Jan Beulich2018-11-068-0/+60
* x86: adjust {,E}VEX.W handling outside of 64-bit modeJan Beulich2018-11-0613-31/+241
* x86: fix various non-LIG templatesJan Beulich2018-11-0610-0/+433
* x86: allow {store} to select alternative {,}PEXTRW encodingJan Beulich2018-11-065-2/+51