diff options
| author | Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com> | 2018-12-03 17:31:44 +0000 |
|---|---|---|
| committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-12-03 17:34:33 +0000 |
| commit | 57b64c4103ffeadd524eb80b4a7d61be8c8ec871 (patch) | |
| tree | 08a1659e6fd20bf694e567e54bc08df8e066f3b0 /gas | |
| parent | 8acbe8ffa02f62eb9371b8626576f83fcd6989af (diff) | |
| download | binutils-gdb-57b64c4103ffeadd524eb80b4a7d61be8c8ec871.tar.gz | |
[aarch64] - Only use MOV for disassembly when shifter op is LSL #0
ARM Architecture Reference Manual for the profile ARMv8-A, Issue C.a,
states that MOV (register) is an alias of the ORR (shifted register)
iff shift == '00' && imm6 == '000000' && Rn == '11111'. However, mov
is currently preferred for a broader range of orr instructions, which
is incorrect.
2018-12-03 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>
opcodes:
PR 23193
PR 19721
* aarch64-tbl.h (aarch64_opcode_table): Only disassemble an ORR
encoding as MOV if the shift operation is a left shift of zero.
gas:
PR 23193
PR 19721
* testsuite/gas/aarch64/pr19721.s: Add new test cases.
* testsuite/gas/aarch64/pr19721.d: Correct existing test
cases and add new ones.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/pr19721.d | 7 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/pr19721.s | 3 |
3 files changed, 16 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 5a1eeea28e9..a7bcfee82fb 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2018-12-03 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com> + + PR 23193 + PR 19721 + * testsuite/gas/aarch64/pr19721.s: Add new test cases. + * testsuite/gas/aarch64/pr19721.d: Correct existing test + cases and add new ones. + 2018-12-03 Nick Clifton <nickc@redhat.com> PR 23941 diff --git a/gas/testsuite/gas/aarch64/pr19721.d b/gas/testsuite/gas/aarch64/pr19721.d index a621ae56e85..785d2a205d8 100644 --- a/gas/testsuite/gas/aarch64/pr19721.d +++ b/gas/testsuite/gas/aarch64/pr19721.d @@ -6,5 +6,8 @@ Disassembly of section \.text: 0+000 <.*>: 0: aa1103e7 mov x7, x17 - 4: aa1167e7 mov x7, x17, lsl #25 - 8: aa1167e7 mov x7, x17, lsl #25 + 4: aa1167e7 orr x7, xzr, x17, lsl #25 + 8: aa1167e7 orr x7, xzr, x17, lsl #25 + c: aa4003e0 orr x0, xzr, x0, lsr #0 + 10: aa0007e0 orr x0, xzr, x0, lsl #1 + 14: aa0003d0 orr x16, x30, x0 diff --git a/gas/testsuite/gas/aarch64/pr19721.s b/gas/testsuite/gas/aarch64/pr19721.s index cda068a7e37..be2b508d539 100644 --- a/gas/testsuite/gas/aarch64/pr19721.s +++ b/gas/testsuite/gas/aarch64/pr19721.s @@ -3,3 +3,6 @@ mov x7, x17 mov x7, x17, lsl 25 orr x7, xzr, x17, lsl 25 + orr x0, xzr, x0, lsr #0 // shift == 01 + orr x0, xzr, x0, lsl #1 // imm6 == 000001 + orr x16, x30, x0 // Rn == 11110 |