diff options
Diffstat (limited to 'opcodes/aarch64-opc.h')
| -rw-r--r-- | opcodes/aarch64-opc.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h index 62aad8bf392..f3000fca4ce 100644 --- a/opcodes/aarch64-opc.h +++ b/opcodes/aarch64-opc.h @@ -243,6 +243,32 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma, #define F_REG_WRITE (1 << 4) /* Register can only be written to but not read from. */ +#undef F_REG_IN_CRM +#define F_REG_IN_CRM (1 << 5) /* Register extra encoding in CRm. */ + +/* PSTATE field name for the MSR instruction this is encoded in "op1:op2:CRm". + Part of CRm can be used to encode <pstatefield>. E.g. CRm[3:1] for SME. + In order to set/get full PSTATE field name use flag F_REG_IN_CRM and below + macros to encode and decode CRm encoding. +*/ +#define PSTATE_ENCODE_CRM(val) (val << 6) +#define PSTATE_DECODE_CRM(flags) ((flags >> 6) & 0x0f) + +#undef F_IMM_IN_CRM +#define F_IMM_IN_CRM (1 << 10) /* Immediate extra encoding in CRm. */ + +/* Also CRm may contain, in addition to <pstatefield> immediate. + E.g. CRm[0] <imm1> at bit 0 for SME. Use below macros to encode and decode + immediate mask. +*/ +#define PSTATE_ENCODE_CRM_IMM(mask) (mask << 11) +#define PSTATE_DECODE_CRM_IMM(mask) ((mask >> 11) & 0x0f) + +/* Helper macro to ENCODE CRm and its immediate. */ +#define PSTATE_ENCODE_CRM_AND_IMM(CVAL,IMASK) \ + (F_REG_IN_CRM | PSTATE_ENCODE_CRM(CVAL) \ + | F_IMM_IN_CRM | PSTATE_ENCODE_CRM_IMM(IMASK)) + /* HINT operand flags. */ #define HINT_OPD_F_NOPRINT (1 << 0) /* Should not be printed. */ |