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authorMike Frysinger <vapier@gentoo.org>2021-01-05 22:09:57 -0500
committerMike Frysinger <vapier@gentoo.org>2021-01-15 19:18:34 -0500
commit1368b914e93a3af332f787d3d41c106d11bb90da (patch)
tree9893ccae5d2d8cbf2ce855e09d6b8f30b56a21bc /sim/testsuite/frv/nfdmulcs.cgs
parente403a898b5893337baea73bcb001ece74042f351 (diff)
downloadbinutils-gdb-1368b914e93a3af332f787d3d41c106d11bb90da.tar.gz
sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
Diffstat (limited to 'sim/testsuite/frv/nfdmulcs.cgs')
-rw-r--r--sim/testsuite/frv/nfdmulcs.cgs313
1 files changed, 313 insertions, 0 deletions
diff --git a/sim/testsuite/frv/nfdmulcs.cgs b/sim/testsuite/frv/nfdmulcs.cgs
new file mode 100644
index 00000000000..227ff291311
--- /dev/null
+++ b/sim/testsuite/frv/nfdmulcs.cgs
@@ -0,0 +1,313 @@
+# frv testcase for nfdmulcs $FRi,$FRj,$FRk
+# mach: fr500 fr550 frv
+
+ .include "testutils.inc"
+
+ float_constants
+ start
+ load_float_constants
+ load_float_constants1
+
+ .global nfdmulcs
+nfdmulcs:
+ nfdmulcs fr16,fr4,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr8,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr12,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr16,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr20,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr24,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr28,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr32,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr36,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr40,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr44,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr16,fr48,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ nfdmulcs fr20,fr4,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr8,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr12,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr16,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr3,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr2,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr20,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr24,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr28,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr32,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr36,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr40,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr44,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr20,fr48,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ nfdmulcs fr28,fr0,fr2
+ test_fr_fr fr2,fr0
+ test_fr_fr fr3,fr0
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr4,fr2
+ test_fr_fr fr2,fr4
+ test_fr_fr fr3,fr4
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr8,fr2
+ test_fr_fr fr2,fr8
+ test_fr_fr fr3,fr8
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr12,fr2
+ test_fr_fr fr2,fr12
+ test_fr_fr fr3,fr12
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr16,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr20,fr2
+ test_fr_fr fr2,fr16
+ test_fr_fr fr2,fr20
+ test_fr_fr fr3,fr16
+ test_fr_fr fr3,fr20
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr24,fr2
+ test_fr_fr fr2,fr24
+ test_fr_fr fr3,fr24
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr28,fr2
+ test_fr_fr fr2,fr28
+ test_fr_fr fr3,fr28
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr32,fr2
+ test_fr_fr fr2,fr32
+ test_fr_fr fr3,fr32
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr36,fr2
+ test_fr_fr fr2,fr36
+ test_fr_fr fr3,fr36
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr40,fr2
+ test_fr_fr fr2,fr40
+ test_fr_fr fr3,fr40
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr44,fr2
+ test_fr_fr fr2,fr44
+ test_fr_fr fr3,fr44
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr48,fr2
+ test_fr_fr fr2,fr48
+ test_fr_fr fr3,fr48
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr28,fr52,fr2
+ test_fr_fr fr2,fr52
+ test_fr_fr fr3,fr52
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ nfdmulcs fr28,fr8,fr2
+ test_fr_fr fr2,fr8
+ test_fr_fr fr3,fr8
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+ nfdmulcs fr8,fr28,fr2
+ test_fr_fr fr2,fr8
+ test_fr_fr fr3,fr8
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ nfdmulcs fr32,fr36,fr2
+ test_fr_fr fr2,fr40
+ test_fr_fr fr3,fr40
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ ; try to cause exceptions
+ nfdmulcs fr48,fr32,fr2
+; test_fr_fr fr2,fr44
+; test_fr_fr fr3,fr44
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ nfdmulcs fr52,fr28,fr2
+; test_fr_fr fr2,fr44
+; test_fr_fr fr3,fr44
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ nfdmulcs fr56,fr28,fr2
+; test_fr_fr fr2,fr44
+; test_fr_fr fr3,fr44
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ nfdmulcs fr60,fr28,fr2
+; test_fr_fr fr2,fr44
+; test_fr_fr fr3,fr44
+ test_spr_immed 0xc,fner1
+ test_spr_immed 0,fner0
+
+ ; test all regs different
+ set_spr_immed 0,fner0
+ set_spr_immed 0,fner1
+ set_fr_fr fr32,fr50 ; 2
+ set_fr_fr fr28,fr51 ; 1
+ set_fr_fr fr44,fr52 ; 9
+ set_fr_fr fr36,fr53 ; 3
+ nfdmulcs fr50,fr52,fr54 ; 2*3, 1*9
+ test_fr_fr fr54,fr40 ; 6
+ test_fr_fr fr55,fr44 ; 9
+ test_spr_immed 0,fner1
+ test_spr_immed 0,fner0
+
+ pass