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| author | Maciej W. Rozycki <macro@imgtec.com> | 2017-05-02 11:53:30 +0100 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2017-05-02 11:58:44 +0100 |
| commit | a4ddc54ec1cd187c844ca631fe0315bf1d78e96f (patch) | |
| tree | d13d98c24eb7b60d6203e0adb8bc6edf50b9519c /opcodes/mips-dis.c | |
| parent | 39ff1b79f687b65f4144ddb379f22587003443fb (diff) | |
| download | binutils-gdb-a4ddc54ec1cd187c844ca631fe0315bf1d78e96f.tar.gz | |
MIPS16/opcodes: Keep the LSB of PC-relative offsets in disassembly
Correct the disassembly of the PC-relative immediate argument of the
MIPS16 synthetic LA, LW, DLA and LD instructions and do not mask the
LSB, which in this case is a part of the data address rather than the
ISA bit and has to be fully presented.
opcodes/
* mips-dis.c (print_insn_arg): Only clear the ISA bit for jumps
and branches and not synthetic data instructions.
binutils/
* testsuite/binutils-all/mips/mips16-undecoded.d: Adjust the
disassembly of PC-relative LA and LW synthetic instructions.
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 4a08d8a4a0a..289f50160ae 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -1281,9 +1281,10 @@ print_insn_arg (struct disassemble_info *info, pcrel_op = (const struct mips_pcrel_operand *) operand; info->target = mips_decode_pcrel_operand (pcrel_op, base_pc, uval); - /* Preserve the ISA bit for the GDB disassembler, - otherwise clear it. */ - if (info->flavour != bfd_target_unknown_flavour) + /* For jumps and branches clear the ISA bit except for + the GDB disassembler. */ + if (pcrel_op->include_isa_bit + && info->flavour != bfd_target_unknown_flavour) info->target &= -2; (*info->print_address_func) (info->target, info); |