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| author | Dave Brolley <brolley@redhat.com> | 2005-10-28 19:49:22 +0000 |
|---|---|---|
| committer | Dave Brolley <brolley@redhat.com> | 2005-10-28 19:49:22 +0000 |
| commit | fb53f5a81a23dd5fc2eac009274e90b9753e1f22 (patch) | |
| tree | 9f8008d9c42d53829f5300448a1b57f87013b6db /opcodes/m32c-asm.c | |
| parent | 16175d96a0fd067a57f340015061292a5d8c3ee3 (diff) | |
| download | binutils-gdb-fb53f5a81a23dd5fc2eac009274e90b9753e1f22.tar.gz | |
2005-10-28 Dave Brolley <brolley@redhat.com>
* All CGEN-generated sources: Regenerate.
Contribute the following changes:
2005-09-19 Dave Brolley <brolley@redhat.com>
* disassemble.c (disassemble_init_for_target): Add 'break' to case for
bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
bfd_arch_m32c case.
2005-02-16 Dave Brolley <brolley@redhat.com>
* cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
cgen_isa_mask_* to cgen_bitset_*.
* cgen-opc.c: Likewise.
2003-11-28 Richard Sandiford <rsandifo@redhat.com>
* cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
* *-dis.c: Regenerate.
2003-06-05 DJ Delorie <dj@redhat.com>
* cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
it, as it may point to a reused buffer. Set prev_isas when we
change cpus.
2002-12-13 Dave Brolley <brolley@redhat.com>
* cgen-opc.c (cgen_isa_mask_create): New support function for
CGEN_ISA_MASK.
(cgen_isa_mask_init): Ditto.
(cgen_isa_mask_clear): Ditto.
(cgen_isa_mask_add): Ditto.
(cgen_isa_mask_set): Ditto.
(cgen_isa_supported): Ditto.
(cgen_isa_mask_compare): Ditto.
(cgen_isa_mask_intersection): Ditto.
(cgen_isa_mask_copy): Ditto.
(cgen_isa_mask_combine): Ditto.
* cgen-dis.in (libiberty.h): #include it.
(isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
(print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
* Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
* Makefile.in: Regenerated.
Diffstat (limited to 'opcodes/m32c-asm.c')
| -rw-r--r-- | opcodes/m32c-asm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/m32c-asm.c b/opcodes/m32c-asm.c index 02475eadfc6..e2d8c490646 100644 --- a/opcodes/m32c-asm.c +++ b/opcodes/m32c-asm.c @@ -794,14 +794,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); - int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA); + CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); /* If attributes are absent, assume no restriction. */ if (machs == 0) machs = ~0; return ((machs & cd->machs) - && (isas & cd->isas)); + && cgen_bitset_intersect_p (& isas, cd->isas)); } /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ |