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| author | Jan Beulich <jbeulich@suse.com> | 2022-11-30 09:06:33 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-11-30 09:06:33 +0100 |
| commit | ac9226cf8c496b15e369b2fcae95066f4a597a5b (patch) | |
| tree | ee5644700ceb123597f406bfc9a09dbf29a7ca62 /opcodes/i386-gen.c | |
| parent | 3df781c5a459249fcb49e20ee36bdcd7bf111f0c (diff) | |
| download | binutils-gdb-ac9226cf8c496b15e369b2fcae95066f4a597a5b.tar.gz | |
x86: drop FloatR
There are just 4 templates using it, which can be easily identified by
other means, as D is set only on a very limited number of FPU templates.
Also move the respective conditional out of the code path taken by all
"reverse match" insns (it probably should have been this way already
before, to avoid the one conditional in the common case).
With this the templates which had FloatR dropped no longer differ from
their AT&T syntax + mnemonic counterparts - the only difference is now
which of the two would be recognized. For this, however, we don't need
two templates - we can simply arrange the condition for setting
Opcode_FloatR accordingly.
Diffstat (limited to 'opcodes/i386-gen.c')
| -rw-r--r-- | opcodes/i386-gen.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 4115c131fd1..72eef14723d 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -731,7 +731,6 @@ static bitfield opcode_modifiers[] = BITFIELD (Modrm), BITFIELD (Jump), BITFIELD (FloatMF), - BITFIELD (FloatR), BITFIELD (Size), BITFIELD (CheckRegSize), BITFIELD (OperandConstraint), |