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| author | Renlin Li <renlin.li@arm.com> | 2016-12-13 12:37:18 +0000 |
|---|---|---|
| committer | Renlin Li <renlin.li@arm.com> | 2016-12-13 17:20:08 +0000 |
| commit | a6a51754740513db76fdee3aa153cdd51e87a24a (patch) | |
| tree | cd031cfc7ea3a40ab6b947955cba72f6984e83b7 /opcodes/aarch64-opc.c | |
| parent | aa785360cfa271505394080c8e367017782ca57a (diff) | |
| download | binutils-gdb-a6a51754740513db76fdee3aa153cdd51e87a24a.tar.gz | |
[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field
The internal CN register representation for coprocessor fields used in aarch64
sys, sysl instructions are removed in this patch.
After the change, those fields are represented as immediate. Related checks are
added as well.
opcodes/
* aarch64-opc.c (aarch64_opnd_qualifiers): New CR value range
qualifier.
(operand_general_constraint_met_p): Remove case for CP_REG.
(aarch64_print_operand): Print CRn, CRm operand using imm field.
* aarch64-tbl.h (QL_SYS): Use CR qualifier.
(QL_SYSL): Likewise.
(aarch64_opcode_table): Change CRn, CRm operand class and type.
* aarch64-opc-2.c : Regenerate.
* aarch64-asm-2.c : Likewise.
* aarch64-dis-2.c : Likewise.
include/
* opcode/aarch64.h (aarch64_operand_class): Remove
AARCH64_OPND_CLASS_CP_REG.
(enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
AARCH64_OPND_Cm to AARCH64_OPND_CRm.
(aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.
gas/
* config/tc-aarch64.c (AARCH64_REG_TYPES): Remove CN register.
(get_reg_expected_msg): Remove CN register case.
(parse_operands): rewrite parser for CRn, CRm operand.
(reg_names): Remove CN register.
* testsuite/gas/aarch64/diagnostic.s: Add a new test case.
* testsuite/gas/aarch64/diagnostic.l: Adjust error message.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 17 |
1 files changed, 4 insertions, 13 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 5b9eb27fbae..4275d4d13c0 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -711,6 +711,7 @@ struct operand_qualifier_data aarch64_opnd_qualifiers[] = First 3 fields: Lower bound, higher bound, unused. */ + {0, 15, 0, "CR", OQK_VALUE_IN_RANGE}, {0, 7, 0, "imm_0_7" , OQK_VALUE_IN_RANGE}, {0, 15, 0, "imm_0_15", OQK_VALUE_IN_RANGE}, {0, 31, 0, "imm_0_31", OQK_VALUE_IN_RANGE}, @@ -2418,16 +2419,6 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, } break; - case AARCH64_OPND_CLASS_CP_REG: - /* Cn or Cm: 4-bit opcode field named for historical reasons. - valid range: C0 - C15. */ - if (opnd->reg.regno > 15) - { - set_regno_out_of_range_error (mismatch_detail, idx, 0, 15); - return 0; - } - break; - case AARCH64_OPND_CLASS_SYSTEM: switch (type) { @@ -3187,9 +3178,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, opnd->reglane.index); break; - case AARCH64_OPND_Cn: - case AARCH64_OPND_Cm: - snprintf (buf, size, "C%d", opnd->reg.regno); + case AARCH64_OPND_CRn: + case AARCH64_OPND_CRm: + snprintf (buf, size, "C%" PRIi64, opnd->imm.value); break; case AARCH64_OPND_IDX: |