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| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
| commit | 27f6a0bd65b92b265200392e4e9a323f626342be (patch) | |
| tree | 17fa326f9d99a6f7fa5f930e59643e3c82759d5d /opcodes/aarch64-asm.c | |
| parent | e87ff6724fe32ecff11fc36a19a09ab8fbc66c13 (diff) | |
| download | binutils-gdb-27f6a0bd65b92b265200392e4e9a323f626342be.tar.gz | |
aarch64: Add the SME2 maximum/minimum instructions
This patch adds the SME2 multi-register forms of F{MAX,MIN}{,NM}
and {S,U}{MAX,MIN}. SQDMULH, SRSHL and URSHL have the same form
as SMAX etc., so the patch adds them too.
Diffstat (limited to 'opcodes/aarch64-asm.c')
| -rw-r--r-- | opcodes/aarch64-asm.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index ae699ec2cd5..f2b7d7d2d62 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -1958,6 +1958,11 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst) aarch64_get_variant (inst), 0); break; + case sme_size_22_hsd: + insert_field (FLD_SME_size_22, &inst->value, + aarch64_get_variant (inst) + 1, 0); + break; + case sme_size_12_hs: insert_field (FLD_SME_size_12, &inst->value, aarch64_get_variant (inst) + 1, 0); |