diff options
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-sve2.l | 12 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-invalid.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-invalid.l | 67 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-invalid.s | 50 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-noarch.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10-noarch.l | 641 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10.d | 649 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-10.s | 799 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 1 | ||||
| -rw-r--r-- | opcodes/aarch64-asm.c | 5 | ||||
| -rw-r--r-- | opcodes/aarch64-dis-2.c | 1362 | ||||
| -rw-r--r-- | opcodes/aarch64-dis.c | 7 | ||||
| -rw-r--r-- | opcodes/aarch64-tbl.h | 44 |
13 files changed, 3198 insertions, 445 deletions
diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.l b/gas/testsuite/gas/aarch64/illegal-sve2.l index 5f43b56df14..20b7a5e1d4d 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2.l +++ b/gas/testsuite/gas/aarch64/illegal-sve2.l @@ -1456,7 +1456,7 @@ [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqdmlslt z0\.s, z0\.h, z0\.h [^ :]+:[0-9]+: Info: sqdmlslt z0\.d, z0\.s, z0\.s -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.h,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.h,z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.h,z32\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `sqdmulh z0\.h,z0\.h,z8\.h\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `sqdmulh z0\.h,z0\.h,z0\.h\[8\]' @@ -1466,7 +1466,7 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.h,z0\.h,z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqdmulh z0\.h, z0\.h, z0\.h\[0\] -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.s,z0\.s,z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.s,z0\.s,z0\.s\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.s,z32\.s,z0\.s\[0\]' [^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `sqdmulh z0\.s,z0\.s,z8\.s\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sqdmulh z0\.s,z0\.s,z0\.s\[4\]' @@ -1476,7 +1476,7 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.s,z0\.s,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqdmulh z0\.s, z0\.s, z0\.s\[0\] -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.d,z0\.d,z0\.d\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.d,z0\.d,z0\.d\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.d,z32\.d,z0\.d\[0\]' [^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sqdmulh z0\.d,z0\.d,z16\.d\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sqdmulh z0\.d,z0\.d,z0\.d\[2\]' @@ -1486,7 +1486,7 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.d,z0\.d,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqdmulh z0\.d, z0\.d, z0\.d\[0\] -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.h,z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.h,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.h,z32\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sqdmulh z0\.h,z0\.b,z32\.b' [^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 3 -- `sqdmulh z0\.s,z0\.h,z0\.x' @@ -2046,7 +2046,7 @@ [^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sri z0\.s,z0\.s,#0' [^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sri z0\.s,z0\.s,#33' [^ :]+:[0-9]+: Error: immediate value out of range 1 to 64 at operand 3 -- `sri z0\.d,z0\.d,#0' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `srshl z32\.b,p0/m,z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `srshl z32\.b,p0/m,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `srshl z0\.b,p0/m,z32\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `srshl z0\.b,p0/m,z0\.b,z32\.b' [^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `srshl z0\.b,p0/m,z1\.b,z0\.b' @@ -2964,7 +2964,7 @@ [^ :]+:[0-9]+: Info: urhadd z0\.h, p0/m, z0\.h, z0\.h [^ :]+:[0-9]+: Info: urhadd z0\.s, p0/m, z0\.s, z0\.s [^ :]+:[0-9]+: Info: urhadd z0\.d, p0/m, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `urshl z32\.b,p0/m,z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `urshl z32\.b,p0/m,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `urshl z0\.b,p0/m,z32\.b,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `urshl z0\.b,p0/m,z0\.b,z32\.b' [^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `urshl z0\.b,p0/m,z1\.b,z0\.b' diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.d b/gas/testsuite/gas/aarch64/sme2-10-invalid.d new file mode 100644 index 00000000000..7b8c63f4174 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sme2-10-invalid.s +#error_output: sme2-10-invalid.l diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.l b/gas/testsuite/gas/aarch64/sme2-10-invalid.l new file mode 100644 index 00000000000..d0309ba217b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.l @@ -0,0 +1,67 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fmax 0,{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmax {z0\.h-z1\.h},0,z0\.h' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s +[^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h,z8\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z16\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z31\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s +[^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z2\.h-z5\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h,z1\.h,z2\.h},{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z16\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z31\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z0\.s-z1\.s} +[^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z0\.d-z1\.d} +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z2\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z1\.h-z2\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z31\.h,z0\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z0\.h-z3\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z0\.s-z3\.s} +[^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z0\.d-z3\.d} +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z2\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z4\.h-z7\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z1\.h-z4\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z2\.h-z5\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z3\.h-z6\.h}' diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.s b/gas/testsuite/gas/aarch64/sme2-10-invalid.s new file mode 100644 index 00000000000..04461bdc205 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.s @@ -0,0 +1,50 @@ + fmax 0, { z0.h - z1.h }, z0.h + fmax { z0.h - z1.h }, 0, z0.h + fmax { z0.h - z1.h }, { z0.h - z1.h }, 0 + + fmax { z0.b - z1.b }, { z0.b - z1.b }, z0.b + fmax { z0.h - z1.h }, { z0.h - z2.h }, z0.h + fmax { z0.h - z1.h }, { z0.h - z3.h }, z0.h + fmax { z0.h - z1.h }, { z0.h, z8.h }, z0.h + fmax { z0.h - z2.h }, { z0.h - z2.h }, z0.h + fmax { z0.h - z1.h }, { z2.h - z3.h }, z0.h + fmax { z1.h - z2.h }, { z1.h - z2.h }, z0.h + fmax { z31.h, z0.h }, { z31.h, z0.h }, z0.h + fmax { z0.h - z1.h }, { z0.h - z1.h }, z16.h + fmax { z0.h - z1.h }, { z0.h - z1.h }, z31.h + + fmax { z0.b - z3.b }, { z0.b - z3.b }, z0.b + fmax { z0.h - z3.h }, { z0.h - z2.h }, z0.h + fmax { z0.h - z3.h }, { z0.h - z1.h }, z0.h + fmax { z0.h - z3.h }, { z2.h - z5.h }, z0.h + fmax { z1.h - z4.h }, { z1.h - z4.h }, z0.h + fmax { z2.h - z5.h }, { z2.h - z5.h }, z0.h + fmax { z3.h - z6.h }, { z3.h - z6.h }, z0.h + fmax { z31.h, z0.h, z1.h, z2.h }, { z31.h, z0.h, z1.h, z2.h }, z0.h + fmax { z0.h - z3.h }, { z0.h - z3.h }, z16.h + fmax { z0.h - z3.h }, { z0.h - z3.h }, z31.h + + fmax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + fmax { z0.h - z1.h }, { z0.h - z2.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z3.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z2.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z3.h } + fmax { z0.h - z2.h }, { z0.h - z2.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z2.h - z3.h }, { z0.h - z1.h } + fmax { z1.h - z2.h }, { z1.h - z2.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z1.h - z2.h } + fmax { z31.h, z0.h }, { z31.h, z0.h }, { z0.h - z1.h } + fmax { z0.h - z1.h }, { z0.h - z1.h }, { z31.h, z0.h } + + fmax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + fmax { z0.h - z3.h }, { z0.h - z1.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z2.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z1.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z2.h } + fmax { z0.h - z3.h }, { z4.h - z7.h }, { z0.h - z3.h } + fmax { z1.h - z4.h }, { z1.h - z4.h }, { z0.h - z3.h } + fmax { z2.h - z5.h }, { z2.h - z5.h }, { z0.h - z3.h } + fmax { z3.h - z6.h }, { z3.h - z6.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z1.h - z4.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z2.h - z5.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z3.h - z6.h } diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.d b/gas/testsuite/gas/aarch64/sme2-10-noarch.d new file mode 100644 index 00000000000..159adc6fc64 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme2-10.s +#error_output: sme2-10-noarch.l diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.l b/gas/testsuite/gas/aarch64/sme2-10-noarch.l new file mode 100644 index 00000000000..932076709e0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.l @@ -0,0 +1,641 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' diff --git a/gas/testsuite/gas/aarch64/sme2-10.d b/gas/testsuite/gas/aarch64/sme2-10.d new file mode 100644 index 00000000000..04535d78717 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-10.d @@ -0,0 +1,649 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: c160a100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h +[^:]+: c160a11e fmax {z30\.h-z31\.h}, {z30\.h-z31\.h}, z0\.h +[^:]+: c16fa100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z15\.h +[^:]+: c166a106 fmax {z6\.h-z7\.h}, {z6\.h-z7\.h}, z6\.h +[^:]+: c1a0a100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s +[^:]+: c1a0a11e fmax {z30\.s-z31\.s}, {z30\.s-z31\.s}, z0\.s +[^:]+: c1afa100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z15\.s +[^:]+: c1a5a112 fmax {z18\.s-z19\.s}, {z18\.s-z19\.s}, z5\.s +[^:]+: c1e0a100 fmax {z0\.d-z1\.d}, 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z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fmax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fmax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fmax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fmax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fmax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fmax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fmax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fmax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fmax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fmax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fmax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fmax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fmax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fmax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fmax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fmax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fmax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, z0.h + fmaxnm { z30.h - z31.h }, { z30.h - z31.h }, z0.h + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, z15.h + fmaxnm { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, z0.s + fmaxnm { z30.s - z31.s }, { z30.s - z31.s }, z0.s + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, z15.s + fmaxnm { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, z0.d + fmaxnm { z30.d - z31.d }, { z30.d - z31.d }, z0.d + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, z15.d + fmaxnm { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, z0.h + fmaxnm { z28.h - z31.h }, { z28.h - z31.h }, z0.h + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, z15.h + fmaxnm { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, z0.s + fmaxnm { z28.s - z31.s }, { z28.s - z31.s }, z0.s + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, z15.s + fmaxnm { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, z0.d + fmaxnm { z28.d - z31.d }, { z28.d - z31.d }, z0.d + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, z15.d + fmaxnm { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + fmaxnm { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + fmaxnm { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + fmaxnm { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fmaxnm { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fmaxnm { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fmaxnm { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fmaxnm { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fmaxnm { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fmaxnm { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fmaxnm { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fmaxnm { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fmaxnm { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + fmin { z0.h - z1.h }, { z0.h - z1.h }, z0.h + fmin { z30.h - z31.h }, { z30.h - z31.h }, z0.h + fmin { z0.h - z1.h }, { z0.h - z1.h }, z15.h + fmin { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + fmin { z0.s - z1.s }, { z0.s - z1.s }, z0.s + fmin { z30.s - z31.s }, { z30.s - z31.s }, z0.s + fmin { z0.s - z1.s }, { z0.s - z1.s }, z15.s + fmin { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + fmin { z0.d - z1.d }, { z0.d - z1.d }, z0.d + fmin { z30.d - z31.d }, { z30.d - z31.d }, z0.d + fmin { z0.d - z1.d }, { z0.d - z1.d }, z15.d + fmin { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + fmin { z0.h - z3.h }, { z0.h - z3.h }, z0.h + fmin { z28.h - z31.h }, { z28.h - z31.h }, z0.h + fmin { z0.h - z3.h }, { z0.h - z3.h }, z15.h + fmin { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + fmin { z0.s - z3.s }, { z0.s - z3.s }, z0.s + fmin { z28.s - z31.s }, { z28.s - z31.s }, z0.s + fmin { z0.s - z3.s }, { z0.s - z3.s }, z15.s + fmin { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + fmin { z0.d - z3.d }, { z0.d - z3.d }, z0.d + fmin { z28.d - z31.d }, { z28.d - z31.d }, z0.d + fmin { z0.d - z3.d }, { z0.d - z3.d }, z15.d + fmin { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + fmin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + fmin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + fmin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + fmin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + fmin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + fmin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fmin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fmin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fmin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fmin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fmin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fmin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fmin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fmin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fmin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fmin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fmin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fmin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fmin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fmin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fmin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fmin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fmin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fmin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + fminnm { z0.h - z1.h }, { z0.h - z1.h }, z0.h + fminnm { z30.h - z31.h }, { z30.h - z31.h }, z0.h + fminnm { z0.h - z1.h }, { z0.h - z1.h }, z15.h + fminnm { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + fminnm { z0.s - z1.s }, { z0.s - z1.s }, z0.s + fminnm { z30.s - z31.s }, { z30.s - z31.s }, z0.s + fminnm { z0.s - z1.s }, { z0.s - z1.s }, z15.s + fminnm { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + fminnm { z0.d - z1.d }, { z0.d - z1.d }, z0.d + fminnm { z30.d - z31.d }, { z30.d - z31.d }, z0.d + fminnm { z0.d - z1.d }, { z0.d - z1.d }, z15.d + fminnm { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + fminnm { z0.h - z3.h }, { z0.h - z3.h }, z0.h + fminnm { z28.h - z31.h }, { z28.h - z31.h }, z0.h + fminnm { z0.h - z3.h }, { z0.h - z3.h }, z15.h + fminnm { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + fminnm { z0.s - z3.s }, { z0.s - z3.s }, z0.s + fminnm { z28.s - z31.s }, { z28.s - z31.s }, z0.s + fminnm { z0.s - z3.s }, { z0.s - z3.s }, z15.s + fminnm { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + fminnm { z0.d - z3.d }, { z0.d - z3.d }, z0.d + fminnm { z28.d - z31.d }, { z28.d - z31.d }, z0.d + fminnm { z0.d - z3.d }, { z0.d - z3.d }, z15.d + fminnm { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + fminnm { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + fminnm { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + fminnm { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + fminnm { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + fminnm { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + fminnm { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + fminnm { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + fminnm { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + fminnm { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + fminnm { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + fminnm { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + fminnm { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + fminnm { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + fminnm { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + fminnm { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + fminnm { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + fminnm { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + fminnm { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + fminnm { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + fminnm { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + fminnm { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + fminnm { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + fminnm { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + fminnm { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + smax { z0.b - z1.b }, { z0.b - z1.b }, z0.b + smax { z30.b - z31.b }, { z30.b - z31.b }, z0.b + smax { z0.b - z1.b }, { z0.b - z1.b }, z15.b + smax { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + smax { z0.h - z1.h }, { z0.h - z1.h }, z0.h + smax { z30.h - z31.h }, { z30.h - z31.h }, z0.h + smax { z0.h - z1.h }, { z0.h - z1.h }, z15.h + smax { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + smax { z0.s - z1.s }, { z0.s - z1.s }, z0.s + smax { z30.s - z31.s }, { z30.s - z31.s }, z0.s + smax { z0.s - z1.s }, { z0.s - z1.s }, z15.s + smax { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + smax { z0.d - z1.d }, { z0.d - z1.d }, z0.d + smax { z30.d - z31.d }, { z30.d - z31.d }, z0.d + smax { z0.d - z1.d }, { z0.d - z1.d }, z15.d + smax { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + smax { z0.b - z3.b }, { z0.b - z3.b }, z0.b + smax { z28.b - z31.b }, { z28.b - z31.b }, z0.b + smax { z0.b - z3.b }, { z0.b - z3.b }, z15.b + smax { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + smax { z0.h - z3.h }, { z0.h - z3.h }, z0.h + smax { z28.h - z31.h }, { z28.h - z31.h }, z0.h + smax { z0.h - z3.h }, { z0.h - z3.h }, z15.h + smax { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + smax { z0.s - z3.s }, { z0.s - z3.s }, z0.s + smax { z28.s - z31.s }, { z28.s - z31.s }, z0.s + smax { z0.s - z3.s }, { z0.s - z3.s }, z15.s + smax { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + smax { z0.d - z3.d }, { z0.d - z3.d }, z0.d + smax { z28.d - z31.d }, { z28.d - z31.d }, z0.d + smax { z0.d - z3.d }, { z0.d - z3.d }, z15.d + smax { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + smax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + smax { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + smax { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + smax { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + smax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + smax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + smax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + smax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + smax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + smax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + smax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + smax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + smax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + smax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + smax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + smax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + smax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + smax { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + smax { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + smax { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + smax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + smax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + smax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + smax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + smax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + smax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + smax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + smax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + smax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + smax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + smax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + smax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + smin { z0.b - z1.b }, { z0.b - z1.b }, z0.b + smin { z30.b - z31.b }, { z30.b - z31.b }, z0.b + smin { z0.b - z1.b }, { z0.b - z1.b }, z15.b + smin { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + smin { z0.h - z1.h }, { z0.h - z1.h }, z0.h + smin { z30.h - z31.h }, { z30.h - z31.h }, z0.h + smin { z0.h - z1.h }, { z0.h - z1.h }, z15.h + smin { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + smin { z0.s - z1.s }, { z0.s - z1.s }, z0.s + smin { z30.s - z31.s }, { z30.s - z31.s }, z0.s + smin { z0.s - z1.s }, { z0.s - z1.s }, z15.s + smin { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + smin { z0.d - z1.d }, { z0.d - z1.d }, z0.d + smin { z30.d - z31.d }, { z30.d - z31.d }, z0.d + smin { z0.d - z1.d }, { z0.d - z1.d }, z15.d + smin { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + smin { z0.b - z3.b }, { z0.b - z3.b }, z0.b + smin { z28.b - z31.b }, { z28.b - z31.b }, z0.b + smin { z0.b - z3.b }, { z0.b - z3.b }, z15.b + smin { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + smin { z0.h - z3.h }, { z0.h - z3.h }, z0.h + smin { z28.h - z31.h }, { z28.h - z31.h }, z0.h + smin { z0.h - z3.h }, { z0.h - z3.h }, z15.h + smin { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + smin { z0.s - z3.s }, { z0.s - z3.s }, z0.s + smin { z28.s - z31.s }, { z28.s - z31.s }, z0.s + smin { z0.s - z3.s }, { z0.s - z3.s }, z15.s + smin { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + smin { z0.d - z3.d }, { z0.d - z3.d }, z0.d + smin { z28.d - z31.d }, { z28.d - z31.d }, z0.d + smin { z0.d - z3.d }, { z0.d - z3.d }, z15.d + smin { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + smin { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + smin { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + smin { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + smin { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + smin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + smin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + smin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + smin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + smin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + smin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + smin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + smin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + smin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + smin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + smin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + smin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + smin { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + smin { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + smin { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + smin { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + smin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + smin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + smin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + smin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + smin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + smin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + smin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + smin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + smin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + smin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + smin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + smin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, z0.b + sqdmulh { z30.b - z31.b }, { z30.b - z31.b }, z0.b + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, z15.b + sqdmulh { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, z0.h + sqdmulh { z30.h - z31.h }, { z30.h - z31.h }, z0.h + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, z15.h + sqdmulh { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, z0.s + sqdmulh { z30.s - z31.s }, { z30.s - z31.s }, z0.s + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, z15.s + sqdmulh { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, z0.d + sqdmulh { z30.d - z31.d }, { z30.d - z31.d }, z0.d + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, z15.d + sqdmulh { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, z0.b + sqdmulh { z28.b - z31.b }, { z28.b - z31.b }, z0.b + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, z15.b + sqdmulh { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, z0.h + sqdmulh { z28.h - z31.h }, { z28.h - z31.h }, z0.h + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, z15.h + sqdmulh { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, z0.s + sqdmulh { z28.s - z31.s }, { z28.s - z31.s }, z0.s + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, z15.s + sqdmulh { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, z0.d + sqdmulh { z28.d - z31.d }, { z28.d - z31.d }, z0.d + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, z15.d + sqdmulh { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + sqdmulh { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + sqdmulh { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + sqdmulh { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + sqdmulh { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + sqdmulh { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + sqdmulh { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + sqdmulh { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + sqdmulh { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + sqdmulh { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + sqdmulh { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + sqdmulh { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + sqdmulh { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + sqdmulh { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + sqdmulh { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + sqdmulh { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + sqdmulh { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + srshl { z0.b - z1.b }, { z0.b - z1.b }, z0.b + srshl { z30.b - z31.b }, { z30.b - z31.b }, z0.b + srshl { z0.b - z1.b }, { z0.b - z1.b }, z15.b + srshl { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + srshl { z0.h - z1.h }, { z0.h - z1.h }, z0.h + srshl { z30.h - z31.h }, { z30.h - z31.h }, z0.h + srshl { z0.h - z1.h }, { z0.h - z1.h }, z15.h + srshl { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + srshl { z0.s - z1.s }, { z0.s - z1.s }, z0.s + srshl { z30.s - z31.s }, { z30.s - z31.s }, z0.s + srshl { z0.s - z1.s }, { z0.s - z1.s }, z15.s + srshl { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + srshl { z0.d - z1.d }, { z0.d - z1.d }, z0.d + srshl { z30.d - z31.d }, { z30.d - z31.d }, z0.d + srshl { z0.d - z1.d }, { z0.d - z1.d }, z15.d + srshl { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + srshl { z0.b - z3.b }, { z0.b - z3.b }, z0.b + srshl { z28.b - z31.b }, { z28.b - z31.b }, z0.b + srshl { z0.b - z3.b }, { z0.b - z3.b }, z15.b + srshl { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + srshl { z0.h - z3.h }, { z0.h - z3.h }, z0.h + srshl { z28.h - z31.h }, { z28.h - z31.h }, z0.h + srshl { z0.h - z3.h }, { z0.h - z3.h }, z15.h + srshl { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + srshl { z0.s - z3.s }, { z0.s - z3.s }, z0.s + srshl { z28.s - z31.s }, { z28.s - z31.s }, z0.s + srshl { z0.s - z3.s }, { z0.s - z3.s }, z15.s + srshl { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + srshl { z0.d - z3.d }, { z0.d - z3.d }, z0.d + srshl { z28.d - z31.d }, { z28.d - z31.d }, z0.d + srshl { z0.d - z3.d }, { z0.d - z3.d }, z15.d + srshl { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + srshl { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + srshl { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + srshl { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + srshl { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + srshl { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + srshl { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + srshl { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + srshl { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + srshl { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + srshl { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + srshl { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + srshl { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + srshl { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + srshl { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + srshl { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + srshl { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + srshl { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + srshl { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + srshl { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + srshl { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + srshl { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + srshl { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + srshl { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + srshl { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + srshl { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + srshl { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + srshl { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + srshl { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + srshl { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + srshl { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + srshl { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + srshl { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + umax { z0.b - z1.b }, { z0.b - z1.b }, z0.b + umax { z30.b - z31.b }, { z30.b - z31.b }, z0.b + umax { z0.b - z1.b }, { z0.b - z1.b }, z15.b + umax { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + umax { z0.h - z1.h }, { z0.h - z1.h }, z0.h + umax { z30.h - z31.h }, { z30.h - z31.h }, z0.h + umax { z0.h - z1.h }, { z0.h - z1.h }, z15.h + umax { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + umax { z0.s - z1.s }, { z0.s - z1.s }, z0.s + umax { z30.s - z31.s }, { z30.s - z31.s }, z0.s + umax { z0.s - z1.s }, { z0.s - z1.s }, z15.s + umax { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + umax { z0.d - z1.d }, { z0.d - z1.d }, z0.d + umax { z30.d - z31.d }, { z30.d - z31.d }, z0.d + umax { z0.d - z1.d }, { z0.d - z1.d }, z15.d + umax { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + umax { z0.b - z3.b }, { z0.b - z3.b }, z0.b + umax { z28.b - z31.b }, { z28.b - z31.b }, z0.b + umax { z0.b - z3.b }, { z0.b - z3.b }, z15.b + umax { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + umax { z0.h - z3.h }, { z0.h - z3.h }, z0.h + umax { z28.h - z31.h }, { z28.h - z31.h }, z0.h + umax { z0.h - z3.h }, { z0.h - z3.h }, z15.h + umax { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + umax { z0.s - z3.s }, { z0.s - z3.s }, z0.s + umax { z28.s - z31.s }, { z28.s - z31.s }, z0.s + umax { z0.s - z3.s }, { z0.s - z3.s }, z15.s + umax { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + umax { z0.d - z3.d }, { z0.d - z3.d }, z0.d + umax { z28.d - z31.d }, { z28.d - z31.d }, z0.d + umax { z0.d - z3.d }, { z0.d - z3.d }, z15.d + umax { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + umax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + umax { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + umax { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + umax { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + umax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + umax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + umax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + umax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + umax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + umax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + umax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + umax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + umax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + umax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + umax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + umax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + umax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + umax { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + umax { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + umax { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + umax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + umax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + umax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + umax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + umax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + umax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + umax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + umax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + umax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + umax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + umax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + umax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + umin { z0.b - z1.b }, { z0.b - z1.b }, z0.b + umin { z30.b - z31.b }, { z30.b - z31.b }, z0.b + umin { z0.b - z1.b }, { z0.b - z1.b }, z15.b + umin { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + umin { z0.h - z1.h }, { z0.h - z1.h }, z0.h + umin { z30.h - z31.h }, { z30.h - z31.h }, z0.h + umin { z0.h - z1.h }, { z0.h - z1.h }, z15.h + umin { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + umin { z0.s - z1.s }, { z0.s - z1.s }, z0.s + umin { z30.s - z31.s }, { z30.s - z31.s }, z0.s + umin { z0.s - z1.s }, { z0.s - z1.s }, z15.s + umin { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + umin { z0.d - z1.d }, { z0.d - z1.d }, z0.d + umin { z30.d - z31.d }, { z30.d - z31.d }, z0.d + umin { z0.d - z1.d }, { z0.d - z1.d }, z15.d + umin { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + umin { z0.b - z3.b }, { z0.b - z3.b }, z0.b + umin { z28.b - z31.b }, { z28.b - z31.b }, z0.b + umin { z0.b - z3.b }, { z0.b - z3.b }, z15.b + umin { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + umin { z0.h - z3.h }, { z0.h - z3.h }, z0.h + umin { z28.h - z31.h }, { z28.h - z31.h }, z0.h + umin { z0.h - z3.h }, { z0.h - z3.h }, z15.h + umin { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + umin { z0.s - z3.s }, { z0.s - z3.s }, z0.s + umin { z28.s - z31.s }, { z28.s - z31.s }, z0.s + umin { z0.s - z3.s }, { z0.s - z3.s }, z15.s + umin { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + umin { z0.d - z3.d }, { z0.d - z3.d }, z0.d + umin { z28.d - z31.d }, { z28.d - z31.d }, z0.d + umin { z0.d - z3.d }, { z0.d - z3.d }, z15.d + umin { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + umin { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + umin { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + umin { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + umin { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + umin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + umin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + umin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + umin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + umin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + umin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + umin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + umin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + umin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + umin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + umin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + umin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + umin { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + umin { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + umin { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + umin { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + umin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + umin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + umin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + umin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + umin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + umin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + umin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + umin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + umin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + umin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + umin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + umin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + + urshl { z0.b - z1.b }, { z0.b - z1.b }, z0.b + urshl { z30.b - z31.b }, { z30.b - z31.b }, z0.b + urshl { z0.b - z1.b }, { z0.b - z1.b }, z15.b + urshl { z2.b - z3.b }, { z2.b - z3.b }, z9.b + + urshl { z0.h - z1.h }, { z0.h - z1.h }, z0.h + urshl { z30.h - z31.h }, { z30.h - z31.h }, z0.h + urshl { z0.h - z1.h }, { z0.h - z1.h }, z15.h + urshl { z6.h - z7.h }, { z6.h - z7.h }, z6.h + + urshl { z0.s - z1.s }, { z0.s - z1.s }, z0.s + urshl { z30.s - z31.s }, { z30.s - z31.s }, z0.s + urshl { z0.s - z1.s }, { z0.s - z1.s }, z15.s + urshl { z18.s - z19.s }, { z18.s - z19.s }, z5.s + + urshl { z0.d - z1.d }, { z0.d - z1.d }, z0.d + urshl { z30.d - z31.d }, { z30.d - z31.d }, z0.d + urshl { z0.d - z1.d }, { z0.d - z1.d }, z15.d + urshl { z22.d - z23.d }, { z22.d - z23.d }, z8.d + + urshl { z0.b - z3.b }, { z0.b - z3.b }, z0.b + urshl { z28.b - z31.b }, { z28.b - z31.b }, z0.b + urshl { z0.b - z3.b }, { z0.b - z3.b }, z15.b + urshl { z4.b - z7.b }, { z4.b - z7.b }, z7.b + + urshl { z0.h - z3.h }, { z0.h - z3.h }, z0.h + urshl { z28.h - z31.h }, { z28.h - z31.h }, z0.h + urshl { z0.h - z3.h }, { z0.h - z3.h }, z15.h + urshl { z12.h - z15.h }, { z12.h - z15.h }, z12.h + + urshl { z0.s - z3.s }, { z0.s - z3.s }, z0.s + urshl { z28.s - z31.s }, { z28.s - z31.s }, z0.s + urshl { z0.s - z3.s }, { z0.s - z3.s }, z15.s + urshl { z8.s - z11.s }, { z8.s - z11.s }, z7.s + + urshl { z0.d - z3.d }, { z0.d - z3.d }, z0.d + urshl { z28.d - z31.d }, { z28.d - z31.d }, z0.d + urshl { z0.d - z3.d }, { z0.d - z3.d }, z15.d + urshl { z24.d - z27.d }, { z24.d - z27.d }, z13.d + + urshl { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b } + urshl { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b } + urshl { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b } + urshl { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b } + + urshl { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } + urshl { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } + urshl { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } + urshl { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + + urshl { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } + urshl { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } + urshl { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } + urshl { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + + urshl { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } + urshl { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } + urshl { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } + urshl { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + + urshl { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b } + urshl { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b } + urshl { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b } + urshl { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b } + + urshl { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } + urshl { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } + urshl { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } + urshl { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + + urshl { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } + urshl { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } + urshl { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } + urshl { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + + urshl { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } + urshl { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } + urshl { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } + urshl { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 3689fff81f1..ff5367aedd7 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -705,6 +705,7 @@ enum aarch64_insn_class sme_size_12_bhs, sme_size_12_hs, sme_size_22, + sme_size_22_hsd, sme_str, sme_start, sme_stop, diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index ae699ec2cd5..f2b7d7d2d62 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -1958,6 +1958,11 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst) aarch64_get_variant (inst), 0); break; + case sme_size_22_hsd: + insert_field (FLD_SME_size_22, &inst->value, + aarch64_get_variant (inst) + 1, 0); + break; + case sme_size_12_hs: insert_field (FLD_SME_size_12, &inst->value, aarch64_get_variant (inst) + 1, 0); diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c index c38880201e1..36e30f752b7 100644 --- a/opcodes/aarch64-dis-2.c +++ b/opcodes/aarch64-dis-2.c @@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000x10x100xxxxxxxxxxxxxxxxx zero. */ - return 2614; + return 2658; } } } @@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000x00x101xx0xxxxxxxxxxxxxx luti4. */ - return 2511; + return 2527; } else { @@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000x00x101xx1xxxxxxxxxxxxxx luti4. */ - return 2510; + return 2526; } } else @@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000x10x101xxxxxxxxxxxxxxxxx luti4. */ - return 2509; + return 2525; } } } @@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0x010xxxxx00xxxxxxxxxx mov. */ - return 2518; + return 2534; } else { @@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0x011xxxxx00xxxxxxxxxx mov. */ - return 2514; + return 2530; } } else @@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000x00x11xxx0xx00xxxxxxxxxx luti2. */ - return 2508; + return 2524; } else { @@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000x00x11xxx1xx00xxxxxxxxxx luti2. */ - return 2507; + return 2523; } } else @@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000010x110xxxxx00xxxxxxxxxx movt. */ - return 2529; + return 2545; } else { @@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000010x111xxxxx00xxxxxxxxxx movt. */ - return 2528; + return 2544; } } else @@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000110x11xxxxxx00xxxxxxxxxx luti2. */ - return 2506; + return 2522; } } } @@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0xx10xxxxx10xxxxxxxxxx mov. */ - return 2516; + return 2532; } else { @@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0xx11xxxxx10xxxxxxxxxx mov. */ - return 2512; + return 2528; } } } @@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0xx10xxxxx01xxxxxxxxxx mov. */ - return 2519; + return 2535; } else { @@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0xx11xxxxx01xxxxxxxxxx mov. */ - return 2515; + return 2531; } } else @@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0xx10xxxxx11xxxxxxxxxx mov. */ - return 2517; + return 2533; } else { @@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000000xx0xx11xxxxx11xxxxxxxxxx mov. */ - return 2513; + return 2529; } } } @@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx000xxxxxxxxxxxx0 ld1b. */ - return 2445; + return 2461; } else { @@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx100xxxxxxxxxxxx0 ld1b. */ - return 2446; + return 2462; } } else @@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx010xxxxxxxxxxxx0 ld1w. */ - return 2469; + return 2485; } else { @@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx110xxxxxxxxxxxx0 ld1w. */ - return 2470; + return 2486; } } } @@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx001xxxxxxxxxxxx0 ld1h. */ - return 2461; + return 2477; } else { @@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx101xxxxxxxxxxxx0 ld1h. */ - return 2462; + return 2478; } } else @@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx011xxxxxxxxxxxx0 ld1d. */ - return 2453; + return 2469; } else { @@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx111xxxxxxxxxxxx0 ld1d. */ - return 2454; + return 2470; } } } @@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx000xxxxxxxxxxxx1 ldnt1b. */ - return 2477; + return 2493; } else { @@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx100xxxxxxxxxxxx1 ldnt1b. */ - return 2478; + return 2494; } } else @@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx010xxxxxxxxxxxx1 ldnt1w. */ - return 2501; + return 2517; } else { @@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx110xxxxxxxxxxxx1 ldnt1w. */ - return 2502; + return 2518; } } } @@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx001xxxxxxxxxxxx1 ldnt1h. */ - return 2493; + return 2509; } else { @@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx101xxxxxxxxxxxx1 ldnt1h. */ - return 2494; + return 2510; } } else @@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx011xxxxxxxxxxxx1 ldnt1d. */ - return 2485; + return 2501; } else { @@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000000xxxxx111xxxxxxxxxxxx1 ldnt1d. */ - return 2486; + return 2502; } } } @@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx000xxxxxxxxxxxx0 ld1b. */ - return 2441; + return 2457; } else { @@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx100xxxxxxxxxxxx0 ld1b. */ - return 2442; + return 2458; } } else @@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx010xxxxxxxxxxxx0 ld1w. */ - return 2465; + return 2481; } else { @@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx110xxxxxxxxxxxx0 ld1w. */ - return 2466; + return 2482; } } } @@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx001xxxxxxxxxxxx0 ld1h. */ - return 2457; + return 2473; } else { @@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx101xxxxxxxxxxxx0 ld1h. */ - return 2458; + return 2474; } } else @@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx011xxxxxxxxxxxx0 ld1d. */ - return 2449; + return 2465; } else { @@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx111xxxxxxxxxxxx0 ld1d. */ - return 2450; + return 2466; } } } @@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx000xxxxxxxxxxxx1 ldnt1b. */ - return 2473; + return 2489; } else { @@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx100xxxxxxxxxxxx1 ldnt1b. */ - return 2474; + return 2490; } } else @@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx010xxxxxxxxxxxx1 ldnt1w. */ - return 2497; + return 2513; } else { @@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx110xxxxxxxxxxxx1 ldnt1w. */ - return 2498; + return 2514; } } } @@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx001xxxxxxxxxxxx1 ldnt1h. */ - return 2489; + return 2505; } else { @@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx101xxxxxxxxxxxx1 ldnt1h. */ - return 2490; + return 2506; } } else @@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx011xxxxxxxxxxxx1 ldnt1d. */ - return 2481; + return 2497; } else { @@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100000010xxxxx111xxxxxxxxxxxx1 ldnt1d. */ - return 2482; + return 2498; } } } @@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx000xxxxxxxxxxxx0 st1b. */ - return 2539; + return 2571; } else { @@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx100xxxxxxxxxxxx0 st1b. */ - return 2540; + return 2572; } } else @@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx010xxxxxxxxxxxx0 st1w. */ - return 2563; + return 2595; } else { @@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx110xxxxxxxxxxxx0 st1w. */ - return 2564; + return 2596; } } } @@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx001xxxxxxxxxxxx0 st1h. */ - return 2555; + return 2587; } else { @@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx101xxxxxxxxxxxx0 st1h. */ - return 2556; + return 2588; } } else @@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx011xxxxxxxxxxxx0 st1d. */ - return 2547; + return 2579; } else { @@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx111xxxxxxxxxxxx0 st1d. */ - return 2548; + return 2580; } } } @@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx000xxxxxxxxxxxx1 stnt1b. */ - return 2571; + return 2603; } else { @@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx100xxxxxxxxxxxx1 stnt1b. */ - return 2572; + return 2604; } } else @@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx010xxxxxxxxxxxx1 stnt1w. */ - return 2595; + return 2627; } else { @@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx110xxxxxxxxxxxx1 stnt1w. */ - return 2596; + return 2628; } } } @@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx001xxxxxxxxxxxx1 stnt1h. */ - return 2587; + return 2619; } else { @@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx101xxxxxxxxxxxx1 stnt1h. */ - return 2588; + return 2620; } } else @@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx011xxxxxxxxxxxx1 stnt1d. */ - return 2579; + return 2611; } else { @@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000001xxxxx111xxxxxxxxxxxx1 stnt1d. */ - return 2580; + return 2612; } } } @@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx000xxxxxxxxxxxx0 st1b. */ - return 2535; + return 2567; } else { @@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx100xxxxxxxxxxxx0 st1b. */ - return 2536; + return 2568; } } else @@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx010xxxxxxxxxxxx0 st1w. */ - return 2559; + return 2591; } else { @@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx110xxxxxxxxxxxx0 st1w. */ - return 2560; + return 2592; } } } @@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx001xxxxxxxxxxxx0 st1h. */ - return 2551; + return 2583; } else { @@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx101xxxxxxxxxxxx0 st1h. */ - return 2552; + return 2584; } } else @@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx011xxxxxxxxxxxx0 st1d. */ - return 2543; + return 2575; } else { @@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx111xxxxxxxxxxxx0 st1d. */ - return 2544; + return 2576; } } } @@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx000xxxxxxxxxxxx1 stnt1b. */ - return 2567; + return 2599; } else { @@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx100xxxxxxxxxxxx1 stnt1b. */ - return 2568; + return 2600; } } else @@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx010xxxxxxxxxxxx1 stnt1w. */ - return 2591; + return 2623; } else { @@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx110xxxxxxxxxxxx1 stnt1w. */ - return 2592; + return 2624; } } } @@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx001xxxxxxxxxxxx1 stnt1h. */ - return 2583; + return 2615; } else { @@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx101xxxxxxxxxxxx1 stnt1h. */ - return 2584; + return 2616; } } else @@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx011xxxxxxxxxxxx1 stnt1d. */ - return 2575; + return 2607; } else { @@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00000011xxxxx111xxxxxxxxxxxx1 stnt1d. */ - return 2576; + return 2608; } } } @@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx000xxxxxxxxx0xxx ld1b. */ - return 2447; + return 2463; } else { @@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx010xxxxxxxxx0xxx ld1w. */ - return 2471; + return 2487; } } else @@ -1293,7 +1293,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx001xxxxxxxxx0xxx ld1h. */ - return 2463; + return 2479; } else { @@ -1301,7 +1301,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx011xxxxxxxxx0xxx ld1d. */ - return 2455; + return 2471; } } } @@ -1315,7 +1315,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx000xxxxxxxxx1xxx ldnt1b. */ - return 2479; + return 2495; } else { @@ -1323,7 +1323,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx010xxxxxxxxx1xxx ldnt1w. */ - return 2503; + return 2519; } } else @@ -1334,7 +1334,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx001xxxxxxxxx1xxx ldnt1h. */ - return 2495; + return 2511; } else { @@ -1342,7 +1342,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx011xxxxxxxxx1xxx ldnt1d. */ - return 2487; + return 2503; } } } @@ -1370,7 +1370,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0x00001000xxxxx100xxxxxxxxx0xxx ld1b. */ - return 2448; + return 2464; } else { @@ -1378,7 +1378,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1x00001000xxxxx100xxxxxxxxx0xxx ldr. */ - return 2505; + return 2521; } } else @@ -1387,7 +1387,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001000xxxxx110xxxxxxxxx0xxx ld1w. */ - return 2472; + return 2488; } } else @@ -1398,7 +1398,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001000xxxxx101xxxxxxxxx0xxx ld1h. */ - return 2464; + return 2480; } else { @@ -1406,7 +1406,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001000xxxxx111xxxxxxxxx0xxx ld1d. */ - return 2456; + return 2472; } } } @@ -1420,7 +1420,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001000xxxxx100xxxxxxxxx1xxx ldnt1b. */ - return 2480; + return 2496; } else { @@ -1428,7 +1428,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001000xxxxx110xxxxxxxxx1xxx ldnt1w. */ - return 2504; + return 2520; } } else @@ -1439,7 +1439,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001000xxxxx101xxxxxxxxx1xxx ldnt1h. */ - return 2496; + return 2512; } else { @@ -1447,7 +1447,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001000xxxxx111xxxxxxxxx1xxx ldnt1d. */ - return 2488; + return 2504; } } } @@ -1511,7 +1511,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx000xxxxxxxxx0xxx ld1b. */ - return 2443; + return 2459; } else { @@ -1519,7 +1519,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx100xxxxxxxxx0xxx ld1b. */ - return 2444; + return 2460; } } else @@ -1530,7 +1530,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx010xxxxxxxxx0xxx ld1w. */ - return 2467; + return 2483; } else { @@ -1538,7 +1538,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx110xxxxxxxxx0xxx ld1w. */ - return 2468; + return 2484; } } } @@ -1552,7 +1552,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx001xxxxxxxxx0xxx ld1h. */ - return 2459; + return 2475; } else { @@ -1560,7 +1560,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx101xxxxxxxxx0xxx ld1h. */ - return 2460; + return 2476; } } else @@ -1571,7 +1571,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx011xxxxxxxxx0xxx ld1d. */ - return 2451; + return 2467; } else { @@ -1579,7 +1579,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx111xxxxxxxxx0xxx ld1d. */ - return 2452; + return 2468; } } } @@ -1596,7 +1596,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx000xxxxxxxxx1xxx ldnt1b. */ - return 2475; + return 2491; } else { @@ -1604,7 +1604,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx100xxxxxxxxx1xxx ldnt1b. */ - return 2476; + return 2492; } } else @@ -1615,7 +1615,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx010xxxxxxxxx1xxx ldnt1w. */ - return 2499; + return 2515; } else { @@ -1623,7 +1623,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx110xxxxxxxxx1xxx ldnt1w. */ - return 2500; + return 2516; } } } @@ -1637,7 +1637,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx001xxxxxxxxx1xxx ldnt1h. */ - return 2491; + return 2507; } else { @@ -1645,7 +1645,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx101xxxxxxxxx1xxx ldnt1h. */ - return 2492; + return 2508; } } else @@ -1656,7 +1656,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx011xxxxxxxxx1xxx ldnt1d. */ - return 2483; + return 2499; } else { @@ -1664,7 +1664,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx00001010xxxxx111xxxxxxxxx1xxx ldnt1d. */ - return 2484; + return 2500; } } } @@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000001xx1xxxx00xxxxxxxxxx01xxx fsub. */ - return 2439; + return 2455; } else { @@ -1832,7 +1832,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000001xx1xxxx10xxxxxxxxxx01xxx fsub. */ - return 2440; + return 2456; } } else @@ -1847,7 +1847,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10000010x10xxxx0xxxx0xxxxx11xxx sub. */ - return 2602; + return 2634; } else { @@ -1855,7 +1855,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10000010x11xxxx0xxxx0xxxxx11xxx sub. */ - return 2603; + return 2635; } } else @@ -1866,7 +1866,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10000011x1xxxx00xxxx0xxxxx11xxx sub. */ - return 2604; + return 2636; } else { @@ -1874,7 +1874,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10000011x1xxxx10xxxx0xxxxx11xxx sub. */ - return 2605; + return 2637; } } } @@ -1886,7 +1886,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000001xx1xxxx00xxxx1xxxxx11xxx sub. */ - return 2600; + return 2632; } else { @@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1000001xx1xxxx10xxxx1xxxxx11xxx sub. */ - return 2601; + return 2633; } } } @@ -1902,42 +1902,526 @@ aarch64_opcode_lookup_1 (uint32_t word) } else { - if (((word >> 13) & 0x1) == 0) + if (((word >> 0) & 0x1) == 0) { - if (((word >> 16) & 0x1) == 0) + if (((word >> 5) & 0x1) == 0) { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000001xx1xxxx01x0xxxxxxxxxxxxx - sel. */ - return 2533; + if (((word >> 13) & 0x1) == 0) + { + if (((word >> 16) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxx01x0xxxxxxx0xxxx0 + sel. */ + return 2549; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxx11x0xxxxxxx0xxxx0 + sel. */ + return 2550; + } + } + else + { + if (((word >> 8) & 0x1) == 0) + { + if (((word >> 10) & 0x1) == 0) + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1000x0xx0xxxx0 + smax. */ + return 2551; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1100x0xx0xxxx0 + smax. */ + return 2553; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1010x0xx0xxxx0 + smax. */ + return 2552; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1110x0xx0xxxx0 + smax. */ + return 2554; + } + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1001x0xx0xxxx0 + sqdmulh. */ + return 2559; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1101x0xx0xxxx0 + sqdmulh. */ + return 2561; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1011x0xx0xxxx0 + sqdmulh. */ + return 2560; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1111x0xx0xxxx0 + sqdmulh. */ + return 2562; + } + } + } + } + else + { + if (((word >> 9) & 0x1) == 0) + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x100x01xx0xxxx0 + fmax. */ + return 2439; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x110x01xx0xxxx0 + fmax. */ + return 2441; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x101x01xx0xxxx0 + fmax. */ + return 2440; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x111x01xx0xxxx0 + fmax. */ + return 2442; + } + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1x0x11xx0xxxx0 + add. */ + return 2434; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1x1x1x11xx0xxxx0 + add. */ + return 2435; + } + } + } + } } else { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000001xx1xxxx11x0xxxxxxxxxxxxx - sel. */ - return 2534; + if (((word >> 8) & 0x1) == 0) + { + if (((word >> 9) & 0x1) == 0) + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00x00xx1xxxx0 + smin. */ + return 2555; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10x00xx1xxxx0 + smin. */ + return 2557; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01x00xx1xxxx0 + smin. */ + return 2556; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11x00xx1xxxx0 + smin. */ + return 2558; + } + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00x10xx1xxxx0 + srshl. */ + return 2563; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10x10xx1xxxx0 + srshl. */ + return 2565; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01x10xx1xxxx0 + srshl. */ + return 2564; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11x10xx1xxxx0 + srshl. */ + return 2566; + } + } + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00xx1xx1xxxx0 + fmaxnm. */ + return 2443; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10xx1xx1xxxx0 + fmaxnm. */ + return 2445; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01xx1xx1xxxx0 + fmaxnm. */ + return 2444; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11xx1xx1xxxx0 + fmaxnm. */ + return 2446; + } + } + } } } else { - if (((word >> 11) & 0x1) == 0) + if (((word >> 5) & 0x1) == 0) { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000001xx1xxxxx1x1x0xxxxxxxxxxx - add. */ - return 2434; + if (((word >> 8) & 0x1) == 0) + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00xx0xx0xxxx1 + umax. */ + return 2638; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10xx0xx0xxxx1 + umax. */ + return 2640; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01xx0xx0xxxx1 + umax. */ + return 2639; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11xx0xx0xxxx1 + umax. */ + return 2641; + } + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00xx1xx0xxxx1 + fmin. */ + return 2447; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10xx1xx0xxxx1 + fmin. */ + return 2449; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01xx1xx0xxxx1 + fmin. */ + return 2448; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11xx1xx0xxxx1 + fmin. */ + return 2450; + } + } + } } else { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000001xx1xxxxx1x1x1xxxxxxxxxxx - add. */ - return 2435; + if (((word >> 8) & 0x1) == 0) + { + if (((word >> 9) & 0x1) == 0) + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00x00xx1xxxx1 + umin. */ + return 2642; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10x00xx1xxxx1 + umin. */ + return 2644; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01x00xx1xxxx1 + umin. */ + return 2643; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11x00xx1xxxx1 + umin. */ + return 2645; + } + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00x10xx1xxxx1 + urshl. */ + return 2646; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10x10xx1xxxx1 + urshl. */ + return 2648; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01x10xx1xxxx1 + urshl. */ + return 2647; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11x10xx1xxxx1 + urshl. */ + return 2649; + } + } + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx00xx1xx1xxxx1 + fminnm. */ + return 2451; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx10xx1xx1xxxx1 + fminnm. */ + return 2453; + } + } + else + { + if (((word >> 12) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx01xx1xx1xxxx1 + fminnm. */ + return 2452; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000001xx1xxxxx1xx11xx1xx1xxxx1 + fminnm. */ + return 2454; + } + } + } } } } @@ -1963,7 +2447,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx000xxxxxxxxx0xxx st1b. */ - return 2541; + return 2573; } else { @@ -1971,7 +2455,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx010xxxxxxxxx0xxx st1w. */ - return 2565; + return 2597; } } else @@ -1982,7 +2466,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx001xxxxxxxxx0xxx st1h. */ - return 2557; + return 2589; } else { @@ -1990,7 +2474,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx011xxxxxxxxx0xxx st1d. */ - return 2549; + return 2581; } } } @@ -2004,7 +2488,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx000xxxxxxxxx1xxx stnt1b. */ - return 2573; + return 2605; } else { @@ -2012,7 +2496,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx010xxxxxxxxx1xxx stnt1w. */ - return 2597; + return 2629; } } else @@ -2023,7 +2507,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx001xxxxxxxxx1xxx stnt1h. */ - return 2589; + return 2621; } else { @@ -2031,7 +2515,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx011xxxxxxxxx1xxx stnt1d. */ - return 2581; + return 2613; } } } @@ -2059,7 +2543,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0100001001xxxxx100xxxxxxxxx0xxx st1b. */ - return 2542; + return 2574; } else { @@ -2067,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1100001001xxxxx100xxxxxxxxx0xxx str. */ - return 2599; + return 2631; } } else @@ -2076,7 +2560,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001001xxxxx110xxxxxxxxx0xxx st1w. */ - return 2566; + return 2598; } } else @@ -2087,7 +2571,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001001xxxxx101xxxxxxxxx0xxx st1h. */ - return 2558; + return 2590; } else { @@ -2095,7 +2579,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001001xxxxx111xxxxxxxxx0xxx st1d. */ - return 2550; + return 2582; } } } @@ -2109,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001001xxxxx100xxxxxxxxx1xxx stnt1b. */ - return 2574; + return 2606; } else { @@ -2117,7 +2601,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001001xxxxx110xxxxxxxxx1xxx stnt1w. */ - return 2598; + return 2630; } } else @@ -2128,7 +2612,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001001xxxxx101xxxxxxxxx1xxx stnt1h. */ - return 2590; + return 2622; } else { @@ -2136,7 +2620,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001001xxxxx111xxxxxxxxx1xxx stnt1d. */ - return 2582; + return 2614; } } } @@ -2178,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx000xxxxxxxxx0xxx st1b. */ - return 2537; + return 2569; } else { @@ -2186,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx100xxxxxxxxx0xxx st1b. */ - return 2538; + return 2570; } } else @@ -2197,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx010xxxxxxxxx0xxx st1w. */ - return 2561; + return 2593; } else { @@ -2205,7 +2689,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx110xxxxxxxxx0xxx st1w. */ - return 2562; + return 2594; } } } @@ -2219,7 +2703,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx001xxxxxxxxx0xxx st1h. */ - return 2553; + return 2585; } else { @@ -2227,7 +2711,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx101xxxxxxxxx0xxx st1h. */ - return 2554; + return 2586; } } else @@ -2238,7 +2722,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx011xxxxxxxxx0xxx st1d. */ - return 2545; + return 2577; } else { @@ -2246,7 +2730,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx111xxxxxxxxx0xxx st1d. */ - return 2546; + return 2578; } } } @@ -2263,7 +2747,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx000xxxxxxxxx1xxx stnt1b. */ - return 2569; + return 2601; } else { @@ -2271,7 +2755,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx100xxxxxxxxx1xxx stnt1b. */ - return 2570; + return 2602; } } else @@ -2282,7 +2766,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx010xxxxxxxxx1xxx stnt1w. */ - return 2593; + return 2625; } else { @@ -2290,7 +2774,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx110xxxxxxxxx1xxx stnt1w. */ - return 2594; + return 2626; } } } @@ -2304,7 +2788,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx001xxxxxxxxx1xxx stnt1h. */ - return 2585; + return 2617; } else { @@ -2312,7 +2796,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx101xxxxxxxxx1xxx stnt1h. */ - return 2586; + return 2618; } } else @@ -2323,7 +2807,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx011xxxxxxxxx1xxx stnt1d. */ - return 2577; + return 2609; } else { @@ -2331,7 +2815,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx100001011xxxxx111xxxxxxxxx1xxx stnt1d. */ - return 2578; + return 2610; } } } @@ -4733,7 +5217,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 00011001000xxxxxxxxx00xxxxxxxxxx stlurb. */ - return 2655; + return 2699; } else { @@ -4741,7 +5225,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 10011001000xxxxxxxxx00xxxxxxxxxx stlur. */ - return 2663; + return 2707; } } else @@ -4752,7 +5236,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 01011001000xxxxxxxxx00xxxxxxxxxx stlurh. */ - return 2659; + return 2703; } else { @@ -4760,7 +5244,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11011001000xxxxxxxxx00xxxxxxxxxx stlur. */ - return 2666; + return 2710; } } } @@ -4798,7 +5282,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0000x1xxxxxxxxxx cpyfp. */ - return 2715; + return 2759; } else { @@ -4806,7 +5290,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1000x1xxxxxxxxxx cpyfprn. */ - return 2721; + return 2765; } } else @@ -4817,7 +5301,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0100x1xxxxxxxxxx cpyfpwn. */ - return 2718; + return 2762; } else { @@ -4825,7 +5309,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1100x1xxxxxxxxxx cpyfpn. */ - return 2724; + return 2768; } } } @@ -4839,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0010x1xxxxxxxxxx cpyfprt. */ - return 2739; + return 2783; } else { @@ -4847,7 +5331,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1010x1xxxxxxxxxx cpyfprtrn. */ - return 2745; + return 2789; } } else @@ -4858,7 +5342,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0110x1xxxxxxxxxx cpyfprtwn. */ - return 2742; + return 2786; } else { @@ -4866,7 +5350,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1110x1xxxxxxxxxx cpyfprtn. */ - return 2748; + return 2792; } } } @@ -4883,7 +5367,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0001x1xxxxxxxxxx cpyfpwt. */ - return 2727; + return 2771; } else { @@ -4891,7 +5375,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1001x1xxxxxxxxxx cpyfpwtrn. */ - return 2733; + return 2777; } } else @@ -4902,7 +5386,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0101x1xxxxxxxxxx cpyfpwtwn. */ - return 2730; + return 2774; } else { @@ -4910,7 +5394,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1101x1xxxxxxxxxx cpyfpwtn. */ - return 2736; + return 2780; } } } @@ -4924,7 +5408,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0011x1xxxxxxxxxx cpyfpt. */ - return 2751; + return 2795; } else { @@ -4932,7 +5416,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1011x1xxxxxxxxxx cpyfptrn. */ - return 2757; + return 2801; } } else @@ -4943,7 +5427,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0111x1xxxxxxxxxx cpyfptwn. */ - return 2754; + return 2798; } else { @@ -4951,7 +5435,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1111x1xxxxxxxxxx cpyfptn. */ - return 2760; + return 2804; } } } @@ -5016,7 +5500,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 00011001010xxxxxxxxx00xxxxxxxxxx ldapurb. */ - return 2656; + return 2700; } else { @@ -5024,7 +5508,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 10011001010xxxxxxxxx00xxxxxxxxxx ldapur. */ - return 2664; + return 2708; } } else @@ -5035,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 01011001010xxxxxxxxx00xxxxxxxxxx ldapurh. */ - return 2660; + return 2704; } else { @@ -5043,7 +5527,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11011001010xxxxxxxxx00xxxxxxxxxx ldapur. */ - return 2667; + return 2711; } } } @@ -5081,7 +5565,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0000x1xxxxxxxxxx cpyfm. */ - return 2716; + return 2760; } else { @@ -5089,7 +5573,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1000x1xxxxxxxxxx cpyfmrn. */ - return 2722; + return 2766; } } else @@ -5100,7 +5584,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0100x1xxxxxxxxxx cpyfmwn. */ - return 2719; + return 2763; } else { @@ -5108,7 +5592,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1100x1xxxxxxxxxx cpyfmn. */ - return 2725; + return 2769; } } } @@ -5122,7 +5606,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0010x1xxxxxxxxxx cpyfmrt. */ - return 2740; + return 2784; } else { @@ -5130,7 +5614,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1010x1xxxxxxxxxx cpyfmrtrn. */ - return 2746; + return 2790; } } else @@ -5141,7 +5625,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0110x1xxxxxxxxxx cpyfmrtwn. */ - return 2743; + return 2787; } else { @@ -5149,7 +5633,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1110x1xxxxxxxxxx cpyfmrtn. */ - return 2749; + return 2793; } } } @@ -5166,7 +5650,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0001x1xxxxxxxxxx cpyfmwt. */ - return 2728; + return 2772; } else { @@ -5174,7 +5658,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1001x1xxxxxxxxxx cpyfmwtrn. */ - return 2734; + return 2778; } } else @@ -5185,7 +5669,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0101x1xxxxxxxxxx cpyfmwtwn. */ - return 2731; + return 2775; } else { @@ -5193,7 +5677,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1101x1xxxxxxxxxx cpyfmwtn. */ - return 2737; + return 2781; } } } @@ -5207,7 +5691,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0011x1xxxxxxxxxx cpyfmt. */ - return 2752; + return 2796; } else { @@ -5215,7 +5699,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1011x1xxxxxxxxxx cpyfmtrn. */ - return 2758; + return 2802; } } else @@ -5226,7 +5710,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0111x1xxxxxxxxxx cpyfmtwn. */ - return 2755; + return 2799; } else { @@ -5234,7 +5718,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1111x1xxxxxxxxxx cpyfmtn. */ - return 2761; + return 2805; } } } @@ -5302,7 +5786,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 00011001100xxxxxxxxx00xxxxxxxxxx ldapursb. */ - return 2658; + return 2702; } else { @@ -5310,7 +5794,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 10011001100xxxxxxxxx00xxxxxxxxxx ldapursw. */ - return 2665; + return 2709; } } else @@ -5319,7 +5803,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1011001100xxxxxxxxx00xxxxxxxxxx ldapursh. */ - return 2662; + return 2706; } } else @@ -5330,7 +5814,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0011001110xxxxxxxxx00xxxxxxxxxx ldapursb. */ - return 2657; + return 2701; } else { @@ -5338,7 +5822,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1011001110xxxxxxxxx00xxxxxxxxxx ldapursh. */ - return 2661; + return 2705; } } } @@ -5400,7 +5884,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0000x1xxxxxxxxxx cpyfe. */ - return 2717; + return 2761; } else { @@ -5408,7 +5892,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0000x1xxxxxxxxxx setp. */ - return 2811; + return 2855; } } else @@ -5419,7 +5903,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1000x1xxxxxxxxxx cpyfern. */ - return 2723; + return 2767; } else { @@ -5427,7 +5911,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1000x1xxxxxxxxxx sete. */ - return 2813; + return 2857; } } } @@ -5441,7 +5925,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0100x1xxxxxxxxxx cpyfewn. */ - return 2720; + return 2764; } else { @@ -5449,7 +5933,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0100x1xxxxxxxxxx setm. */ - return 2812; + return 2856; } } else @@ -5458,7 +5942,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1100x1xxxxxxxxxx cpyfen. */ - return 2726; + return 2770; } } } @@ -5474,7 +5958,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0010x1xxxxxxxxxx cpyfert. */ - return 2741; + return 2785; } else { @@ -5482,7 +5966,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0010x1xxxxxxxxxx setpn. */ - return 2817; + return 2861; } } else @@ -5493,7 +5977,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1010x1xxxxxxxxxx cpyfertrn. */ - return 2747; + return 2791; } else { @@ -5501,7 +5985,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1010x1xxxxxxxxxx seten. */ - return 2819; + return 2863; } } } @@ -5515,7 +5999,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0110x1xxxxxxxxxx cpyfertwn. */ - return 2744; + return 2788; } else { @@ -5523,7 +6007,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0110x1xxxxxxxxxx setmn. */ - return 2818; + return 2862; } } else @@ -5532,7 +6016,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1110x1xxxxxxxxxx cpyfertn. */ - return 2750; + return 2794; } } } @@ -5551,7 +6035,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0001x1xxxxxxxxxx cpyfewt. */ - return 2729; + return 2773; } else { @@ -5559,7 +6043,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0001x1xxxxxxxxxx setpt. */ - return 2814; + return 2858; } } else @@ -5570,7 +6054,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1001x1xxxxxxxxxx cpyfewtrn. */ - return 2735; + return 2779; } else { @@ -5578,7 +6062,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1001x1xxxxxxxxxx setet. */ - return 2816; + return 2860; } } } @@ -5592,7 +6076,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0101x1xxxxxxxxxx cpyfewtwn. */ - return 2732; + return 2776; } else { @@ -5600,7 +6084,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0101x1xxxxxxxxxx setmt. */ - return 2815; + return 2859; } } else @@ -5609,7 +6093,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1101x1xxxxxxxxxx cpyfewtn. */ - return 2738; + return 2782; } } } @@ -5625,7 +6109,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0011x1xxxxxxxxxx cpyfet. */ - return 2753; + return 2797; } else { @@ -5633,7 +6117,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0011x1xxxxxxxxxx setptn. */ - return 2820; + return 2864; } } else @@ -5644,7 +6128,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1011x1xxxxxxxxxx cpyfetrn. */ - return 2759; + return 2803; } else { @@ -5652,7 +6136,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1011x1xxxxxxxxxx setetn. */ - return 2822; + return 2866; } } } @@ -5666,7 +6150,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0111x1xxxxxxxxxx cpyfetwn. */ - return 2756; + return 2800; } else { @@ -5674,7 +6158,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0111x1xxxxxxxxxx setmtn. */ - return 2821; + return 2865; } } else @@ -5683,7 +6167,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1111x1xxxxxxxxxx cpyfetn. */ - return 2762; + return 2806; } } } @@ -6056,7 +6540,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1x11010110xxxx0x01000xxxxxxxxxx abs. */ - return 2840; + return 2884; } else { @@ -6074,7 +6558,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010110xxxxxx11000xxxxxxxxxx smax. */ - return 2843; + return 2887; } } } @@ -6154,7 +6638,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010x00xxxxxx0xx10xxxxxxxxxx setf8. */ - return 2653; + return 2697; } else { @@ -6162,7 +6646,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010x00xxxxxx1xx10xxxxxxxxxx setf16. */ - return 2654; + return 2698; } } else @@ -6269,7 +6753,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010110xxxxxx11010xxxxxxxxxx smin. */ - return 2845; + return 2889; } } } @@ -6285,7 +6769,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010110xxxx0x00110xxxxxxxxxx ctz. */ - return 2842; + return 2886; } else { @@ -6330,7 +6814,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010000xxxxxxxxx01xxxxxxxxxx rmif. */ - return 2652; + return 2696; } else { @@ -6424,7 +6908,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010x10xxxxxx11001xxxxxxxxxx umax. */ - return 2844; + return 2888; } } } @@ -6554,7 +7038,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010xx0xxxxxx11011xxxxxxxxxx umin. */ - return 2846; + return 2890; } } } @@ -6570,7 +7054,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010xx0xxxx0x00111xxxxxxxxxx cnt. */ - return 2841; + return 2885; } else { @@ -7412,7 +7896,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x01x1xxxxx000110xxxxxxxxxx usdot. */ - return 2672; + return 2716; } } } @@ -7486,7 +7970,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x01x1xxxxx000111xxxxxxxxxx sudot. */ - return 2673; + return 2717; } } } @@ -10160,7 +10644,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x0xx0xxxxx011110xxxxxxxxxx usdot. */ - return 2671; + return 2715; } } } @@ -11864,7 +12348,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0100xxx10101xxxxxxxxxxxxx bfcvtnt. */ - return 2700; + return 2744; } } else @@ -12107,7 +12591,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x00x1xxxxxx00xxxxxxxxxxxxx ld1rob. */ - return 2676; + return 2720; } else { @@ -12115,7 +12599,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x01x1xxxxxx00xxxxxxxxxxxxx ld1roh. */ - return 2677; + return 2721; } } else @@ -12347,7 +12831,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0011xxxxx010xxxxxxxxxxxxx bfdot. */ - return 2697; + return 2741; } else { @@ -12368,7 +12852,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx010xx0xxxxxxxxxx bfmlalb. */ - return 2704; + return 2748; } else { @@ -12376,7 +12860,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx010xx1xxxxxxxxxx bfmlalt. */ - return 2703; + return 2747; } } else @@ -12431,7 +12915,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11001x0011xxxxx1x0xxxxxxxxxxxxx bfdot. */ - return 2696; + return 2740; } else { @@ -12443,7 +12927,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx1x0xx0xxxxxxxxxx bfmlalb. */ - return 2702; + return 2746; } else { @@ -12451,7 +12935,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx1x0xx1xxxxxxxxxx bfmlalt. */ - return 2701; + return 2745; } } else @@ -12502,7 +12986,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x00x1xxxxx001xxxxxxxxxxxxx ld1rob. */ - return 2680; + return 2724; } else { @@ -12510,7 +12994,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x01x1xxxxx001xxxxxxxxxxxxx ld1roh. */ - return 2681; + return 2725; } } else @@ -12869,7 +13353,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0101xxxxx111xxxxxxxxxxxxx fmmla. */ - return 2674; + return 2718; } else { @@ -12902,7 +13386,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0011xxxxx111xxxxxxxxxxxxx bfmmla. */ - return 2698; + return 2742; } else { @@ -12932,7 +13416,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx111xxxxxxxxxxxxx fmmla. */ - return 2675; + return 2719; } else { @@ -13061,7 +13545,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000x00xxxxxxxxxx zip1. */ - return 2684; + return 2728; } else { @@ -13071,7 +13555,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000010xxxxxxxxxx uzp1. */ - return 2686; + return 2730; } else { @@ -13079,7 +13563,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000110xxxxxxxxxx trn1. */ - return 2688; + return 2732; } } } @@ -13091,7 +13575,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000x01xxxxxxxxxx zip2. */ - return 2685; + return 2729; } else { @@ -13101,7 +13585,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000011xxxxxxxxxx uzp2. */ - return 2687; + return 2731; } else { @@ -13109,7 +13593,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000111xxxxxxxxxx trn2. */ - return 2689; + return 2733; } } } @@ -14168,7 +14652,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x1000xxxxx100110xxxxxxxxxx smmla. */ - return 2668; + return 2712; } else { @@ -14176,7 +14660,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x1100xxxxx100110xxxxxxxxxx usmmla. */ - return 2670; + return 2714; } } else @@ -14185,7 +14669,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x1x10xxxxx100110xxxxxxxxxx ummla. */ - return 2669; + return 2713; } } } @@ -15681,7 +16165,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x10x1xxxxx000xxxxxxxxxxxxx ld1row. */ - return 2678; + return 2722; } else { @@ -15689,7 +16173,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x11x1xxxxx000xxxxxxxxxxxxx ld1rod. */ - return 2679; + return 2723; } } } @@ -16063,7 +16547,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x10x1xxxxx001xxxxxxxxxxxxx ld1row. */ - return 2682; + return 2726; } else { @@ -16071,7 +16555,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x11x1xxxxx001xxxxxxxxxxxxx ld1rod. */ - return 2683; + return 2727; } } } @@ -16432,7 +16916,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x000xxxxx10xxx whilege. */ - return 2606; + return 2650; } else { @@ -16440,7 +16924,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x000xxxxx11xxx whilegt. */ - return 2607; + return 2651; } } else @@ -16470,7 +16954,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx011100xxxxx1xxxx pext. */ - return 2530; + return 2546; } } } @@ -16484,7 +16968,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x010xxxxx10xxx whilehs. */ - return 2609; + return 2653; } else { @@ -16492,7 +16976,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x010xxxxx11xxx whilehi. */ - return 2608; + return 2652; } } else @@ -16522,7 +17006,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx011110xxxxx1xxxx ptrue. */ - return 2532; + return 2548; } } } @@ -16539,7 +17023,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x001xxxxx10xxx whilelt. */ - return 2613; + return 2657; } else { @@ -16547,7 +17031,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x001xxxxx11xxx whilele. */ - return 2610; + return 2654; } } else @@ -16577,7 +17061,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx011101xxxxx1xxxx pext. */ - return 2531; + return 2547; } } } @@ -16591,7 +17075,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x011xxxxx10xxx whilelo. */ - return 2611; + return 2655; } else { @@ -16599,7 +17083,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 001001x1xx1xxxxx01x011xxxxx11xxx whilels. */ - return 2612; + return 2656; } } else @@ -17725,7 +18209,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x110001x10101xxxxxxxxxxxxx bfcvt. */ - return 2699; + return 2743; } } else @@ -19086,7 +19570,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1010100xxxxxxxxxxxxxxxxxxx1xxxx bc.c. */ - return 2835; + return 2879; } else { @@ -19666,7 +20150,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0000xxxxxxxxxxxx cpyp. */ - return 2763; + return 2807; } else { @@ -19674,7 +20158,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0000xxxxxxxxxxxx cpye. */ - return 2765; + return 2809; } } else @@ -19685,7 +20169,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1000xxxxxxxxxxxx cpyprn. */ - return 2769; + return 2813; } else { @@ -19693,7 +20177,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1000xxxxxxxxxxxx cpyern. */ - return 2771; + return 2815; } } } @@ -19707,7 +20191,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0100xxxxxxxxxxxx cpypwn. */ - return 2766; + return 2810; } else { @@ -19715,7 +20199,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0100xxxxxxxxxxxx cpyewn. */ - return 2768; + return 2812; } } else @@ -19726,7 +20210,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1100xxxxxxxxxxxx cpypn. */ - return 2772; + return 2816; } else { @@ -19734,7 +20218,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1100xxxxxxxxxxxx cpyen. */ - return 2774; + return 2818; } } } @@ -19751,7 +20235,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0010xxxxxxxxxxxx cpyprt. */ - return 2787; + return 2831; } else { @@ -19759,7 +20243,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0010xxxxxxxxxxxx cpyert. */ - return 2789; + return 2833; } } else @@ -19770,7 +20254,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1010xxxxxxxxxxxx cpyprtrn. */ - return 2793; + return 2837; } else { @@ -19778,7 +20262,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1010xxxxxxxxxxxx cpyertrn. */ - return 2795; + return 2839; } } } @@ -19792,7 +20276,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0110xxxxxxxxxxxx cpyprtwn. */ - return 2790; + return 2834; } else { @@ -19800,7 +20284,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0110xxxxxxxxxxxx cpyertwn. */ - return 2792; + return 2836; } } else @@ -19811,7 +20295,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1110xxxxxxxxxxxx cpyprtn. */ - return 2796; + return 2840; } else { @@ -19819,7 +20303,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1110xxxxxxxxxxxx cpyertn. */ - return 2798; + return 2842; } } } @@ -19839,7 +20323,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0001xxxxxxxxxxxx cpypwt. */ - return 2775; + return 2819; } else { @@ -19847,7 +20331,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0001xxxxxxxxxxxx cpyewt. */ - return 2777; + return 2821; } } else @@ -19858,7 +20342,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1001xxxxxxxxxxxx cpypwtrn. */ - return 2781; + return 2825; } else { @@ -19866,7 +20350,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1001xxxxxxxxxxxx cpyewtrn. */ - return 2783; + return 2827; } } } @@ -19880,7 +20364,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0101xxxxxxxxxxxx cpypwtwn. */ - return 2778; + return 2822; } else { @@ -19888,7 +20372,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0101xxxxxxxxxxxx cpyewtwn. */ - return 2780; + return 2824; } } else @@ -19899,7 +20383,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1101xxxxxxxxxxxx cpypwtn. */ - return 2784; + return 2828; } else { @@ -19907,7 +20391,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1101xxxxxxxxxxxx cpyewtn. */ - return 2786; + return 2830; } } } @@ -19924,7 +20408,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0011xxxxxxxxxxxx cpypt. */ - return 2799; + return 2843; } else { @@ -19932,7 +20416,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0011xxxxxxxxxxxx cpyet. */ - return 2801; + return 2845; } } else @@ -19943,7 +20427,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1011xxxxxxxxxxxx cpyptrn. */ - return 2805; + return 2849; } else { @@ -19951,7 +20435,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1011xxxxxxxxxxxx cpyetrn. */ - return 2807; + return 2851; } } } @@ -19965,7 +20449,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0111xxxxxxxxxxxx cpyptwn. */ - return 2802; + return 2846; } else { @@ -19973,7 +20457,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0111xxxxxxxxxxxx cpyetwn. */ - return 2804; + return 2848; } } else @@ -19984,7 +20468,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1111xxxxxxxxxxxx cpyptn. */ - return 2808; + return 2852; } else { @@ -19992,7 +20476,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1111xxxxxxxxxxxx cpyetn. */ - return 2810; + return 2854; } } } @@ -20026,7 +20510,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0000xxxxxxxxxxxx cpym. */ - return 2764; + return 2808; } else { @@ -20034,7 +20518,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0000xxxxxxxxxxxx setgp. */ - return 2823; + return 2867; } } else @@ -20045,7 +20529,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1000xxxxxxxxxxxx cpymrn. */ - return 2770; + return 2814; } else { @@ -20053,7 +20537,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1000xxxxxxxxxxxx setge. */ - return 2825; + return 2869; } } } @@ -20067,7 +20551,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0100xxxxxxxxxxxx cpymwn. */ - return 2767; + return 2811; } else { @@ -20075,7 +20559,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0100xxxxxxxxxxxx setgm. */ - return 2824; + return 2868; } } else @@ -20084,7 +20568,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1100xxxxxxxxxxxx cpymn. */ - return 2773; + return 2817; } } } @@ -20100,7 +20584,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0010xxxxxxxxxxxx cpymrt. */ - return 2788; + return 2832; } else { @@ -20108,7 +20592,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0010xxxxxxxxxxxx setgpn. */ - return 2829; + return 2873; } } else @@ -20119,7 +20603,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1010xxxxxxxxxxxx cpymrtrn. */ - return 2794; + return 2838; } else { @@ -20127,7 +20611,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1010xxxxxxxxxxxx setgen. */ - return 2831; + return 2875; } } } @@ -20141,7 +20625,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0110xxxxxxxxxxxx cpymrtwn. */ - return 2791; + return 2835; } else { @@ -20149,7 +20633,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0110xxxxxxxxxxxx setgmn. */ - return 2830; + return 2874; } } else @@ -20158,7 +20642,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1110xxxxxxxxxxxx cpymrtn. */ - return 2797; + return 2841; } } } @@ -20177,7 +20661,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0001xxxxxxxxxxxx cpymwt. */ - return 2776; + return 2820; } else { @@ -20185,7 +20669,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0001xxxxxxxxxxxx setgpt. */ - return 2826; + return 2870; } } else @@ -20196,7 +20680,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1001xxxxxxxxxxxx cpymwtrn. */ - return 2782; + return 2826; } else { @@ -20204,7 +20688,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1001xxxxxxxxxxxx setget. */ - return 2828; + return 2872; } } } @@ -20218,7 +20702,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0101xxxxxxxxxxxx cpymwtwn. */ - return 2779; + return 2823; } else { @@ -20226,7 +20710,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0101xxxxxxxxxxxx setgmt. */ - return 2827; + return 2871; } } else @@ -20235,7 +20719,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1101xxxxxxxxxxxx cpymwtn. */ - return 2785; + return 2829; } } } @@ -20251,7 +20735,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0011xxxxxxxxxxxx cpymt. */ - return 2800; + return 2844; } else { @@ -20259,7 +20743,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0011xxxxxxxxxxxx setgptn. */ - return 2832; + return 2876; } } else @@ -20270,7 +20754,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1011xxxxxxxxxxxx cpymtrn. */ - return 2806; + return 2850; } else { @@ -20278,7 +20762,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1011xxxxxxxxxxxx setgetn. */ - return 2834; + return 2878; } } } @@ -20292,7 +20776,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0111xxxxxxxxxxxx cpymtwn. */ - return 2803; + return 2847; } else { @@ -20300,7 +20784,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0111xxxxxxxxxxxx setgmtn. */ - return 2833; + return 2877; } } else @@ -20309,7 +20793,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1111xxxxxxxxxxxx cpymtn. */ - return 2809; + return 2853; } } } @@ -20476,7 +20960,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x1001xxxxxxxxxx smmla. */ - return 2690; + return 2734; } } } @@ -20509,7 +20993,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x0101xxxxxxxxxx sdot. */ - return 2616; + return 2660; } } else @@ -20583,7 +21067,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x1011xxxxxxxxxx usmmla. */ - return 2692; + return 2736; } } } @@ -20616,7 +21100,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x0111xxxxxxxxxx usdot. */ - return 2693; + return 2737; } } else @@ -20663,7 +21147,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110000xxxxxxxxxxxxxxxxxxxxx eor3. */ - return 2623; + return 2667; } else { @@ -20671,7 +21155,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110100xxxxxxxxxxxxxxxxxxxxx xar. */ - return 2625; + return 2669; } } else @@ -20682,7 +21166,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110x10xxxxx0xxxxxxxxxxxxxxx sm3ss1. */ - return 2627; + return 2671; } else { @@ -20696,7 +21180,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110010xxxxx1xxx00xxxxxxxxxx sm3tt1a. */ - return 2628; + return 2672; } else { @@ -20704,7 +21188,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110110xxxxx1xxx00xxxxxxxxxx sha512su0. */ - return 2621; + return 2665; } } else @@ -20713,7 +21197,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110x10xxxxx1xxx10xxxxxxxxxx sm3tt2a. */ - return 2630; + return 2674; } } else @@ -20726,7 +21210,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110010xxxxx1xxx01xxxxxxxxxx sm3tt1b. */ - return 2629; + return 2673; } else { @@ -20734,7 +21218,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110110xxxxx1xxx01xxxxxxxxxx sm4e. */ - return 2634; + return 2678; } } else @@ -20743,7 +21227,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110x10xxxxx1xxx11xxxxxxxxxx sm3tt2b. */ - return 2631; + return 2675; } } } @@ -20924,7 +21408,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101110xx0xxxxx100101xxxxxxxxxx udot. */ - return 2615; + return 2659; } } else @@ -20955,7 +21439,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101110xx0xxxxx101x01xxxxxxxxxx ummla. */ - return 2691; + return 2735; } else { @@ -20974,7 +21458,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101110xx0xxxxx1x1011xxxxxxxxxx bfmmla. */ - return 2707; + return 2751; } else { @@ -20984,7 +21468,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx1011100x0xxxxx1x1111xxxxxxxxxx bfdot. */ - return 2705; + return 2749; } else { @@ -20994,7 +21478,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x01011101x0xxxxx1x1111xxxxxxxxxx bfmlalb. */ - return 2712; + return 2756; } else { @@ -21002,7 +21486,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11011101x0xxxxx1x1111xxxxxxxxxx bfmlalt. */ - return 2711; + return 2755; } } } @@ -21586,7 +22070,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000011101x1xxxx1011010xxxxxxxxxx bfcvtn. */ - return 2708; + return 2752; } else { @@ -21594,7 +22078,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010011101x1xxxx1011010xxxxxxxxxx bfcvtn2. */ - return 2709; + return 2753; } } } @@ -21912,7 +22396,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx0xxxxxxxxxxxxxxx bcax. */ - return 2626; + return 2670; } } else @@ -22523,7 +23007,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11001110xx1xxxxx100000xxxxxxxxxx sha512h. */ - return 2619; + return 2663; } } } @@ -22575,7 +23059,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11001110xx1xxxxx110000xxxxxxxxxx sm3partw1. */ - return 2632; + return 2676; } } } @@ -22818,7 +23302,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx100010xxxxxxxxxx sha512su1. */ - return 2622; + return 2666; } } else @@ -22894,7 +23378,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x0011100x1xxxxx110010xxxxxxxxxx sm4ekey. */ - return 2635; + return 2679; } } else @@ -23720,7 +24204,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx100001xxxxxxxxxx sha512h2. */ - return 2620; + return 2664; } } else @@ -23752,7 +24236,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x0011100x1xxxxx110001xxxxxxxxxx sm3partw2. */ - return 2633; + return 2677; } } else @@ -23992,7 +24476,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx100011xxxxxxxxxx rax1. */ - return 2624; + return 2668; } } else @@ -24024,7 +24508,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x01011100x1xxxxx110011xxxxxxxxxx fmlal2. */ - return 2638; + return 2682; } else { @@ -24032,7 +24516,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11011100x1xxxxx110011xxxxxxxxxx fmlal2. */ - return 2642; + return 2686; } } } @@ -24054,7 +24538,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x01011101x1xxxxx110011xxxxxxxxxx fmlsl2. */ - return 2639; + return 2683; } else { @@ -24062,7 +24546,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11011101x1xxxxx110011xxxxxxxxxx fmlsl2. */ - return 2643; + return 2687; } } } @@ -24101,7 +24585,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x00011100x1xxxxx111011xxxxxxxxxx fmlal. */ - return 2636; + return 2680; } else { @@ -24109,7 +24593,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10011100x1xxxxx111011xxxxxxxxxx fmlal. */ - return 2640; + return 2684; } } else @@ -24131,7 +24615,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x00011101x1xxxxx111011xxxxxxxxxx fmlsl. */ - return 2637; + return 2681; } else { @@ -24139,7 +24623,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10011101x1xxxxx111011xxxxxxxxxx fmlsl. */ - return 2641; + return 2685; } } else @@ -25947,7 +26431,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0001111xxxxxxxx0000x0xxxxxxxxxx fmlal. */ - return 2644; + return 2688; } else { @@ -25955,7 +26439,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1001111xxxxxxxx0000x0xxxxxxxxxx fmlal. */ - return 2648; + return 2692; } } else @@ -25977,7 +26461,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0001111xxxxxxxx0100x0xxxxxxxxxx fmlsl. */ - return 2645; + return 2689; } else { @@ -25985,7 +26469,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1001111xxxxxxxx0100x0xxxxxxxxxx fmlsl. */ - return 2649; + return 2693; } } else @@ -26491,7 +26975,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0101111xxxxxxxx1000x0xxxxxxxxxx fmlal2. */ - return 2646; + return 2690; } else { @@ -26499,7 +26983,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1101111xxxxxxxx1000x0xxxxxxxxxx fmlal2. */ - return 2650; + return 2694; } } } @@ -26521,7 +27005,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0101111xxxxxxxx1100x0xxxxxxxxxx fmlsl2. */ - return 2647; + return 2691; } else { @@ -26529,7 +27013,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1101111xxxxxxxx1100x0xxxxxxxxxx fmlsl2. */ - return 2651; + return 2695; } } } @@ -26585,7 +27069,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx001111xxxxxxxx1110x0xxxxxxxxxx sdot. */ - return 2618; + return 2662; } else { @@ -26593,7 +27077,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101111xxxxxxxx1110x0xxxxxxxxxx udot. */ - return 2617; + return 2661; } } } @@ -26696,7 +27180,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx00111100xxxxxx1111x0xxxxxxxxxx sudot. */ - return 2695; + return 2739; } else { @@ -26704,7 +27188,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx00111110xxxxxx1111x0xxxxxxxxxx usdot. */ - return 2694; + return 2738; } } else @@ -26715,7 +27199,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx00111101xxxxxx1111x0xxxxxxxxxx bfdot. */ - return 2706; + return 2750; } else { @@ -26725,7 +27209,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x000111111xxxxxx1111x0xxxxxxxxxx bfmlalb. */ - return 2714; + return 2758; } else { @@ -26733,7 +27217,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x100111111xxxxxx1111x0xxxxxxxxxx bfmlalt. */ - return 2713; + return 2757; } } } @@ -27224,22 +27708,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode) case 2391: return NULL; /* mova --> NULL. */ case 2388: value = 2390; break; /* mov --> mova. */ case 2390: return NULL; /* mova --> NULL. */ - case 2518: value = 2526; break; /* mov --> mova. */ - case 2526: return NULL; /* mova --> NULL. */ - case 2514: value = 2522; break; /* mov --> mova. */ - case 2522: return NULL; /* mova --> NULL. */ - case 2516: value = 2524; break; /* mov --> mova. */ - case 2524: return NULL; /* mova --> NULL. */ - case 2512: value = 2520; break; /* mov --> mova. */ - case 2520: return NULL; /* mova --> NULL. */ - case 2519: value = 2527; break; /* mov --> mova. */ - case 2527: return NULL; /* mova --> NULL. */ - case 2515: value = 2523; break; /* mov --> mova. */ - case 2523: return NULL; /* mova --> NULL. */ - case 2517: value = 2525; break; /* mov --> mova. */ - case 2525: return NULL; /* mova --> NULL. */ - case 2513: value = 2521; break; /* mov --> mova. */ - case 2521: return NULL; /* mova --> NULL. */ + case 2534: value = 2542; break; /* mov --> mova. */ + case 2542: return NULL; /* mova --> NULL. */ + case 2530: value = 2538; break; /* mov --> mova. */ + case 2538: return NULL; /* mova --> NULL. */ + case 2532: value = 2540; break; /* mov --> mova. */ + case 2540: return NULL; /* mova --> NULL. */ + case 2528: value = 2536; break; /* mov --> mova. */ + case 2536: return NULL; /* mova --> NULL. */ + case 2535: value = 2543; break; /* mov --> mova. */ + case 2543: return NULL; /* mova --> NULL. */ + case 2531: value = 2539; break; /* mov --> mova. */ + case 2539: return NULL; /* mova --> NULL. */ + case 2533: value = 2541; break; /* mov --> mova. */ + case 2541: return NULL; /* mova --> NULL. */ + case 2529: value = 2537; break; /* mov --> mova. */ + case 2537: return NULL; /* mova --> NULL. */ case 2393: value = 2398; break; /* ld1b --> ld1b. */ case 2398: return NULL; /* ld1b --> NULL. */ case 2395: value = 2400; break; /* ld1w --> ld1w. */ @@ -27261,11 +27745,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode) case 2407: value = 2412; break; /* st1q --> st1q. */ case 2412: return NULL; /* st1q --> NULL. */ case 12: value = 19; break; /* add --> addg. */ - case 19: value = 2836; break; /* addg --> smax. */ - case 2836: value = 2837; break; /* smax --> umax. */ - case 2837: value = 2838; break; /* umax --> smin. */ - case 2838: value = 2839; break; /* smin --> umin. */ - case 2839: return NULL; /* umin --> NULL. */ + case 19: value = 2880; break; /* addg --> smax. */ + case 2880: value = 2881; break; /* smax --> umax. */ + case 2881: value = 2882; break; /* umax --> smin. */ + case 2882: value = 2883; break; /* smin --> umin. */ + case 2883: return NULL; /* umin --> NULL. */ case 16: value = 20; break; /* sub --> subg. */ case 20: return NULL; /* subg --> NULL. */ case 971: value = 975; break; /* stnp --> stp. */ @@ -27423,8 +27907,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode) case 824: return NULL; /* fsqrt --> NULL. */ case 832: value = 833; break; /* frintz --> frintz. */ case 833: return NULL; /* frintz --> NULL. */ - case 825: value = 2710; break; /* fcvt --> bfcvt. */ - case 2710: return NULL; /* bfcvt --> NULL. */ + case 825: value = 2754; break; /* fcvt --> bfcvt. */ + case 2754: return NULL; /* bfcvt --> NULL. */ case 834: value = 835; break; /* frinta --> frinta. */ case 835: return NULL; /* frinta --> NULL. */ case 836: value = 837; break; /* frintx --> frintx. */ diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 1148f2e952a..bfeab066f0a 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -3091,6 +3091,13 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst) variant = extract_field (FLD_SME_size_22, inst->value, 0); break; + case sme_size_22_hsd: + variant = extract_field (FLD_SME_size_22, inst->value, 0); + if (variant < 1) + return false; + variant -= 1; + break; + case sve_cpy: variant = extract_fields (inst->value, 0, 2, FLD_size, FLD_SVE_M_14); break; diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index b97e375c1f0..9bcec954d53 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -5336,6 +5336,22 @@ const struct aarch64_opcode aarch64_opcode_table[] = SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0), SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0), SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0), + SME2_INSN ("fmax", 0xc120a100, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmax", 0xc120a900, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmax", 0xc120b100, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmax", 0xc120b900, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmaxnm", 0xc120a120, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmaxnm", 0xc120a920, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmaxnm", 0xc120b120, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmaxnm", 0xc120b920, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmin", 0xc120a101, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmin", 0xc120a901, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmin", 0xc120b101, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fmin", 0xc120b901, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fminnm", 0xc120a121, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fminnm", 0xc120a921, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fminnm", 0xc120b121, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1), + SME2_INSN ("fminnm", 0xc120b921, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1), SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0), SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0), SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0), @@ -5432,6 +5448,22 @@ const struct aarch64_opcode aarch64_opcode_table[] = SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0), SME2_INSN ("sel", 0xc1208000, 0xff21e021, sme_size_22, 0, OP4 (SME_Zdnx2, SME_PNg3, SME_Znx2, SME_Zmx2), OP_SVE_VUVV_BHSD, 0, 0), SME2_INSN ("sel", 0xc1218000, 0xff23e063, sme_size_22, 0, OP4 (SME_Zdnx4, SME_PNg3, SME_Znx4, SME_Zmx4), OP_SVE_VUVV_BHSD, 0, 0), + SME2_INSN ("smax", 0xc120a000, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("smax", 0xc120a800, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("smax", 0xc120b000, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("smax", 0xc120b800, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("smin", 0xc120a020, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("smin", 0xc120a820, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("smin", 0xc120b020, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("smin", 0xc120b820, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("sqdmulh", 0xc120bc00, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("srshl", 0xc120a220, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("srshl", 0xc120aa20, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("srshl", 0xc120b220, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("srshl", 0xc120ba20, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1), SME2_INSN ("st1b", 0xa0600000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0), SME2_INSN ("st1b", 0xa0608000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BUU, 0, 0), SME2_INSN ("st1b", 0xa1600000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0), @@ -5503,6 +5535,18 @@ const struct aarch64_opcode aarch64_opcode_table[] = SME2_INSN ("sub", 0xc1301818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0), SME2_INSN ("sub", 0xc1a01818, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0), SME2_INSN ("sub", 0xc1a11818, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0), + SME2_INSN ("umax", 0xc120a001, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("umax", 0xc120a801, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("umax", 0xc120b001, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("umax", 0xc120b801, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("umin", 0xc120a021, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("umin", 0xc120a821, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("umin", 0xc120b021, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("umin", 0xc120b821, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1), + SME2_INSN ("urshl", 0xc120ba21, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1), SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0), SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0), SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0), |