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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 20:26:53 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 20:27:42 +0000 |
| commit | d3de0860104b8bb8d496527fbb042c3b4c5c82dc (patch) | |
| tree | d639da6b0a9e7bc01d3331c170d7e15099299203 /opcodes/aarch64-asm-2.c | |
| parent | 8f1bfdb44894423680a6d56a0994dafb4b82efca (diff) | |
| download | binutils-gdb-d3de0860104b8bb8d496527fbb042c3b4c5c82dc.tar.gz | |
aarch64: [SME] SVE2 instructions added to support SME
This patch is adding new SVE2 instructions added to support SME extension.
The following SVE2 instructions are added by the SME architecture:
* PSEL,
* REVD, SCLAMP and UCLAMP.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_pred_reg_with_index):
New parser.
(parse_operands): New parser.
* testsuite/gas/aarch64/sme-9-illegal.d: New test.
* testsuite/gas/aarch64/sme-9-illegal.l: New test.
* testsuite/gas/aarch64/sme-9-illegal.s: New test.
* testsuite/gas/aarch64/sme-9.d: New test.
* testsuite/gas/aarch64/sme-9.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_PnT_Wm_imm.
opcodes/ChangeLog:
* aarch64-asm.c (aarch64_ins_sme_pred_reg_with_index):
New inserter.
* aarch64-dis.c (aarch64_ext_sme_pred_reg_with_index):
New extractor.
* aarch64-opc.c (aarch64_print_operand): Printout of
OPND_SME_PnT_Wm_imm.
* aarch64-opc.h (enum aarch64_field_kind): New bitfields
FLD_SME_Rm, FLD_SME_i1, FLD_SME_tszh, FLD_SME_tszl.
* aarch64-tbl.h (OP_SVE_NN_BHSD): New qualifier.
(OP_SVE_QMQ): New qualifier.
(struct aarch64_opcode): New instructions PSEL, REVD,
SCLAMP and UCLAMP.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Diffstat (limited to 'opcodes/aarch64-asm-2.c')
| -rw-r--r-- | opcodes/aarch64-asm-2.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index 8b226b10f63..bbe4b683100 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -675,7 +675,7 @@ aarch64_insert_operand (const aarch64_operand *self, case 33: case 34: case 35: - case 221: + case 222: return aarch64_ins_reglane (self, info, code, inst, errors); case 36: return aarch64_ins_reglist (self, info, code, inst, errors); @@ -721,7 +721,7 @@ aarch64_insert_operand (const aarch64_operand *self, case 189: case 190: case 215: - case 220: + case 221: return aarch64_ins_imm (self, info, code, inst, errors); case 44: case 45: @@ -891,6 +891,8 @@ aarch64_insert_operand (const aarch64_operand *self, return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors); case 219: return aarch64_ins_sme_sm_za (self, info, code, inst, errors); + case 220: + return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors); default: assert (0); abort (); } } |