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authorRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:11 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2023-03-30 11:09:11 +0100
commit503fae12992e5dbf48b4e30cea8d35f31d87effe (patch)
treec1bd390a4f96d3ac0632de6ce917683fccf56667 /opcodes/aarch64-asm-2.c
parent586c62819f6eb9a77978628afd53ba12c91a11e7 (diff)
downloadbinutils-gdb-503fae12992e5dbf48b4e30cea8d35f31d87effe.tar.gz
aarch64: Add support for predicate-as-counter registers
SME2 adds a new format for the existing SVE predicate registers: predicates as counters rather than predicates as masks. In assembly code, operands that interpret predicates as counters are written pn<N> rather than p<N>. This patch adds support for these registers and extends some existing instructions to support them. Since the new forms are just a programmer convenience, there's no need to make them more restrictive than the earlier predicate-as-mask forms.
Diffstat (limited to 'opcodes/aarch64-asm-2.c')
-rw-r--r--opcodes/aarch64-asm-2.c239
1 files changed, 122 insertions, 117 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index fd705bb8690..332b3f77846 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -479,124 +479,125 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1236: /* wfit */
value = 1236; /* --> wfit. */
break;
- case 2049: /* bic */
- case 1299: /* and */
- value = 1299; /* --> and. */
+ case 2053: /* bic */
+ case 1300: /* and */
+ value = 1300; /* --> and. */
break;
- case 1282: /* mov */
- case 1301: /* and */
- value = 1301; /* --> and. */
+ case 1283: /* mov */
+ case 1302: /* and */
+ value = 1302; /* --> and. */
break;
- case 1286: /* movs */
- case 1302: /* ands */
- value = 1302; /* --> ands. */
+ case 1287: /* movs */
+ case 1303: /* ands */
+ value = 1303; /* --> ands. */
break;
- case 2050: /* cmple */
- case 1337: /* cmpge */
- value = 1337; /* --> cmpge. */
+ case 2054: /* cmple */
+ case 1338: /* cmpge */
+ value = 1338; /* --> cmpge. */
break;
- case 2053: /* cmplt */
- case 1340: /* cmpgt */
- value = 1340; /* --> cmpgt. */
+ case 2057: /* cmplt */
+ case 1341: /* cmpgt */
+ value = 1341; /* --> cmpgt. */
break;
- case 2051: /* cmplo */
- case 1342: /* cmphi */
- value = 1342; /* --> cmphi. */
+ case 2055: /* cmplo */
+ case 1343: /* cmphi */
+ value = 1343; /* --> cmphi. */
break;
- case 2052: /* cmpls */
- case 1345: /* cmphs */
- value = 1345; /* --> cmphs. */
+ case 2056: /* cmpls */
+ case 1346: /* cmphs */
+ value = 1346; /* --> cmphs. */
break;
- case 1279: /* mov */
- case 1367: /* cpy */
- value = 1367; /* --> cpy. */
- break;
- case 1281: /* mov */
+ case 1280: /* mov */
case 1368: /* cpy */
value = 1368; /* --> cpy. */
break;
- case 2060: /* fmov */
- case 1284: /* mov */
+ case 1282: /* mov */
case 1369: /* cpy */
value = 1369; /* --> cpy. */
break;
- case 1274: /* mov */
- case 1381: /* dup */
- value = 1381; /* --> dup. */
+ case 2064: /* fmov */
+ case 1285: /* mov */
+ case 1370: /* cpy */
+ value = 1370; /* --> cpy. */
break;
- case 1276: /* mov */
- case 1273: /* mov */
+ case 1274: /* mov */
case 1382: /* dup */
value = 1382; /* --> dup. */
break;
- case 2059: /* fmov */
- case 1278: /* mov */
+ case 1277: /* mov */
+ case 1273: /* mov */
case 1383: /* dup */
value = 1383; /* --> dup. */
break;
- case 1277: /* mov */
- case 1384: /* dupm */
- value = 1384; /* --> dupm. */
+ case 2063: /* fmov */
+ case 1279: /* mov */
+ case 1384: /* dup */
+ value = 1384; /* --> dup. */
break;
- case 2054: /* eon */
- case 1386: /* eor */
- value = 1386; /* --> eor. */
+ case 1278: /* mov */
+ case 1385: /* dupm */
+ value = 1385; /* --> dupm. */
+ break;
+ case 2058: /* eon */
+ case 1387: /* eor */
+ value = 1387; /* --> eor. */
break;
- case 1287: /* not */
- case 1388: /* eor */
- value = 1388; /* --> eor. */
+ case 1288: /* not */
+ case 1389: /* eor */
+ value = 1389; /* --> eor. */
break;
- case 1288: /* nots */
- case 1389: /* eors */
- value = 1389; /* --> eors. */
+ case 1289: /* nots */
+ case 1390: /* eors */
+ value = 1390; /* --> eors. */
break;
- case 2055: /* facle */
- case 1394: /* facge */
- value = 1394; /* --> facge. */
+ case 2059: /* facle */
+ case 1395: /* facge */
+ value = 1395; /* --> facge. */
break;
- case 2056: /* faclt */
- case 1395: /* facgt */
- value = 1395; /* --> facgt. */
+ case 2060: /* faclt */
+ case 1396: /* facgt */
+ value = 1396; /* --> facgt. */
break;
- case 2057: /* fcmle */
- case 1408: /* fcmge */
- value = 1408; /* --> fcmge. */
+ case 2061: /* fcmle */
+ case 1409: /* fcmge */
+ value = 1409; /* --> fcmge. */
break;
- case 2058: /* fcmlt */
- case 1410: /* fcmgt */
- value = 1410; /* --> fcmgt. */
+ case 2062: /* fcmlt */
+ case 1411: /* fcmgt */
+ value = 1411; /* --> fcmgt. */
break;
case 1271: /* fmov */
- case 1416: /* fcpy */
- value = 1416; /* --> fcpy. */
+ case 1417: /* fcpy */
+ value = 1417; /* --> fcpy. */
break;
case 1270: /* fmov */
- case 1439: /* fdup */
- value = 1439; /* --> fdup. */
+ case 1440: /* fdup */
+ value = 1440; /* --> fdup. */
break;
case 1272: /* mov */
- case 1770: /* orr */
- value = 1770; /* --> orr. */
- break;
- case 2061: /* orn */
- case 1771: /* orr */
- value = 1771; /* --> orr. */
+ case 1772: /* orr */
+ value = 1772; /* --> orr. */
break;
- case 1275: /* mov */
+ case 2065: /* orn */
case 1773: /* orr */
value = 1773; /* --> orr. */
break;
- case 1285: /* movs */
- case 1774: /* orrs */
- value = 1774; /* --> orrs. */
+ case 1276: /* mov */
+ case 1275: /* mov */
+ case 1775: /* orr */
+ value = 1775; /* --> orr. */
break;
- case 1280: /* mov */
- case 1836: /* sel */
- value = 1836; /* --> sel. */
+ case 1286: /* movs */
+ case 1776: /* orrs */
+ value = 1776; /* --> orrs. */
break;
- case 1283: /* mov */
- case 1837: /* sel */
- value = 1837; /* --> sel. */
+ case 1281: /* mov */
+ case 1839: /* sel */
+ value = 1839; /* --> sel. */
+ break;
+ case 1284: /* mov */
+ case 1840: /* sel */
+ value = 1840; /* --> sel. */
break;
default: return NULL;
}
@@ -651,20 +652,24 @@ aarch64_insert_operand (const aarch64_operand *self,
case 174:
case 175:
case 176:
- case 191:
- case 192:
- case 193:
- case 194:
+ case 177:
+ case 178:
+ case 179:
+ case 180:
case 195:
case 196:
case 197:
case 198:
case 199:
- case 205:
- case 208:
- case 210:
- case 211:
+ case 200:
+ case 201:
+ case 202:
+ case 203:
+ case 209:
+ case 212:
case 214:
+ case 215:
+ case 218:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -676,7 +681,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 222:
+ case 226:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -713,18 +718,18 @@ aarch64_insert_operand (const aarch64_operand *self,
case 84:
case 164:
case 166:
- case 183:
- case 184:
- case 185:
- case 186:
case 187:
case 188:
case 189:
case 190:
- case 215:
- case 221:
- case 226:
- case 227:
+ case 191:
+ case 192:
+ case 193:
+ case 194:
+ case 219:
+ case 225:
+ case 230:
+ case 231:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -865,40 +870,40 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
case 165:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 177:
- case 178:
- case 179:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
- case 180:
case 181:
case 182:
+ case 183:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
+ case 184:
+ case 185:
+ case 186:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 200:
- case 201:
- case 202:
- case 203:
case 204:
- return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 205:
case 206:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 207:
- case 209:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
- case 212:
+ case 208:
+ return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 210:
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
+ case 211:
case 213:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 216:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 217:
+ case 220:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 221:
return aarch64_ins_sme_za_array (self, info, code, inst, errors);
- case 218:
+ case 222:
return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
- case 219:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
- case 220:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
case 223:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 224:
- case 225:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 227:
+ case 228:
+ case 229:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}