Support PLT16 relocs against local symbols

Necessary if gcc is to use PLT16 relocs to implement -mlongcall, and
there isn't a good technical reason why local symbols should be
excluded from PLT16 support.  Non-ifunc local symbol PLT entries go in
a separate section to other PLT entries.  In a fixed position
executable they won't need to be relocated, and in a PIE or shared
library I chose to not implement lazy relocation.

bfd/
	* elf64-ppc.c (LOCAL_PLT_ENTRY_SIZE): Define.
	(struct ppc_stub_hash_entry): Add symtype field.
	(PLT_KEEP): Define.
	(struct ppc_link_hash_table): Add pltlocal and relpltlocal.
	(create_linkage_sections): Create pltlocal and relpltlocal.
	(ppc64_elf_check_relocs): Allow PLT relocs on local symbols.
	Set PLT_KEEP.
	(ppc64_elf_adjust_dynamic_symbol): Keep PLT entries for inline calls.
	(allocate_dynrelocs): Allocate pltlocal and relpltlocal.
	(ppc64_elf_size_dynamic_sections): Size pltlocal and relpltlocal.
	Keep PLT entries for inline calls against locals.
	(ppc_build_one_stub): Use pltlocal as appropriate.
	(ppc_size_one_stub): Likewise.
	(ppc64_elf_size_stubs): Set symtype.
	(build_global_entry_stubs_and_plt): Init pltlocal and write
	relpltlocal for globals.
	(write_plt_relocs_for_local_syms): Likewise for local syms.
	(ppc64_elf_relocate_section): Support PLT for local syms.
	* elf32-ppc.c (PLT_KEEP): Define.
	(struct ppc_elf_link_hash_table): Add pltlocal and relpltlocal.
	(ppc_elf_create_glink): Create pltlocal and relpltlocal.
	(ppc_elf_check_relocs): Allow PLT relocs on local symbols.
	Set PLT_KEEP.  Adjust update_local_sym_info call.
	(ppc_elf_adjust_dynamic_symbol): Keep PLT entries for inline calls.
	(allocate_dynrelocs): Allocate pltlocal and relpltlocal.
	(ppc_elf_size_dynamic_sections): Size pltlocal and relpltlocal.
	(ppc_elf_relocate_section): Support PLT16 relocs for local syms.
	(write_global_sym_plt): Init pltlocal and write relpltlocal.
	(ppc_finish_symbols): Likewise for locals.
ld/
	* emulparams/elf32ppc.sh (OTHER_RELRO_SECTIONS_2): Add .branch_lt.
	(OTHER_GOT_RELOC_SECTIONS): Add .rela.branch_lt.
	* testsuite/ld-powerpc/elfv2so.d: Update for symbol/stub reordering.
	* testsuite/ld-powerpc/relbrlt.d: Likewise.
	* testsuite/ld-powerpc/relbrlt.s: Likewise.
	* testsuite/ld-powerpc/tlsso.r: Likewise.
	* testsuite/ld-powerpc/tlstocso.r: Likewise.
gold/
	* powerpc.cc (Target_powerpc::lplt_): New variable.
	(Target_powerpc::lplt_section): Associated accessor.
	(Target_powerpc::plt_off): Handle local non-ifunc symbols.
	(Target_powerpc::make_lplt_section): New function.
	(Target_powerpc::make_local_plt_entry): New function.
	(Powerpc_relobj::do_relocate_sections): Write out lplt.
	(Output_data_plt_powerpc::first_plt_entry_offset): Zero for lplt.
	(Output_data_plt_powerpc::add_local_entry): New function.
	(Output_data_plt_powerpc::do_write): Ignore lplt.
	(Target_powerpc::make_iplt_section): Make lplt first.
	(Target_powerpc::make_brlt_section): Make .branch_lt relro.
	(Target_powerpc::Scan::local): Handle PLT16 relocs.

5 files changed, 30 insertions, 30 deletions

diff --git a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d
index e7cd45c9c21..5f198a96919 100644
--- a/ld/testsuite/ld-powerpc/elfv2so.d
+++ b/ld/testsuite/ld-powerpc/elfv2so.d
@@ -14,16 +14,16 @@ Disassembly of section \.text:
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.
 
-.* <.*\.plt_call\.f1>:
+.* <.*\.plt_call\.f3>:
 .*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
-.*:	(e9 82 80 40|40 80 82 e9) 	ld      r12,-32704\(r2\)
+.*:	(e9 82 80 28|28 80 82 e9) 	ld      r12,-32728\(r2\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.
 
-.* <.*\.plt_call\.f3>:
+.* <.*\.plt_call\.f1>:
 .*:	(f8 41 00 18|18 00 41 f8) 	std     r2,24\(r1\)
-.*:	(e9 82 80 28|28 80 82 e9) 	ld      r12,-32728\(r2\)
+.*:	(e9 82 80 40|40 80 82 e9) 	ld      r12,-32704\(r2\)
 .*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.
@@ -41,12 +41,12 @@ Disassembly of section \.text:
 .*:	(7c 08 02 a6|a6 02 08 7c) 	mflr    r0
 .*:	(f8 21 ff e1|e1 ff 21 f8) 	stdu    r1,-32\(r1\)
 .*:	(f8 01 00 30|30 00 01 f8) 	std     r0,48\(r1\)
-.*:	(4b ff ff 8d|8d ff ff 4b) 	bl      .*\.plt_call\.f1>
+.*:	(4b ff ff ad|ad ff ff 4b) 	bl      .*\.plt_call\.f1>
 .*:	(e8 62 80 08|08 80 62 e8) 	ld      r3,-32760\(r2\)
 .*:	(4b ff ff c5|c5 ff ff 4b) 	bl      .*\.plt_call\.f2>
 .*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
 .*:	(e8 62 80 10|10 80 62 e8) 	ld      r3,-32752\(r2\)
-.*:	(4b ff ff 99|99 ff ff 4b) 	bl      .*\.plt_call\.f3>
+.*:	(4b ff ff 79|79 ff ff 4b) 	bl      .*\.plt_call\.f3>
 .*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
 .*:	(4b ff ff 51|51 ff ff 4b) 	bl      .*\.plt_call\.f4>
 .*:	(e8 41 00 18|18 00 41 e8) 	ld      r2,24\(r1\)
diff --git a/ld/testsuite/ld-powerpc/relbrlt.d b/ld/testsuite/ld-powerpc/relbrlt.d
index 6f3db7d0146..a00b1ffd0c5 100644
--- a/ld/testsuite/ld-powerpc/relbrlt.d
+++ b/ld/testsuite/ld-powerpc/relbrlt.d
@@ -8,32 +8,32 @@
 Disassembly of section \.text:
 
 0*100000c0 <_start>:
-[0-9a-f	 ]*:	(49 bf 00 21|21 00 bf 49) 	bl      .*
+[0-9a-f	 ]*:	(49 bf 00 2d|2d 00 bf 49) 	bl      .*
 [0-9a-f	 ]*: R_PPC64_REL24	\.text\+0x37e003c
 [0-9a-f	 ]*:	(60 00 00 00|00 00 00 60) 	nop
-[0-9a-f	 ]*:	(49 bf 00 1d|1d 00 bf 49) 	bl      .*
-[0-9a-f	 ]*: R_PPC64_REL24	\.text\+0x3bf002c
+[0-9a-f	 ]*:	(49 bf 00 19|19 00 bf 49) 	bl      .*
+[0-9a-f	 ]*: R_PPC64_REL24	\.text\+0x3bf0020
 [0-9a-f	 ]*:	(60 00 00 00|00 00 00 60) 	nop
 [0-9a-f	 ]*:	(49 bf 00 21|21 00 bf 49) 	bl      .*
-[0-9a-f	 ]*: R_PPC64_REL24	\.text\+0x57e0030
+[0-9a-f	 ]*: R_PPC64_REL24	\.text\+0x57e0024
 [0-9a-f	 ]*:	(60 00 00 00|00 00 00 60) 	nop
 [0-9a-f	 ]*:	00 00 00 00 	\.long 0x0
 [0-9a-f	 ]*:	(4b ff ff e4|e4 ff ff 4b) 	b       .* <_start>
 	\.\.\.
 
-[0-9a-f	 ]*<.*long_branch.*>:
-[0-9a-f	 ]*:	(49 bf 00 1c|1c 00 bf 49) 	b       .* <far>
-[0-9a-f	 ]*: R_PPC64_REL24	\*ABS\*\+0x137e00fc
-
 [0-9a-f	 ]*<.*plt_branch.*>:
-[0-9a-f	 ]*:	(e9 82 80 f8|f8 80 82 e9) 	ld      r12,-32520\(r2\)
-[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00f8
+[0-9a-f	 ]*:	(e9 82 80 e8|e8 80 82 e9) 	ld      r12,-32536\(r2\)
+[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00e8
 [0-9a-f	 ]*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 [0-9a-f	 ]*:	(4e 80 04 20|20 04 80 4e) 	bctr
 
+[0-9a-f	 ]*<.*long_branch.*>:
+[0-9a-f	 ]*:	(49 bf 00 10|10 00 bf 49) 	b       .* <far>
+[0-9a-f	 ]*: R_PPC64_REL24	\*ABS\*\+0x137e00fc
+
 [0-9a-f	 ]*<.*plt_branch.*>:
-[0-9a-f	 ]*:	(e9 82 81 00|00 81 82 e9) 	ld      r12,-32512\(r2\)
-[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f0100
+[0-9a-f	 ]*:	(e9 82 80 f0|f0 80 82 e9) 	ld      r12,-32528\(r2\)
+[0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00f0
 [0-9a-f	 ]*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 [0-9a-f	 ]*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.
@@ -42,19 +42,19 @@ Disassembly of section \.text:
 [0-9a-f	 ]*:	(4e 80 00 20|20 00 80 4e) 	blr
 	\.\.\.
 
-0*13bf00ec <far2far>:
+0*13bf00e0 <far2far>:
 [0-9a-f	 ]*:	(4e 80 00 20|20 00 80 4e) 	blr
 	\.\.\.
 
-0*157e00f0 <huge>:
+0*157e00e4 <huge>:
 [0-9a-f	 ]*:	(4e 80 00 20|20 00 80 4e) 	blr
 
 Disassembly of section \.branch_lt:
 
-0*157f00f8 .*:
-[0-9a-f	 ]*:	(00 00 00 00|ec 00 bf 13) .*
-[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x13bf00ec
-[0-9a-f	 ]*:	(13 bf 00 ec|00 00 00 00) .*
-[0-9a-f	 ]*:	(00 00 00 00|f0 00 7e 15) .*
-[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x157e00f0
-[0-9a-f	 ]*:	(15 7e 00 f0|00 00 00 00) .*
+0*157f00e8 .*:
+[0-9a-f	 ]*:	(00 00 00 00|e0 00 bf 13) .*
+[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x13bf00e0
+[0-9a-f	 ]*:	(13 bf 00 e0|00 00 00 00) .*
+[0-9a-f	 ]*:	(00 00 00 00|e4 00 7e 15) .*
+[0-9a-f	 ]*: R_PPC64_RELATIVE	\*ABS\*\+0x157e00e4
+[0-9a-f	 ]*:	(15 7e 00 e4|00 00 00 00) .*
diff --git a/ld/testsuite/ld-powerpc/relbrlt.s b/ld/testsuite/ld-powerpc/relbrlt.s
index fade6a281ea..cee0cddfda0 100644
--- a/ld/testsuite/ld-powerpc/relbrlt.s
+++ b/ld/testsuite/ld-powerpc/relbrlt.s
@@ -20,7 +20,7 @@ far:
  blr
 
  .section .text.pad2,"ax"
- .space 0x40ffec
+ .space 0x40ffe0
 
  .section .text.far2far,"ax"
 far2far:
diff --git a/ld/testsuite/ld-powerpc/tlsso.r b/ld/testsuite/ld-powerpc/tlsso.r
index 218a0ced256..5d349e58ab2 100644
--- a/ld/testsuite/ld-powerpc/tlsso.r
+++ b/ld/testsuite/ld-powerpc/tlsso.r
@@ -114,8 +114,8 @@ Symbol table '\.symtab' contains [0-9]+ entries:
 .* TLS +LOCAL +DEFAULT +7 le5
 .* FILE +LOCAL +DEFAULT +ABS 
 .* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
-.* NOTYPE +LOCAL +DEFAULT +6 .*\.plt_call\.__tls_get_addr
 .* NOTYPE +LOCAL +DEFAULT +6 __glink_PLTresolve
+.* NOTYPE +LOCAL +DEFAULT +6 .*\.plt_call\.__tls_get_addr
 .* TLS +GLOBAL +DEFAULT +UND gd
 .* TLS +GLOBAL +DEFAULT +8 le0
 .* NOTYPE +GLOBAL +DEFAULT +UND __tls_get_addr
diff --git a/ld/testsuite/ld-powerpc/tlstocso.r b/ld/testsuite/ld-powerpc/tlstocso.r
index 0296549f7b7..f8922ee246b 100644
--- a/ld/testsuite/ld-powerpc/tlstocso.r
+++ b/ld/testsuite/ld-powerpc/tlstocso.r
@@ -110,8 +110,8 @@ Symbol table '\.symtab' contains [0-9]+ entries:
 .* NOTYPE +LOCAL +DEFAULT +11 \.Lie0
 .* FILE +LOCAL +DEFAULT +ABS 
 .* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
-.* NOTYPE +LOCAL +DEFAULT +6 .*\.plt_call\.__tls_get_addr
 .* NOTYPE +LOCAL +DEFAULT +6 __glink_PLTresolve
+.* NOTYPE +LOCAL +DEFAULT +6 .*\.plt_call\.__tls_get_addr
 .* TLS +GLOBAL +DEFAULT +UND gd
 .* TLS +GLOBAL +DEFAULT +8 le0
 .* NOTYPE +GLOBAL +DEFAULT +UND __tls_get_addr