diff options
Diffstat (limited to 'ld/testsuite/ld-powerpc/relbrlt.d')
| -rw-r--r-- | ld/testsuite/ld-powerpc/relbrlt.d | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/ld/testsuite/ld-powerpc/relbrlt.d b/ld/testsuite/ld-powerpc/relbrlt.d index 6f3db7d0146..a00b1ffd0c5 100644 --- a/ld/testsuite/ld-powerpc/relbrlt.d +++ b/ld/testsuite/ld-powerpc/relbrlt.d @@ -8,32 +8,32 @@ Disassembly of section \.text: 0*100000c0 <_start>: -[0-9a-f ]*: (49 bf 00 21|21 00 bf 49) bl .* +[0-9a-f ]*: (49 bf 00 2d|2d 00 bf 49) bl .* [0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c [0-9a-f ]*: (60 00 00 00|00 00 00 60) nop -[0-9a-f ]*: (49 bf 00 1d|1d 00 bf 49) bl .* -[0-9a-f ]*: R_PPC64_REL24 \.text\+0x3bf002c +[0-9a-f ]*: (49 bf 00 19|19 00 bf 49) bl .* +[0-9a-f ]*: R_PPC64_REL24 \.text\+0x3bf0020 [0-9a-f ]*: (60 00 00 00|00 00 00 60) nop [0-9a-f ]*: (49 bf 00 21|21 00 bf 49) bl .* -[0-9a-f ]*: R_PPC64_REL24 \.text\+0x57e0030 +[0-9a-f ]*: R_PPC64_REL24 \.text\+0x57e0024 [0-9a-f ]*: (60 00 00 00|00 00 00 60) nop [0-9a-f ]*: 00 00 00 00 \.long 0x0 [0-9a-f ]*: (4b ff ff e4|e4 ff ff 4b) b .* <_start> \.\.\. -[0-9a-f ]*<.*long_branch.*>: -[0-9a-f ]*: (49 bf 00 1c|1c 00 bf 49) b .* <far> -[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc - [0-9a-f ]*<.*plt_branch.*>: -[0-9a-f ]*: (e9 82 80 f8|f8 80 82 e9) ld r12,-32520\(r2\) -[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f8 +[0-9a-f ]*: (e9 82 80 e8|e8 80 82 e9) ld r12,-32536\(r2\) +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e8 [0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 [0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr +[0-9a-f ]*<.*long_branch.*>: +[0-9a-f ]*: (49 bf 00 10|10 00 bf 49) b .* <far> +[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc + [0-9a-f ]*<.*plt_branch.*>: -[0-9a-f ]*: (e9 82 81 00|00 81 82 e9) ld r12,-32512\(r2\) -[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f0100 +[0-9a-f ]*: (e9 82 80 f0|f0 80 82 e9) ld r12,-32528\(r2\) +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f0 [0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 [0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr \.\.\. @@ -42,19 +42,19 @@ Disassembly of section \.text: [0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr \.\.\. -0*13bf00ec <far2far>: +0*13bf00e0 <far2far>: [0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr \.\.\. -0*157e00f0 <huge>: +0*157e00e4 <huge>: [0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr Disassembly of section \.branch_lt: -0*157f00f8 .*: -[0-9a-f ]*: (00 00 00 00|ec 00 bf 13) .* -[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00ec -[0-9a-f ]*: (13 bf 00 ec|00 00 00 00) .* -[0-9a-f ]*: (00 00 00 00|f0 00 7e 15) .* -[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00f0 -[0-9a-f ]*: (15 7e 00 f0|00 00 00 00) .* +0*157f00e8 .*: +[0-9a-f ]*: (00 00 00 00|e0 00 bf 13) .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00e0 +[0-9a-f ]*: (13 bf 00 e0|00 00 00 00) .* +[0-9a-f ]*: (00 00 00 00|e4 00 7e 15) .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00e4 +[0-9a-f ]*: (15 7e 00 e4|00 00 00 00) .* |