delta/beignet.git - gitlab.freedesktop.org: beignet/beignet.git

	Commit message (Expand)	Author	Age	Files	Lines
*	add extension intel_planar_yuv.	Luo Xionghu	2017-03-13	1	-0/+1
*	use self test to determine enable/or disable atomics in L3 for HSW.	Luo Xionghu	2015-06-30	1	-0/+3
*	Revert "CL/Driver: enable atomics in L3 for HSW."	Zhigang Gong	2015-05-04	1	-4/+0
*	SKL: add skl select_pipeline and cache_control functions.	Yang Rong	2015-01-30	1	-0/+1
*	CL/Driver: enable atomics in L3 for HSW.	Zhigang Gong	2015-01-07	1	-0/+4
*	License: adjust all license version to LGPL v2.1+.	Zhigang Gong	2014-11-11	1	-1/+1
*	Add sampler state and tile define for gen8.	Junyan He	2014-10-10	1	-0/+5
*	BDW: enable SLM in BDW.	Yang Rong	2014-10-10	1	-0/+2
*	BDW: Refine intel_gpgpu_setup_bti and add intel_gpgpu_set_base_address for BDW.	Yang Rong	2014-10-10	1	-0/+1
*	Runtime: Fix a bug in L3 configuration.	Ruiling Song	2014-05-16	1	-0/+1
*	Make the surface typed write work for HSW	Junyan He	2014-05-12	1	-0/+7
*	Using the PIPE_CONTROL to implement get time stamp in gen backend	Junyan He	2013-10-18	1	-0/+4
*	Implement sampler support.	Zhigang Gong	2013-04-10	1	-0/+22
*	Pushed back original headers we partially lost during the code base merge. Now	Benjamin Segovia	2012-10-12	1	-0/+30
*	Cleaned up the code from previous unused dependencies Upate the README	Benjamin Segovia	2012-08-10	1	-0/+12
*	Cleaned up a bit the code removing unnecessary defines and structs from Mesa	bsegovia	2012-08-10	1	-95/+7
*	All unit tests now pass	bsegovia	2012-08-10	1	-0/+2
*	Cleaned and simplified code for gen6 Code now starts to work for gen7	bsegovia	2012-08-10	1	-2/+3
*	Renamed genx* into intel*	bsegovia	2012-08-10	1	-0/+348