diff options
Diffstat (limited to 'src/VBox/Devices/Graphics')
23 files changed, 9272 insertions, 3800 deletions
diff --git a/src/VBox/Devices/Graphics/BIOS/Makefile.kmk b/src/VBox/Devices/Graphics/BIOS/Makefile.kmk index 46905328..8d8e78e1 100644 --- a/src/VBox/Devices/Graphics/BIOS/Makefile.kmk +++ b/src/VBox/Devices/Graphics/BIOS/Makefile.kmk @@ -135,5 +135,14 @@ $$(VgaDefBiosLogo_0_OUTDIR)/VgaDefBiosLogo.c: $(VBOX_BRAND_BIOS_LOGO) $(VBOX_BIN $(QUIET)$(VBOX_BIN2C) VgaDefBiosLogo $< $@ +ifdef VBOX_WITH_OPEN_WATCOM + # + # Install the symbol file for the BIOS. + # + INSTALLS += VBoxVgaBiosSym + VBoxVgaBiosSym_TEMPLATE = VBoxDbgSyms + VBoxVgaBiosSym_SOURCES = $(basename $(VBoxVgaBios_1_TARGET)).sym +endif + include $(FILE_KBUILD_SUB_FOOTER) diff --git a/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.asm b/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.asm index 3922acd9..183842bb 100644 --- a/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.asm +++ b/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.asm @@ -151,11 +151,21 @@ ; // ; // ============================================================================================ +; +; Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice +; other than GPL or LGPL is available it will apply instead, Oracle elects to use only +; the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where +; a choice of LGPL license versions is made available with the language indicating +; that LGPLv2 or any later version may be used, or where a choice of which version +; of the LGPL is applied is otherwise unspecified. +; + + section VGAROM progbits vstart=0x0 align=1 ; size=0x93e class=CODE group=AUTO - db 055h, 0aah, 040h, 0e9h, 05fh, 00ah, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h + db 055h, 0aah, 040h, 0e9h, 062h, 00ah, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 049h, 042h db 04dh, 000h vgabios_int10_handler: ; 0xc0022 LB 0x585 @@ -243,7 +253,7 @@ vgabios_int10_handler: ; 0xc0022 LB 0x585 pushaw ; 60 mov bx, 0c000h ; bb 00 c0 mov ds, bx ; 8e db - call 02fb4h ; e8 c4 2e + call 03040h ; e8 50 2f popaw ; 61 pop DS ; 1f pop ES ; 07 @@ -1496,7 +1506,7 @@ vbe_biosfn_return_protected_mode_interface: ; 0xc0925 LB 0x19 ; Padding 0xc2 bytes at 0xc093e times 194 db 0 -section _TEXT progbits vstart=0xa00 align=1 ; size=0x2ebf class=CODE group=AUTO +section _TEXT progbits vstart=0xa00 align=1 ; size=0x2f80 class=CODE group=AUTO set_int_vector_: ; 0xc0a00 LB 0x1a push bx ; 53 push bp ; 55 @@ -1510,10 +1520,10 @@ set_int_vector_: ; 0xc0a00 LB 0x1a pop bp ; 5d pop bx ; 5b retn ; c3 -init_vga_card_: ; 0xc0a1a LB 0x19 - push dx ; 52 +init_vga_card_: ; 0xc0a1a LB 0x1c push bp ; 55 mov bp, sp ; 89 e5 + push dx ; 52 mov AL, strict byte 0c3h ; b0 c3 mov dx, 003c2h ; ba c2 03 out DX, AL ; ee @@ -1523,10 +1533,11 @@ init_vga_card_: ; 0xc0a1a LB 0x19 mov AL, strict byte 002h ; b0 02 mov dx, 003c5h ; ba c5 03 out DX, AL ; ee - pop bp ; 5d + lea sp, [bp-002h] ; 8d 66 fe pop dx ; 5a + pop bp ; 5d retn ; c3 -init_bios_area_: ; 0xc0a33 LB 0x32 +init_bios_area_: ; 0xc0a36 LB 0x32 push bx ; 53 push bp ; 55 mov bp, sp ; 89 e5 @@ -1544,38 +1555,39 @@ init_bios_area_: ; 0xc0a33 LB 0x32 pop bp ; 5d pop bx ; 5b retn ; c3 -_vgabios_init_func: ; 0xc0a65 LB 0x1e +_vgabios_init_func: ; 0xc0a68 LB 0x20 push bp ; 55 mov bp, sp ; 89 e5 - call 00a1ah ; e8 af ff - call 00a33h ; e8 c5 ff - call 0340bh ; e8 9a 29 + call 00a1ah ; e8 ac ff + call 00a36h ; e8 c5 ff + call 034afh ; e8 3b 2a mov dx, strict word 00022h ; ba 22 00 mov ax, strict word 00010h ; b8 10 00 - call 00a00h ; e8 86 ff + call 00a00h ; e8 83 ff mov ax, strict word 00003h ; b8 03 00 db 032h, 0e4h ; xor ah, ah ; 32 e4 int 010h ; cd 10 + mov sp, bp ; 89 ec pop bp ; 5d retf ; cb -vga_get_cursor_pos_: ; 0xc0a83 LB 0x40 - push cx ; 51 - push si ; 56 +vga_get_cursor_pos_: ; 0xc0a88 LB 0x43 push bp ; 55 mov bp, sp ; 89 e5 + push cx ; 51 + push si ; 56 mov cl, al ; 88 c1 mov si, dx ; 89 d6 cmp AL, strict byte 007h ; 3c 07 - jbe short 00a9eh ; 76 0e + jbe short 00aa3h ; 76 0e push SS ; 16 pop ES ; 07 mov word [es:si], strict word 00000h ; 26 c7 04 00 00 mov word [es:bx], strict word 00000h ; 26 c7 07 00 00 - jmp short 00abfh ; eb 21 + jmp short 00ac4h ; eb 21 mov dx, strict word 00060h ; ba 60 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 60 24 + call 02f93h ; e8 e7 24 push SS ; 16 pop ES ; 07 mov word [es:si], ax ; 26 89 04 @@ -1583,52 +1595,55 @@ vga_get_cursor_pos_: ; 0xc0a83 LB 0x40 add dx, dx ; 01 d2 add dx, strict byte 00050h ; 83 c2 50 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 4d 24 + call 02f93h ; e8 d4 24 push SS ; 16 pop ES ; 07 mov word [es:bx], ax ; 26 89 07 - pop bp ; 5d + lea sp, [bp-004h] ; 8d 66 fc pop si ; 5e pop cx ; 59 + pop bp ; 5d retn ; c3 -vga_read_char_attr_: ; 0xc0ac3 LB 0xa3 +vga_read_char_attr_: ; 0xc0acb LB 0xa8 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - enter 00008h, 000h ; c8 08 00 00 + sub sp, strict byte 00008h ; 83 ec 08 mov cl, al ; 88 c1 mov si, dx ; 89 d6 mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 13 24 + call 02f77h ; e8 95 24 xor ah, ah ; 30 e4 - call 02ec4h ; e8 e7 23 + call 02f50h ; e8 69 24 mov ch, al ; 88 c5 cmp AL, strict byte 0ffh ; 3c ff - je short 00b50h ; 74 6d + je short 00b5ah ; 74 6d movzx ax, cl ; 0f b6 c1 - lea bx, [bp-008h] ; 8d 5e f8 - lea dx, [bp-006h] ; 8d 56 fa - call 00a83h ; e8 94 ff - mov al, byte [bp-008h] ; 8a 46 f8 - mov byte [bp-002h], al ; 88 46 fe - mov ax, word [bp-008h] ; 8b 46 f8 + lea bx, [bp-010h] ; 8d 5e f0 + lea dx, [bp-00eh] ; 8d 56 f2 + call 00a88h ; e8 8f ff + mov al, byte [bp-010h] ; 8a 46 f0 + mov byte [bp-00ah], al ; 88 46 f6 + mov ax, word [bp-010h] ; 8b 46 f0 xor al, al ; 30 c0 shr ax, 008h ; c1 e8 08 - mov word [bp-004h], ax ; 89 46 fc + mov word [bp-00ch], ax ; 89 46 f4 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 e2 23 + call 02f77h ; e8 64 24 movzx di, al ; 0f b6 f8 inc di ; 47 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 f1 23 + call 02f93h ; e8 73 24 movzx bx, ch ; 0f b6 dd sal bx, 003h ; c1 e3 03 - cmp byte [bx+0482fh], 000h ; 80 bf 2f 48 00 - jne short 00b50h ; 75 2d + cmp byte [bx+04830h], 000h ; 80 bf 30 48 00 + jne short 00b5ah ; 75 2d mov dx, ax ; 89 c2 imul dx, di ; 0f af d7 add dx, dx ; 01 d2 @@ -1636,123 +1651,130 @@ vga_read_char_attr_: ; 0xc0ac3 LB 0xa3 xor ch, ch ; 30 ed inc dx ; 42 imul cx, dx ; 0f af ca - movzx dx, byte [bp-004h] ; 0f b6 56 fc + movzx dx, byte [bp-00ch] ; 0f b6 56 f4 imul dx, ax ; 0f af d0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 add ax, dx ; 01 d0 add ax, ax ; 01 c0 mov dx, cx ; 89 ca add dx, ax ; 01 c2 - mov ax, word [bx+04832h] ; 8b 87 32 48 - call 02f07h ; e8 ba 23 + mov ax, word [bx+04833h] ; 8b 87 33 48 + call 02f93h ; e8 3c 24 mov word [ss:si], ax ; 36 89 04 - leave ; c9 + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 - or word [bp+di], 00bbdh ; 81 0b bd 0b - retn 0ca0bh ; c2 0b ca - db 00bh, 0cfh - ; or cx, di ; 0b cf - db 00bh, 0d4h - ; or dx, sp ; 0b d4 - db 00bh, 0d9h - ; or bx, cx ; 0b d9 - db 00bh, 0deh - ; or bx, si ; 0b de + mov cs, [bp+di] ; 8e 0b + int 00bh ; cd 0b + ror byte [bp+di], CL ; d2 0b + fimul dword [bp+di] ; da 0b + db 0dfh + db 00bh, 0e4h + ; or sp, sp ; 0b e4 + db 00bh, 0e9h + ; or bp, cx ; 0b e9 + db 00bh, 0eeh + ; or bp, si ; 0b ee db 00bh -vga_get_font_info_: ; 0xc0b66 LB 0x7f +vga_get_font_info_: ; 0xc0b73 LB 0x82 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00002h, 000h ; c8 02 00 00 + push ax ; 50 mov si, dx ; 89 d6 - mov word [bp-002h], bx ; 89 5e fe + mov word [bp-006h], bx ; 89 5e fa mov bx, cx ; 89 cb cmp ax, strict word 00007h ; 3d 07 00 - jnbe short 00bb7h ; 77 3f + jnbe short 00bc4h ; 77 3f mov di, ax ; 89 c7 add di, ax ; 01 c7 - jmp word [cs:di+00b56h] ; 2e ff a5 56 0b + jmp word [cs:di+00b63h] ; 2e ff a5 63 0b mov dx, strict word 0007ch ; ba 7c 00 xor ax, ax ; 31 c0 - call 02f23h ; e8 9a 23 + call 02fafh ; e8 19 24 push SS ; 16 pop ES ; 07 - mov di, word [bp-002h] ; 8b 7e fe + mov di, word [bp-006h] ; 8b 7e fa mov word [es:di], ax ; 26 89 05 mov word [es:si], dx ; 26 89 14 mov dx, 00085h ; ba 85 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 4e 23 + call 02f77h ; e8 cd 23 xor ah, ah ; 30 e4 push SS ; 16 pop ES ; 07 mov word [es:bx], ax ; 26 89 07 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 3e 23 + call 02f77h ; e8 bd 23 xor ah, ah ; 30 e4 push SS ; 16 pop ES ; 07 - mov bx, word [bp+008h] ; 8b 5e 08 + mov bx, word [bp+004h] ; 8b 5e 04 mov word [es:bx], ax ; 26 89 07 - leave ; c9 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00002h ; c2 02 00 mov dx, 0010ch ; ba 0c 01 - jmp short 00b84h ; eb c2 - mov ax, 05daeh ; b8 ae 5d + jmp short 00b91h ; eb bf + mov ax, 05dafh ; b8 af 5d mov dx, 0c000h ; ba 00 c0 - jmp short 00b89h ; eb bf - mov ax, 055aeh ; b8 ae 55 - jmp short 00bc5h ; eb f6 - mov ax, 059aeh ; b8 ae 59 - jmp short 00bc5h ; eb f1 - mov ax, 07baeh ; b8 ae 7b - jmp short 00bc5h ; eb ec - mov ax, 06baeh ; b8 ae 6b - jmp short 00bc5h ; eb e7 - mov ax, 07cdbh ; b8 db 7c - jmp short 00bc5h ; eb e2 - jmp short 00bb7h ; eb d2 -vga_read_pixel_: ; 0xc0be5 LB 0x134 + jmp short 00b96h ; eb bc + mov ax, 055afh ; b8 af 55 + jmp short 00bd5h ; eb f6 + mov ax, 059afh ; b8 af 59 + jmp short 00bd5h ; eb f1 + mov ax, 07bafh ; b8 af 7b + jmp short 00bd5h ; eb ec + mov ax, 06bafh ; b8 af 6b + jmp short 00bd5h ; eb e7 + mov ax, 07cdch ; b8 dc 7c + jmp short 00bd5h ; eb e2 + jmp short 00bc4h ; eb cf +vga_read_pixel_: ; 0xc0bf5 LB 0x139 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00006h, 000h ; c8 06 00 00 + sub sp, strict byte 00006h ; 83 ec 06 mov si, dx ; 89 d6 - mov word [bp-006h], bx ; 89 5e fa + mov word [bp-00ah], bx ; 89 5e f6 mov di, cx ; 89 cf mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 f0 22 + call 02f77h ; e8 6a 23 xor ah, ah ; 30 e4 - call 02ec4h ; e8 c4 22 + call 02f50h ; e8 3e 23 mov cl, al ; 88 c1 cmp AL, strict byte 0ffh ; 3c ff - je near 00d15h ; 0f 84 0d 01 + je near 00d27h ; 0f 84 0d 01 movzx bx, al ; 0f b6 d8 sal bx, 003h ; c1 e3 03 - cmp byte [bx+0482fh], 000h ; 80 bf 2f 48 00 - je near 00d15h ; 0f 84 fe 00 - mov bl, byte [bx+04830h] ; 8a 9f 30 48 + cmp byte [bx+04830h], 000h ; 80 bf 30 48 00 + je near 00d27h ; 0f 84 fe 00 + mov bl, byte [bx+04831h] ; 8a 9f 31 48 cmp bl, 003h ; 80 fb 03 - jc short 00c31h ; 72 11 - jbe short 00c39h ; 76 17 + jc short 00c43h ; 72 11 + jbe short 00c4bh ; 76 17 cmp bl, 005h ; 80 fb 05 - je near 00cf2h ; 0f 84 c9 00 + je near 00d04h ; 0f 84 c9 00 cmp bl, 004h ; 80 fb 04 - je short 00c39h ; 74 0b - jmp near 00d10h ; e9 df 00 + je short 00c4bh ; 74 0b + jmp near 00d22h ; e9 df 00 cmp bl, 002h ; 80 fb 02 - je short 00c91h ; 74 5b - jmp near 00d10h ; e9 d7 00 + je short 00ca3h ; 74 5b + jmp near 00d22h ; e9 d7 00 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 c5 22 - imul ax, word [bp-006h] ; 0f af 46 fa + call 02f93h ; e8 3f 23 + imul ax, word [bp-00ah] ; 0f af 46 f6 mov bx, si ; 89 f3 shr bx, 003h ; c1 eb 03 add bx, ax ; 01 c3 @@ -1760,44 +1782,44 @@ vga_read_pixel_: ; 0xc0be5 LB 0x134 and cx, strict byte 00007h ; 83 e1 07 mov ax, 00080h ; b8 80 00 sar ax, CL ; d3 f8 - mov byte [bp-004h], al ; 88 46 fc - mov byte [bp-002h], ch ; 88 6e fe - jmp short 00c67h ; eb 08 - cmp byte [bp-002h], 004h ; 80 7e fe 04 - jnc near 00d12h ; 0f 83 ab 00 - movzx ax, byte [bp-002h] ; 0f b6 46 fe + mov byte [bp-008h], al ; 88 46 f8 + mov byte [bp-006h], ch ; 88 6e fa + jmp short 00c79h ; eb 08 + cmp byte [bp-006h], 004h ; 80 7e fa 04 + jnc near 00d24h ; 0f 83 ab 00 + movzx ax, byte [bp-006h] ; 0f b6 46 fa sal ax, 008h ; c1 e0 08 or AL, strict byte 004h ; 0c 04 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef mov dx, bx ; 89 da mov ax, 0a000h ; b8 00 a0 - call 02eebh ; e8 6f 22 - and al, byte [bp-004h] ; 22 46 fc + call 02f77h ; e8 e9 22 + and al, byte [bp-008h] ; 22 46 f8 test al, al ; 84 c0 - jbe short 00c8ch ; 76 09 - mov cl, byte [bp-002h] ; 8a 4e fe + jbe short 00c9eh ; 76 09 + mov cl, byte [bp-006h] ; 8a 4e fa mov AL, strict byte 001h ; b0 01 sal al, CL ; d2 e0 or ch, al ; 08 c5 - inc byte [bp-002h] ; fe 46 fe - jmp short 00c5fh ; eb ce - mov ax, word [bp-006h] ; 8b 46 fa + inc byte [bp-006h] ; fe 46 fa + jmp short 00c71h ; eb ce + mov ax, word [bp-00ah] ; 8b 46 f6 shr ax, 1 ; d1 e8 imul ax, ax, strict byte 00050h ; 6b c0 50 mov bx, si ; 89 f3 shr bx, 002h ; c1 eb 02 add bx, ax ; 01 c3 - test byte [bp-006h], 001h ; f6 46 fa 01 - je short 00ca9h ; 74 03 + test byte [bp-00ah], 001h ; f6 46 f6 01 + je short 00cbbh ; 74 03 add bh, 020h ; 80 c7 20 mov dx, bx ; 89 da mov ax, 0b800h ; b8 00 b8 - call 02eebh ; e8 3a 22 + call 02f77h ; e8 b4 22 movzx bx, cl ; 0f b6 d9 sal bx, 003h ; c1 e3 03 - cmp byte [bx+04831h], 002h ; 80 bf 31 48 02 - jne short 00cd9h ; 75 1b + cmp byte [bx+04832h], 002h ; 80 bf 32 48 02 + jne short 00cebh ; 75 1b mov cx, si ; 89 f1 xor ch, ch ; 30 ed and cl, 003h ; 80 e1 03 @@ -1809,7 +1831,7 @@ vga_read_pixel_: ; 0xc0be5 LB 0x134 sar ax, CL ; d3 f8 mov ch, al ; 88 c5 and ch, 003h ; 80 e5 03 - jmp short 00d12h ; eb 39 + jmp short 00d24h ; eb 39 mov cx, si ; 89 f1 xor ch, ch ; 30 ed and cl, 007h ; 80 e1 07 @@ -1820,30 +1842,34 @@ vga_read_pixel_: ; 0xc0be5 LB 0x134 sar ax, CL ; d3 f8 mov ch, al ; 88 c5 and ch, 001h ; 80 e5 01 - jmp short 00d12h ; eb 20 + jmp short 00d24h ; eb 20 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 0c 22 + call 02f93h ; e8 86 22 sal ax, 003h ; c1 e0 03 - imul ax, word [bp-006h] ; 0f af 46 fa + imul ax, word [bp-00ah] ; 0f af 46 f6 mov dx, si ; 89 f2 add dx, ax ; 01 c2 mov ax, 0a000h ; b8 00 a0 - call 02eebh ; e8 df 21 + call 02f77h ; e8 59 22 mov ch, al ; 88 c5 - jmp short 00d12h ; eb 02 + jmp short 00d24h ; eb 02 xor ch, ch ; 30 ed mov byte [ss:di], ch ; 36 88 2d - leave ; c9 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn ; c3 -biosfn_perform_gray_scale_summing_: ; 0xc0d19 LB 0x88 +biosfn_perform_gray_scale_summing_: ; 0xc0d2e LB 0x8c + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 + push ax ; 50 + push ax ; 50 mov bx, ax ; 89 c3 mov di, dx ; 89 d7 mov dx, 003dah ; ba da 03 @@ -1855,7 +1881,7 @@ biosfn_perform_gray_scale_summing_: ; 0xc0d19 LB 0x88 out DX, AL ; ee xor si, si ; 31 f6 cmp si, di ; 39 fe - jnc short 00d89h ; 73 52 + jnc short 00d9fh ; 73 52 mov al, bl ; 88 d8 mov dx, 003c7h ; ba c7 03 out DX, AL ; ee @@ -1867,23 +1893,23 @@ biosfn_perform_gray_scale_summing_: ; 0xc0d19 LB 0x88 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - mov word [bp-004h], ax ; 89 46 fc + mov word [bp-00ch], ax ; 89 46 f4 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 xor ch, ch ; 30 ed imul cx, cx, strict byte 0004dh ; 6b c9 4d - mov word [bp-002h], cx ; 89 4e fe - movzx cx, byte [bp-004h] ; 0f b6 4e fc + mov word [bp-00ah], cx ; 89 4e f6 + movzx cx, byte [bp-00ch] ; 0f b6 4e f4 imul cx, cx, 00097h ; 69 c9 97 00 - add cx, word [bp-002h] ; 03 4e fe + add cx, word [bp-00ah] ; 03 4e f6 xor ah, ah ; 30 e4 imul ax, ax, strict byte 0001ch ; 6b c0 1c add cx, ax ; 01 c1 add cx, 00080h ; 81 c1 80 00 sar cx, 008h ; c1 f9 08 cmp cx, strict byte 0003fh ; 83 f9 3f - jbe short 00d77h ; 76 03 + jbe short 00d8dh ; 76 03 mov cx, strict word 0003fh ; b9 3f 00 mov al, bl ; 88 d8 mov dx, 003c8h ; ba c8 03 @@ -1895,7 +1921,7 @@ biosfn_perform_gray_scale_summing_: ; 0xc0d19 LB 0x88 out DX, AL ; ee inc bx ; 43 inc si ; 46 - jmp short 00d33h ; eb aa + jmp short 00d49h ; eb aa mov dx, 003dah ; ba da 03 in AL, DX ; ec db 02ah, 0e4h @@ -1907,19 +1933,20 @@ biosfn_perform_gray_scale_summing_: ; 0xc0d19 LB 0x88 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - leave ; c9 + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_set_cursor_shape_: ; 0xc0da1 LB 0xa1 +biosfn_set_cursor_shape_: ; 0xc0dba LB 0xa4 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - push bp ; 55 - mov bp, sp ; 89 e5 mov ch, al ; 88 c5 mov cl, dl ; 88 d1 and ch, 03fh ; 80 e5 3f @@ -1931,30 +1958,30 @@ biosfn_set_cursor_shape_: ; 0xc0da1 LB 0xa1 add bx, si ; 01 f3 mov dx, strict word 00060h ; ba 60 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 4d 21 + call 02fa1h ; e8 c0 21 mov dx, 00089h ; ba 89 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 1a 21 + call 02f77h ; e8 8d 21 mov bl, al ; 88 c3 mov dx, 00085h ; ba 85 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 2b 21 + call 02f93h ; e8 9e 21 mov dx, ax ; 89 c2 test bl, 001h ; f6 c3 01 - je short 00e1ah ; 74 37 + je short 00e33h ; 74 37 cmp ax, strict word 00008h ; 3d 08 00 - jbe short 00e1ah ; 76 32 + jbe short 00e33h ; 76 32 cmp cl, 008h ; 80 f9 08 - jnc short 00e1ah ; 73 2d + jnc short 00e33h ; 73 2d cmp ch, 020h ; 80 fd 20 - jnc short 00e1ah ; 73 28 + jnc short 00e33h ; 73 28 inc di ; 47 cmp si, di ; 39 fe - je short 00e00h ; 74 09 + je short 00e19h ; 74 09 imul ax, di ; 0f af c7 shr ax, 003h ; c1 e8 03 dec ax ; 48 - jmp short 00e0bh ; eb 0b + jmp short 00e24h ; eb 0b lea si, [di+001h] ; 8d 75 01 imul ax, si ; 0f af c6 shr ax, 003h ; c1 e8 03 @@ -1969,7 +1996,7 @@ biosfn_set_cursor_shape_: ; 0xc0da1 LB 0xa1 mov cl, al ; 88 c1 mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 e4 20 + call 02f93h ; e8 57 21 mov bx, ax ; 89 c3 mov AL, strict byte 00ah ; b0 0a mov dx, bx ; 89 da @@ -1984,59 +2011,63 @@ biosfn_set_cursor_shape_: ; 0xc0da1 LB 0xa1 mov al, cl ; 88 c8 mov dx, si ; 89 f2 out DX, AL ; ee - pop bp ; 5d + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_set_cursor_pos_: ; 0xc0e42 LB 0x9e +biosfn_set_cursor_pos_: ; 0xc0e5e LB 0xa2 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 - enter 00004h, 000h ; c8 04 00 00 - mov byte [bp-002h], al ; 88 46 fe + push ax ; 50 + push ax ; 50 + mov byte [bp-008h], al ; 88 46 f8 mov cx, dx ; 89 d1 cmp AL, strict byte 007h ; 3c 07 - jnbe near 00edbh ; 0f 87 87 00 + jnbe near 00ef8h ; 0f 87 87 00 movzx dx, al ; 0f b6 d0 add dx, dx ; 01 d2 add dx, strict byte 00050h ; 83 c2 50 mov bx, cx ; 89 cb mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 b1 20 + call 02fa1h ; e8 20 21 mov dx, strict word 00062h ; ba 62 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 7e 20 - cmp al, byte [bp-002h] ; 3a 46 fe - jne short 00edbh ; 75 69 + call 02f77h ; e8 ed 20 + cmp al, byte [bp-008h] ; 3a 46 f8 + jne short 00ef8h ; 75 69 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 8c 20 + call 02f93h ; e8 fb 20 mov bx, ax ; 89 c3 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 65 20 + call 02f77h ; e8 d4 20 xor ah, ah ; 30 e4 mov dx, ax ; 89 c2 inc dx ; 42 mov al, cl ; 88 c8 xor cl, cl ; 30 c9 shr cx, 008h ; c1 e9 08 - mov byte [bp-004h], cl ; 88 4e fc + mov byte [bp-00ah], cl ; 88 4e f6 imul dx, bx ; 0f af d3 or dl, 0ffh ; 80 ca ff - movzx cx, byte [bp-002h] ; 0f b6 4e fe + movzx cx, byte [bp-008h] ; 0f b6 4e f8 inc dx ; 42 imul dx, cx ; 0f af d1 mov si, ax ; 89 c6 add si, dx ; 01 d6 - movzx dx, byte [bp-004h] ; 0f b6 56 fc + movzx dx, byte [bp-00ah] ; 0f b6 56 f6 imul bx, dx ; 0f af da add si, bx ; 01 de mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 4e 20 + call 02f93h ; e8 bd 20 mov bx, ax ; 89 c3 mov AL, strict byte 00eh ; b0 0e mov dx, bx ; 89 da @@ -2054,45 +2085,49 @@ biosfn_set_cursor_pos_: ; 0xc0e42 LB 0x9e mov ax, si ; 89 f0 mov dx, cx ; 89 ca out DX, AL ; ee - leave ; c9 + lea sp, [bp-006h] ; 8d 66 fa pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_set_active_page_: ; 0xc0ee0 LB 0xd8 +biosfn_set_active_page_: ; 0xc0f00 LB 0xdc + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push dx ; 52 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 + push ax ; 50 + push ax ; 50 mov cl, al ; 88 c1 cmp AL, strict byte 007h ; 3c 07 - jnbe near 00fb1h ; 0f 87 c0 00 + jnbe near 00fd2h ; 0f 87 c0 00 mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 f1 1f + call 02f77h ; e8 5c 20 xor ah, ah ; 30 e4 - call 02ec4h ; e8 c5 1f + call 02f50h ; e8 30 20 mov ch, al ; 88 c5 cmp AL, strict byte 0ffh ; 3c ff - je near 00fb1h ; 0f 84 aa 00 + je near 00fd2h ; 0f 84 aa 00 movzx ax, cl ; 0f b6 c1 - lea bx, [bp-004h] ; 8d 5e fc - lea dx, [bp-002h] ; 8d 56 fe - call 00a83h ; e8 70 fb + lea bx, [bp-00eh] ; 8d 5e f2 + lea dx, [bp-00ch] ; 8d 56 f4 + call 00a88h ; e8 54 fb movzx bx, ch ; 0f b6 dd mov si, bx ; 89 de sal si, 003h ; c1 e6 03 - cmp byte [si+0482fh], 000h ; 80 bc 2f 48 00 - jne short 00f62h ; 75 40 + cmp byte [si+04830h], 000h ; 80 bc 30 48 00 + jne short 00f83h ; 75 40 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 dc 1f + call 02f93h ; e8 47 20 mov bx, ax ; 89 c3 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 b5 1f + call 02f77h ; e8 20 20 xor ah, ah ; 30 e4 inc ax ; 40 mov si, bx ; 89 de @@ -2106,19 +2141,19 @@ biosfn_set_active_page_: ; 0xc0ee0 LB 0xd8 imul bx, di ; 0f af df mov dx, strict word 0004eh ; ba 4e 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 bf 1f + call 02fa1h ; e8 2a 20 or si, 000ffh ; 81 ce ff 00 lea bx, [si+001h] ; 8d 5c 01 imul bx, di ; 0f af df - jmp short 00f74h ; eb 12 - movzx bx, byte [bx+048aeh] ; 0f b6 9f ae 48 + jmp short 00f95h ; eb 12 + movzx bx, byte [bx+048afh] ; 0f b6 9f af 48 sal bx, 006h ; c1 e3 06 movzx ax, cl ; 0f b6 c1 - mov bx, word [bx+048c5h] ; 8b 9f c5 48 + mov bx, word [bx+048c6h] ; 8b 9f c6 48 imul bx, ax ; 0f af d8 mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 8a 1f + call 02f93h ; e8 f5 1f mov si, ax ; 89 c6 mov AL, strict byte 00ch ; b0 0c mov dx, si ; 89 f2 @@ -2139,93 +2174,96 @@ biosfn_set_active_page_: ; 0xc0ee0 LB 0xd8 mov bx, si ; 89 f3 mov dx, strict word 00062h ; ba 62 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 50 1f - mov dx, word [bp-004h] ; 8b 56 fc + call 02f85h ; e8 bb 1f + mov dx, word [bp-00eh] ; 8b 56 f2 mov ax, si ; 89 f0 - call 00e42h ; e8 91 fe - leave ; c9 + call 00e5eh ; e8 8c fe + lea sp, [bp-00ah] ; 8d 66 f6 pop di ; 5f pop si ; 5e pop dx ; 5a pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_set_video_mode_: ; 0xc0fb8 LB 0x382 +biosfn_set_video_mode_: ; 0xc0fdc LB 0x387 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push dx ; 52 push si ; 56 push di ; 57 - enter 00010h, 000h ; c8 10 00 00 - mov byte [bp-004h], al ; 88 46 fc + sub sp, strict byte 00010h ; 83 ec 10 + mov byte [bp-00eh], al ; 88 46 f2 and AL, strict byte 080h ; 24 80 - mov byte [bp-006h], al ; 88 46 fa - call 007a4h ; e8 d8 f7 + mov byte [bp-010h], al ; 88 46 f0 + call 007a4h ; e8 b2 f7 test ax, ax ; 85 c0 - je short 00fdch ; 74 0c + je short 01002h ; 74 0c mov AL, strict byte 007h ; b0 07 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee xor al, al ; 30 c0 mov dx, 003c5h ; ba c5 03 out DX, AL ; ee - and byte [bp-004h], 07fh ; 80 66 fc 7f - movzx ax, byte [bp-004h] ; 0f b6 46 fc - call 02ec4h ; e8 dd 1e - mov byte [bp-008h], al ; 88 46 f8 + and byte [bp-00eh], 07fh ; 80 66 f2 7f + movzx ax, byte [bp-00eh] ; 0f b6 46 f2 + call 02f50h ; e8 43 1f + mov byte [bp-012h], al ; 88 46 ee cmp AL, strict byte 0ffh ; 3c ff - je near 01333h ; 0f 84 43 03 + je near 01359h ; 0f 84 43 03 movzx si, al ; 0f b6 f0 - mov al, byte [si+048aeh] ; 8a 84 ae 48 - mov byte [bp-002h], al ; 88 46 fe + mov al, byte [si+048afh] ; 8a 84 af 48 + mov byte [bp-00ch], al ; 88 46 f4 movzx bx, al ; 0f b6 d8 sal bx, 006h ; c1 e3 06 - movzx ax, byte [bx+048c2h] ; 0f b6 87 c2 48 - mov word [bp-00eh], ax ; 89 46 f2 movzx ax, byte [bx+048c3h] ; 0f b6 87 c3 48 - mov word [bp-00ch], ax ; 89 46 f4 + mov word [bp-018h], ax ; 89 46 e8 movzx ax, byte [bx+048c4h] ; 0f b6 87 c4 48 - mov word [bp-00ah], ax ; 89 46 f6 + mov word [bp-016h], ax ; 89 46 ea + movzx ax, byte [bx+048c5h] ; 0f b6 87 c5 48 + mov word [bp-014h], ax ; 89 46 ec mov dx, 00087h ; ba 87 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 ca 1e + call 02f77h ; e8 30 1f mov dx, 00088h ; ba 88 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 c1 1e + call 02f77h ; e8 27 1f mov dx, 00089h ; ba 89 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 b8 1e + call 02f77h ; e8 1e 1f mov ah, al ; 88 c4 test AL, strict byte 008h ; a8 08 - jne near 010c5h ; 0f 85 8a 00 + jne near 010ebh ; 0f 85 8a 00 mov bx, si ; 89 f3 sal bx, 003h ; c1 e3 03 - mov al, byte [bx+04834h] ; 8a 87 34 48 + mov al, byte [bx+04835h] ; 8a 87 35 48 mov dx, 003c6h ; ba c6 03 out DX, AL ; ee xor al, al ; 30 c0 mov dx, 003c8h ; ba c8 03 out DX, AL ; ee - mov bl, byte [bx+04835h] ; 8a 9f 35 48 + mov bl, byte [bx+04836h] ; 8a 9f 36 48 cmp bl, 001h ; 80 fb 01 - jc short 01065h ; 72 0e - jbe short 0106eh ; 76 15 + jc short 0108bh ; 72 0e + jbe short 01094h ; 76 15 cmp bl, 003h ; 80 fb 03 - je short 01078h ; 74 1a + je short 0109eh ; 74 1a cmp bl, 002h ; 80 fb 02 - je short 01073h ; 74 10 - jmp short 0107bh ; eb 16 + je short 01099h ; 74 10 + jmp short 010a1h ; eb 16 test bl, bl ; 84 db - jne short 0107bh ; 75 12 - mov di, 05042h ; bf 42 50 - jmp short 0107bh ; eb 0d - mov di, 05102h ; bf 02 51 - jmp short 0107bh ; eb 08 - mov di, 051c2h ; bf c2 51 - jmp short 0107bh ; eb 03 - mov di, 05282h ; bf 82 52 + jne short 010a1h ; 75 12 + mov di, 05043h ; bf 43 50 + jmp short 010a1h ; eb 0d + mov di, 05103h ; bf 03 51 + jmp short 010a1h ; eb 08 + mov di, 051c3h ; bf c3 51 + jmp short 010a1h ; eb 03 + mov di, 05283h ; bf 83 52 xor bx, bx ; 31 db - jmp short 0108eh ; eb 0f + jmp short 010b4h ; eb 0f xor al, al ; 30 c0 mov dx, 003c9h ; ba c9 03 out DX, AL ; ee @@ -2233,13 +2271,13 @@ biosfn_set_video_mode_: ; 0xc0fb8 LB 0x382 out DX, AL ; ee inc bx ; 43 cmp bx, 00100h ; 81 fb 00 01 - jnc short 010b8h ; 73 2a - movzx si, byte [bp-008h] ; 0f b6 76 f8 + jnc short 010deh ; 73 2a + movzx si, byte [bp-012h] ; 0f b6 76 ee sal si, 003h ; c1 e6 03 - movzx si, byte [si+04835h] ; 0f b6 b4 35 48 - movzx dx, byte [si+048beh] ; 0f b6 94 be 48 + movzx si, byte [si+04836h] ; 0f b6 b4 36 48 + movzx dx, byte [si+048bfh] ; 0f b6 94 bf 48 cmp bx, dx ; 39 d3 - jnbe short 0107fh ; 77 dc + jnbe short 010a5h ; 77 dc imul si, bx, strict byte 00003h ; 6b f3 03 add si, di ; 01 fe mov al, byte [si] ; 8a 04 @@ -2249,30 +2287,30 @@ biosfn_set_video_mode_: ; 0xc0fb8 LB 0x382 out DX, AL ; ee mov al, byte [si+002h] ; 8a 44 02 out DX, AL ; ee - jmp short 01087h ; eb cf + jmp short 010adh ; eb cf test ah, 002h ; f6 c4 02 - je short 010c5h ; 74 08 + je short 010ebh ; 74 08 mov dx, 00100h ; ba 00 01 xor ax, ax ; 31 c0 - call 00d19h ; e8 54 fc + call 00d2eh ; e8 43 fc mov dx, 003dah ; ba da 03 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 xor bx, bx ; 31 db - jmp short 010d4h ; eb 05 + jmp short 010fah ; eb 05 cmp bx, strict byte 00013h ; 83 fb 13 - jnbe short 010ebh ; 77 17 + jnbe short 01111h ; 77 17 mov al, bl ; 88 d8 mov dx, 003c0h ; ba c0 03 out DX, AL ; ee - movzx si, byte [bp-002h] ; 0f b6 76 fe + movzx si, byte [bp-00ch] ; 0f b6 76 f4 sal si, 006h ; c1 e6 06 add si, bx ; 01 de - mov al, byte [si+048e5h] ; 8a 84 e5 48 + mov al, byte [si+048e6h] ; 8a 84 e6 48 out DX, AL ; ee inc bx ; 43 - jmp short 010cfh ; eb e4 + jmp short 010f5h ; eb e4 mov AL, strict byte 014h ; b0 14 mov dx, 003c0h ; ba c0 03 out DX, AL ; ee @@ -2284,63 +2322,63 @@ biosfn_set_video_mode_: ; 0xc0fb8 LB 0x382 mov dx, 003c5h ; ba c5 03 out DX, AL ; ee mov bx, strict word 00001h ; bb 01 00 - jmp short 01108h ; eb 05 + jmp short 0112eh ; eb 05 cmp bx, strict byte 00004h ; 83 fb 04 - jnbe short 01122h ; 77 1a + jnbe short 01148h ; 77 1a mov al, bl ; 88 d8 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee - movzx si, byte [bp-002h] ; 0f b6 76 fe + movzx si, byte [bp-00ch] ; 0f b6 76 f4 sal si, 006h ; c1 e6 06 add si, bx ; 01 de - mov al, byte [si+048c6h] ; 8a 84 c6 48 + mov al, byte [si+048c7h] ; 8a 84 c7 48 mov dx, 003c5h ; ba c5 03 out DX, AL ; ee inc bx ; 43 - jmp short 01103h ; eb e1 + jmp short 01129h ; eb e1 xor bx, bx ; 31 db - jmp short 0112bh ; eb 05 + jmp short 01151h ; eb 05 cmp bx, strict byte 00008h ; 83 fb 08 - jnbe short 01145h ; 77 1a + jnbe short 0116bh ; 77 1a mov al, bl ; 88 d8 mov dx, 003ceh ; ba ce 03 out DX, AL ; ee - movzx si, byte [bp-002h] ; 0f b6 76 fe + movzx si, byte [bp-00ch] ; 0f b6 76 f4 sal si, 006h ; c1 e6 06 add si, bx ; 01 de - mov al, byte [si+048f9h] ; 8a 84 f9 48 + mov al, byte [si+048fah] ; 8a 84 fa 48 mov dx, 003cfh ; ba cf 03 out DX, AL ; ee inc bx ; 43 - jmp short 01126h ; eb e1 - movzx bx, byte [bp-008h] ; 0f b6 5e f8 + jmp short 0114ch ; eb e1 + movzx bx, byte [bp-012h] ; 0f b6 5e ee sal bx, 003h ; c1 e3 03 - cmp byte [bx+04830h], 001h ; 80 bf 30 48 01 - jne short 01158h ; 75 05 + cmp byte [bx+04831h], 001h ; 80 bf 31 48 01 + jne short 0117eh ; 75 05 mov dx, 003b4h ; ba b4 03 - jmp short 0115bh ; eb 03 + jmp short 01181h ; eb 03 mov dx, 003d4h ; ba d4 03 mov si, dx ; 89 d6 mov ax, strict word 00011h ; b8 11 00 out DX, ax ; ef xor bx, bx ; 31 db - jmp short 0116ah ; eb 05 + jmp short 01190h ; eb 05 cmp bx, strict byte 00018h ; 83 fb 18 - jnbe short 01185h ; 77 1b + jnbe short 011abh ; 77 1b mov al, bl ; 88 d8 mov dx, si ; 89 f2 out DX, AL ; ee - movzx cx, byte [bp-002h] ; 0f b6 4e fe + movzx cx, byte [bp-00ch] ; 0f b6 4e f4 sal cx, 006h ; c1 e1 06 mov di, cx ; 89 cf add di, bx ; 01 df lea dx, [si+001h] ; 8d 54 01 - mov al, byte [di+048cch] ; 8a 85 cc 48 + mov al, byte [di+048cdh] ; 8a 85 cd 48 out DX, AL ; ee inc bx ; 43 - jmp short 01165h ; eb e0 + jmp short 0118bh ; eb e0 mov bx, cx ; 89 cb - mov al, byte [bx+048cbh] ; 8a 87 cb 48 + mov al, byte [bx+048cch] ; 8a 87 cc 48 mov dx, 003c2h ; ba c2 03 out DX, AL ; ee mov AL, strict byte 020h ; b0 20 @@ -2350,30 +2388,30 @@ biosfn_set_video_mode_: ; 0xc0fb8 LB 0x382 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - cmp byte [bp-006h], 000h ; 80 7e fa 00 - jne short 01200h ; 75 5f - movzx bx, byte [bp-008h] ; 0f b6 5e f8 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 01226h ; 75 5f + movzx bx, byte [bp-012h] ; 0f b6 5e ee sal bx, 003h ; c1 e3 03 - cmp byte [bx+0482fh], 000h ; 80 bf 2f 48 00 - jne short 011c2h ; 75 13 - mov es, [bx+04832h] ; 8e 87 32 48 + cmp byte [bx+04830h], 000h ; 80 bf 30 48 00 + jne short 011e8h ; 75 13 + mov es, [bx+04833h] ; 8e 87 33 48 mov cx, 04000h ; b9 00 40 mov ax, 00720h ; b8 20 07 xor di, di ; 31 ff cld ; fc - jcxz 011c0h ; e3 02 + jcxz 011e6h ; e3 02 rep stosw ; f3 ab - jmp short 01200h ; eb 3e - cmp byte [bp-004h], 00dh ; 80 7e fc 0d - jnc short 011dah ; 73 12 - mov es, [bx+04832h] ; 8e 87 32 48 + jmp short 01226h ; eb 3e + cmp byte [bp-00eh], 00dh ; 80 7e f2 0d + jnc short 01200h ; 73 12 + mov es, [bx+04833h] ; 8e 87 33 48 mov cx, 04000h ; b9 00 40 xor ax, ax ; 31 c0 xor di, di ; 31 ff cld ; fc - jcxz 011d8h ; e3 02 + jcxz 011feh ; e3 02 rep stosw ; f3 ab - jmp short 01200h ; eb 26 + jmp short 01226h ; eb 26 mov AL, strict byte 002h ; b0 02 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee @@ -2381,101 +2419,101 @@ biosfn_set_video_mode_: ; 0xc0fb8 LB 0x382 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - mov word [bp-010h], ax ; 89 46 f0 + mov word [bp-01ah], ax ; 89 46 e6 mov AL, strict byte 00fh ; b0 0f out DX, AL ; ee - mov es, [bx+04832h] ; 8e 87 32 48 + mov es, [bx+04833h] ; 8e 87 33 48 mov cx, 08000h ; b9 00 80 xor ax, ax ; 31 c0 xor di, di ; 31 ff cld ; fc - jcxz 011fch ; e3 02 + jcxz 01222h ; e3 02 rep stosw ; f3 ab - mov al, byte [bp-010h] ; 8a 46 f0 + mov al, byte [bp-01ah] ; 8a 46 e6 out DX, AL ; ee - movzx bx, byte [bp-004h] ; 0f b6 5e fc + movzx bx, byte [bp-00eh] ; 0f b6 5e f2 mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 ec 1c - mov bx, word [bp-00eh] ; 8b 5e f2 + call 02f85h ; e8 52 1d + mov bx, word [bp-018h] ; 8b 5e e8 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 fc 1c - movzx bx, byte [bp-002h] ; 0f b6 5e fe + call 02fa1h ; e8 62 1d + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 sal bx, 006h ; c1 e3 06 - mov bx, word [bx+048c5h] ; 8b 9f c5 48 + mov bx, word [bx+048c6h] ; 8b 9f c6 48 mov dx, strict word 0004ch ; ba 4c 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 e8 1c + call 02fa1h ; e8 4e 1d mov bx, si ; 89 f3 mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 dd 1c - movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + call 02fa1h ; e8 43 1d + movzx bx, byte [bp-016h] ; 0f b6 5e ea mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 b4 1c - mov bx, word [bp-00ah] ; 8b 5e f6 + call 02f85h ; e8 1a 1d + mov bx, word [bp-014h] ; 8b 5e ec mov dx, 00085h ; ba 85 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 c4 1c - mov al, byte [bp-006h] ; 8a 46 fa + call 02fa1h ; e8 2a 1d + mov al, byte [bp-010h] ; 8a 46 f0 or AL, strict byte 060h ; 0c 60 movzx bx, al ; 0f b6 d8 mov dx, 00087h ; ba 87 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 97 1c + call 02f85h ; e8 fd 1c mov bx, 000f9h ; bb f9 00 mov dx, 00088h ; ba 88 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 8b 1c + call 02f85h ; e8 f1 1c mov dx, 00089h ; ba 89 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 74 1c + call 02f77h ; e8 da 1c and AL, strict byte 07fh ; 24 7f movzx bx, al ; 0f b6 d8 mov dx, 00089h ; ba 89 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 74 1c + call 02f85h ; e8 da 1c mov bx, strict word 00008h ; bb 08 00 mov dx, 0008ah ; ba 8a 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 68 1c + call 02f85h ; e8 ce 1c mov cx, ds ; 8c d9 - mov bx, 05592h ; bb 92 55 + mov bx, 05593h ; bb 93 55 mov dx, 000a8h ; ba a8 00 mov ax, strict word 00040h ; b8 40 00 - call 02f35h ; e8 96 1c + call 02fc1h ; e8 fc 1c xor bx, bx ; 31 db mov dx, strict word 00065h ; ba 65 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 4f 1c + call 02f85h ; e8 b5 1c xor bx, bx ; 31 db mov dx, strict word 00066h ; ba 66 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 44 1c - movzx bx, byte [bp-008h] ; 0f b6 5e f8 + call 02f85h ; e8 aa 1c + movzx bx, byte [bp-012h] ; 0f b6 5e ee sal bx, 003h ; c1 e3 03 - cmp byte [bx+0482fh], 000h ; 80 bf 2f 48 00 - jne short 012cch ; 75 09 + cmp byte [bx+04830h], 000h ; 80 bf 30 48 00 + jne short 012f2h ; 75 09 mov dx, strict word 00007h ; ba 07 00 mov ax, strict word 00006h ; b8 06 00 - call 00da1h ; e8 d5 fa + call 00dbah ; e8 c8 fa xor bx, bx ; 31 db - jmp short 012d5h ; eb 05 + jmp short 012fbh ; eb 05 cmp bx, strict byte 00008h ; 83 fb 08 - jnc short 012e0h ; 73 0b + jnc short 01306h ; 73 0b movzx ax, bl ; 0f b6 c3 xor dx, dx ; 31 d2 - call 00e42h ; e8 65 fb + call 00e5eh ; e8 5b fb inc bx ; 43 - jmp short 012d0h ; eb f0 + jmp short 012f6h ; eb f0 xor ax, ax ; 31 c0 - call 00ee0h ; e8 fb fb - movzx bx, byte [bp-008h] ; 0f b6 5e f8 + call 00f00h ; e8 f5 fb + movzx bx, byte [bp-012h] ; 0f b6 5e ee sal bx, 003h ; c1 e3 03 - cmp byte [bx+0482fh], 000h ; 80 bf 2f 48 00 - jne short 01303h ; 75 10 + cmp byte [bx+04830h], 000h ; 80 bf 30 48 00 + jne short 01329h ; 75 10 xor bl, bl ; 30 db mov AL, strict byte 004h ; b0 04 mov AH, strict byte 011h ; b4 11 @@ -2484,197 +2522,213 @@ biosfn_set_video_mode_: ; 0xc0fb8 LB 0x382 mov AL, strict byte 003h ; b0 03 mov AH, strict byte 011h ; b4 11 int 010h ; cd 10 - mov dx, 059aeh ; ba ae 59 + mov dx, 059afh ; ba af 59 mov ax, strict word 0001fh ; b8 1f 00 - call 00a00h ; e8 f4 f6 - mov ax, word [bp-00ah] ; 8b 46 f6 + call 00a00h ; e8 ce f6 + mov ax, word [bp-014h] ; 8b 46 ec cmp ax, strict word 00010h ; 3d 10 00 - je short 0132eh ; 74 1a + je short 01354h ; 74 1a cmp ax, strict word 0000eh ; 3d 0e 00 - je short 01329h ; 74 10 + je short 0134fh ; 74 10 cmp ax, strict word 00008h ; 3d 08 00 - jne short 01333h ; 75 15 - mov dx, 055aeh ; ba ae 55 + jne short 01359h ; 75 15 + mov dx, 055afh ; ba af 55 mov ax, strict word 00043h ; b8 43 00 - call 00a00h ; e8 d9 f6 - jmp short 01333h ; eb 0a - mov dx, 05daeh ; ba ae 5d - jmp short 01321h ; eb f3 - mov dx, 06baeh ; ba ae 6b - jmp short 01321h ; eb ee - leave ; c9 + call 00a00h ; e8 b3 f6 + jmp short 01359h ; eb 0a + mov dx, 05dafh ; ba af 5d + jmp short 01347h ; eb f3 + mov dx, 06bafh ; ba af 6b + jmp short 01347h ; eb ee + lea sp, [bp-00ah] ; 8d 66 f6 pop di ; 5f pop si ; 5e pop dx ; 5a pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -vgamem_copy_pl4_: ; 0xc133a LB 0x72 +vgamem_copy_pl4_: ; 0xc1363 LB 0x76 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 + push ax ; 50 + push ax ; 50 mov bh, cl ; 88 cf movzx di, dl ; 0f b6 fa - movzx cx, byte [bp+00ah] ; 0f b6 4e 0a + movzx cx, byte [bp+006h] ; 0f b6 4e 06 imul di, cx ; 0f af f9 - movzx si, byte [bp+008h] ; 0f b6 76 08 + movzx si, byte [bp+004h] ; 0f b6 76 04 imul di, si ; 0f af fe xor ah, ah ; 30 e4 add di, ax ; 01 c7 - mov word [bp-004h], di ; 89 7e fc + mov word [bp-008h], di ; 89 7e f8 movzx di, bl ; 0f b6 fb imul cx, di ; 0f af cf imul cx, si ; 0f af ce add cx, ax ; 01 c1 - mov word [bp-002h], cx ; 89 4e fe + mov word [bp-006h], cx ; 89 4e fa mov ax, 00105h ; b8 05 01 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef xor bl, bl ; 30 db - cmp bl, byte [bp+00ah] ; 3a 5e 0a - jnc short 0139fh ; 73 29 + cmp bl, byte [bp+006h] ; 3a 5e 06 + jnc short 013c9h ; 73 29 movzx cx, bh ; 0f b6 cf movzx si, bl ; 0f b6 f3 - movzx ax, byte [bp+008h] ; 0f b6 46 08 + movzx ax, byte [bp+004h] ; 0f b6 46 04 imul ax, si ; 0f af c6 - mov si, word [bp-004h] ; 8b 76 fc + mov si, word [bp-008h] ; 8b 76 f8 add si, ax ; 01 c6 - mov di, word [bp-002h] ; 8b 7e fe + mov di, word [bp-006h] ; 8b 7e fa add di, ax ; 01 c7 mov dx, 0a000h ; ba 00 a0 mov es, dx ; 8e c2 cld ; fc - jcxz 0139bh ; e3 06 + jcxz 013c5h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f db 0feh, 0c3h ; inc bl ; fe c3 - jmp short 01371h ; eb d2 + jmp short 0139bh ; eb d2 mov ax, strict word 00005h ; b8 05 00 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef - leave ; c9 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00004h ; c2 04 00 -vgamem_fill_pl4_: ; 0xc13ac LB 0x5d +vgamem_fill_pl4_: ; 0xc13d9 LB 0x61 + push bp ; 55 + mov bp, sp ; 89 e5 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 - mov byte [bp-002h], bl ; 88 5e fe + push ax ; 50 + push ax ; 50 + mov byte [bp-004h], bl ; 88 5e fc mov bh, cl ; 88 cf movzx cx, dl ; 0f b6 ca - movzx dx, byte [bp+006h] ; 0f b6 56 06 + movzx dx, byte [bp+004h] ; 0f b6 56 04 imul cx, dx ; 0f af ca movzx dx, bh ; 0f b6 d7 imul dx, cx ; 0f af d1 xor ah, ah ; 30 e4 add dx, ax ; 01 c2 - mov word [bp-004h], dx ; 89 56 fc + mov word [bp-006h], dx ; 89 56 fa mov ax, 00205h ; b8 05 02 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef xor bl, bl ; 30 db - cmp bl, byte [bp+006h] ; 3a 5e 06 - jnc short 013fdh ; 73 22 - movzx cx, byte [bp-002h] ; 0f b6 4e fe - movzx ax, byte [bp+008h] ; 0f b6 46 08 + cmp bl, byte [bp+004h] ; 3a 5e 04 + jnc short 0142bh ; 73 22 + movzx cx, byte [bp-004h] ; 0f b6 4e fc + movzx ax, byte [bp+006h] ; 0f b6 46 06 movzx dx, bl ; 0f b6 d3 movzx di, bh ; 0f b6 ff imul di, dx ; 0f af fa - add di, word [bp-004h] ; 03 7e fc + add di, word [bp-006h] ; 03 7e fa mov dx, 0a000h ; ba 00 a0 mov es, dx ; 8e c2 cld ; fc - jcxz 013f9h ; e3 02 + jcxz 01427h ; e3 02 rep stosb ; f3 aa db 0feh, 0c3h ; inc bl ; fe c3 - jmp short 013d6h ; eb d9 + jmp short 01404h ; eb d9 mov ax, strict word 00005h ; b8 05 00 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef - leave ; c9 + lea sp, [bp-002h] ; 8d 66 fe pop di ; 5f + pop bp ; 5d retn 00004h ; c2 04 00 -vgamem_copy_cga_: ; 0xc1409 LB 0xa0 +vgamem_copy_cga_: ; 0xc143a LB 0xa4 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 + push ax ; 50 + push ax ; 50 mov bh, cl ; 88 cf movzx di, dl ; 0f b6 fa - movzx cx, byte [bp+00ah] ; 0f b6 4e 0a + movzx cx, byte [bp+006h] ; 0f b6 4e 06 imul di, cx ; 0f af f9 - movzx si, byte [bp+008h] ; 0f b6 76 08 + movzx si, byte [bp+004h] ; 0f b6 76 04 imul di, si ; 0f af fe sar di, 1 ; d1 ff xor ah, ah ; 30 e4 add di, ax ; 01 c7 - mov word [bp-002h], di ; 89 7e fe + mov word [bp-006h], di ; 89 7e fa movzx di, bl ; 0f b6 fb imul cx, di ; 0f af cf imul si, cx ; 0f af f1 sar si, 1 ; d1 fe add si, ax ; 01 c6 - mov word [bp-004h], si ; 89 76 fc + mov word [bp-008h], si ; 89 76 f8 xor bl, bl ; 30 db - cmp bl, byte [bp+00ah] ; 3a 5e 0a - jnc short 014a3h ; 73 61 + cmp bl, byte [bp+006h] ; 3a 5e 06 + jnc short 014d5h ; 73 61 test bl, 001h ; f6 c3 01 - je short 01478h ; 74 31 + je short 014aah ; 74 31 movzx cx, bh ; 0f b6 cf movzx si, bl ; 0f b6 f3 sar si, 1 ; d1 fe - movzx ax, byte [bp+008h] ; 0f b6 46 08 + movzx ax, byte [bp+004h] ; 0f b6 46 04 imul ax, si ; 0f af c6 - mov si, word [bp-002h] ; 8b 76 fe + mov si, word [bp-006h] ; 8b 76 fa add si, 02000h ; 81 c6 00 20 add si, ax ; 01 c6 - mov di, word [bp-004h] ; 8b 7e fc + mov di, word [bp-008h] ; 8b 7e f8 add di, 02000h ; 81 c7 00 20 add di, ax ; 01 c7 mov dx, 0b800h ; ba 00 b8 mov es, dx ; 8e c2 cld ; fc - jcxz 01476h ; e3 06 + jcxz 014a8h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f - jmp short 0149fh ; eb 27 + jmp short 014d1h ; eb 27 movzx cx, bh ; 0f b6 cf movzx ax, bl ; 0f b6 c3 sar ax, 1 ; d1 f8 - movzx si, byte [bp+008h] ; 0f b6 76 08 + movzx si, byte [bp+004h] ; 0f b6 76 04 imul ax, si ; 0f af c6 - mov si, word [bp-002h] ; 8b 76 fe + mov si, word [bp-006h] ; 8b 76 fa add si, ax ; 01 c6 - mov di, word [bp-004h] ; 8b 7e fc + mov di, word [bp-008h] ; 8b 7e f8 add di, ax ; 01 c7 mov dx, 0b800h ; ba 00 b8 mov es, dx ; 8e c2 cld ; fc - jcxz 0149fh ; e3 06 + jcxz 014d1h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f db 0feh, 0c3h ; inc bl ; fe c3 - jmp short 0143dh ; eb 9a - leave ; c9 + jmp short 0146fh ; eb 9a + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00004h ; c2 04 00 -vgamem_fill_cga_: ; 0xc14a9 LB 0x86 +vgamem_fill_cga_: ; 0xc14de LB 0x8a + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 - mov byte [bp-002h], bl ; 88 5e fe + push ax ; 50 + push ax ; 50 + mov byte [bp-006h], bl ; 88 5e fa mov bh, cl ; 88 cf movzx cx, dl ; 0f b6 ca - movzx dx, byte [bp+008h] ; 0f b6 56 08 + movzx dx, byte [bp+004h] ; 0f b6 56 04 imul dx, cx ; 0f af d1 movzx cx, bh ; 0f b6 cf imul dx, cx ; 0f af d1 @@ -2682,29 +2736,29 @@ vgamem_fill_cga_: ; 0xc14a9 LB 0x86 movzx si, al ; 0f b6 f0 add si, dx ; 01 d6 xor bl, bl ; 30 db - cmp bl, byte [bp+008h] ; 3a 5e 08 - jnc short 01529h ; 73 57 + cmp bl, byte [bp+004h] ; 3a 5e 04 + jnc short 0155fh ; 73 57 test bl, 001h ; f6 c3 01 - je short 01506h ; 74 2f - movzx cx, byte [bp-002h] ; 0f b6 4e fe - movzx ax, byte [bp+00ah] ; 0f b6 46 0a + je short 0153ch ; 74 2f + movzx cx, byte [bp-006h] ; 0f b6 4e fa + movzx ax, byte [bp+006h] ; 0f b6 46 06 movzx dx, bl ; 0f b6 d3 sar dx, 1 ; d1 fa - mov word [bp-004h], dx ; 89 56 fc + mov word [bp-008h], dx ; 89 56 f8 movzx dx, bh ; 0f b6 d7 - mov di, word [bp-004h] ; 8b 7e fc + mov di, word [bp-008h] ; 8b 7e f8 imul di, dx ; 0f af fa - mov word [bp-004h], di ; 89 7e fc + mov word [bp-008h], di ; 89 7e f8 lea di, [si+02000h] ; 8d bc 00 20 - add di, word [bp-004h] ; 03 7e fc + add di, word [bp-008h] ; 03 7e f8 mov dx, 0b800h ; ba 00 b8 mov es, dx ; 8e c2 cld ; fc - jcxz 01504h ; e3 02 + jcxz 0153ah ; e3 02 rep stosb ; f3 aa - jmp short 01525h ; eb 1f - movzx cx, byte [bp-002h] ; 0f b6 4e fe - movzx ax, byte [bp+00ah] ; 0f b6 46 0a + jmp short 0155bh ; eb 1f + movzx cx, byte [bp-006h] ; 0f b6 4e fa + movzx ax, byte [bp+006h] ; 0f b6 46 06 movzx di, bl ; 0f b6 fb sar di, 1 ; d1 ff movzx dx, bh ; 0f b6 d7 @@ -2713,217 +2767,220 @@ vgamem_fill_cga_: ; 0xc14a9 LB 0x86 mov dx, 0b800h ; ba 00 b8 mov es, dx ; 8e c2 cld ; fc - jcxz 01525h ; e3 02 + jcxz 0155bh ; e3 02 rep stosb ; f3 aa db 0feh, 0c3h ; inc bl ; fe c3 - jmp short 014cdh ; eb a4 - leave ; c9 + jmp short 01503h ; eb a4 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00004h ; c2 04 00 -biosfn_scroll_: ; 0xc152f LB 0x501 +biosfn_scroll_: ; 0xc1568 LB 0x506 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00018h, 000h ; c8 18 00 00 - mov byte [bp-00ch], al ; 88 46 f4 - mov byte [bp-008h], dl ; 88 56 f8 - mov byte [bp-004h], bl ; 88 5e fc - mov byte [bp-002h], cl ; 88 4e fe - cmp bl, byte [bp+008h] ; 3a 5e 08 - jnbe near 01a2ah ; 0f 87 e2 04 - cmp cl, byte [bp+00ah] ; 3a 4e 0a - jnbe near 01a2ah ; 0f 87 db 04 + sub sp, strict byte 00018h ; 83 ec 18 + mov byte [bp-010h], al ; 88 46 f0 + mov byte [bp-00ch], dl ; 88 56 f4 + mov byte [bp-008h], bl ; 88 5e f8 + mov byte [bp-006h], cl ; 88 4e fa + cmp bl, byte [bp+004h] ; 3a 5e 04 + jnbe near 01a65h ; 0f 87 e2 04 + cmp cl, byte [bp+006h] ; 3a 4e 06 + jnbe near 01a65h ; 0f 87 db 04 mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 93 19 + call 02f77h ; e8 e4 19 xor ah, ah ; 30 e4 - call 02ec4h ; e8 67 19 - mov byte [bp-00ah], al ; 88 46 f6 + call 02f50h ; e8 b8 19 + mov byte [bp-00eh], al ; 88 46 f2 cmp AL, strict byte 0ffh ; 3c ff - je near 01a2ah ; 0f 84 c4 04 + je near 01a65h ; 0f 84 c4 04 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 7c 19 + call 02f77h ; e8 cd 19 movzx cx, al ; 0f b6 c8 inc cx ; 41 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 8b 19 - mov word [bp-012h], ax ; 89 46 ee - cmp byte [bp+00ch], 0ffh ; 80 7e 0c ff - jne short 01591h ; 75 0c + call 02f93h ; e8 dc 19 + mov word [bp-016h], ax ; 89 46 ea + cmp byte [bp+008h], 0ffh ; 80 7e 08 ff + jne short 015cch ; 75 0c mov dx, strict word 00062h ; ba 62 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 5d 19 - mov byte [bp+00ch], al ; 88 46 0c - movzx ax, byte [bp+008h] ; 0f b6 46 08 + call 02f77h ; e8 ae 19 + mov byte [bp+008h], al ; 88 46 08 + movzx ax, byte [bp+004h] ; 0f b6 46 04 cmp ax, cx ; 39 c8 - jc short 015a0h ; 72 07 + jc short 015dbh ; 72 07 mov al, cl ; 88 c8 db 0feh, 0c8h ; dec al ; fe c8 - mov byte [bp+008h], al ; 88 46 08 - movzx ax, byte [bp+00ah] ; 0f b6 46 0a - cmp ax, word [bp-012h] ; 3b 46 ee - jc short 015b1h ; 72 08 - mov al, byte [bp-012h] ; 8a 46 ee + mov byte [bp+004h], al ; 88 46 04 + movzx ax, byte [bp+006h] ; 0f b6 46 06 + cmp ax, word [bp-016h] ; 3b 46 ea + jc short 015ech ; 72 08 + mov al, byte [bp-016h] ; 8a 46 ea db 0feh, 0c8h ; dec al ; fe c8 - mov byte [bp+00ah], al ; 88 46 0a - movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + mov byte [bp+006h], al ; 88 46 06 + movzx ax, byte [bp-010h] ; 0f b6 46 f0 cmp ax, cx ; 39 c8 - jbe short 015bdh ; 76 04 - mov byte [bp-00ch], 000h ; c6 46 f4 00 - mov al, byte [bp+00ah] ; 8a 46 0a - sub al, byte [bp-002h] ; 2a 46 fe + jbe short 015f8h ; 76 04 + mov byte [bp-010h], 000h ; c6 46 f0 00 + mov al, byte [bp+006h] ; 8a 46 06 + sub al, byte [bp-006h] ; 2a 46 fa db 0feh, 0c0h ; inc al ; fe c0 - mov byte [bp-00eh], al ; 88 46 f2 - movzx si, byte [bp-00ah] ; 0f b6 76 f6 + mov byte [bp-012h], al ; 88 46 ee + movzx si, byte [bp-00eh] ; 0f b6 76 f2 mov di, si ; 89 f7 sal di, 003h ; c1 e7 03 - mov ax, word [bp-012h] ; 8b 46 ee + mov ax, word [bp-016h] ; 8b 46 ea dec ax ; 48 - mov word [bp-014h], ax ; 89 46 ec + mov word [bp-018h], ax ; 89 46 e8 mov ax, cx ; 89 c8 dec ax ; 48 - mov word [bp-016h], ax ; 89 46 ea - mov ax, word [bp-012h] ; 8b 46 ee + mov word [bp-01ah], ax ; 89 46 e6 + mov ax, word [bp-016h] ; 8b 46 ea imul ax, cx ; 0f af c1 - cmp byte [di+0482fh], 000h ; 80 bd 2f 48 00 - jne near 0178ch ; 0f 85 9f 01 + cmp byte [di+04830h], 000h ; 80 bd 30 48 00 + jne near 017c7h ; 0f 85 9f 01 mov dx, ax ; 89 c2 add dx, ax ; 01 c2 or dl, 0ffh ; 80 ca ff - movzx bx, byte [bp+00ch] ; 0f b6 5e 0c + movzx bx, byte [bp+008h] ; 0f b6 5e 08 inc dx ; 42 imul bx, dx ; 0f af da - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 0163ch ; 75 3a - cmp byte [bp-004h], 000h ; 80 7e fc 00 - jne short 0163ch ; 75 34 - cmp byte [bp-002h], 000h ; 80 7e fe 00 - jne short 0163ch ; 75 2e - movzx dx, byte [bp+008h] ; 0f b6 56 08 - cmp dx, word [bp-016h] ; 3b 56 ea - jne short 0163ch ; 75 25 - movzx dx, byte [bp+00ah] ; 0f b6 56 0a - cmp dx, word [bp-014h] ; 3b 56 ec - jne short 0163ch ; 75 1c - movzx dx, byte [bp-008h] ; 0f b6 56 f8 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 01677h ; 75 3a + cmp byte [bp-008h], 000h ; 80 7e f8 00 + jne short 01677h ; 75 34 + cmp byte [bp-006h], 000h ; 80 7e fa 00 + jne short 01677h ; 75 2e + movzx dx, byte [bp+004h] ; 0f b6 56 04 + cmp dx, word [bp-01ah] ; 3b 56 e6 + jne short 01677h ; 75 25 + movzx dx, byte [bp+006h] ; 0f b6 56 06 + cmp dx, word [bp-018h] ; 3b 56 e8 + jne short 01677h ; 75 1c + movzx dx, byte [bp-00ch] ; 0f b6 56 f4 sal dx, 008h ; c1 e2 08 add dx, strict byte 00020h ; 83 c2 20 - mov es, [di+04832h] ; 8e 85 32 48 + mov es, [di+04833h] ; 8e 85 33 48 mov cx, ax ; 89 c1 mov ax, dx ; 89 d0 mov di, bx ; 89 df cld ; fc - jcxz 01639h ; e3 02 + jcxz 01674h ; e3 02 rep stosw ; f3 ab - jmp near 01a2ah ; e9 ee 03 - cmp byte [bp+00eh], 001h ; 80 7e 0e 01 - jne near 016e1h ; 0f 85 9d 00 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - mov word [bp-010h], ax ; 89 46 f0 - movzx dx, byte [bp+008h] ; 0f b6 56 08 - cmp dx, word [bp-010h] ; 3b 56 f0 - jc near 01a2ah ; 0f 82 d4 03 - movzx ax, byte [bp-00ch] ; 0f b6 46 f4 - add ax, word [bp-010h] ; 03 46 f0 - cmp ax, dx ; 39 d0 - jnbe short 01667h ; 77 06 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 0169ah ; 75 33 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 + jmp near 01a65h ; e9 ee 03 + cmp byte [bp+00ah], 001h ; 80 7e 0a 01 + jne near 0171ch ; 0f 85 9d 00 movzx ax, byte [bp-008h] ; 0f b6 46 f8 + mov word [bp-014h], ax ; 89 46 ec + movzx dx, byte [bp+004h] ; 0f b6 56 04 + cmp dx, word [bp-014h] ; 3b 56 ec + jc near 01a65h ; 0f 82 d4 03 + movzx ax, byte [bp-010h] ; 0f b6 46 f0 + add ax, word [bp-014h] ; 03 46 ec + cmp ax, dx ; 39 d0 + jnbe short 016a2h ; 77 06 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 016d5h ; 75 33 + movzx cx, byte [bp-012h] ; 0f b6 4e ee + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 sal ax, 008h ; c1 e0 08 add ax, strict word 00020h ; 05 20 00 - mov si, word [bp-010h] ; 8b 76 f0 - imul si, word [bp-012h] ; 0f af 76 ee - movzx dx, byte [bp-002h] ; 0f b6 56 fe + mov si, word [bp-014h] ; 8b 76 ec + imul si, word [bp-016h] ; 0f af 76 ea + movzx dx, byte [bp-006h] ; 0f b6 56 fa add dx, si ; 01 f2 add dx, dx ; 01 d2 mov di, bx ; 89 df add di, dx ; 01 d7 - movzx si, byte [bp-00ah] ; 0f b6 76 f6 + movzx si, byte [bp-00eh] ; 0f b6 76 f2 sal si, 003h ; c1 e6 03 - mov es, [si+04832h] ; 8e 84 32 48 + mov es, [si+04833h] ; 8e 84 33 48 cld ; fc - jcxz 01698h ; e3 02 + jcxz 016d3h ; e3 02 rep stosw ; f3 ab - jmp short 016dbh ; eb 41 - movzx dx, byte [bp-00eh] ; 0f b6 56 f2 - mov word [bp-018h], dx ; 89 56 e8 + jmp short 01716h ; eb 41 + movzx dx, byte [bp-012h] ; 0f b6 56 ee + mov word [bp-01ch], dx ; 89 56 e4 mov dx, ax ; 89 c2 - imul dx, word [bp-012h] ; 0f af 56 ee - movzx cx, byte [bp-002h] ; 0f b6 4e fe + imul dx, word [bp-016h] ; 0f af 56 ea + movzx cx, byte [bp-006h] ; 0f b6 4e fa add dx, cx ; 01 ca add dx, dx ; 01 d2 - movzx si, byte [bp-00ah] ; 0f b6 76 f6 + movzx si, byte [bp-00eh] ; 0f b6 76 f2 sal si, 003h ; c1 e6 03 - mov ax, word [si+04832h] ; 8b 84 32 48 - mov si, word [bp-010h] ; 8b 76 f0 - imul si, word [bp-012h] ; 0f af 76 ee + mov ax, word [si+04833h] ; 8b 84 33 48 + mov si, word [bp-014h] ; 8b 76 ec + imul si, word [bp-016h] ; 0f af 76 ea add cx, si ; 01 f1 add cx, cx ; 01 c9 mov di, bx ; 89 df add di, cx ; 01 cf - mov cx, word [bp-018h] ; 8b 4e e8 + mov cx, word [bp-01ch] ; 8b 4e e4 mov si, dx ; 89 d6 mov dx, ax ; 89 c2 mov es, ax ; 8e c0 cld ; fc - jcxz 016dbh ; e3 06 + jcxz 01716h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsw ; f3 a5 pop DS ; 1f - inc word [bp-010h] ; ff 46 f0 - jmp near 0164bh ; e9 6a ff - movzx ax, byte [bp+008h] ; 0f b6 46 08 - mov word [bp-010h], ax ; 89 46 f0 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - cmp ax, word [bp-010h] ; 3b 46 f0 - jnbe near 01a2ah ; 0f 87 37 03 - movzx dx, byte [bp-004h] ; 0f b6 56 fc - movzx ax, byte [bp-00ch] ; 0f b6 46 f4 - add ax, dx ; 01 d0 - cmp ax, word [bp-010h] ; 3b 46 f0 - jnbe short 01708h ; 77 06 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 0173bh ; 75 33 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 + inc word [bp-014h] ; ff 46 ec + jmp near 01686h ; e9 6a ff + movzx ax, byte [bp+004h] ; 0f b6 46 04 + mov word [bp-014h], ax ; 89 46 ec movzx ax, byte [bp-008h] ; 0f b6 46 f8 + cmp ax, word [bp-014h] ; 3b 46 ec + jnbe near 01a65h ; 0f 87 37 03 + movzx dx, byte [bp-008h] ; 0f b6 56 f8 + movzx ax, byte [bp-010h] ; 0f b6 46 f0 + add ax, dx ; 01 d0 + cmp ax, word [bp-014h] ; 3b 46 ec + jnbe short 01743h ; 77 06 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 01776h ; 75 33 + movzx cx, byte [bp-012h] ; 0f b6 4e ee + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 sal ax, 008h ; c1 e0 08 add ax, strict word 00020h ; 05 20 00 - mov si, word [bp-010h] ; 8b 76 f0 - imul si, word [bp-012h] ; 0f af 76 ee - movzx dx, byte [bp-002h] ; 0f b6 56 fe + mov si, word [bp-014h] ; 8b 76 ec + imul si, word [bp-016h] ; 0f af 76 ea + movzx dx, byte [bp-006h] ; 0f b6 56 fa add dx, si ; 01 f2 add dx, dx ; 01 d2 mov di, bx ; 89 df add di, dx ; 01 d7 - movzx si, byte [bp-00ah] ; 0f b6 76 f6 + movzx si, byte [bp-00eh] ; 0f b6 76 f2 sal si, 003h ; c1 e6 03 - mov es, [si+04832h] ; 8e 84 32 48 + mov es, [si+04833h] ; 8e 84 33 48 cld ; fc - jcxz 01739h ; e3 02 + jcxz 01774h ; e3 02 rep stosw ; f3 ab - jmp short 0177bh ; eb 40 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 - movzx ax, byte [bp-00ch] ; 0f b6 46 f4 - mov dx, word [bp-010h] ; 8b 56 f0 + jmp short 017b6h ; eb 40 + movzx cx, byte [bp-012h] ; 0f b6 4e ee + movzx ax, byte [bp-010h] ; 0f b6 46 f0 + mov dx, word [bp-014h] ; 8b 56 ec sub dx, ax ; 29 c2 - imul dx, word [bp-012h] ; 0f af 56 ee - movzx di, byte [bp-002h] ; 0f b6 7e fe + imul dx, word [bp-016h] ; 0f af 56 ea + movzx di, byte [bp-006h] ; 0f b6 7e fa add dx, di ; 01 fa add dx, dx ; 01 d2 - movzx si, byte [bp-00ah] ; 0f b6 76 f6 + movzx si, byte [bp-00eh] ; 0f b6 76 f2 sal si, 003h ; c1 e6 03 - mov ax, word [si+04832h] ; 8b 84 32 48 - mov si, word [bp-010h] ; 8b 76 f0 - imul si, word [bp-012h] ; 0f af 76 ee + mov ax, word [si+04833h] ; 8b 84 33 48 + mov si, word [bp-014h] ; 8b 76 ec + imul si, word [bp-016h] ; 0f af 76 ea add di, si ; 01 f7 add di, di ; 01 ff add di, bx ; 01 df @@ -2931,324 +2988,327 @@ biosfn_scroll_: ; 0xc152f LB 0x501 mov dx, ax ; 89 c2 mov es, ax ; 8e c0 cld ; fc - jcxz 0177bh ; e3 06 + jcxz 017b6h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsw ; f3 a5 pop DS ; 1f - movzx ax, byte [bp+008h] ; 0f b6 46 08 - cmp ax, word [bp-010h] ; 3b 46 f0 - jc near 01a2ah ; 0f 82 a4 02 - dec word [bp-010h] ; ff 4e f0 - jmp near 016e8h ; e9 5c ff - movzx bx, byte [si+048aeh] ; 0f b6 9c ae 48 + movzx ax, byte [bp+004h] ; 0f b6 46 04 + cmp ax, word [bp-014h] ; 3b 46 ec + jc near 01a65h ; 0f 82 a4 02 + dec word [bp-014h] ; ff 4e ec + jmp near 01723h ; e9 5c ff + movzx bx, byte [si+048afh] ; 0f b6 9c af 48 sal bx, 006h ; c1 e3 06 - mov dl, byte [bx+048c4h] ; 8a 97 c4 48 - mov byte [bp-006h], dl ; 88 56 fa - mov bl, byte [di+04830h] ; 8a 9d 30 48 + mov dl, byte [bx+048c5h] ; 8a 97 c5 48 + mov byte [bp-00ah], dl ; 88 56 f6 + mov bl, byte [di+04831h] ; 8a 9d 31 48 cmp bl, 004h ; 80 fb 04 - je short 017b3h ; 74 0f + je short 017eeh ; 74 0f cmp bl, 003h ; 80 fb 03 - je short 017b3h ; 74 0a + je short 017eeh ; 74 0a cmp bl, 002h ; 80 fb 02 - je near 018f2h ; 0f 84 42 01 - jmp near 01a2ah ; e9 77 02 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 0180bh ; 75 52 - cmp byte [bp-004h], 000h ; 80 7e fc 00 - jne short 0180bh ; 75 4c - cmp byte [bp-002h], 000h ; 80 7e fe 00 - jne short 0180bh ; 75 46 - movzx dx, byte [bp+008h] ; 0f b6 56 08 + je near 0192dh ; 0f 84 42 01 + jmp near 01a65h ; e9 77 02 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 01846h ; 75 52 + cmp byte [bp-008h], 000h ; 80 7e f8 00 + jne short 01846h ; 75 4c + cmp byte [bp-006h], 000h ; 80 7e fa 00 + jne short 01846h ; 75 46 + movzx dx, byte [bp+004h] ; 0f b6 56 04 mov ax, cx ; 89 c8 dec ax ; 48 cmp dx, ax ; 39 c2 - jne short 0180bh ; 75 3b - movzx dx, byte [bp+00ah] ; 0f b6 56 0a - mov ax, word [bp-012h] ; 8b 46 ee + jne short 01846h ; 75 3b + movzx dx, byte [bp+006h] ; 0f b6 56 06 + mov ax, word [bp-016h] ; 8b 46 ea dec ax ; 48 cmp dx, ax ; 39 c2 - jne short 0180bh ; 75 2f + jne short 01846h ; 75 2f mov ax, 00205h ; b8 05 02 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef - imul cx, word [bp-012h] ; 0f af 4e ee - movzx ax, byte [bp-006h] ; 0f b6 46 fa + imul cx, word [bp-016h] ; 0f af 4e ea + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 imul cx, ax ; 0f af c8 - movzx ax, byte [bp-008h] ; 0f b6 46 f8 - movzx bx, byte [bp-00ah] ; 0f b6 5e f6 + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + movzx bx, byte [bp-00eh] ; 0f b6 5e f2 sal bx, 003h ; c1 e3 03 - mov es, [bx+04832h] ; 8e 87 32 48 + mov es, [bx+04833h] ; 8e 87 33 48 xor di, di ; 31 ff cld ; fc - jcxz 01804h ; e3 02 + jcxz 0183fh ; e3 02 rep stosb ; f3 aa mov ax, strict word 00005h ; b8 05 00 out DX, ax ; ef - jmp near 01a2ah ; e9 1f 02 - cmp byte [bp+00eh], 001h ; 80 7e 0e 01 - jne short 0187ah ; 75 69 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - mov word [bp-010h], ax ; 89 46 f0 - movzx ax, byte [bp+008h] ; 0f b6 46 08 - cmp ax, word [bp-010h] ; 3b 46 f0 - jc near 01a2ah ; 0f 82 07 02 - movzx dx, byte [bp-00ch] ; 0f b6 56 f4 - add dx, word [bp-010h] ; 03 56 f0 - cmp dx, ax ; 39 c2 - jnbe short 01834h ; 77 06 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 01853h ; 75 1f + jmp near 01a65h ; e9 1f 02 + cmp byte [bp+00ah], 001h ; 80 7e 0a 01 + jne short 018b5h ; 75 69 movzx ax, byte [bp-008h] ; 0f b6 46 f8 + mov word [bp-014h], ax ; 89 46 ec + movzx ax, byte [bp+004h] ; 0f b6 46 04 + cmp ax, word [bp-014h] ; 3b 46 ec + jc near 01a65h ; 0f 82 07 02 + movzx dx, byte [bp-010h] ; 0f b6 56 f0 + add dx, word [bp-014h] ; 03 56 ec + cmp dx, ax ; 39 c2 + jnbe short 0186fh ; 77 06 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 0188eh ; 75 1f + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 push ax ; 50 - movzx ax, byte [bp-006h] ; 0f b6 46 fa + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx cx, byte [bp-012h] ; 0f b6 4e ee - movzx bx, byte [bp-00eh] ; 0f b6 5e f2 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 013ach ; e8 5b fb - jmp short 01875h ; eb 22 + movzx cx, byte [bp-016h] ; 0f b6 4e ea + movzx bx, byte [bp-012h] ; 0f b6 5e ee + movzx dx, byte [bp-014h] ; 0f b6 56 ec movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 013d9h ; e8 4d fb + jmp short 018b0h ; eb 22 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 - movzx bx, byte [bp-010h] ; 0f b6 5e f0 - mov al, byte [bp-010h] ; 8a 46 f0 - add al, byte [bp-00ch] ; 02 46 f4 + movzx cx, byte [bp-012h] ; 0f b6 4e ee + movzx bx, byte [bp-014h] ; 0f b6 5e ec + mov al, byte [bp-014h] ; 8a 46 ec + add al, byte [bp-010h] ; 02 46 f0 movzx dx, al ; 0f b6 d0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 0133ah ; e8 c5 fa - inc word [bp-010h] ; ff 46 f0 - jmp short 01818h ; eb 9e - movzx ax, byte [bp+008h] ; 0f b6 46 08 - mov word [bp-010h], ax ; 89 46 f0 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - cmp ax, word [bp-010h] ; 3b 46 f0 - jnbe near 01a2ah ; 0f 87 9e 01 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - movzx dx, byte [bp-00ch] ; 0f b6 56 f4 - add ax, dx ; 01 d0 - cmp ax, word [bp-010h] ; 3b 46 f0 - jnbe short 018a1h ; 77 06 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 018c0h ; 75 1f + movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 01363h ; e8 b3 fa + inc word [bp-014h] ; ff 46 ec + jmp short 01853h ; eb 9e + movzx ax, byte [bp+004h] ; 0f b6 46 04 + mov word [bp-014h], ax ; 89 46 ec movzx ax, byte [bp-008h] ; 0f b6 46 f8 + cmp ax, word [bp-014h] ; 3b 46 ec + jnbe near 01a65h ; 0f 87 9e 01 + movzx ax, byte [bp-008h] ; 0f b6 46 f8 + movzx dx, byte [bp-010h] ; 0f b6 56 f0 + add ax, dx ; 01 d0 + cmp ax, word [bp-014h] ; 3b 46 ec + jnbe short 018dch ; 77 06 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 018fbh ; 75 1f + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 push ax ; 50 - movzx ax, byte [bp-006h] ; 0f b6 46 fa + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx cx, byte [bp-012h] ; 0f b6 4e ee - movzx bx, byte [bp-00eh] ; 0f b6 5e f2 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 013ach ; e8 ee fa - jmp short 018e2h ; eb 22 + movzx cx, byte [bp-016h] ; 0f b6 4e ea + movzx bx, byte [bp-012h] ; 0f b6 5e ee + movzx dx, byte [bp-014h] ; 0f b6 56 ec movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 013d9h ; e8 e0 fa + jmp short 0191dh ; eb 22 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 - mov al, byte [bp-010h] ; 8a 46 f0 - sub al, byte [bp-00ch] ; 2a 46 f4 + movzx cx, byte [bp-012h] ; 0f b6 4e ee + mov al, byte [bp-014h] ; 8a 46 ec + sub al, byte [bp-010h] ; 2a 46 f0 movzx bx, al ; 0f b6 d8 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 0133ah ; e8 58 fa - movzx ax, byte [bp+008h] ; 0f b6 46 08 - cmp ax, word [bp-010h] ; 3b 46 f0 - jc near 01a2ah ; 0f 82 3d 01 - dec word [bp-010h] ; ff 4e f0 - jmp short 01881h ; eb 8f - mov dl, byte [di+04831h] ; 8a 95 31 48 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 01939h ; 75 3d - cmp byte [bp-004h], 000h ; 80 7e fc 00 - jne short 01939h ; 75 37 - cmp byte [bp-002h], 000h ; 80 7e fe 00 - jne short 01939h ; 75 31 - movzx bx, byte [bp+008h] ; 0f b6 5e 08 - cmp bx, word [bp-016h] ; 3b 5e ea - jne short 01939h ; 75 28 - movzx bx, byte [bp+00ah] ; 0f b6 5e 0a - cmp bx, word [bp-014h] ; 3b 5e ec - jne short 01939h ; 75 1f - movzx bx, byte [bp-006h] ; 0f b6 5e fa + movzx dx, byte [bp-014h] ; 0f b6 56 ec + movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 01363h ; e8 46 fa + movzx ax, byte [bp+004h] ; 0f b6 46 04 + cmp ax, word [bp-014h] ; 3b 46 ec + jc near 01a65h ; 0f 82 3d 01 + dec word [bp-014h] ; ff 4e ec + jmp short 018bch ; eb 8f + mov dl, byte [di+04832h] ; 8a 95 32 48 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 01974h ; 75 3d + cmp byte [bp-008h], 000h ; 80 7e f8 00 + jne short 01974h ; 75 37 + cmp byte [bp-006h], 000h ; 80 7e fa 00 + jne short 01974h ; 75 31 + movzx bx, byte [bp+004h] ; 0f b6 5e 04 + cmp bx, word [bp-01ah] ; 3b 5e e6 + jne short 01974h ; 75 28 + movzx bx, byte [bp+006h] ; 0f b6 5e 06 + cmp bx, word [bp-018h] ; 3b 5e e8 + jne short 01974h ; 75 1f + movzx bx, byte [bp-00ah] ; 0f b6 5e f6 imul ax, bx ; 0f af c3 movzx cx, dl ; 0f b6 ca imul cx, ax ; 0f af c8 - movzx ax, byte [bp-008h] ; 0f b6 46 f8 - mov es, [di+04832h] ; 8e 85 32 48 + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + mov es, [di+04833h] ; 8e 85 33 48 xor di, di ; 31 ff cld ; fc - jcxz 01936h ; e3 02 + jcxz 01971h ; e3 02 rep stosb ; f3 aa - jmp near 01a2ah ; e9 f1 00 + jmp near 01a65h ; e9 f1 00 cmp dl, 002h ; 80 fa 02 - jne short 01947h ; 75 09 - sal byte [bp-002h], 1 ; d0 66 fe - sal byte [bp-00eh], 1 ; d0 66 f2 - sal word [bp-012h], 1 ; d1 66 ee - cmp byte [bp+00eh], 001h ; 80 7e 0e 01 - jne short 019b6h ; 75 69 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - mov word [bp-010h], ax ; 89 46 f0 - movzx ax, byte [bp+008h] ; 0f b6 46 08 - cmp ax, word [bp-010h] ; 3b 46 f0 - jc near 01a2ah ; 0f 82 cb 00 - movzx dx, byte [bp-00ch] ; 0f b6 56 f4 - add dx, word [bp-010h] ; 03 56 f0 - cmp dx, ax ; 39 c2 - jnbe short 01970h ; 77 06 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 0198fh ; 75 1f + jne short 01982h ; 75 09 + sal byte [bp-006h], 1 ; d0 66 fa + sal byte [bp-012h], 1 ; d0 66 ee + sal word [bp-016h], 1 ; d1 66 ea + cmp byte [bp+00ah], 001h ; 80 7e 0a 01 + jne short 019f1h ; 75 69 movzx ax, byte [bp-008h] ; 0f b6 46 f8 + mov word [bp-014h], ax ; 89 46 ec + movzx ax, byte [bp+004h] ; 0f b6 46 04 + cmp ax, word [bp-014h] ; 3b 46 ec + jc near 01a65h ; 0f 82 cb 00 + movzx dx, byte [bp-010h] ; 0f b6 56 f0 + add dx, word [bp-014h] ; 03 56 ec + cmp dx, ax ; 39 c2 + jnbe short 019abh ; 77 06 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 019cah ; 75 1f + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 push ax ; 50 - movzx ax, byte [bp-006h] ; 0f b6 46 fa + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx cx, byte [bp-012h] ; 0f b6 4e ee - movzx bx, byte [bp-00eh] ; 0f b6 5e f2 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 014a9h ; e8 1c fb - jmp short 019b1h ; eb 22 + movzx cx, byte [bp-016h] ; 0f b6 4e ea + movzx bx, byte [bp-012h] ; 0f b6 5e ee + movzx dx, byte [bp-014h] ; 0f b6 56 ec movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 014deh ; e8 16 fb + jmp short 019ech ; eb 22 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 - movzx bx, byte [bp-010h] ; 0f b6 5e f0 - mov al, byte [bp-010h] ; 8a 46 f0 - add al, byte [bp-00ch] ; 02 46 f4 + movzx cx, byte [bp-012h] ; 0f b6 4e ee + movzx bx, byte [bp-014h] ; 0f b6 5e ec + mov al, byte [bp-014h] ; 8a 46 ec + add al, byte [bp-010h] ; 02 46 f0 movzx dx, al ; 0f b6 d0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 01409h ; e8 58 fa - inc word [bp-010h] ; ff 46 f0 - jmp short 01954h ; eb 9e - movzx ax, byte [bp+008h] ; 0f b6 46 08 - mov word [bp-010h], ax ; 89 46 f0 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - cmp ax, word [bp-010h] ; 3b 46 f0 - jnbe short 01a2ah ; 77 64 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - movzx dx, byte [bp-00ch] ; 0f b6 56 f4 - add ax, dx ; 01 d0 - cmp ax, word [bp-010h] ; 3b 46 f0 - jnbe short 019dbh ; 77 06 - cmp byte [bp-00ch], 000h ; 80 7e f4 00 - jne short 019fah ; 75 1f + movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 0143ah ; e8 4e fa + inc word [bp-014h] ; ff 46 ec + jmp short 0198fh ; eb 9e + movzx ax, byte [bp+004h] ; 0f b6 46 04 + mov word [bp-014h], ax ; 89 46 ec movzx ax, byte [bp-008h] ; 0f b6 46 f8 + cmp ax, word [bp-014h] ; 3b 46 ec + jnbe short 01a65h ; 77 64 + movzx ax, byte [bp-008h] ; 0f b6 46 f8 + movzx dx, byte [bp-010h] ; 0f b6 56 f0 + add ax, dx ; 01 d0 + cmp ax, word [bp-014h] ; 3b 46 ec + jnbe short 01a16h ; 77 06 + cmp byte [bp-010h], 000h ; 80 7e f0 00 + jne short 01a35h ; 75 1f + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 push ax ; 50 - movzx ax, byte [bp-006h] ; 0f b6 46 fa + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx cx, byte [bp-012h] ; 0f b6 4e ee - movzx bx, byte [bp-00eh] ; 0f b6 5e f2 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 014a9h ; e8 b1 fa - jmp short 01a1ch ; eb 22 + movzx cx, byte [bp-016h] ; 0f b6 4e ea + movzx bx, byte [bp-012h] ; 0f b6 5e ee + movzx dx, byte [bp-014h] ; 0f b6 56 ec movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 014deh ; e8 ab fa + jmp short 01a57h ; eb 22 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 push ax ; 50 - movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 - mov al, byte [bp-010h] ; 8a 46 f0 - sub al, byte [bp-00ch] ; 2a 46 f4 + movzx cx, byte [bp-012h] ; 0f b6 4e ee + mov al, byte [bp-014h] ; 8a 46 ec + sub al, byte [bp-010h] ; 2a 46 f0 movzx bx, al ; 0f b6 d8 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 01409h ; e8 ed f9 - movzx ax, byte [bp+008h] ; 0f b6 46 08 - cmp ax, word [bp-010h] ; 3b 46 f0 - jc short 01a2ah ; 72 05 - dec word [bp-010h] ; ff 4e f0 - jmp short 019bdh ; eb 93 - leave ; c9 + movzx dx, byte [bp-014h] ; 0f b6 56 ec + movzx ax, byte [bp-006h] ; 0f b6 46 fa + call 0143ah ; e8 e3 f9 + movzx ax, byte [bp+004h] ; 0f b6 46 04 + cmp ax, word [bp-014h] ; 3b 46 ec + jc short 01a65h ; 72 05 + dec word [bp-014h] ; ff 4e ec + jmp short 019f8h ; eb 93 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00008h ; c2 08 00 -write_gfx_char_pl4_: ; 0xc1a30 LB 0xe6 +write_gfx_char_pl4_: ; 0xc1a6e LB 0xeb + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 0000ah, 000h ; c8 0a 00 00 - mov byte [bp-002h], dl ; 88 56 fe + sub sp, strict byte 0000ah ; 83 ec 0a + mov byte [bp-006h], dl ; 88 56 fa mov ah, bl ; 88 dc - cmp byte [bp+00ah], 010h ; 80 7e 0a 10 - je short 01a4ch ; 74 0b - cmp byte [bp+00ah], 00eh ; 80 7e 0a 0e - jne short 01a51h ; 75 0a - mov di, 05daeh ; bf ae 5d - jmp short 01a54h ; eb 08 - mov di, 06baeh ; bf ae 6b - jmp short 01a54h ; eb 03 - mov di, 055aeh ; bf ae 55 + cmp byte [bp+006h], 010h ; 80 7e 06 10 + je short 01a8ch ; 74 0b + cmp byte [bp+006h], 00eh ; 80 7e 06 0e + jne short 01a91h ; 75 0a + mov di, 05dafh ; bf af 5d + jmp short 01a94h ; eb 08 + mov di, 06bafh ; bf af 6b + jmp short 01a94h ; eb 03 + mov di, 055afh ; bf af 55 movzx si, cl ; 0f b6 f1 - movzx bx, byte [bp+00ah] ; 0f b6 5e 0a + movzx bx, byte [bp+006h] ; 0f b6 5e 06 imul si, bx ; 0f af f3 - movzx cx, byte [bp+008h] ; 0f b6 4e 08 + movzx cx, byte [bp+004h] ; 0f b6 4e 04 imul cx, si ; 0f af ce movzx si, ah ; 0f b6 f4 add si, cx ; 01 ce - mov word [bp-00ah], si ; 89 76 f6 + mov word [bp-00eh], si ; 89 76 f2 xor ah, ah ; 30 e4 imul ax, bx ; 0f af c3 - mov word [bp-006h], ax ; 89 46 fa + mov word [bp-00ah], ax ; 89 46 f6 mov ax, 00f02h ; b8 02 0f mov dx, 003c4h ; ba c4 03 out DX, ax ; ef mov ax, 00205h ; b8 05 02 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef - test byte [bp-002h], 080h ; f6 46 fe 80 - je short 01a8fh ; 74 06 + test byte [bp-006h], 080h ; f6 46 fa 80 + je short 01acfh ; 74 06 mov ax, 01803h ; b8 03 18 out DX, ax ; ef - jmp short 01a93h ; eb 04 + jmp short 01ad3h ; eb 04 mov ax, strict word 00003h ; b8 03 00 out DX, ax ; ef xor ch, ch ; 30 ed - cmp ch, byte [bp+00ah] ; 3a 6e 0a - jnc short 01b01h ; 73 67 + cmp ch, byte [bp+006h] ; 3a 6e 06 + jnc short 01b41h ; 73 67 movzx si, ch ; 0f b6 f5 - movzx ax, byte [bp+008h] ; 0f b6 46 08 + movzx ax, byte [bp+004h] ; 0f b6 46 04 imul si, ax ; 0f af f0 - add si, word [bp-00ah] ; 03 76 f6 - mov byte [bp-004h], 000h ; c6 46 fc 00 - jmp short 01ac0h ; eb 13 + add si, word [bp-00eh] ; 03 76 f2 + mov byte [bp-008h], 000h ; c6 46 f8 00 + jmp short 01b00h ; eb 13 xor bx, bx ; 31 db mov dx, si ; 89 f2 mov ax, 0a000h ; b8 00 a0 - call 02ef9h ; e8 42 14 - inc byte [bp-004h] ; fe 46 fc - cmp byte [bp-004h], 008h ; 80 7e fc 08 - jnc short 01afdh ; 73 3d - movzx ax, byte [bp-004h] ; 0f b6 46 fc + call 02f85h ; e8 8e 14 + inc byte [bp-008h] ; fe 46 f8 + cmp byte [bp-008h], 008h ; 80 7e f8 08 + jnc short 01b3dh ; 73 3d + movzx ax, byte [bp-008h] ; 0f b6 46 f8 mov cl, al ; 88 c1 mov ax, 00080h ; b8 80 00 sar ax, CL ; d3 f8 xor ah, ah ; 30 e4 - mov word [bp-008h], ax ; 89 46 f8 + mov word [bp-00ch], ax ; 89 46 f4 sal ax, 008h ; c1 e0 08 or AL, strict byte 008h ; 0c 08 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef mov dx, si ; 89 f2 mov ax, 0a000h ; b8 00 a0 - call 02eebh ; e8 0a 14 + call 02f77h ; e8 56 14 movzx ax, ch ; 0f b6 c5 - add ax, word [bp-006h] ; 03 46 fa + add ax, word [bp-00ah] ; 03 46 f6 mov bx, di ; 89 fb add bx, ax ; 01 c3 movzx ax, byte [bx] ; 0f b6 07 - test word [bp-008h], ax ; 85 46 f8 - je short 01aadh ; 74 ba - mov al, byte [bp-002h] ; 8a 46 fe + test word [bp-00ch], ax ; 85 46 f4 + je short 01aedh ; 74 ba + mov al, byte [bp-006h] ; 8a 46 fa and AL, strict byte 00fh ; 24 0f movzx bx, al ; 0f b6 d8 - jmp short 01aafh ; eb b2 + jmp short 01aefh ; eb b2 db 0feh, 0c5h ; inc ch ; fe c5 - jmp short 01a95h ; eb 94 + jmp short 01ad5h ; eb 94 mov ax, 0ff08h ; b8 08 ff mov dx, 003ceh ; ba ce 03 out DX, ax ; ef @@ -3256,476 +3316,487 @@ write_gfx_char_pl4_: ; 0xc1a30 LB 0xe6 out DX, ax ; ef mov ax, strict word 00003h ; b8 03 00 out DX, ax ; ef - leave ; c9 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00004h ; c2 04 00 -write_gfx_char_cga_: ; 0xc1b16 LB 0x119 +write_gfx_char_cga_: ; 0xc1b59 LB 0x11e + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00008h, 000h ; c8 08 00 00 - mov byte [bp-004h], dl ; 88 56 fc - mov si, 055aeh ; be ae 55 + sub sp, strict byte 00008h ; 83 ec 08 + mov byte [bp-008h], dl ; 88 56 f8 + mov si, 055afh ; be af 55 xor bh, bh ; 30 ff - movzx di, byte [bp+00ah] ; 0f b6 7e 0a + movzx di, byte [bp+006h] ; 0f b6 7e 06 imul di, bx ; 0f af fb movzx bx, cl ; 0f b6 d9 imul bx, bx, 00140h ; 69 db 40 01 add di, bx ; 01 df - mov word [bp-008h], di ; 89 7e f8 + mov word [bp-00ch], di ; 89 7e f4 movzx di, al ; 0f b6 f8 sal di, 003h ; c1 e7 03 - mov byte [bp-002h], 000h ; c6 46 fe 00 - jmp near 01b94h ; e9 50 00 + mov byte [bp-006h], 000h ; c6 46 fa 00 + jmp near 01bd9h ; e9 50 00 xor al, al ; 30 c0 xor ah, ah ; 30 e4 - jmp short 01b55h ; eb 0b + jmp short 01b9ah ; eb 0b or al, bl ; 08 d8 shr ch, 1 ; d0 ed db 0feh, 0c4h ; inc ah ; fe c4 cmp ah, 008h ; 80 fc 08 - jnc short 01b7dh ; 73 28 - movzx bx, byte [bp-002h] ; 0f b6 5e fe + jnc short 01bc2h ; 73 28 + movzx bx, byte [bp-006h] ; 0f b6 5e fa add bx, di ; 01 fb add bx, si ; 01 f3 movzx bx, byte [bx] ; 0f b6 1f movzx dx, ch ; 0f b6 d5 test bx, dx ; 85 d3 - je short 01b4ch ; 74 e5 + je short 01b91h ; 74 e5 mov CL, strict byte 007h ; b1 07 sub cl, ah ; 28 e1 - mov bl, byte [bp-004h] ; 8a 5e fc + mov bl, byte [bp-008h] ; 8a 5e f8 and bl, 001h ; 80 e3 01 sal bl, CL ; d2 e3 - test byte [bp-004h], 080h ; f6 46 fc 80 - je short 01b4ah ; 74 d1 + test byte [bp-008h], 080h ; f6 46 f8 80 + je short 01b8fh ; 74 d1 xor al, bl ; 30 d8 - jmp short 01b4ch ; eb cf + jmp short 01b91h ; eb cf movzx bx, al ; 0f b6 d8 - mov dx, word [bp-006h] ; 8b 56 fa + mov dx, word [bp-00ah] ; 8b 56 f6 mov ax, 0b800h ; b8 00 b8 - call 02ef9h ; e8 70 13 - inc byte [bp-002h] ; fe 46 fe - cmp byte [bp-002h], 008h ; 80 7e fe 08 - jnc near 01c29h ; 0f 83 95 00 - movzx ax, byte [bp-002h] ; 0f b6 46 fe + call 02f85h ; e8 b7 13 + inc byte [bp-006h] ; fe 46 fa + cmp byte [bp-006h], 008h ; 80 7e fa 08 + jnc near 01c6eh ; 0f 83 95 00 + movzx ax, byte [bp-006h] ; 0f b6 46 fa sar ax, 1 ; d1 f8 imul ax, ax, strict byte 00050h ; 6b c0 50 - mov bx, word [bp-008h] ; 8b 5e f8 + mov bx, word [bp-00ch] ; 8b 5e f4 add bx, ax ; 01 c3 - mov word [bp-006h], bx ; 89 5e fa - test byte [bp-002h], 001h ; f6 46 fe 01 - je short 01bafh ; 74 04 - add byte [bp-005h], 020h ; 80 46 fb 20 + mov word [bp-00ah], bx ; 89 5e f6 + test byte [bp-006h], 001h ; f6 46 fa 01 + je short 01bf4h ; 74 04 + add byte [bp-009h], 020h ; 80 46 f7 20 mov CH, strict byte 080h ; b5 80 - cmp byte [bp+00ah], 001h ; 80 7e 0a 01 - jne short 01bc8h ; 75 11 - test byte [bp-004h], ch ; 84 6e fc - je short 01b44h ; 74 88 - mov dx, word [bp-006h] ; 8b 56 fa + cmp byte [bp+006h], 001h ; 80 7e 06 01 + jne short 01c0dh ; 75 11 + test byte [bp-008h], ch ; 84 6e f8 + je short 01b89h ; 74 88 + mov dx, word [bp-00ah] ; 8b 56 f6 mov ax, 0b800h ; b8 00 b8 - call 02eebh ; e8 26 13 - jmp near 01b46h ; e9 7e ff + call 02f77h ; e8 6d 13 + jmp near 01b8bh ; e9 7e ff test ch, ch ; 84 ed - jbe short 01b89h ; 76 bd - test byte [bp-004h], 080h ; f6 46 fc 80 - je short 01bddh ; 74 0b - mov dx, word [bp-006h] ; 8b 56 fa + jbe short 01bceh ; 76 bd + test byte [bp-008h], 080h ; f6 46 f8 80 + je short 01c22h ; 74 0b + mov dx, word [bp-00ah] ; 8b 56 f6 mov ax, 0b800h ; b8 00 b8 - call 02eebh ; e8 10 13 - jmp short 01bdfh ; eb 02 + call 02f77h ; e8 57 13 + jmp short 01c24h ; eb 02 xor al, al ; 30 c0 xor ah, ah ; 30 e4 - jmp short 01beeh ; eb 0b + jmp short 01c33h ; eb 0b or al, bl ; 08 d8 shr ch, 1 ; d0 ed db 0feh, 0c4h ; inc ah ; fe c4 cmp ah, 004h ; 80 fc 04 - jnc short 01c18h ; 73 2a - movzx bx, byte [bp-002h] ; 0f b6 5e fe + jnc short 01c5dh ; 73 2a + movzx bx, byte [bp-006h] ; 0f b6 5e fa add bx, di ; 01 fb add bx, si ; 01 f3 movzx dx, byte [bx] ; 0f b6 17 movzx bx, ch ; 0f b6 dd test bx, dx ; 85 d3 - je short 01be5h ; 74 e5 + je short 01c2ah ; 74 e5 mov CL, strict byte 003h ; b1 03 sub cl, ah ; 28 e1 - mov bl, byte [bp-004h] ; 8a 5e fc + mov bl, byte [bp-008h] ; 8a 5e f8 and bl, 003h ; 80 e3 03 add cl, cl ; 00 c9 sal bl, CL ; d2 e3 - test byte [bp-004h], 080h ; f6 46 fc 80 - je short 01be3h ; 74 cf + test byte [bp-008h], 080h ; f6 46 f8 80 + je short 01c28h ; 74 cf xor al, bl ; 30 d8 - jmp short 01be5h ; eb cd + jmp short 01c2ah ; eb cd movzx bx, al ; 0f b6 d8 - mov dx, word [bp-006h] ; 8b 56 fa + mov dx, word [bp-00ah] ; 8b 56 f6 mov ax, 0b800h ; b8 00 b8 - call 02ef9h ; e8 d5 12 - inc word [bp-006h] ; ff 46 fa - jmp short 01bc8h ; eb 9f - leave ; c9 + call 02f85h ; e8 1c 13 + inc word [bp-00ah] ; ff 46 f6 + jmp short 01c0dh ; eb 9f + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00004h ; c2 04 00 -write_gfx_char_lin_: ; 0xc1c2f LB 0x8c +write_gfx_char_lin_: ; 0xc1c77 LB 0x91 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00008h, 000h ; c8 08 00 00 - mov byte [bp-002h], dl ; 88 56 fe - mov di, 055aeh ; bf ae 55 + sub sp, strict byte 00008h ; 83 ec 08 + mov byte [bp-006h], dl ; 88 56 fa + mov di, 055afh ; bf af 55 movzx dx, cl ; 0f b6 d1 - movzx cx, byte [bp+008h] ; 0f b6 4e 08 + movzx cx, byte [bp+004h] ; 0f b6 4e 04 imul cx, dx ; 0f af ca sal cx, 006h ; c1 e1 06 movzx dx, bl ; 0f b6 d3 sal dx, 003h ; c1 e2 03 add dx, cx ; 01 ca - mov word [bp-008h], dx ; 89 56 f8 + mov word [bp-00ch], dx ; 89 56 f4 movzx si, al ; 0f b6 f0 sal si, 003h ; c1 e6 03 xor cl, cl ; 30 c9 - jmp short 01c98h ; eb 3b + jmp short 01ce2h ; eb 3b cmp ch, 008h ; 80 fd 08 - jnc short 01c91h ; 73 2f + jnc short 01cdbh ; 73 2f xor al, al ; 30 c0 movzx dx, cl ; 0f b6 d1 add dx, si ; 01 f2 mov bx, di ; 89 fb add bx, dx ; 01 d3 movzx dx, byte [bx] ; 0f b6 17 - movzx bx, byte [bp-004h] ; 0f b6 5e fc + movzx bx, byte [bp-008h] ; 0f b6 5e f8 test dx, bx ; 85 da - je short 01c7bh ; 74 03 - mov al, byte [bp-002h] ; 8a 46 fe + je short 01cc5h ; 74 03 + mov al, byte [bp-006h] ; 8a 46 fa movzx bx, al ; 0f b6 d8 movzx dx, ch ; 0f b6 d5 - add dx, word [bp-006h] ; 03 56 fa + add dx, word [bp-00ah] ; 03 56 f6 mov ax, 0a000h ; b8 00 a0 - call 02ef9h ; e8 6f 12 - shr byte [bp-004h], 1 ; d0 6e fc + call 02f85h ; e8 b1 12 + shr byte [bp-008h], 1 ; d0 6e f8 db 0feh, 0c5h ; inc ch ; fe c5 - jmp short 01c5dh ; eb cc + jmp short 01ca7h ; eb cc db 0feh, 0c1h ; inc cl ; fe c1 cmp cl, 008h ; 80 f9 08 - jnc short 01cb5h ; 73 1d + jnc short 01cffh ; 73 1d movzx bx, cl ; 0f b6 d9 - movzx dx, byte [bp+008h] ; 0f b6 56 08 + movzx dx, byte [bp+004h] ; 0f b6 56 04 imul dx, bx ; 0f af d3 sal dx, 003h ; c1 e2 03 - mov bx, word [bp-008h] ; 8b 5e f8 + mov bx, word [bp-00ch] ; 8b 5e f4 add bx, dx ; 01 d3 - mov word [bp-006h], bx ; 89 5e fa - mov byte [bp-004h], 080h ; c6 46 fc 80 + mov word [bp-00ah], bx ; 89 5e f6 + mov byte [bp-008h], 080h ; c6 46 f8 80 xor ch, ch ; 30 ed - jmp short 01c62h ; eb ad - leave ; c9 + jmp short 01cach ; eb ad + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00002h ; c2 02 00 -biosfn_write_char_attr_: ; 0xc1cbb LB 0x163 +biosfn_write_char_attr_: ; 0xc1d08 LB 0x168 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00018h, 000h ; c8 18 00 00 - mov byte [bp-00ah], al ; 88 46 f6 - mov byte [bp-00ch], dl ; 88 56 f4 - mov byte [bp-00eh], bl ; 88 5e f2 + sub sp, strict byte 00018h ; 83 ec 18 + mov byte [bp-00eh], al ; 88 46 f2 + mov byte [bp-010h], dl ; 88 56 f0 + mov byte [bp-012h], bl ; 88 5e ee mov si, cx ; 89 ce mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 16 12 + call 02f77h ; e8 53 12 xor ah, ah ; 30 e4 - call 02ec4h ; e8 ea 11 + call 02f50h ; e8 27 12 mov cl, al ; 88 c1 - mov byte [bp-002h], al ; 88 46 fe + mov byte [bp-006h], al ; 88 46 fa cmp AL, strict byte 0ffh ; 3c ff - je near 01e1ah ; 0f 84 35 01 - movzx ax, byte [bp-00ch] ; 0f b6 46 f4 - lea bx, [bp-018h] ; 8d 5e e8 - lea dx, [bp-016h] ; 8d 56 ea - call 00a83h ; e8 91 ed - mov al, byte [bp-018h] ; 8a 46 e8 - mov byte [bp-008h], al ; 88 46 f8 - mov ax, word [bp-018h] ; 8b 46 e8 + je near 01e69h ; 0f 84 35 01 + movzx ax, byte [bp-010h] ; 0f b6 46 f0 + lea bx, [bp-01ch] ; 8d 5e e4 + lea dx, [bp-01ah] ; 8d 56 e6 + call 00a88h ; e8 47 ed + mov al, byte [bp-01ch] ; 8a 46 e4 + mov byte [bp-00ch], al ; 88 46 f4 + mov ax, word [bp-01ch] ; 8b 46 e4 xor al, al ; 30 c0 shr ax, 008h ; c1 e8 08 - mov byte [bp-006h], al ; 88 46 fa + mov byte [bp-00ah], al ; 88 46 f6 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 df 11 + call 02f77h ; e8 1c 12 xor ah, ah ; 30 e4 inc ax ; 40 - mov word [bp-014h], ax ; 89 46 ec + mov word [bp-018h], ax ; 89 46 e8 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 ec 11 - mov word [bp-012h], ax ; 89 46 ee + call 02f93h ; e8 29 12 + mov word [bp-016h], ax ; 89 46 ea movzx bx, cl ; 0f b6 d9 mov di, bx ; 89 df sal di, 003h ; c1 e7 03 - cmp byte [di+0482fh], 000h ; 80 bd 2f 48 00 - jne short 01d74h ; 75 47 - mov bx, word [bp-014h] ; 8b 5e ec + cmp byte [di+04830h], 000h ; 80 bd 30 48 00 + jne short 01dc3h ; 75 47 + mov bx, word [bp-018h] ; 8b 5e e8 imul bx, ax ; 0f af d8 add bx, bx ; 01 db or bl, 0ffh ; 80 cb ff - movzx dx, byte [bp-00ch] ; 0f b6 56 f4 + movzx dx, byte [bp-010h] ; 0f b6 56 f0 inc bx ; 43 imul dx, bx ; 0f af d3 - movzx bx, byte [bp-006h] ; 0f b6 5e fa + movzx bx, byte [bp-00ah] ; 0f b6 5e f6 imul ax, bx ; 0f af c3 - movzx bx, byte [bp-008h] ; 0f b6 5e f8 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 add ax, bx ; 01 d8 add ax, ax ; 01 c0 add dx, ax ; 01 c2 - movzx ax, byte [bp-00eh] ; 0f b6 46 f2 + movzx ax, byte [bp-012h] ; 0f b6 46 ee sal ax, 008h ; c1 e0 08 - movzx bx, byte [bp-00ah] ; 0f b6 5e f6 + movzx bx, byte [bp-00eh] ; 0f b6 5e f2 add ax, bx ; 01 d8 - mov word [bp-016h], ax ; 89 46 ea - mov ax, word [bp-016h] ; 8b 46 ea - mov es, [di+04832h] ; 8e 85 32 48 + mov word [bp-01ah], ax ; 89 46 e6 + mov ax, word [bp-01ah] ; 8b 46 e6 + mov es, [di+04833h] ; 8e 85 33 48 mov cx, si ; 89 f1 mov di, dx ; 89 d7 cld ; fc - jcxz 01d71h ; e3 02 + jcxz 01dc0h ; e3 02 rep stosw ; f3 ab - jmp near 01e1ah ; e9 a6 00 - movzx bx, byte [bx+048aeh] ; 0f b6 9f ae 48 + jmp near 01e69h ; e9 a6 00 + movzx bx, byte [bx+048afh] ; 0f b6 9f af 48 sal bx, 006h ; c1 e3 06 - mov al, byte [bx+048c4h] ; 8a 87 c4 48 - mov byte [bp-004h], al ; 88 46 fc - mov al, byte [di+04831h] ; 8a 85 31 48 - mov byte [bp-010h], al ; 88 46 f0 + mov al, byte [bx+048c5h] ; 8a 87 c5 48 + mov byte [bp-008h], al ; 88 46 f8 + mov al, byte [di+04832h] ; 8a 85 32 48 + mov byte [bp-014h], al ; 88 46 ec dec si ; 4e cmp si, strict byte 0ffffh ; 83 fe ff - je near 01e1ah ; 0f 84 88 00 - movzx ax, byte [bp-008h] ; 0f b6 46 f8 - cmp ax, word [bp-012h] ; 3b 46 ee - jnc near 01e1ah ; 0f 83 7d 00 - movzx bx, byte [bp-002h] ; 0f b6 5e fe + je near 01e69h ; 0f 84 88 00 + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + cmp ax, word [bp-016h] ; 3b 46 ea + jnc near 01e69h ; 0f 83 7d 00 + movzx bx, byte [bp-006h] ; 0f b6 5e fa sal bx, 003h ; c1 e3 03 - mov al, byte [bx+04830h] ; 8a 87 30 48 + mov al, byte [bx+04831h] ; 8a 87 31 48 cmp AL, strict byte 003h ; 3c 03 - jc short 01db8h ; 72 0c - jbe short 01dbeh ; 76 10 + jc short 01e07h ; 72 0c + jbe short 01e0dh ; 76 10 cmp AL, strict byte 005h ; 3c 05 - je short 01dfch ; 74 4a + je short 01e4bh ; 74 4a cmp AL, strict byte 004h ; 3c 04 - je short 01dbeh ; 74 08 - jmp short 01e14h ; eb 5c + je short 01e0dh ; 74 08 + jmp short 01e63h ; eb 5c cmp AL, strict byte 002h ; 3c 02 - je short 01dddh ; 74 21 - jmp short 01e14h ; eb 56 - movzx ax, byte [bp-004h] ; 0f b6 46 fc + je short 01e2ch ; 74 21 + jmp short 01e63h ; eb 56 + movzx ax, byte [bp-008h] ; 0f b6 46 f8 push ax ; 50 - movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-006h] ; 0f b6 4e fa - movzx bx, byte [bp-008h] ; 0f b6 5e f8 - movzx dx, byte [bp-00eh] ; 0f b6 56 f2 - movzx ax, byte [bp-00ah] ; 0f b6 46 f6 - call 01a30h ; e8 55 fc - jmp short 01e14h ; eb 37 - movzx ax, byte [bp-010h] ; 0f b6 46 f0 + movzx cx, byte [bp-00ah] ; 0f b6 4e f6 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + movzx dx, byte [bp-012h] ; 0f b6 56 ee + movzx ax, byte [bp-00eh] ; 0f b6 46 f2 + call 01a6eh ; e8 44 fc + jmp short 01e63h ; eb 37 + movzx ax, byte [bp-014h] ; 0f b6 46 ec push ax ; 50 - movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-006h] ; 0f b6 4e fa - movzx bx, byte [bp-008h] ; 0f b6 5e f8 - movzx dx, byte [bp-00eh] ; 0f b6 56 f2 - movzx ax, byte [bp-00ah] ; 0f b6 46 f6 - call 01b16h ; e8 1c fd - jmp short 01e14h ; eb 18 - movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx cx, byte [bp-00ah] ; 0f b6 4e f6 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + movzx dx, byte [bp-012h] ; 0f b6 56 ee + movzx ax, byte [bp-00eh] ; 0f b6 46 f2 + call 01b59h ; e8 10 fd + jmp short 01e63h ; eb 18 + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-006h] ; 0f b6 4e fa - movzx bx, byte [bp-008h] ; 0f b6 5e f8 - movzx dx, byte [bp-00eh] ; 0f b6 56 f2 - movzx ax, byte [bp-00ah] ; 0f b6 46 f6 - call 01c2fh ; e8 1b fe - inc byte [bp-008h] ; fe 46 f8 - jmp near 01d8ah ; e9 70 ff - leave ; c9 + movzx cx, byte [bp-00ah] ; 0f b6 4e f6 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + movzx dx, byte [bp-012h] ; 0f b6 56 ee + movzx ax, byte [bp-00eh] ; 0f b6 46 f2 + call 01c77h ; e8 14 fe + inc byte [bp-00ch] ; fe 46 f4 + jmp near 01dd9h ; e9 70 ff + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn ; c3 -biosfn_write_char_only_: ; 0xc1e1e LB 0x16a +biosfn_write_char_only_: ; 0xc1e70 LB 0x16f + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00018h, 000h ; c8 18 00 00 - mov byte [bp-00eh], al ; 88 46 f2 - mov byte [bp-002h], dl ; 88 56 fe - mov byte [bp-010h], bl ; 88 5e f0 + sub sp, strict byte 00018h ; 83 ec 18 + mov byte [bp-012h], al ; 88 46 ee + mov byte [bp-006h], dl ; 88 56 fa + mov byte [bp-014h], bl ; 88 5e ec mov si, cx ; 89 ce mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 b3 10 + call 02f77h ; e8 eb 10 xor ah, ah ; 30 e4 - call 02ec4h ; e8 87 10 + call 02f50h ; e8 bf 10 mov cl, al ; 88 c1 - mov byte [bp-00ah], al ; 88 46 f6 + mov byte [bp-00eh], al ; 88 46 f2 cmp AL, strict byte 0ffh ; 3c ff - je near 01f84h ; 0f 84 3c 01 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - lea bx, [bp-018h] ; 8d 5e e8 - lea dx, [bp-016h] ; 8d 56 ea - call 00a83h ; e8 2e ec - mov al, byte [bp-018h] ; 8a 46 e8 - mov byte [bp-008h], al ; 88 46 f8 - mov ax, word [bp-018h] ; 8b 46 e8 + je near 01fd8h ; 0f 84 3c 01 + movzx ax, byte [bp-006h] ; 0f b6 46 fa + lea bx, [bp-01ch] ; 8d 5e e4 + lea dx, [bp-01ah] ; 8d 56 e6 + call 00a88h ; e8 df eb + mov al, byte [bp-01ch] ; 8a 46 e4 + mov byte [bp-00ch], al ; 88 46 f4 + mov ax, word [bp-01ch] ; 8b 46 e4 xor al, al ; 30 c0 shr ax, 008h ; c1 e8 08 - mov byte [bp-00ch], al ; 88 46 f4 + mov byte [bp-010h], al ; 88 46 f0 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 7c 10 + call 02f77h ; e8 b4 10 xor ah, ah ; 30 e4 inc ax ; 40 - mov word [bp-014h], ax ; 89 46 ec + mov word [bp-018h], ax ; 89 46 e8 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 89 10 - mov word [bp-012h], ax ; 89 46 ee + call 02f93h ; e8 c1 10 + mov word [bp-016h], ax ; 89 46 ea movzx di, cl ; 0f b6 f9 mov bx, di ; 89 fb sal bx, 003h ; c1 e3 03 - cmp byte [bx+0482fh], 000h ; 80 bf 2f 48 00 - jne short 01edah ; 75 4a - mov dx, word [bp-014h] ; 8b 56 ec + cmp byte [bx+04830h], 000h ; 80 bf 30 48 00 + jne short 01f2eh ; 75 4a + mov dx, word [bp-018h] ; 8b 56 e8 imul dx, ax ; 0f af d0 add dx, dx ; 01 d2 or dl, 0ffh ; 80 ca ff - movzx bx, byte [bp-002h] ; 0f b6 5e fe + movzx bx, byte [bp-006h] ; 0f b6 5e fa inc dx ; 42 imul bx, dx ; 0f af da - movzx dx, byte [bp-00ch] ; 0f b6 56 f4 + movzx dx, byte [bp-010h] ; 0f b6 56 f0 mov cx, ax ; 89 c1 imul cx, dx ; 0f af ca - movzx dx, byte [bp-008h] ; 0f b6 56 f8 + movzx dx, byte [bp-00ch] ; 0f b6 56 f4 add cx, dx ; 01 d1 add cx, cx ; 01 c9 add cx, bx ; 01 d9 dec si ; 4e cmp si, strict byte 0ffffh ; 83 fe ff - je near 01f84h ; 0f 84 c6 00 - movzx ax, byte [bp-00eh] ; 0f b6 46 f2 - movzx bx, byte [bp-00ah] ; 0f b6 5e f6 + je near 01fd8h ; 0f 84 c6 00 + movzx ax, byte [bp-012h] ; 0f b6 46 ee + movzx bx, byte [bp-00eh] ; 0f b6 5e f2 sal bx, 003h ; c1 e3 03 - mov di, word [bx+04832h] ; 8b bf 32 48 + mov di, word [bx+04833h] ; 8b bf 33 48 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, di ; 89 f8 - call 02ef9h ; e8 23 10 + call 02f85h ; e8 5b 10 inc cx ; 41 inc cx ; 41 - jmp short 01eb6h ; eb dc - movzx di, byte [di+048aeh] ; 0f b6 bd ae 48 + jmp short 01f0ah ; eb dc + movzx di, byte [di+048afh] ; 0f b6 bd af 48 sal di, 006h ; c1 e7 06 - mov al, byte [di+048c4h] ; 8a 85 c4 48 - mov byte [bp-006h], al ; 88 46 fa - mov al, byte [bx+04831h] ; 8a 87 31 48 - mov byte [bp-004h], al ; 88 46 fc + mov al, byte [di+048c5h] ; 8a 85 c5 48 + mov byte [bp-00ah], al ; 88 46 f6 + mov al, byte [bx+04832h] ; 8a 87 32 48 + mov byte [bp-008h], al ; 88 46 f8 dec si ; 4e cmp si, strict byte 0ffffh ; 83 fe ff - je near 01f84h ; 0f 84 8c 00 - movzx ax, byte [bp-008h] ; 0f b6 46 f8 - cmp ax, word [bp-012h] ; 3b 46 ee - jnc near 01f84h ; 0f 83 81 00 - movzx bx, byte [bp-00ah] ; 0f b6 5e f6 + je near 01fd8h ; 0f 84 8c 00 + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + cmp ax, word [bp-016h] ; 3b 46 ea + jnc near 01fd8h ; 0f 83 81 00 + movzx bx, byte [bp-00eh] ; 0f b6 5e f2 sal bx, 003h ; c1 e3 03 - mov bl, byte [bx+04830h] ; 8a 9f 30 48 + mov bl, byte [bx+04831h] ; 8a 9f 31 48 cmp bl, 003h ; 80 fb 03 - jc short 01f21h ; 72 0e - jbe short 01f28h ; 76 13 + jc short 01f75h ; 72 0e + jbe short 01f7ch ; 76 13 cmp bl, 005h ; 80 fb 05 - je short 01f66h ; 74 4c + je short 01fbah ; 74 4c cmp bl, 004h ; 80 fb 04 - je short 01f28h ; 74 09 - jmp short 01f7eh ; eb 5d + je short 01f7ch ; 74 09 + jmp short 01fd2h ; eb 5d cmp bl, 002h ; 80 fb 02 - je short 01f47h ; 74 21 - jmp short 01f7eh ; eb 56 - movzx ax, byte [bp-006h] ; 0f b6 46 fa + je short 01f9bh ; 74 21 + jmp short 01fd2h ; eb 56 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 + push ax ; 50 + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 + movzx cx, byte [bp-010h] ; 0f b6 4e f0 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + movzx dx, byte [bp-014h] ; 0f b6 56 ec movzx ax, byte [bp-012h] ; 0f b6 46 ee + call 01a6eh ; e8 d5 fa + jmp short 01fd2h ; eb 37 + movzx ax, byte [bp-008h] ; 0f b6 46 f8 push ax ; 50 - movzx cx, byte [bp-00ch] ; 0f b6 4e f4 - movzx bx, byte [bp-008h] ; 0f b6 5e f8 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-00eh] ; 0f b6 46 f2 - call 01a30h ; e8 eb fa - jmp short 01f7eh ; eb 37 - movzx ax, byte [bp-004h] ; 0f b6 46 fc + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 + movzx cx, byte [bp-010h] ; 0f b6 4e f0 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + movzx dx, byte [bp-014h] ; 0f b6 56 ec movzx ax, byte [bp-012h] ; 0f b6 46 ee + call 01b59h ; e8 a1 fb + jmp short 01fd2h ; eb 18 + movzx ax, byte [bp-016h] ; 0f b6 46 ea push ax ; 50 - movzx cx, byte [bp-00ch] ; 0f b6 4e f4 - movzx bx, byte [bp-008h] ; 0f b6 5e f8 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-00eh] ; 0f b6 46 f2 - call 01b16h ; e8 b2 fb - jmp short 01f7eh ; eb 18 + movzx cx, byte [bp-010h] ; 0f b6 4e f0 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + movzx dx, byte [bp-014h] ; 0f b6 56 ec movzx ax, byte [bp-012h] ; 0f b6 46 ee - push ax ; 50 - movzx cx, byte [bp-00ch] ; 0f b6 4e f4 - movzx bx, byte [bp-008h] ; 0f b6 5e f8 - movzx dx, byte [bp-010h] ; 0f b6 56 f0 - movzx ax, byte [bp-00eh] ; 0f b6 46 f2 - call 01c2fh ; e8 b1 fc - inc byte [bp-008h] ; fe 46 f8 - jmp near 01ef0h ; e9 6c ff - leave ; c9 + call 01c77h ; e8 a5 fc + inc byte [bp-00ch] ; fe 46 f4 + jmp near 01f44h ; e9 6c ff + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn ; c3 -biosfn_write_pixel_: ; 0xc1f88 LB 0x168 +biosfn_write_pixel_: ; 0xc1fdf LB 0x16a + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 - enter 00008h, 000h ; c8 08 00 00 - mov byte [bp-004h], dl ; 88 56 fc - mov word [bp-008h], bx ; 89 5e f8 + sub sp, strict byte 00008h ; 83 ec 08 + mov byte [bp-006h], dl ; 88 56 fa + mov word [bp-00ah], bx ; 89 5e f6 mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 4f 0f + call 02f77h ; e8 82 0f xor ah, ah ; 30 e4 - call 02ec4h ; e8 23 0f - mov byte [bp-002h], al ; 88 46 fe + call 02f50h ; e8 56 0f + mov byte [bp-004h], al ; 88 46 fc cmp AL, strict byte 0ffh ; 3c ff - je near 020edh ; 0f 84 43 01 + je near 02121h ; 0f 84 1e 01 movzx bx, al ; 0f b6 d8 sal bx, 003h ; c1 e3 03 - cmp byte [bx+0482fh], 000h ; 80 bf 2f 48 00 - je near 020edh ; 0f 84 34 01 - mov al, byte [bx+04830h] ; 8a 87 30 48 + cmp byte [bx+04830h], 000h ; 80 bf 30 48 00 + je near 02121h ; 0f 84 0f 01 + mov al, byte [bx+04831h] ; 8a 87 31 48 cmp AL, strict byte 003h ; 3c 03 - jc short 01fd0h ; 72 0f - jbe short 01fd7h ; 76 14 + jc short 02029h ; 72 0f + jbe short 02030h ; 76 14 cmp AL, strict byte 005h ; 3c 05 - je near 020cbh ; 0f 84 02 01 + je near 02127h ; 0f 84 05 01 cmp AL, strict byte 004h ; 3c 04 - je short 01fd7h ; 74 0a - leave ; c9 - pop si ; 5e - retn ; c3 + je short 02030h ; 74 0a + jmp near 02121h ; e9 f8 00 cmp AL, strict byte 002h ; 3c 02 - je short 0203ch ; 74 68 - leave ; c9 - pop si ; 5e - retn ; c3 + je short 02095h ; 74 68 + jmp near 02121h ; e9 f1 00 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 27 0f + call 02f93h ; e8 5a 0f imul ax, cx ; 0f af c1 - mov bx, word [bp-008h] ; 8b 5e f8 + mov bx, word [bp-00ah] ; 8b 5e f6 shr bx, 003h ; c1 eb 03 add bx, ax ; 01 c3 - mov word [bp-006h], bx ; 89 5e fa - mov cx, word [bp-008h] ; 8b 4e f8 + mov word [bp-008h], bx ; 89 5e f8 + mov cx, word [bp-00ah] ; 8b 4e f6 and cl, 007h ; 80 e1 07 mov ax, 00080h ; b8 80 00 sar ax, CL ; d3 f8 @@ -3738,16 +3809,16 @@ biosfn_write_pixel_: ; 0xc1f88 LB 0x168 out DX, ax ; ef mov dx, bx ; 89 da mov ax, 0a000h ; b8 00 a0 - call 02eebh ; e8 db 0e - test byte [bp-004h], 080h ; f6 46 fc 80 - je short 0201dh ; 74 07 + call 02f77h ; e8 0e 0f + test byte [bp-006h], 080h ; f6 46 fa 80 + je short 02076h ; 74 07 mov ax, 01803h ; b8 03 18 mov dx, 003ceh ; ba ce 03 out DX, ax ; ef - movzx bx, byte [bp-004h] ; 0f b6 5e fc - mov dx, word [bp-006h] ; 8b 56 fa + movzx bx, byte [bp-006h] ; 0f b6 5e fa + mov dx, word [bp-008h] ; 8b 56 f8 mov ax, 0a000h ; b8 00 a0 - call 02ef9h ; e8 cf 0e + call 02f85h ; e8 02 0f mov ax, 0ff08h ; b8 08 ff mov dx, 003ceh ; ba ce 03 out DX, ax ; ef @@ -3755,278 +3826,276 @@ biosfn_write_pixel_: ; 0xc1f88 LB 0x168 out DX, ax ; ef mov ax, strict word 00003h ; b8 03 00 out DX, ax ; ef - leave ; c9 - pop si ; 5e - retn ; c3 + jmp near 02121h ; e9 8c 00 mov ax, cx ; 89 c8 shr ax, 1 ; d1 e8 imul ax, ax, strict byte 00050h ; 6b c0 50 - cmp byte [bx+04831h], 002h ; 80 bf 31 48 02 - jne short 02052h ; 75 08 - mov bx, word [bp-008h] ; 8b 5e f8 + cmp byte [bx+04832h], 002h ; 80 bf 32 48 02 + jne short 020abh ; 75 08 + mov bx, word [bp-00ah] ; 8b 5e f6 shr bx, 002h ; c1 eb 02 - jmp short 02058h ; eb 06 - mov bx, word [bp-008h] ; 8b 5e f8 + jmp short 020b1h ; eb 06 + mov bx, word [bp-00ah] ; 8b 5e f6 shr bx, 003h ; c1 eb 03 add bx, ax ; 01 c3 - mov word [bp-006h], bx ; 89 5e fa + mov word [bp-008h], bx ; 89 5e f8 test cl, 001h ; f6 c1 01 - je short 02066h ; 74 04 - add byte [bp-005h], 020h ; 80 46 fb 20 - mov dx, word [bp-006h] ; 8b 56 fa + je short 020bfh ; 74 04 + add byte [bp-007h], 020h ; 80 46 f9 20 + mov dx, word [bp-008h] ; 8b 56 f8 mov ax, 0b800h ; b8 00 b8 - call 02eebh ; e8 7c 0e + call 02f77h ; e8 af 0e mov bl, al ; 88 c3 - movzx si, byte [bp-002h] ; 0f b6 76 fe + movzx si, byte [bp-004h] ; 0f b6 76 fc sal si, 003h ; c1 e6 03 - cmp byte [si+04831h], 002h ; 80 bc 31 48 02 - jne short 02098h ; 75 19 - mov al, byte [bp-008h] ; 8a 46 f8 + cmp byte [si+04832h], 002h ; 80 bc 32 48 02 + jne short 020f1h ; 75 19 + mov al, byte [bp-00ah] ; 8a 46 f6 and AL, strict byte 003h ; 24 03 mov AH, strict byte 003h ; b4 03 sub ah, al ; 28 c4 mov cl, ah ; 88 e1 add cl, ah ; 00 e1 - mov bh, byte [bp-004h] ; 8a 7e fc + mov bh, byte [bp-006h] ; 8a 7e fa and bh, 003h ; 80 e7 03 sal bh, CL ; d2 e7 mov AL, strict byte 003h ; b0 03 - jmp short 020abh ; eb 13 - mov al, byte [bp-008h] ; 8a 46 f8 + jmp short 02104h ; eb 13 + mov al, byte [bp-00ah] ; 8a 46 f6 and AL, strict byte 007h ; 24 07 mov CL, strict byte 007h ; b1 07 sub cl, al ; 28 c1 - mov bh, byte [bp-004h] ; 8a 7e fc + mov bh, byte [bp-006h] ; 8a 7e fa and bh, 001h ; 80 e7 01 sal bh, CL ; d2 e7 mov AL, strict byte 001h ; b0 01 sal al, CL ; d2 e0 - test byte [bp-004h], 080h ; f6 46 fc 80 - je short 020b7h ; 74 04 + test byte [bp-006h], 080h ; f6 46 fa 80 + je short 02110h ; 74 04 xor bl, bh ; 30 fb - jmp short 020bdh ; eb 06 + jmp short 02116h ; eb 06 not al ; f6 d0 and bl, al ; 20 c3 or bl, bh ; 08 fb xor bh, bh ; 30 ff - mov dx, word [bp-006h] ; 8b 56 fa + mov dx, word [bp-008h] ; 8b 56 f8 mov ax, 0b800h ; b8 00 b8 - call 02ef9h ; e8 31 0e - leave ; c9 + call 02f85h ; e8 64 0e + lea sp, [bp-002h] ; 8d 66 fe pop si ; 5e + pop bp ; 5d retn ; c3 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 33 0e + call 02f93h ; e8 63 0e sal ax, 003h ; c1 e0 03 imul cx, ax ; 0f af c8 - mov ax, word [bp-008h] ; 8b 46 f8 + mov ax, word [bp-00ah] ; 8b 46 f6 add ax, cx ; 01 c8 - mov word [bp-006h], ax ; 89 46 fa - movzx bx, byte [bp-004h] ; 0f b6 5e fc + mov word [bp-008h], ax ; 89 46 f8 + movzx bx, byte [bp-006h] ; 0f b6 5e fa mov dx, ax ; 89 c2 mov ax, 0a000h ; b8 00 a0 - jmp short 020c5h ; eb d8 - leave ; c9 - pop si ; 5e - retn ; c3 -biosfn_write_teletype_: ; 0xc20f0 LB 0x27f + jmp short 0211eh ; eb d5 +biosfn_write_teletype_: ; 0xc2149 LB 0x284 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 - enter 00016h, 000h ; c8 16 00 00 - mov byte [bp-00ah], al ; 88 46 f6 - mov byte [bp-002h], dl ; 88 56 fe - mov byte [bp-004h], bl ; 88 5e fc - mov byte [bp-00eh], cl ; 88 4e f2 + sub sp, strict byte 00016h ; 83 ec 16 + mov byte [bp-00ch], al ; 88 46 f4 + mov byte [bp-004h], dl ; 88 56 fc + mov byte [bp-006h], bl ; 88 5e fa + mov byte [bp-010h], cl ; 88 4e f0 cmp dl, 0ffh ; 80 fa ff - jne short 02112h ; 75 0c + jne short 0216dh ; 75 0c mov dx, strict word 00062h ; ba 62 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 dc 0d - mov byte [bp-002h], al ; 88 46 fe + call 02f77h ; e8 0d 0e + mov byte [bp-004h], al ; 88 46 fc mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 d0 0d + call 02f77h ; e8 01 0e xor ah, ah ; 30 e4 - call 02ec4h ; e8 a4 0d - mov byte [bp-00ch], al ; 88 46 f4 + call 02f50h ; e8 d5 0d + mov byte [bp-00eh], al ; 88 46 f2 cmp AL, strict byte 0ffh ; 3c ff - je near 0236ch ; 0f 84 43 02 - movzx ax, byte [bp-002h] ; 0f b6 46 fe - lea bx, [bp-016h] ; 8d 5e ea - lea dx, [bp-014h] ; 8d 56 ec - call 00a83h ; e8 4d e9 - mov al, byte [bp-016h] ; 8a 46 ea - mov byte [bp-006h], al ; 88 46 fa - mov ax, word [bp-016h] ; 8b 46 ea + je near 023c7h ; 0f 84 43 02 + movzx ax, byte [bp-004h] ; 0f b6 46 fc + lea bx, [bp-018h] ; 8d 5e e8 + lea dx, [bp-016h] ; 8d 56 ea + call 00a88h ; e8 f7 e8 + mov al, byte [bp-018h] ; 8a 46 e8 + mov byte [bp-008h], al ; 88 46 f8 + mov ax, word [bp-018h] ; 8b 46 e8 xor al, al ; 30 c0 shr ax, 008h ; c1 e8 08 - mov byte [bp-008h], al ; 88 46 f8 + mov byte [bp-00ah], al ; 88 46 f6 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 9b 0d + call 02f77h ; e8 cc 0d xor ah, ah ; 30 e4 inc ax ; 40 - mov word [bp-012h], ax ; 89 46 ee + mov word [bp-014h], ax ; 89 46 ec mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 a8 0d - mov word [bp-010h], ax ; 89 46 f0 - mov al, byte [bp-00ah] ; 8a 46 f6 + call 02f93h ; e8 d9 0d + mov word [bp-012h], ax ; 89 46 ee + mov al, byte [bp-00ch] ; 8a 46 f4 cmp AL, strict byte 009h ; 3c 09 - jc short 02175h ; 72 0c - jbe short 0219ch ; 76 31 + jc short 021d0h ; 72 0c + jbe short 021f7h ; 76 31 cmp AL, strict byte 00dh ; 3c 0d - je short 0218fh ; 74 20 + je short 021eah ; 74 20 cmp AL, strict byte 00ah ; 3c 0a - je short 02196h ; 74 23 - jmp short 021ddh ; eb 68 + je short 021f1h ; 74 23 + jmp short 02238h ; eb 68 cmp AL, strict byte 008h ; 3c 08 - je short 02181h ; 74 08 + je short 021dch ; 74 08 cmp AL, strict byte 007h ; 3c 07 - je near 022b9h ; 0f 84 3a 01 - jmp short 021ddh ; eb 5c - cmp byte [bp-006h], 000h ; 80 7e fa 00 - jbe near 022b9h ; 0f 86 30 01 - dec byte [bp-006h] ; fe 4e fa - jmp near 022b9h ; e9 2a 01 - mov byte [bp-006h], 000h ; c6 46 fa 00 - jmp near 022b9h ; e9 23 01 - inc byte [bp-008h] ; fe 46 f8 - jmp near 022b9h ; e9 1d 01 - movzx cx, byte [bp-00eh] ; 0f b6 4e f2 - movzx bx, byte [bp-004h] ; 0f b6 5e fc - movzx si, byte [bp-002h] ; 0f b6 76 fe + je near 02314h ; 0f 84 3a 01 + jmp short 02238h ; eb 5c + cmp byte [bp-008h], 000h ; 80 7e f8 00 + jbe near 02314h ; 0f 86 30 01 + dec byte [bp-008h] ; fe 4e f8 + jmp near 02314h ; e9 2a 01 + mov byte [bp-008h], 000h ; c6 46 f8 00 + jmp near 02314h ; e9 23 01 + inc byte [bp-00ah] ; fe 46 f6 + jmp near 02314h ; e9 1d 01 + movzx cx, byte [bp-010h] ; 0f b6 4e f0 + movzx bx, byte [bp-006h] ; 0f b6 5e fa + movzx si, byte [bp-004h] ; 0f b6 76 fc mov dx, si ; 89 f2 mov ax, strict word 00020h ; b8 20 00 - call 020f0h ; e8 40 ff - lea bx, [bp-016h] ; 8d 5e ea - lea dx, [bp-014h] ; 8d 56 ec + call 02149h ; e8 3e ff + lea bx, [bp-018h] ; 8d 5e e8 + lea dx, [bp-016h] ; 8d 56 ea mov ax, si ; 89 f0 - call 00a83h ; e8 c8 e8 - mov al, byte [bp-016h] ; 8a 46 ea - mov byte [bp-006h], al ; 88 46 fa - mov ax, word [bp-016h] ; 8b 46 ea + call 00a88h ; e8 72 e8 + mov al, byte [bp-018h] ; 8a 46 e8 + mov byte [bp-008h], al ; 88 46 f8 + mov ax, word [bp-018h] ; 8b 46 e8 xor al, al ; 30 c0 shr ax, 008h ; c1 e8 08 - mov byte [bp-008h], al ; 88 46 f8 - movzx ax, byte [bp-006h] ; 0f b6 46 fa + mov byte [bp-00ah], al ; 88 46 f6 + movzx ax, byte [bp-008h] ; 0f b6 46 f8 mov bx, strict word 00008h ; bb 08 00 cwd ; 99 idiv bx ; f7 fb test dx, dx ; 85 d2 - je short 0219ch ; 74 c2 - jmp near 022b9h ; e9 dc 00 - movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + je short 021f7h ; 74 c2 + jmp near 02314h ; e9 dc 00 + movzx bx, byte [bp-00eh] ; 0f b6 5e f2 mov si, bx ; 89 de sal si, 003h ; c1 e6 03 - cmp byte [si+0482fh], 000h ; 80 bc 2f 48 00 - jne short 02238h ; 75 4b - mov ax, word [bp-010h] ; 8b 46 f0 - imul ax, word [bp-012h] ; 0f af 46 ee + cmp byte [si+04830h], 000h ; 80 bc 30 48 00 + jne short 02293h ; 75 4b + mov ax, word [bp-012h] ; 8b 46 ee + imul ax, word [bp-014h] ; 0f af 46 ec add ax, ax ; 01 c0 or AL, strict byte 0ffh ; 0c ff - movzx dx, byte [bp-002h] ; 0f b6 56 fe + movzx dx, byte [bp-004h] ; 0f b6 56 fc inc ax ; 40 imul dx, ax ; 0f af d0 - movzx cx, byte [bp-008h] ; 0f b6 4e f8 - imul cx, word [bp-010h] ; 0f af 4e f0 - movzx bx, byte [bp-006h] ; 0f b6 5e fa + movzx cx, byte [bp-00ah] ; 0f b6 4e f6 + imul cx, word [bp-012h] ; 0f af 4e ee + movzx bx, byte [bp-008h] ; 0f b6 5e f8 add cx, bx ; 01 d9 add cx, cx ; 01 c9 add cx, dx ; 01 d1 - movzx bx, byte [bp-00ah] ; 0f b6 5e f6 - mov ax, word [si+04832h] ; 8b 84 32 48 + movzx bx, byte [bp-00ch] ; 0f b6 5e f4 + mov ax, word [si+04833h] ; 8b 84 33 48 mov dx, cx ; 89 ca - call 02ef9h ; e8 da 0c - cmp byte [bp-00eh], 003h ; 80 7e f2 03 - jne near 022b6h ; 0f 85 8f 00 - movzx bx, byte [bp-004h] ; 0f b6 5e fc + call 02f85h ; e8 0b 0d + cmp byte [bp-010h], 003h ; 80 7e f0 03 + jne near 02311h ; 0f 85 8f 00 + movzx bx, byte [bp-006h] ; 0f b6 5e fa mov dx, cx ; 89 ca inc dx ; 42 - mov ax, word [si+04832h] ; 8b 84 32 48 - call 02ef9h ; e8 c4 0c - jmp near 022b6h ; e9 7e 00 - movzx bx, byte [bx+048aeh] ; 0f b6 9f ae 48 + mov ax, word [si+04833h] ; 8b 84 33 48 + call 02f85h ; e8 f5 0c + jmp near 02311h ; e9 7e 00 + movzx bx, byte [bx+048afh] ; 0f b6 9f af 48 sal bx, 006h ; c1 e3 06 - mov ah, byte [bx+048c4h] ; 8a a7 c4 48 - mov dl, byte [si+04831h] ; 8a 94 31 48 - mov al, byte [si+04830h] ; 8a 84 30 48 + mov ah, byte [bx+048c5h] ; 8a a7 c5 48 + mov dl, byte [si+04832h] ; 8a 94 32 48 + mov al, byte [si+04831h] ; 8a 84 31 48 cmp AL, strict byte 003h ; 3c 03 - jc short 0225ch ; 72 0c - jbe short 02262h ; 76 10 + jc short 022b7h ; 72 0c + jbe short 022bdh ; 76 10 cmp AL, strict byte 005h ; 3c 05 - je short 0229eh ; 74 48 + je short 022f9h ; 74 48 cmp AL, strict byte 004h ; 3c 04 - je short 02262h ; 74 08 - jmp short 022b6h ; eb 5a + je short 022bdh ; 74 08 + jmp short 02311h ; eb 5a cmp AL, strict byte 002h ; 3c 02 - je short 02280h ; 74 20 - jmp short 022b6h ; eb 54 + je short 022dbh ; 74 20 + jmp short 02311h ; eb 54 movzx ax, ah ; 0f b6 c4 push ax ; 50 - movzx ax, byte [bp-010h] ; 0f b6 46 f0 + movzx ax, byte [bp-012h] ; 0f b6 46 ee push ax ; 50 - movzx cx, byte [bp-008h] ; 0f b6 4e f8 - movzx bx, byte [bp-006h] ; 0f b6 5e fa - movzx dx, byte [bp-004h] ; 0f b6 56 fc - movzx ax, byte [bp-00ah] ; 0f b6 46 f6 - call 01a30h ; e8 b2 f7 - jmp short 022b6h ; eb 36 + movzx cx, byte [bp-00ah] ; 0f b6 4e f6 + movzx bx, byte [bp-008h] ; 0f b6 5e f8 + movzx dx, byte [bp-006h] ; 0f b6 56 fa + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + call 01a6eh ; e8 95 f7 + jmp short 02311h ; eb 36 movzx ax, dl ; 0f b6 c2 push ax ; 50 - movzx ax, byte [bp-010h] ; 0f b6 46 f0 + movzx ax, byte [bp-012h] ; 0f b6 46 ee push ax ; 50 - movzx cx, byte [bp-008h] ; 0f b6 4e f8 - movzx bx, byte [bp-006h] ; 0f b6 5e fa - movzx dx, byte [bp-004h] ; 0f b6 56 fc - movzx ax, byte [bp-00ah] ; 0f b6 46 f6 - call 01b16h ; e8 7a f8 - jmp short 022b6h ; eb 18 - movzx ax, byte [bp-010h] ; 0f b6 46 f0 + movzx cx, byte [bp-00ah] ; 0f b6 4e f6 + movzx bx, byte [bp-008h] ; 0f b6 5e f8 + movzx dx, byte [bp-006h] ; 0f b6 56 fa + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + call 01b59h ; e8 62 f8 + jmp short 02311h ; eb 18 + movzx ax, byte [bp-012h] ; 0f b6 46 ee push ax ; 50 - movzx cx, byte [bp-008h] ; 0f b6 4e f8 - movzx bx, byte [bp-006h] ; 0f b6 5e fa - movzx dx, byte [bp-004h] ; 0f b6 56 fc - movzx ax, byte [bp-00ah] ; 0f b6 46 f6 - call 01c2fh ; e8 79 f9 - inc byte [bp-006h] ; fe 46 fa - movzx ax, byte [bp-006h] ; 0f b6 46 fa - cmp ax, word [bp-010h] ; 3b 46 f0 - jne short 022c9h ; 75 07 - mov byte [bp-006h], 000h ; c6 46 fa 00 + movzx cx, byte [bp-00ah] ; 0f b6 4e f6 + movzx bx, byte [bp-008h] ; 0f b6 5e f8 + movzx dx, byte [bp-006h] ; 0f b6 56 fa + movzx ax, byte [bp-00ch] ; 0f b6 46 f4 + call 01c77h ; e8 66 f9 inc byte [bp-008h] ; fe 46 f8 movzx ax, byte [bp-008h] ; 0f b6 46 f8 cmp ax, word [bp-012h] ; 3b 46 ee - jne near 02350h ; 0f 85 7c 00 - movzx si, byte [bp-00ch] ; 0f b6 76 f4 + jne short 02324h ; 75 07 + mov byte [bp-008h], 000h ; c6 46 f8 00 + inc byte [bp-00ah] ; fe 46 f6 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 + cmp ax, word [bp-014h] ; 3b 46 ec + jne near 023abh ; 0f 85 7c 00 + movzx si, byte [bp-00eh] ; 0f b6 76 f2 sal si, 003h ; c1 e6 03 - mov bl, byte [bp-012h] ; 8a 5e ee + mov bl, byte [bp-014h] ; 8a 5e ec db 0feh, 0cbh ; dec bl ; fe cb - mov bh, byte [bp-010h] ; 8a 7e f0 + mov bh, byte [bp-012h] ; 8a 7e ee db 0feh, 0cfh ; dec bh ; fe cf - cmp byte [si+0482fh], 000h ; 80 bc 2f 48 00 - jne short 02332h ; 75 46 - mov ax, word [bp-010h] ; 8b 46 f0 - imul ax, word [bp-012h] ; 0f af 46 ee + cmp byte [si+04830h], 000h ; 80 bc 30 48 00 + jne short 0238dh ; 75 46 + mov ax, word [bp-012h] ; 8b 46 ee + imul ax, word [bp-014h] ; 0f af 46 ec add ax, ax ; 01 c0 or AL, strict byte 0ffh ; 0c ff - movzx dx, byte [bp-002h] ; 0f b6 56 fe + movzx dx, byte [bp-004h] ; 0f b6 56 fc inc ax ; 40 imul dx, ax ; 0f af d0 - movzx ax, byte [bp-008h] ; 0f b6 46 f8 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 dec ax ; 48 - imul ax, word [bp-010h] ; 0f af 46 f0 - movzx cx, byte [bp-006h] ; 0f b6 4e fa + imul ax, word [bp-012h] ; 0f af 46 ee + movzx cx, byte [bp-008h] ; 0f b6 4e f8 add cx, ax ; 01 c1 add cx, cx ; 01 c9 add dx, cx ; 01 ca inc dx ; 42 - mov ax, word [si+04832h] ; 8b 84 32 48 - call 02eebh ; e8 d1 0b + mov ax, word [si+04833h] ; 8b 84 33 48 + call 02f77h ; e8 02 0c push strict byte 00001h ; 6a 01 - movzx dx, byte [bp-002h] ; 0f b6 56 fe + movzx dx, byte [bp-004h] ; 0f b6 56 fc push dx ; 52 movzx dx, bh ; 0f b6 d7 push dx ; 52 @@ -4035,9 +4104,9 @@ biosfn_write_teletype_: ; 0xc20f0 LB 0x27f movzx dx, al ; 0f b6 d0 xor cx, cx ; 31 c9 xor bx, bx ; 31 db - jmp short 02347h ; eb 15 + jmp short 023a2h ; eb 15 push strict byte 00001h ; 6a 01 - movzx ax, byte [bp-002h] ; 0f b6 46 fe + movzx ax, byte [bp-004h] ; 0f b6 46 fc push ax ; 50 movzx ax, bh ; 0f b6 c7 push ax ; 50 @@ -4047,23 +4116,24 @@ biosfn_write_teletype_: ; 0xc20f0 LB 0x27f xor bx, bx ; 31 db xor dx, dx ; 31 d2 mov ax, strict word 00001h ; b8 01 00 - call 0152fh ; e8 e2 f1 - dec byte [bp-008h] ; fe 4e f8 + call 01568h ; e8 c0 f1 + dec byte [bp-00ah] ; fe 4e f6 + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 + mov word [bp-018h], ax ; 89 46 e8 + sal word [bp-018h], 008h ; c1 66 e8 08 movzx ax, byte [bp-008h] ; 0f b6 46 f8 - mov word [bp-016h], ax ; 89 46 ea - sal word [bp-016h], 008h ; c1 66 ea 08 - movzx ax, byte [bp-006h] ; 0f b6 46 fa - add word [bp-016h], ax ; 01 46 ea - mov dx, word [bp-016h] ; 8b 56 ea - movzx ax, byte [bp-002h] ; 0f b6 46 fe - call 00e42h ; e8 d6 ea - leave ; c9 + add word [bp-018h], ax ; 01 46 e8 + mov dx, word [bp-018h] ; 8b 56 e8 + movzx ax, byte [bp-004h] ; 0f b6 46 fc + call 00e5eh ; e8 97 ea + lea sp, [bp-002h] ; 8d 66 fe pop si ; 5e + pop bp ; 5d retn ; c3 -get_font_access_: ; 0xc236f LB 0x29 - push dx ; 52 +get_font_access_: ; 0xc23cd LB 0x2c push bp ; 55 mov bp, sp ; 89 e5 + push dx ; 52 mov ax, 00100h ; b8 00 01 mov dx, 003c4h ; ba c4 03 out DX, ax ; ef @@ -4080,13 +4150,14 @@ get_font_access_: ; 0xc236f LB 0x29 out DX, ax ; ef mov ax, 00406h ; b8 06 04 out DX, ax ; ef - pop bp ; 5d + lea sp, [bp-002h] ; 8d 66 fe pop dx ; 5a + pop bp ; 5d retn ; c3 -release_font_access_: ; 0xc2398 LB 0x39 - push dx ; 52 +release_font_access_: ; 0xc23f9 LB 0x3c push bp ; 55 mov bp, sp ; 89 e5 + push dx ; 52 mov ax, 00100h ; b8 00 01 mov dx, 003c4h ; ba c4 03 out DX, ax ; ef @@ -4111,21 +4182,22 @@ release_font_access_: ; 0xc2398 LB 0x39 out DX, ax ; ef mov ax, 01005h ; b8 05 10 out DX, ax ; ef - pop bp ; 5d + lea sp, [bp-002h] ; 8d 66 fe pop dx ; 5a + pop bp ; 5d retn ; c3 -set_scan_lines_: ; 0xc23d1 LB 0xbc +set_scan_lines_: ; 0xc2435 LB 0xbf + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push dx ; 52 push si ; 56 push di ; 57 - push bp ; 55 - mov bp, sp ; 89 e5 mov bl, al ; 88 c3 mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 23 0b + call 02f93h ; e8 4b 0b mov dx, ax ; 89 c2 mov si, ax ; 89 c6 mov AL, strict byte 009h ; b0 09 @@ -4142,22 +4214,22 @@ set_scan_lines_: ; 0xc23d1 LB 0xbc or al, ah ; 08 e0 out DX, AL ; ee cmp bl, 008h ; 80 fb 08 - jne short 02408h ; 75 08 + jne short 0246ch ; 75 08 mov dx, strict word 00007h ; ba 07 00 mov ax, strict word 00006h ; b8 06 00 - jmp short 02415h ; eb 0d + jmp short 02479h ; eb 0d mov al, bl ; 88 d8 sub AL, strict byte 003h ; 2c 03 movzx dx, al ; 0f b6 d0 mov al, bl ; 88 d8 sub AL, strict byte 004h ; 2c 04 xor ah, ah ; 30 e4 - call 00da1h ; e8 89 e9 + call 00dbah ; e8 3e e9 movzx di, bl ; 0f b6 fb mov bx, di ; 89 fb mov dx, 00085h ; ba 85 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 ef 0a + call 02fa1h ; e8 17 0b mov AL, strict byte 012h ; b0 12 mov dx, si ; 89 f2 out DX, AL ; ee @@ -4192,83 +4264,90 @@ set_scan_lines_: ; 0xc23d1 LB 0xbc movzx bx, al ; 0f b6 d8 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 8f 0a + call 02f85h ; e8 b7 0a mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 94 0a + call 02f93h ; e8 bc 0a movzx dx, cl ; 0f b6 d1 mov bx, ax ; 89 c3 imul bx, dx ; 0f af da add bx, bx ; 01 db mov dx, strict word 0004ch ; ba 4c 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 8f 0a - pop bp ; 5d + call 02fa1h ; e8 b7 0a + lea sp, [bp-00ah] ; 8d 66 f6 pop di ; 5f pop si ; 5e pop dx ; 5a pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_load_text_user_pat_: ; 0xc248d LB 0x78 +biosfn_load_text_user_pat_: ; 0xc24f4 LB 0x7d + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 0000ah, 000h ; c8 0a 00 00 - mov byte [bp-002h], al ; 88 46 fe - mov word [bp-008h], dx ; 89 56 f8 - mov word [bp-004h], bx ; 89 5e fc - mov word [bp-006h], cx ; 89 4e fa - call 0236fh ; e8 cd fe - mov al, byte [bp+00ah] ; 8a 46 0a + sub sp, strict byte 0000ah ; 83 ec 0a + mov byte [bp-006h], al ; 88 46 fa + mov word [bp-00ch], dx ; 89 56 f4 + mov word [bp-008h], bx ; 89 5e f8 + mov word [bp-00ah], cx ; 89 4e f6 + call 023cdh ; e8 c2 fe + mov al, byte [bp+006h] ; 8a 46 06 and AL, strict byte 003h ; 24 03 xor ah, ah ; 30 e4 mov bx, ax ; 89 c3 sal bx, 00eh ; c1 e3 0e - mov al, byte [bp+00ah] ; 8a 46 0a + mov al, byte [bp+006h] ; 8a 46 06 and AL, strict byte 004h ; 24 04 xor ah, ah ; 30 e4 sal ax, 00bh ; c1 e0 0b add bx, ax ; 01 c3 - mov word [bp-00ah], bx ; 89 5e f6 + mov word [bp-00eh], bx ; 89 5e f2 xor bx, bx ; 31 db - cmp bx, word [bp-006h] ; 3b 5e fa - jnc short 024efh ; 73 2b - movzx cx, byte [bp+00ch] ; 0f b6 4e 0c + cmp bx, word [bp-00ah] ; 3b 5e f6 + jnc short 02558h ; 73 2b + movzx cx, byte [bp+008h] ; 0f b6 4e 08 mov si, bx ; 89 de imul si, cx ; 0f af f1 - add si, word [bp-004h] ; 03 76 fc - mov di, word [bp+008h] ; 8b 7e 08 + add si, word [bp-008h] ; 03 76 f8 + mov di, word [bp+004h] ; 8b 7e 04 add di, bx ; 01 df sal di, 005h ; c1 e7 05 - add di, word [bp-00ah] ; 03 7e f6 - mov dx, word [bp-008h] ; 8b 56 f8 + add di, word [bp-00eh] ; 03 7e f2 + mov dx, word [bp-00ch] ; 8b 56 f4 mov ax, 0a000h ; b8 00 a0 mov es, ax ; 8e c0 cld ; fc - jcxz 024ech ; e3 06 + jcxz 02555h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f inc bx ; 43 - jmp short 024bfh ; eb d0 - call 02398h ; e8 a6 fe - cmp byte [bp-002h], 010h ; 80 7e fe 10 - jc short 024ffh ; 72 07 - movzx ax, byte [bp+00ch] ; 0f b6 46 0c - call 023d1h ; e8 d2 fe - leave ; c9 + jmp short 02528h ; eb d0 + call 023f9h ; e8 9e fe + cmp byte [bp-006h], 010h ; 80 7e fa 10 + jc short 02568h ; 72 07 + movzx ax, byte [bp+008h] ; 0f b6 46 08 + call 02435h ; e8 cd fe + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00006h ; c2 06 00 -biosfn_load_text_8_14_pat_: ; 0xc2505 LB 0x6c +biosfn_load_text_8_14_pat_: ; 0xc2571 LB 0x70 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 - mov byte [bp-002h], al ; 88 46 fe - call 0236fh ; e8 5c fe + push ax ; 50 + push ax ; 50 + mov byte [bp-00ah], al ; 88 46 f6 + call 023cdh ; e8 4d fe mov al, dl ; 88 d0 and AL, strict byte 003h ; 24 03 xor ah, ah ; 30 e4 @@ -4279,47 +4358,51 @@ biosfn_load_text_8_14_pat_: ; 0xc2505 LB 0x6c xor ah, ah ; 30 e4 sal ax, 00bh ; c1 e0 0b add bx, ax ; 01 c3 - mov word [bp-004h], bx ; 89 5e fc + mov word [bp-00ch], bx ; 89 5e f4 xor bx, bx ; 31 db - jmp short 02536h ; eb 06 + jmp short 025a3h ; eb 06 cmp bx, 00100h ; 81 fb 00 01 - jnc short 0255ch ; 73 26 + jnc short 025c9h ; 73 26 imul si, bx, strict byte 0000eh ; 6b f3 0e mov di, bx ; 89 df sal di, 005h ; c1 e7 05 - add di, word [bp-004h] ; 03 7e fc - add si, 05daeh ; 81 c6 ae 5d + add di, word [bp-00ch] ; 03 7e f4 + add si, 05dafh ; 81 c6 af 5d mov cx, strict word 0000eh ; b9 0e 00 mov dx, 0c000h ; ba 00 c0 mov ax, 0a000h ; b8 00 a0 mov es, ax ; 8e c0 cld ; fc - jcxz 02559h ; e3 06 + jcxz 025c6h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f inc bx ; 43 - jmp short 02530h ; eb d4 - call 02398h ; e8 39 fe - cmp byte [bp-002h], 010h ; 80 7e fe 10 - jc short 0256bh ; 72 06 + jmp short 0259dh ; eb d4 + call 023f9h ; e8 2d fe + cmp byte [bp-00ah], 010h ; 80 7e f6 10 + jc short 025d8h ; 72 06 mov ax, strict word 0000eh ; b8 0e 00 - call 023d1h ; e8 66 fe - leave ; c9 + call 02435h ; e8 5d fe + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_load_text_8_8_pat_: ; 0xc2571 LB 0x6e +biosfn_load_text_8_8_pat_: ; 0xc25e1 LB 0x72 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 - mov byte [bp-002h], al ; 88 46 fe - call 0236fh ; e8 f0 fd + push ax ; 50 + push ax ; 50 + mov byte [bp-00ah], al ; 88 46 f6 + call 023cdh ; e8 dd fd mov al, dl ; 88 d0 and AL, strict byte 003h ; 24 03 xor ah, ah ; 30 e4 @@ -4330,48 +4413,52 @@ biosfn_load_text_8_8_pat_: ; 0xc2571 LB 0x6e xor ah, ah ; 30 e4 sal ax, 00bh ; c1 e0 0b add bx, ax ; 01 c3 - mov word [bp-004h], bx ; 89 5e fc + mov word [bp-00ch], bx ; 89 5e f4 xor bx, bx ; 31 db - jmp short 025a2h ; eb 06 + jmp short 02613h ; eb 06 cmp bx, 00100h ; 81 fb 00 01 - jnc short 025cah ; 73 28 + jnc short 0263bh ; 73 28 mov si, bx ; 89 de sal si, 003h ; c1 e6 03 mov di, bx ; 89 df sal di, 005h ; c1 e7 05 - add di, word [bp-004h] ; 03 7e fc - add si, 055aeh ; 81 c6 ae 55 + add di, word [bp-00ch] ; 03 7e f4 + add si, 055afh ; 81 c6 af 55 mov cx, strict word 00008h ; b9 08 00 mov dx, 0c000h ; ba 00 c0 mov ax, 0a000h ; b8 00 a0 mov es, ax ; 8e c0 cld ; fc - jcxz 025c7h ; e3 06 + jcxz 02638h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f inc bx ; 43 - jmp short 0259ch ; eb d2 - call 02398h ; e8 cb fd - cmp byte [bp-002h], 010h ; 80 7e fe 10 - jc short 025d9h ; 72 06 + jmp short 0260dh ; eb d2 + call 023f9h ; e8 bb fd + cmp byte [bp-00ah], 010h ; 80 7e f6 10 + jc short 0264ah ; 72 06 mov ax, strict word 00008h ; b8 08 00 - call 023d1h ; e8 f8 fd - leave ; c9 + call 02435h ; e8 eb fd + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_load_text_8_16_pat_: ; 0xc25df LB 0x6e +biosfn_load_text_8_16_pat_: ; 0xc2653 LB 0x72 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 - mov byte [bp-002h], al ; 88 46 fe - call 0236fh ; e8 82 fd + push ax ; 50 + push ax ; 50 + mov byte [bp-00ah], al ; 88 46 f6 + call 023cdh ; e8 6b fd mov al, dl ; 88 d0 and AL, strict byte 003h ; 24 03 xor ah, ah ; 30 e4 @@ -4382,282 +4469,291 @@ biosfn_load_text_8_16_pat_: ; 0xc25df LB 0x6e xor ah, ah ; 30 e4 sal ax, 00bh ; c1 e0 0b add bx, ax ; 01 c3 - mov word [bp-004h], bx ; 89 5e fc + mov word [bp-00ch], bx ; 89 5e f4 xor bx, bx ; 31 db - jmp short 02610h ; eb 06 + jmp short 02685h ; eb 06 cmp bx, 00100h ; 81 fb 00 01 - jnc short 02638h ; 73 28 + jnc short 026adh ; 73 28 mov si, bx ; 89 de sal si, 004h ; c1 e6 04 mov di, bx ; 89 df sal di, 005h ; c1 e7 05 - add di, word [bp-004h] ; 03 7e fc - add si, 06baeh ; 81 c6 ae 6b + add di, word [bp-00ch] ; 03 7e f4 + add si, 06bafh ; 81 c6 af 6b mov cx, strict word 00010h ; b9 10 00 mov dx, 0c000h ; ba 00 c0 mov ax, 0a000h ; b8 00 a0 mov es, ax ; 8e c0 cld ; fc - jcxz 02635h ; e3 06 + jcxz 026aah ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f inc bx ; 43 - jmp short 0260ah ; eb d2 - call 02398h ; e8 5d fd - cmp byte [bp-002h], 010h ; 80 7e fe 10 - jc short 02647h ; 72 06 + jmp short 0267fh ; eb d2 + call 023f9h ; e8 49 fd + cmp byte [bp-00ah], 010h ; 80 7e f6 10 + jc short 026bch ; 72 06 mov ax, strict word 00010h ; b8 10 00 - call 023d1h ; e8 8a fd - leave ; c9 + call 02435h ; e8 79 fd + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_load_gfx_8_8_chars_: ; 0xc264d LB 0x5 +biosfn_load_gfx_8_8_chars_: ; 0xc26c5 LB 0x5 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn ; c3 -biosfn_load_gfx_user_chars_: ; 0xc2652 LB 0x7 +biosfn_load_gfx_user_chars_: ; 0xc26ca LB 0x7 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn 00002h ; c2 02 00 -biosfn_load_gfx_8_14_chars_: ; 0xc2659 LB 0x5 +biosfn_load_gfx_8_14_chars_: ; 0xc26d1 LB 0x5 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn ; c3 -biosfn_load_gfx_8_8_dd_chars_: ; 0xc265e LB 0x5 +biosfn_load_gfx_8_8_dd_chars_: ; 0xc26d6 LB 0x5 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn ; c3 -biosfn_load_gfx_8_16_chars_: ; 0xc2663 LB 0x5 +biosfn_load_gfx_8_16_chars_: ; 0xc26db LB 0x5 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn ; c3 -biosfn_alternate_prtsc_: ; 0xc2668 LB 0x5 +biosfn_alternate_prtsc_: ; 0xc26e0 LB 0x5 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn ; c3 -biosfn_switch_video_interface_: ; 0xc266d LB 0x5 +biosfn_switch_video_interface_: ; 0xc26e5 LB 0x5 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn ; c3 -biosfn_enable_video_refresh_control_: ; 0xc2672 LB 0x5 +biosfn_enable_video_refresh_control_: ; 0xc26ea LB 0x5 push bp ; 55 mov bp, sp ; 89 e5 pop bp ; 5d retn ; c3 -biosfn_write_string_: ; 0xc2677 LB 0x97 +biosfn_write_string_: ; 0xc26ef LB 0x9c + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 0000ah, 000h ; c8 0a 00 00 - mov byte [bp-006h], al ; 88 46 fa - mov byte [bp-004h], dl ; 88 56 fc - mov byte [bp-002h], bl ; 88 5e fe + sub sp, strict byte 0000ah ; 83 ec 0a + mov byte [bp-00ah], al ; 88 46 f6 + mov byte [bp-008h], dl ; 88 56 f8 + mov byte [bp-006h], bl ; 88 5e fa mov si, cx ; 89 ce - mov di, word [bp+00eh] ; 8b 7e 0e + mov di, word [bp+00ah] ; 8b 7e 0a movzx ax, dl ; 0f b6 c2 - lea bx, [bp-00ah] ; 8d 5e f6 - lea dx, [bp-008h] ; 8d 56 f8 - call 00a83h ; e8 ec e3 - cmp byte [bp+008h], 0ffh ; 80 7e 08 ff - jne short 026aeh ; 75 11 - mov al, byte [bp-00ah] ; 8a 46 f6 - mov byte [bp+00ah], al ; 88 46 0a - mov ax, word [bp-00ah] ; 8b 46 f6 + lea bx, [bp-00eh] ; 8d 5e f2 + lea dx, [bp-00ch] ; 8d 56 f4 + call 00a88h ; e8 77 e3 + cmp byte [bp+004h], 0ffh ; 80 7e 04 ff + jne short 02728h ; 75 11 + mov al, byte [bp-00eh] ; 8a 46 f2 + mov byte [bp+006h], al ; 88 46 06 + mov ax, word [bp-00eh] ; 8b 46 f2 xor al, al ; 30 c0 shr ax, 008h ; c1 e8 08 - mov byte [bp+008h], al ; 88 46 08 - movzx dx, byte [bp+008h] ; 0f b6 56 08 + mov byte [bp+004h], al ; 88 46 04 + movzx dx, byte [bp+004h] ; 0f b6 56 04 sal dx, 008h ; c1 e2 08 - movzx ax, byte [bp+00ah] ; 0f b6 46 0a + movzx ax, byte [bp+006h] ; 0f b6 46 06 add dx, ax ; 01 c2 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - call 00e42h ; e8 80 e7 + movzx ax, byte [bp-008h] ; 0f b6 46 f8 + call 00e5eh ; e8 22 e7 dec si ; 4e cmp si, strict byte 0ffffh ; 83 fe ff - je short 026f8h ; 74 30 + je short 02772h ; 74 30 mov dx, di ; 89 fa inc di ; 47 - mov ax, word [bp+00ch] ; 8b 46 0c - call 02eebh ; e8 1a 08 + mov ax, word [bp+008h] ; 8b 46 08 + call 02f77h ; e8 2c 08 mov cl, al ; 88 c1 - test byte [bp-006h], 002h ; f6 46 fa 02 - je short 026e5h ; 74 0c + test byte [bp-00ah], 002h ; f6 46 f6 02 + je short 0275fh ; 74 0c mov dx, di ; 89 fa inc di ; 47 - mov ax, word [bp+00ch] ; 8b 46 0c - call 02eebh ; e8 09 08 - mov byte [bp-002h], al ; 88 46 fe - movzx bx, byte [bp-002h] ; 0f b6 5e fe - movzx dx, byte [bp-004h] ; 0f b6 56 fc + mov ax, word [bp+008h] ; 8b 46 08 + call 02f77h ; e8 1b 08 + mov byte [bp-006h], al ; 88 46 fa + movzx bx, byte [bp-006h] ; 0f b6 5e fa + movzx dx, byte [bp-008h] ; 0f b6 56 f8 movzx ax, cl ; 0f b6 c1 mov cx, strict word 00003h ; b9 03 00 - call 020f0h ; e8 fa f9 - jmp short 026c2h ; eb ca - test byte [bp-006h], 001h ; f6 46 fa 01 - jne short 02708h ; 75 0a - mov dx, word [bp-00ah] ; 8b 56 f6 - movzx ax, byte [bp-004h] ; 0f b6 46 fc - call 00e42h ; e8 3a e7 - leave ; c9 + call 02149h ; e8 d9 f9 + jmp short 0273ch ; eb ca + test byte [bp-00ah], 001h ; f6 46 f6 01 + jne short 02782h ; 75 0a + mov dx, word [bp-00eh] ; 8b 56 f2 + movzx ax, byte [bp-008h] ; 0f b6 46 f8 + call 00e5eh ; e8 dc e6 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00008h ; c2 08 00 -biosfn_read_state_info_: ; 0xc270e LB 0xfe +biosfn_read_state_info_: ; 0xc278b LB 0x101 + push bp ; 55 + mov bp, sp ; 89 e5 push cx ; 51 push si ; 56 push di ; 57 - push bp ; 55 - mov bp, sp ; 89 e5 push dx ; 52 push bx ; 53 mov cx, ds ; 8c d9 - mov bx, 05582h ; bb 82 55 - mov dx, word [bp-004h] ; 8b 56 fc - mov ax, word [bp-002h] ; 8b 46 fe - call 02f35h ; e8 11 08 - mov di, word [bp-004h] ; 8b 7e fc + mov bx, 05583h ; bb 83 55 + mov dx, word [bp-00ah] ; 8b 56 f6 + mov ax, word [bp-008h] ; 8b 46 f8 + call 02fc1h ; e8 20 08 + mov di, word [bp-00ah] ; 8b 7e f6 add di, strict byte 00004h ; 83 c7 04 mov cx, strict word 0001eh ; b9 1e 00 mov si, strict word 00049h ; be 49 00 mov dx, strict word 00040h ; ba 40 00 - mov es, [bp-002h] ; 8e 46 fe + mov es, [bp-008h] ; 8e 46 f8 cld ; fc - jcxz 0273fh ; e3 06 + jcxz 027bch ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f - mov di, word [bp-004h] ; 8b 7e fc + mov di, word [bp-00ah] ; 8b 7e f6 add di, strict byte 00022h ; 83 c7 22 mov cx, strict word 00003h ; b9 03 00 mov si, 00084h ; be 84 00 mov dx, strict word 00040h ; ba 40 00 - mov es, [bp-002h] ; 8e 46 fe + mov es, [bp-008h] ; 8e 46 f8 cld ; fc - jcxz 0275ah ; e3 06 + jcxz 027d7h ; e3 06 push DS ; 1e mov ds, dx ; 8e da rep movsb ; f3 a4 pop DS ; 1f mov dx, 0008ah ; ba 8a 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 88 07 + call 02f77h ; e8 97 07 movzx bx, al ; 0f b6 d8 - mov dx, word [bp-004h] ; 8b 56 fc + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 00025h ; 83 c2 25 - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 87 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 96 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 00026h ; 83 c2 26 xor bx, bx ; 31 db - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 79 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 88 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 00027h ; 83 c2 27 mov bx, strict word 00010h ; bb 10 00 - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 6a 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 79 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 00028h ; 83 c2 28 xor bx, bx ; 31 db - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 5c 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 6b 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 00029h ; 83 c2 29 mov bx, strict word 00008h ; bb 08 00 - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 4d 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 5c 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 0002ah ; 83 c2 2a mov bx, strict word 00002h ; bb 02 00 - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 3e 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 4d 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 0002bh ; 83 c2 2b xor bx, bx ; 31 db - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 30 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 3f 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 0002ch ; 83 c2 2c xor bx, bx ; 31 db - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 22 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 31 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 00031h ; 83 c2 31 mov bx, strict word 00003h ; bb 03 00 - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 13 07 - mov dx, word [bp-004h] ; 8b 56 fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 22 07 + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, strict byte 00032h ; 83 c2 32 xor bx, bx ; 31 db - mov ax, word [bp-002h] ; 8b 46 fe - call 02ef9h ; e8 05 07 - mov di, word [bp-004h] ; 8b 7e fc + mov ax, word [bp-008h] ; 8b 46 f8 + call 02f85h ; e8 14 07 + mov di, word [bp-00ah] ; 8b 7e f6 add di, strict byte 00033h ; 83 c7 33 mov cx, strict word 0000dh ; b9 0d 00 xor ax, ax ; 31 c0 - mov es, [bp-002h] ; 8e 46 fe + mov es, [bp-008h] ; 8e 46 f8 cld ; fc - jcxz 02807h ; e3 02 + jcxz 02884h ; e3 02 rep stosb ; f3 aa - leave ; c9 + lea sp, [bp-006h] ; 8d 66 fa pop di ; 5f pop si ; 5e pop cx ; 59 + pop bp ; 5d retn ; c3 -biosfn_read_video_state_size2_: ; 0xc280c LB 0x23 +biosfn_read_video_state_size2_: ; 0xc288c LB 0x23 push dx ; 52 push bp ; 55 mov bp, sp ; 89 e5 mov dx, ax ; 89 c2 xor ax, ax ; 31 c0 test dl, 001h ; f6 c2 01 - je short 0281ch ; 74 03 + je short 0289ch ; 74 03 mov ax, strict word 00046h ; b8 46 00 test dl, 002h ; f6 c2 02 - je short 02824h ; 74 03 + je short 028a4h ; 74 03 add ax, strict word 0002ah ; 05 2a 00 test dl, 004h ; f6 c2 04 - je short 0282ch ; 74 03 + je short 028ach ; 74 03 add ax, 00304h ; 05 04 03 pop bp ; 5d pop dx ; 5a retn ; c3 -vga_get_video_state_size_: ; 0xc282f LB 0xf - push bx ; 53 +vga_get_video_state_size_: ; 0xc28af LB 0x12 push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 mov bx, dx ; 89 d3 - call 0280ch ; e8 d4 ff + call 0288ch ; e8 d4 ff mov word [ss:bx], ax ; 36 89 07 - pop bp ; 5d + lea sp, [bp-002h] ; 8d 66 fe pop bx ; 5b + pop bp ; 5d retn ; c3 -biosfn_save_video_state_: ; 0xc283e LB 0x365 +biosfn_save_video_state_: ; 0xc28c1 LB 0x369 + push bp ; 55 + mov bp, sp ; 89 e5 push cx ; 51 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 + push ax ; 50 + push ax ; 50 push ax ; 50 mov si, dx ; 89 d6 mov cx, bx ; 89 d9 mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 b4 06 + call 02f93h ; e8 bc 06 mov di, ax ; 89 c7 - test byte [bp-006h], 001h ; f6 46 fa 01 - je near 029c0h ; 0f 84 63 01 + test byte [bp-00ch], 001h ; f6 46 f4 01 + je near 02a44h ; 0f 84 63 01 mov dx, 003c4h ; ba c4 03 in AL, DX ; ec db 02ah, 0e4h @@ -4665,7 +4761,7 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 8c 06 + call 02f85h ; e8 94 06 inc cx ; 41 mov dx, di ; 89 fa in AL, DX ; ec @@ -4674,7 +4770,7 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 7c 06 + call 02f85h ; e8 84 06 inc cx ; 41 mov dx, 003ceh ; ba ce 03 in AL, DX ; ec @@ -4683,7 +4779,7 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 6b 06 + call 02f85h ; e8 73 06 inc cx ; 41 mov dx, 003dah ; ba da 03 in AL, DX ; ec @@ -4693,11 +4789,11 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - mov word [bp-002h], ax ; 89 46 fe - movzx bx, byte [bp-002h] ; 0f b6 5e fe + mov word [bp-008h], ax ; 89 46 f8 + movzx bx, byte [bp-008h] ; 0f b6 5e f8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 50 06 + call 02f85h ; e8 58 06 inc cx ; 41 mov dx, 003cah ; ba ca 03 in AL, DX ; ec @@ -4706,14 +4802,14 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 3f 06 + call 02f85h ; e8 47 06 mov ax, strict word 00001h ; b8 01 00 - mov word [bp-004h], ax ; 89 46 fc + mov word [bp-00ah], ax ; 89 46 f6 add cx, ax ; 01 c1 - jmp short 028cah ; eb 06 - cmp word [bp-004h], strict byte 00004h ; 83 7e fc 04 - jnbe short 028e7h ; 77 1d - mov al, byte [bp-004h] ; 8a 46 fc + jmp short 0294eh ; eb 06 + cmp word [bp-00ah], strict byte 00004h ; 83 7e f6 04 + jnbe short 0296bh ; 77 1d + mov al, byte [bp-00ah] ; 8a 46 f6 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee mov dx, 003c5h ; ba c5 03 @@ -4723,10 +4819,10 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 18 06 + call 02f85h ; e8 20 06 inc cx ; 41 - inc word [bp-004h] ; ff 46 fc - jmp short 028c4h ; eb dd + inc word [bp-00ah] ; ff 46 f6 + jmp short 02948h ; eb dd xor al, al ; 30 c0 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee @@ -4737,13 +4833,13 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 fc 05 - mov word [bp-004h], strict word 00000h ; c7 46 fc 00 00 + call 02f85h ; e8 04 06 + mov word [bp-00ah], strict word 00000h ; c7 46 f6 00 00 inc cx ; 41 - jmp short 0290bh ; eb 06 - cmp word [bp-004h], strict byte 00018h ; 83 7e fc 18 - jnbe short 02927h ; 77 1c - mov al, byte [bp-004h] ; 8a 46 fc + jmp short 0298fh ; eb 06 + cmp word [bp-00ah], strict byte 00018h ; 83 7e f6 18 + jnbe short 029abh ; 77 1c + mov al, byte [bp-00ah] ; 8a 46 f6 mov dx, di ; 89 fa out DX, AL ; ee lea dx, [di+001h] ; 8d 55 01 @@ -4753,21 +4849,21 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 d8 05 + call 02f85h ; e8 e0 05 inc cx ; 41 - inc word [bp-004h] ; ff 46 fc - jmp short 02905h ; eb de - mov word [bp-004h], strict word 00000h ; c7 46 fc 00 00 - jmp short 02934h ; eb 06 - cmp word [bp-004h], strict byte 00013h ; 83 7e fc 13 - jnbe short 0295dh ; 77 29 + inc word [bp-00ah] ; ff 46 f6 + jmp short 02989h ; eb de + mov word [bp-00ah], strict word 00000h ; c7 46 f6 00 00 + jmp short 029b8h ; eb 06 + cmp word [bp-00ah], strict byte 00013h ; 83 7e f6 13 + jnbe short 029e1h ; 77 29 mov dx, 003dah ; ba da 03 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - mov ax, word [bp-002h] ; 8b 46 fe + mov ax, word [bp-008h] ; 8b 46 f8 and ax, strict word 00020h ; 25 20 00 - or ax, word [bp-004h] ; 0b 46 fc + or ax, word [bp-00ah] ; 0b 46 f6 mov dx, 003c0h ; ba c0 03 out DX, AL ; ee mov dx, 003c1h ; ba c1 03 @@ -4777,19 +4873,19 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 a2 05 + call 02f85h ; e8 aa 05 inc cx ; 41 - inc word [bp-004h] ; ff 46 fc - jmp short 0292eh ; eb d1 + inc word [bp-00ah] ; ff 46 f6 + jmp short 029b2h ; eb d1 mov dx, 003dah ; ba da 03 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - mov word [bp-004h], strict word 00000h ; c7 46 fc 00 00 - jmp short 02970h ; eb 06 - cmp word [bp-004h], strict byte 00008h ; 83 7e fc 08 - jnbe short 0298dh ; 77 1d - mov al, byte [bp-004h] ; 8a 46 fc + mov word [bp-00ah], strict word 00000h ; c7 46 f6 00 00 + jmp short 029f4h ; eb 06 + cmp word [bp-00ah], strict byte 00008h ; 83 7e f6 08 + jnbe short 02a11h ; 77 1d + mov al, byte [bp-00ah] ; 8a 46 f6 mov dx, 003ceh ; ba ce 03 out DX, AL ; ee mov dx, 003cfh ; ba cf 03 @@ -4799,195 +4895,195 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 72 05 + call 02f85h ; e8 7a 05 inc cx ; 41 - inc word [bp-004h] ; ff 46 fc - jmp short 0296ah ; eb dd + inc word [bp-00ah] ; ff 46 f6 + jmp short 029eeh ; eb dd mov bx, di ; 89 fb mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 7f 05 + call 02fa1h ; e8 87 05 inc cx ; 41 inc cx ; 41 xor bx, bx ; 31 db mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 58 05 + call 02f85h ; e8 60 05 inc cx ; 41 xor bx, bx ; 31 db mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 4e 05 + call 02f85h ; e8 56 05 inc cx ; 41 xor bx, bx ; 31 db mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 44 05 + call 02f85h ; e8 4c 05 inc cx ; 41 xor bx, bx ; 31 db mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 3a 05 + call 02f85h ; e8 42 05 inc cx ; 41 - test byte [bp-006h], 002h ; f6 46 fa 02 - je near 02b2fh ; 0f 84 67 01 + test byte [bp-00ch], 002h ; f6 46 f4 02 + je near 02bb3h ; 0f 84 67 01 mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 1a 05 + call 02f77h ; e8 22 05 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 1e 05 + call 02f85h ; e8 26 05 inc cx ; 41 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 22 05 + call 02f93h ; e8 2a 05 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 27 05 + call 02fa1h ; e8 2f 05 inc cx ; 41 inc cx ; 41 mov dx, strict word 0004ch ; ba 4c 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 0e 05 + call 02f93h ; e8 16 05 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 13 05 + call 02fa1h ; e8 1b 05 inc cx ; 41 inc cx ; 41 mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 fa 04 + call 02f93h ; e8 02 05 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 ff 04 + call 02fa1h ; e8 07 05 inc cx ; 41 inc cx ; 41 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 ca 04 + call 02f77h ; e8 d2 04 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 ce 04 + call 02f85h ; e8 d6 04 inc cx ; 41 mov dx, 00085h ; ba 85 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 d2 04 + call 02f93h ; e8 da 04 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 d7 04 + call 02fa1h ; e8 df 04 inc cx ; 41 inc cx ; 41 mov dx, 00087h ; ba 87 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 a2 04 + call 02f77h ; e8 aa 04 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 a6 04 + call 02f85h ; e8 ae 04 inc cx ; 41 mov dx, 00088h ; ba 88 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 8e 04 + call 02f77h ; e8 96 04 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 92 04 + call 02f85h ; e8 9a 04 inc cx ; 41 mov dx, 00089h ; ba 89 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 7a 04 + call 02f77h ; e8 82 04 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 7e 04 + call 02f85h ; e8 86 04 inc cx ; 41 mov dx, strict word 00060h ; ba 60 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 82 04 + call 02f93h ; e8 8a 04 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 87 04 - mov word [bp-004h], strict word 00000h ; c7 46 fc 00 00 + call 02fa1h ; e8 8f 04 + mov word [bp-00ah], strict word 00000h ; c7 46 f6 00 00 inc cx ; 41 inc cx ; 41 - jmp short 02a9dh ; eb 06 - cmp word [bp-004h], strict byte 00008h ; 83 7e fc 08 - jnc short 02abbh ; 73 1e - mov dx, word [bp-004h] ; 8b 56 fc + jmp short 02b21h ; eb 06 + cmp word [bp-00ah], strict byte 00008h ; 83 7e f6 08 + jnc short 02b3fh ; 73 1e + mov dx, word [bp-00ah] ; 8b 56 f6 add dx, dx ; 01 d2 add dx, strict byte 00050h ; 83 c2 50 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 5c 04 + call 02f93h ; e8 64 04 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 61 04 + call 02fa1h ; e8 69 04 inc cx ; 41 inc cx ; 41 - inc word [bp-004h] ; ff 46 fc - jmp short 02a97h ; eb dc + inc word [bp-00ah] ; ff 46 f6 + jmp short 02b1bh ; eb dc mov dx, strict word 0004eh ; ba 4e 00 mov ax, strict word 00040h ; b8 40 00 - call 02f07h ; e8 43 04 + call 02f93h ; e8 4b 04 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 48 04 + call 02fa1h ; e8 50 04 inc cx ; 41 inc cx ; 41 mov dx, strict word 00062h ; ba 62 00 mov ax, strict word 00040h ; b8 40 00 - call 02eebh ; e8 13 04 + call 02f77h ; e8 1b 04 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 17 04 + call 02f85h ; e8 1f 04 inc cx ; 41 mov dx, strict word 0007ch ; ba 7c 00 xor ax, ax ; 31 c0 - call 02f07h ; e8 1c 04 + call 02f93h ; e8 24 04 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 21 04 + call 02fa1h ; e8 29 04 inc cx ; 41 inc cx ; 41 mov dx, strict word 0007eh ; ba 7e 00 xor ax, ax ; 31 c0 - call 02f07h ; e8 09 04 + call 02f93h ; e8 11 04 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 0e 04 + call 02fa1h ; e8 16 04 inc cx ; 41 inc cx ; 41 mov dx, 0010ch ; ba 0c 01 xor ax, ax ; 31 c0 - call 02f07h ; e8 f6 03 + call 02f93h ; e8 fe 03 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 fb 03 + call 02fa1h ; e8 03 04 inc cx ; 41 inc cx ; 41 mov dx, 0010eh ; ba 0e 01 xor ax, ax ; 31 c0 - call 02f07h ; e8 e3 03 + call 02f93h ; e8 eb 03 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f15h ; e8 e8 03 + call 02fa1h ; e8 f0 03 inc cx ; 41 inc cx ; 41 - test byte [bp-006h], 004h ; f6 46 fa 04 - je short 02b9ch ; 74 67 + test byte [bp-00ch], 004h ; f6 46 f4 04 + je short 02c20h ; 74 67 mov dx, 003c7h ; ba c7 03 in AL, DX ; ec db 02ah, 0e4h @@ -4995,7 +5091,7 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 b4 03 + call 02f85h ; e8 bc 03 inc cx ; 41 mov dx, 003c8h ; ba c8 03 in AL, DX ; ec @@ -5004,7 +5100,7 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 a3 03 + call 02f85h ; e8 ab 03 inc cx ; 41 mov dx, 003c6h ; ba c6 03 in AL, DX ; ec @@ -5013,16 +5109,16 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 92 03 + call 02f85h ; e8 9a 03 inc cx ; 41 xor al, al ; 30 c0 mov dx, 003c8h ; ba c8 03 out DX, AL ; ee xor ah, ah ; 30 e4 - mov word [bp-004h], ax ; 89 46 fc - jmp short 02b7ch ; eb 07 - cmp word [bp-004h], 00300h ; 81 7e fc 00 03 - jnc short 02b92h ; 73 16 + mov word [bp-00ah], ax ; 89 46 f6 + jmp short 02c00h ; eb 07 + cmp word [bp-00ah], 00300h ; 81 7e f6 00 03 + jnc short 02c16h ; 73 16 mov dx, 003c9h ; ba c9 03 in AL, DX ; ec db 02ah, 0e4h @@ -5030,94 +5126,97 @@ biosfn_save_video_state_: ; 0xc283e LB 0x365 movzx bx, al ; 0f b6 d8 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 6d 03 + call 02f85h ; e8 75 03 inc cx ; 41 - inc word [bp-004h] ; ff 46 fc - jmp short 02b75h ; eb e3 + inc word [bp-00ah] ; ff 46 f6 + jmp short 02bf9h ; eb e3 xor bx, bx ; 31 db mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 5e 03 + call 02f85h ; e8 66 03 inc cx ; 41 mov ax, cx ; 89 c8 - leave ; c9 + lea sp, [bp-006h] ; 8d 66 fa pop di ; 5f pop si ; 5e pop cx ; 59 + pop bp ; 5d retn ; c3 -biosfn_restore_video_state_: ; 0xc2ba3 LB 0x321 +biosfn_restore_video_state_: ; 0xc2c2a LB 0x326 + push bp ; 55 + mov bp, sp ; 89 e5 push cx ; 51 push si ; 56 push di ; 57 - enter 00006h, 000h ; c8 06 00 00 + sub sp, strict byte 00006h ; 83 ec 06 push ax ; 50 mov si, dx ; 89 d6 mov cx, bx ; 89 d9 - test byte [bp-008h], 001h ; f6 46 f8 01 - je near 02d01h ; 0f 84 4a 01 + test byte [bp-00eh], 001h ; f6 46 f2 01 + je near 02d8ah ; 0f 84 4a 01 mov dx, 003dah ; ba da 03 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 lea dx, [bx+040h] ; 8d 57 40 mov ax, si ; 89 f0 - call 02f07h ; e8 42 03 + call 02f93h ; e8 45 03 mov di, ax ; 89 c7 - mov word [bp-002h], strict word 00001h ; c7 46 fe 01 00 + mov word [bp-008h], strict word 00001h ; c7 46 f8 01 00 lea cx, [bx+005h] ; 8d 4f 05 - jmp short 02bd7h ; eb 06 - cmp word [bp-002h], strict byte 00004h ; 83 7e fe 04 - jnbe short 02befh ; 77 18 - mov al, byte [bp-002h] ; 8a 46 fe + jmp short 02c60h ; eb 06 + cmp word [bp-008h], strict byte 00004h ; 83 7e f8 04 + jnbe short 02c78h ; 77 18 + mov al, byte [bp-008h] ; 8a 46 f8 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 06 03 + call 02f77h ; e8 09 03 mov dx, 003c5h ; ba c5 03 out DX, AL ; ee inc cx ; 41 - inc word [bp-002h] ; ff 46 fe - jmp short 02bd1h ; eb e2 + inc word [bp-008h] ; ff 46 f8 + jmp short 02c5ah ; eb e2 xor al, al ; 30 c0 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 ef 02 + call 02f77h ; e8 f2 02 mov dx, 003c5h ; ba c5 03 out DX, AL ; ee inc cx ; 41 mov ax, strict word 00011h ; b8 11 00 mov dx, di ; 89 fa out DX, ax ; ef - mov word [bp-002h], strict word 00000h ; c7 46 fe 00 00 - jmp short 02c14h ; eb 06 - cmp word [bp-002h], strict byte 00018h ; 83 7e fe 18 - jnbe short 02c31h ; 77 1d - cmp word [bp-002h], strict byte 00011h ; 83 7e fe 11 - je short 02c2bh ; 74 11 - mov al, byte [bp-002h] ; 8a 46 fe + mov word [bp-008h], strict word 00000h ; c7 46 f8 00 00 + jmp short 02c9dh ; eb 06 + cmp word [bp-008h], strict byte 00018h ; 83 7e f8 18 + jnbe short 02cbah ; 77 1d + cmp word [bp-008h], strict byte 00011h ; 83 7e f8 11 + je short 02cb4h ; 74 11 + mov al, byte [bp-008h] ; 8a 46 f8 mov dx, di ; 89 fa out DX, AL ; ee mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 c4 02 + call 02f77h ; e8 c7 02 lea dx, [di+001h] ; 8d 55 01 out DX, AL ; ee inc cx ; 41 - inc word [bp-002h] ; ff 46 fe - jmp short 02c0eh ; eb dd + inc word [bp-008h] ; ff 46 f8 + jmp short 02c97h ; eb dd mov dx, 003cch ; ba cc 03 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 and AL, strict byte 0feh ; 24 fe - mov word [bp-004h], ax ; 89 46 fc + mov word [bp-00ah], ax ; 89 46 f6 cmp di, 003d4h ; 81 ff d4 03 - jne short 02c46h ; 75 04 - or byte [bp-004h], 001h ; 80 4e fc 01 - mov al, byte [bp-004h] ; 8a 46 fc + jne short 02ccfh ; 75 04 + or byte [bp-00ah], 001h ; 80 4e f6 01 + mov al, byte [bp-00ah] ; 8a 46 f6 mov dx, 003c2h ; ba c2 03 out DX, AL ; ee mov AL, strict byte 011h ; b0 11 @@ -5126,249 +5225,249 @@ biosfn_restore_video_state_: ; 0xc2ba3 LB 0x321 mov dx, cx ; 89 ca add dx, strict byte 0fff9h ; 83 c2 f9 mov ax, si ; 89 f0 - call 02eebh ; e8 8f 02 + call 02f77h ; e8 92 02 lea dx, [di+001h] ; 8d 55 01 out DX, AL ; ee lea dx, [bx+003h] ; 8d 57 03 mov ax, si ; 89 f0 - call 02eebh ; e8 83 02 + call 02f77h ; e8 86 02 xor ah, ah ; 30 e4 - mov word [bp-006h], ax ; 89 46 fa + mov word [bp-00ch], ax ; 89 46 f4 mov dx, 003dah ; ba da 03 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - mov word [bp-002h], strict word 00000h ; c7 46 fe 00 00 - jmp short 02c80h ; eb 06 - cmp word [bp-002h], strict byte 00013h ; 83 7e fe 13 - jnbe short 02c9eh ; 77 1e - mov ax, word [bp-006h] ; 8b 46 fa + mov word [bp-008h], strict word 00000h ; c7 46 f8 00 00 + jmp short 02d09h ; eb 06 + cmp word [bp-008h], strict byte 00013h ; 83 7e f8 13 + jnbe short 02d27h ; 77 1e + mov ax, word [bp-00ch] ; 8b 46 f4 and ax, strict word 00020h ; 25 20 00 - or ax, word [bp-002h] ; 0b 46 fe + or ax, word [bp-008h] ; 0b 46 f8 mov dx, 003c0h ; ba c0 03 out DX, AL ; ee mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 57 02 + call 02f77h ; e8 5a 02 mov dx, 003c0h ; ba c0 03 out DX, AL ; ee inc cx ; 41 - inc word [bp-002h] ; ff 46 fe - jmp short 02c7ah ; eb dc - mov al, byte [bp-006h] ; 8a 46 fa + inc word [bp-008h] ; ff 46 f8 + jmp short 02d03h ; eb dc + mov al, byte [bp-00ch] ; 8a 46 f4 mov dx, 003c0h ; ba c0 03 out DX, AL ; ee mov dx, 003dah ; ba da 03 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - mov word [bp-002h], strict word 00000h ; c7 46 fe 00 00 - jmp short 02cb8h ; eb 06 - cmp word [bp-002h], strict byte 00008h ; 83 7e fe 08 - jnbe short 02cd0h ; 77 18 - mov al, byte [bp-002h] ; 8a 46 fe + mov word [bp-008h], strict word 00000h ; c7 46 f8 00 00 + jmp short 02d41h ; eb 06 + cmp word [bp-008h], strict byte 00008h ; 83 7e f8 08 + jnbe short 02d59h ; 77 18 + mov al, byte [bp-008h] ; 8a 46 f8 mov dx, 003ceh ; ba ce 03 out DX, AL ; ee mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 25 02 + call 02f77h ; e8 28 02 mov dx, 003cfh ; ba cf 03 out DX, AL ; ee inc cx ; 41 - inc word [bp-002h] ; ff 46 fe - jmp short 02cb2h ; eb e2 + inc word [bp-008h] ; ff 46 f8 + jmp short 02d3bh ; eb e2 add cx, strict byte 00006h ; 83 c1 06 mov dx, bx ; 89 da mov ax, si ; 89 f0 - call 02eebh ; e8 11 02 + call 02f77h ; e8 14 02 mov dx, 003c4h ; ba c4 03 out DX, AL ; ee inc bx ; 43 mov dx, bx ; 89 da mov ax, si ; 89 f0 - call 02eebh ; e8 05 02 + call 02f77h ; e8 08 02 mov dx, di ; 89 fa out DX, AL ; ee inc bx ; 43 mov dx, bx ; 89 da mov ax, si ; 89 f0 - call 02eebh ; e8 fa 01 + call 02f77h ; e8 fd 01 mov dx, 003ceh ; ba ce 03 out DX, AL ; ee lea dx, [bx+002h] ; 8d 57 02 mov ax, si ; 89 f0 - call 02eebh ; e8 ee 01 + call 02f77h ; e8 f1 01 lea dx, [di+006h] ; 8d 55 06 out DX, AL ; ee - test byte [bp-008h], 002h ; f6 46 f8 02 - je near 02e70h ; 0f 84 67 01 + test byte [bp-00eh], 002h ; f6 46 f2 02 + je near 02ef9h ; 0f 84 67 01 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 db 01 + call 02f77h ; e8 de 01 movzx bx, al ; 0f b6 d8 mov dx, strict word 00049h ; ba 49 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 dd 01 + call 02f85h ; e8 e0 01 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 e3 01 + call 02f93h ; e8 e6 01 mov bx, ax ; 89 c3 mov dx, strict word 0004ah ; ba 4a 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 e6 01 + call 02fa1h ; e8 e9 01 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 cf 01 + call 02f93h ; e8 d2 01 mov bx, ax ; 89 c3 mov dx, strict word 0004ch ; ba 4c 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 d2 01 + call 02fa1h ; e8 d5 01 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 bb 01 + call 02f93h ; e8 be 01 mov bx, ax ; 89 c3 mov dx, strict word 00063h ; ba 63 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 be 01 + call 02fa1h ; e8 c1 01 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 8b 01 + call 02f77h ; e8 8e 01 movzx bx, al ; 0f b6 d8 mov dx, 00084h ; ba 84 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 8d 01 + call 02f85h ; e8 90 01 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 93 01 + call 02f93h ; e8 96 01 mov bx, ax ; 89 c3 mov dx, 00085h ; ba 85 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 96 01 + call 02fa1h ; e8 99 01 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 63 01 + call 02f77h ; e8 66 01 movzx bx, al ; 0f b6 d8 mov dx, 00087h ; ba 87 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 65 01 + call 02f85h ; e8 68 01 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 4f 01 + call 02f77h ; e8 52 01 movzx bx, al ; 0f b6 d8 mov dx, 00088h ; ba 88 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 51 01 + call 02f85h ; e8 54 01 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 3b 01 + call 02f77h ; e8 3e 01 movzx bx, al ; 0f b6 d8 mov dx, 00089h ; ba 89 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 3d 01 + call 02f85h ; e8 40 01 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 43 01 + call 02f93h ; e8 46 01 mov bx, ax ; 89 c3 mov dx, strict word 00060h ; ba 60 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 46 01 - mov word [bp-002h], strict word 00000h ; c7 46 fe 00 00 + call 02fa1h ; e8 49 01 + mov word [bp-008h], strict word 00000h ; c7 46 f8 00 00 inc cx ; 41 inc cx ; 41 - jmp short 02ddeh ; eb 06 - cmp word [bp-002h], strict byte 00008h ; 83 7e fe 08 - jnc short 02dfch ; 73 1e + jmp short 02e67h ; eb 06 + cmp word [bp-008h], strict byte 00008h ; 83 7e f8 08 + jnc short 02e85h ; 73 1e mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 22 01 + call 02f93h ; e8 25 01 mov bx, ax ; 89 c3 - mov dx, word [bp-002h] ; 8b 56 fe + mov dx, word [bp-008h] ; 8b 56 f8 add dx, dx ; 01 d2 add dx, strict byte 00050h ; 83 c2 50 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 20 01 + call 02fa1h ; e8 23 01 inc cx ; 41 inc cx ; 41 - inc word [bp-002h] ; ff 46 fe - jmp short 02dd8h ; eb dc + inc word [bp-008h] ; ff 46 f8 + jmp short 02e61h ; eb dc mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 04 01 + call 02f93h ; e8 07 01 mov bx, ax ; 89 c3 mov dx, strict word 0004eh ; ba 4e 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 07 01 + call 02fa1h ; e8 0a 01 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 d4 00 + call 02f77h ; e8 d7 00 movzx bx, al ; 0f b6 d8 mov dx, strict word 00062h ; ba 62 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 d6 00 + call 02f85h ; e8 d9 00 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 dc 00 + call 02f93h ; e8 df 00 mov bx, ax ; 89 c3 mov dx, strict word 0007ch ; ba 7c 00 xor ax, ax ; 31 c0 - call 02f15h ; e8 e0 00 + call 02fa1h ; e8 e3 00 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 c9 00 + call 02f93h ; e8 cc 00 mov bx, ax ; 89 c3 mov dx, strict word 0007eh ; ba 7e 00 xor ax, ax ; 31 c0 - call 02f15h ; e8 cd 00 + call 02fa1h ; e8 d0 00 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 b6 00 + call 02f93h ; e8 b9 00 mov bx, ax ; 89 c3 mov dx, 0010ch ; ba 0c 01 xor ax, ax ; 31 c0 - call 02f15h ; e8 ba 00 + call 02fa1h ; e8 bd 00 inc cx ; 41 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02f07h ; e8 a3 00 + call 02f93h ; e8 a6 00 mov bx, ax ; 89 c3 mov dx, 0010eh ; ba 0e 01 xor ax, ax ; 31 c0 - call 02f15h ; e8 a7 00 + call 02fa1h ; e8 aa 00 inc cx ; 41 inc cx ; 41 - test byte [bp-008h], 004h ; f6 46 f8 04 - je short 02ebdh ; 74 47 + test byte [bp-00eh], 004h ; f6 46 f2 04 + je short 02f46h ; 74 47 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 6d 00 + call 02f77h ; e8 70 00 xor ah, ah ; 30 e4 - mov word [bp-004h], ax ; 89 46 fc + mov word [bp-00ah], ax ; 89 46 f6 inc cx ; 41 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 60 00 + call 02f77h ; e8 63 00 mov dx, 003c6h ; ba c6 03 out DX, AL ; ee inc cx ; 41 @@ -5376,29 +5475,30 @@ biosfn_restore_video_state_: ; 0xc2ba3 LB 0x321 mov dx, 003c8h ; ba c8 03 out DX, AL ; ee xor ah, ah ; 30 e4 - mov word [bp-002h], ax ; 89 46 fe - jmp short 02ea4h ; eb 07 - cmp word [bp-002h], 00300h ; 81 7e fe 00 03 - jnc short 02eb5h ; 73 11 + mov word [bp-008h], ax ; 89 46 f8 + jmp short 02f2dh ; eb 07 + cmp word [bp-008h], 00300h ; 81 7e f8 00 03 + jnc short 02f3eh ; 73 11 mov dx, cx ; 89 ca mov ax, si ; 89 f0 - call 02eebh ; e8 40 00 + call 02f77h ; e8 43 00 mov dx, 003c9h ; ba c9 03 out DX, AL ; ee inc cx ; 41 - inc word [bp-002h] ; ff 46 fe - jmp short 02e9dh ; eb e8 + inc word [bp-008h] ; ff 46 f8 + jmp short 02f26h ; eb e8 inc cx ; 41 - mov al, byte [bp-004h] ; 8a 46 fc + mov al, byte [bp-00ah] ; 8a 46 f6 mov dx, 003c8h ; ba c8 03 out DX, AL ; ee mov ax, cx ; 89 c8 - leave ; c9 + lea sp, [bp-006h] ; 8d 66 fa pop di ; 5f pop si ; 5e pop cx ; 59 + pop bp ; 5d retn ; c3 -find_vga_entry_: ; 0xc2ec4 LB 0x27 +find_vga_entry_: ; 0xc2f50 LB 0x27 push bx ; 53 push dx ; 52 push bp ; 55 @@ -5406,22 +5506,22 @@ find_vga_entry_: ; 0xc2ec4 LB 0x27 mov dl, al ; 88 c2 mov AH, strict byte 0ffh ; b4 ff xor al, al ; 30 c0 - jmp short 02ed7h ; eb 06 + jmp short 02f63h ; eb 06 db 0feh, 0c0h ; inc al ; fe c0 cmp AL, strict byte 00fh ; 3c 0f - jnbe short 02ee5h ; 77 0e + jnbe short 02f71h ; 77 0e movzx bx, al ; 0f b6 d8 sal bx, 003h ; c1 e3 03 - cmp dl, byte [bx+0482eh] ; 3a 97 2e 48 - jne short 02ed1h ; 75 ee + cmp dl, byte [bx+0482fh] ; 3a 97 2f 48 + jne short 02f5dh ; 75 ee mov ah, al ; 88 c4 mov al, ah ; 88 e0 pop bp ; 5d pop dx ; 5a pop bx ; 5b retn ; c3 -read_byte_: ; 0xc2eeb LB 0xe +read_byte_: ; 0xc2f77 LB 0xe push bx ; 53 push bp ; 55 mov bp, sp ; 89 e5 @@ -5431,7 +5531,7 @@ read_byte_: ; 0xc2eeb LB 0xe pop bp ; 5d pop bx ; 5b retn ; c3 -write_byte_: ; 0xc2ef9 LB 0xe +write_byte_: ; 0xc2f85 LB 0xe push si ; 56 push bp ; 55 mov bp, sp ; 89 e5 @@ -5441,7 +5541,7 @@ write_byte_: ; 0xc2ef9 LB 0xe pop bp ; 5d pop si ; 5e retn ; c3 -read_word_: ; 0xc2f07 LB 0xe +read_word_: ; 0xc2f93 LB 0xe push bx ; 53 push bp ; 55 mov bp, sp ; 89 e5 @@ -5451,7 +5551,7 @@ read_word_: ; 0xc2f07 LB 0xe pop bp ; 5d pop bx ; 5b retn ; c3 -write_word_: ; 0xc2f15 LB 0xe +write_word_: ; 0xc2fa1 LB 0xe push si ; 56 push bp ; 55 mov bp, sp ; 89 e5 @@ -5461,7 +5561,7 @@ write_word_: ; 0xc2f15 LB 0xe pop bp ; 5d pop si ; 5e retn ; c3 -read_dword_: ; 0xc2f23 LB 0x12 +read_dword_: ; 0xc2faf LB 0x12 push bx ; 53 push bp ; 55 mov bp, sp ; 89 e5 @@ -5472,7 +5572,7 @@ read_dword_: ; 0xc2f23 LB 0x12 pop bp ; 5d pop bx ; 5b retn ; c3 -write_dword_: ; 0xc2f35 LB 0x7f +write_dword_: ; 0xc2fc1 LB 0x7f push si ; 56 push bp ; 55 mov bp, sp ; 89 e5 @@ -5494,416 +5594,418 @@ write_dword_: ; 0xc2f35 LB 0x7f push ES ; 06 add ax, 00304h ; 05 04 03 add al, byte [bx+di] ; 02 01 - add byte [bx+033h], dh ; 00 77 33 - loop 02f8fh ; e2 2f - and byte [bx+si], dh ; 20 30 - xor AL, strict byte 030h ; 34 30 - inc bp ; 45 - xor byte [bx+di+030h], bl ; 30 59 30 - push strict byte 00030h ; 6a 30 - je short 02f9ch ; 74 30 - scasb ; ae - xor byte [bp+si-03cd0h], dh ; 30 b2 30 c3 - xor al, ah ; 30 e0 - xor ch, bh ; 30 fd - xor byte [di], bl ; 30 1d + add byte [bp+di], al ; 00 03 + xor AL, strict byte 06eh ; 34 6e + xor byte [si-03fd0h], ch ; 30 ac 30 c0 + xor cl, dl ; 30 d1 + xor ch, ah ; 30 e5 + xor dh, dh ; 30 f6 + xor byte [bx+si], al ; 30 00 xor word [bp+si], di ; 31 3a - xor word [bx+di+031h], dx ; 31 51 31 - pop bp ; 5d - xor word [bx+si], di ; 31 38 - xor dh, byte [bp+di+032h] ; 32 73 32 - mov word [0b832h], ax ; a3 32 b8 - db 032h, 0fah - ; xor bh, dl ; 32 fa - xor dh, byte [bx+si] ; 32 30 - and AL, strict byte 023h ; 24 23 - and ah, byte [bx+di] ; 22 21 - and byte [si], dl ; 20 14 - adc dl, byte [bx+di] ; 12 11 - adc byte [si], al ; 10 04 - add al, byte [bx+di] ; 02 01 - add byte [bx+033h], dh ; 00 77 33 - jle short 02fcbh ; 7e 31 - movsb ; a4 - xor word [di-039cfh], si ; 31 b5 31 c6 - xor word [bp+031h], di ; 31 7e 31 - movsb ; a4 - xor word [di-039cfh], si ; 31 b5 31 c6 - xor di, dx ; 31 d7 - xor bx, sp ; 31 e3 - xor si, di ; 31 fe - xor word [bx+di], cx ; 31 09 - xor dl, byte [si] ; 32 14 - xor bl, byte [bx] ; 32 1f + xor word [04f31h], di ; 31 3e 31 4f + xor word [si+031h], bp ; 31 6c 31 + mov word [bx+di], si ; 89 31 + test ax, 0c631h ; a9 31 c6 + xor bp, bx ; 31 dd + xor cx, bp ; 31 e9 + xor sp, ax ; 31 c4 + db 032h, 0ffh + ; xor bh, bh ; 32 ff + xor ch, byte [bx] ; 32 2f + xor ax, word [si+033h] ; 33 44 33 + xchg byte [bp+di], dh ; 86 33 + xor byte [si], ah ; 30 24 + and sp, word [bp+si] ; 23 22 + and word [bx+si], sp ; 21 20 + adc AL, strict byte 012h ; 14 12 + adc word [bx+si], dx ; 11 10 + add AL, strict byte 002h ; 04 02 + add word [bx+si], ax ; 01 00 + add si, word [si] ; 03 34 + or dh, byte [bp+si] ; 0a 32 + xor byte [bp+si], dh ; 30 32 + inc cx ; 41 + xor dl, byte [bp+si+032h] ; 32 52 32 + or dh, byte [bp+si] ; 0a 32 + xor byte [bp+si], dh ; 30 32 + inc cx ; 41 + xor dl, byte [bp+si+032h] ; 32 52 32 + arpl word [bp+si], si ; 63 32 + outsw ; 6f + xor cl, byte [bp+si-06aceh] ; 32 8a 32 95 + xor ah, byte [bx+si-054ceh] ; 32 a0 32 ab db 032h -_int10_func: ; 0xc2fb4 LB 0x3c7 +_int10_func: ; 0xc3040 LB 0x3ca + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00002h, 000h ; c8 02 00 00 - mov si, word [bp+008h] ; 8b 76 08 - mov ax, word [bp+016h] ; 8b 46 16 + push ax ; 50 + mov si, word [bp+004h] ; 8b 76 04 + mov ax, word [bp+012h] ; 8b 46 12 shr ax, 008h ; c1 e8 08 cmp ax, strict word 0004fh ; 3d 4f 00 - jnbe near 03377h ; 0f 87 ad 03 + jnbe near 03403h ; 0f 87 ad 03 push CS ; 0e pop ES ; 07 mov cx, strict word 00016h ; b9 16 00 - mov di, 02f47h ; bf 47 2f + mov di, 02fd3h ; bf d3 2f repne scasb ; f2 ae sal cx, 1 ; d1 e1 mov di, cx ; 89 cf - mov ax, word [cs:di+02f5ch] ; 2e 8b 85 5c 2f - mov cl, byte [bp+016h] ; 8a 4e 16 + mov ax, word [cs:di+02fe8h] ; 2e 8b 85 e8 2f + mov cl, byte [bp+012h] ; 8a 4e 12 jmp ax ; ff e0 - mov al, byte [bp+016h] ; 8a 46 16 + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - call 00fb8h ; e8 ce df - mov ax, word [bp+016h] ; 8b 46 16 + call 00fdch ; e8 66 df + mov ax, word [bp+012h] ; 8b 46 12 and ax, strict word 0007fh ; 25 7f 00 cmp ax, strict word 00007h ; 3d 07 00 - je short 0300ah ; 74 15 + je short 03096h ; 74 15 cmp ax, strict word 00006h ; 3d 06 00 - je short 03001h ; 74 07 + je short 0308dh ; 74 07 cmp ax, strict word 00005h ; 3d 05 00 - jbe short 0300ah ; 76 0b - jmp short 03013h ; eb 12 - mov ax, word [bp+016h] ; 8b 46 16 + jbe short 03096h ; 76 0b + jmp short 0309fh ; eb 12 + mov ax, word [bp+012h] ; 8b 46 12 xor al, al ; 30 c0 or AL, strict byte 03fh ; 0c 3f - jmp short 0301ah ; eb 10 - mov ax, word [bp+016h] ; 8b 46 16 + jmp short 030a6h ; eb 10 + mov ax, word [bp+012h] ; 8b 46 12 xor al, al ; 30 c0 or AL, strict byte 030h ; 0c 30 - jmp short 0301ah ; eb 07 - mov ax, word [bp+016h] ; 8b 46 16 + jmp short 030a6h ; eb 07 + mov ax, word [bp+012h] ; 8b 46 12 xor al, al ; 30 c0 or AL, strict byte 020h ; 0c 20 - mov word [bp+016h], ax ; 89 46 16 - jmp near 03377h ; e9 57 03 - mov al, byte [bp+014h] ; 8a 46 14 + mov word [bp+012h], ax ; 89 46 12 + jmp near 03403h ; e9 57 03 + mov al, byte [bp+010h] ; 8a 46 10 movzx dx, al ; 0f b6 d0 - mov ax, word [bp+014h] ; 8b 46 14 + mov ax, word [bp+010h] ; 8b 46 10 shr ax, 008h ; c1 e8 08 xor ah, ah ; 30 e4 - call 00da1h ; e8 70 dd - jmp near 03377h ; e9 43 03 - mov dx, word [bp+012h] ; 8b 56 12 - mov ax, word [bp+010h] ; 8b 46 10 + call 00dbah ; e8 fd dc + jmp near 03403h ; e9 43 03 + mov dx, word [bp+00eh] ; 8b 56 0e + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 xor ah, ah ; 30 e4 - call 00e42h ; e8 00 de - jmp near 03377h ; e9 32 03 - lea bx, [bp+012h] ; 8d 5e 12 - lea dx, [bp+014h] ; 8d 56 14 - mov ax, word [bp+010h] ; 8b 46 10 + call 00e5eh ; e8 90 dd + jmp near 03403h ; e9 32 03 + lea bx, [bp+00eh] ; 8d 5e 0e + lea dx, [bp+010h] ; 8d 56 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 xor ah, ah ; 30 e4 - call 00a83h ; e8 2d da - jmp near 03377h ; e9 1e 03 + call 00a88h ; e8 a6 d9 + jmp near 03403h ; e9 1e 03 xor ax, ax ; 31 c0 - mov word [bp+016h], ax ; 89 46 16 - mov word [bp+010h], ax ; 89 46 10 - mov word [bp+014h], ax ; 89 46 14 mov word [bp+012h], ax ; 89 46 12 - jmp near 03377h ; e9 0d 03 + mov word [bp+00ch], ax ; 89 46 0c + mov word [bp+010h], ax ; 89 46 10 + mov word [bp+00eh], ax ; 89 46 0e + jmp near 03403h ; e9 0d 03 mov al, cl ; 88 c8 xor ah, ah ; 30 e4 - call 00ee0h ; e8 6f de - jmp near 03377h ; e9 03 03 + call 00f00h ; e8 03 de + jmp near 03403h ; e9 03 03 mov ax, strict word 00001h ; b8 01 00 push ax ; 50 mov ax, 000ffh ; b8 ff 00 push ax ; 50 - mov al, byte [bp+012h] ; 8a 46 12 + mov al, byte [bp+00eh] ; 8a 46 0e xor ah, ah ; 30 e4 push ax ; 50 - mov ax, word [bp+012h] ; 8b 46 12 + mov ax, word [bp+00eh] ; 8b 46 0e shr ax, 008h ; c1 e8 08 xor ah, ah ; 30 e4 push ax ; 50 - mov al, byte [bp+014h] ; 8a 46 14 + mov al, byte [bp+010h] ; 8a 46 10 movzx cx, al ; 0f b6 c8 - mov ax, word [bp+014h] ; 8b 46 14 + mov ax, word [bp+010h] ; 8b 46 10 shr ax, 008h ; c1 e8 08 movzx bx, al ; 0f b6 d8 - mov ax, word [bp+010h] ; 8b 46 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 movzx dx, al ; 0f b6 d0 - mov al, byte [bp+016h] ; 8a 46 16 + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - call 0152fh ; e8 84 e4 - jmp near 03377h ; e9 c9 02 + call 01568h ; e8 31 e4 + jmp near 03403h ; e9 c9 02 xor ax, ax ; 31 c0 - jmp short 03077h ; eb c5 - lea dx, [bp+016h] ; 8d 56 16 - mov ax, word [bp+010h] ; 8b 46 10 + jmp short 03103h ; eb c5 + lea dx, [bp+012h] ; 8d 56 12 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 xor ah, ah ; 30 e4 - call 00ac3h ; e8 03 da - jmp near 03377h ; e9 b4 02 - mov cx, word [bp+014h] ; 8b 4e 14 - mov al, byte [bp+010h] ; 8a 46 10 + call 00acbh ; e8 7f d9 + jmp near 03403h ; e9 b4 02 + mov cx, word [bp+010h] ; 8b 4e 10 + mov al, byte [bp+00ch] ; 8a 46 0c movzx bx, al ; 0f b6 d8 - mov ax, word [bp+010h] ; 8b 46 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 movzx dx, al ; 0f b6 d0 - mov al, byte [bp+016h] ; 8a 46 16 + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - call 01cbbh ; e8 de eb - jmp near 03377h ; e9 97 02 - mov cx, word [bp+014h] ; 8b 4e 14 - mov al, byte [bp+010h] ; 8a 46 10 + call 01d08h ; e8 9f eb + jmp near 03403h ; e9 97 02 + mov cx, word [bp+010h] ; 8b 4e 10 + mov al, byte [bp+00ch] ; 8a 46 0c movzx bx, al ; 0f b6 d8 - mov ax, word [bp+010h] ; 8b 46 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 movzx dx, al ; 0f b6 d0 - mov al, byte [bp+016h] ; 8a 46 16 + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - call 01e1eh ; e8 24 ed - jmp near 03377h ; e9 7a 02 - mov cx, word [bp+012h] ; 8b 4e 12 - mov bx, word [bp+014h] ; 8b 5e 14 - mov al, byte [bp+016h] ; 8a 46 16 + call 01e70h ; e8 ea ec + jmp near 03403h ; e9 7a 02 + mov cx, word [bp+00eh] ; 8b 4e 0e + mov bx, word [bp+010h] ; 8b 5e 10 + mov al, byte [bp+012h] ; 8a 46 12 movzx dx, al ; 0f b6 d0 - mov ax, word [bp+010h] ; 8b 46 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 - mov word [bp-002h], ax ; 89 46 fe - mov al, byte [bp-002h] ; 8a 46 fe + mov word [bp-006h], ax ; 89 46 fa + mov al, byte [bp-006h] ; 8a 46 fa xor ah, ah ; 30 e4 - call 01f88h ; e8 6e ee - jmp near 03377h ; e9 5a 02 - lea cx, [bp+016h] ; 8d 4e 16 - mov bx, word [bp+012h] ; 8b 5e 12 - mov dx, word [bp+014h] ; 8b 56 14 - mov ax, word [bp+010h] ; 8b 46 10 + call 01fdfh ; e8 39 ee + jmp near 03403h ; e9 5a 02 + lea cx, [bp+012h] ; 8d 4e 12 + mov bx, word [bp+00eh] ; 8b 5e 0e + mov dx, word [bp+010h] ; 8b 56 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 - mov word [bp-002h], ax ; 89 46 fe - mov al, byte [bp-002h] ; 8a 46 fe + mov word [bp-006h], ax ; 89 46 fa + mov al, byte [bp-006h] ; 8a 46 fa xor ah, ah ; 30 e4 - call 00be5h ; e8 ae da - jmp near 03377h ; e9 3d 02 + call 00bf5h ; e8 32 da + jmp near 03403h ; e9 3d 02 mov cx, strict word 00002h ; b9 02 00 - mov al, byte [bp+010h] ; 8a 46 10 + mov al, byte [bp+00ch] ; 8a 46 0c movzx bx, al ; 0f b6 d8 mov dx, 000ffh ; ba ff 00 - mov al, byte [bp+016h] ; 8a 46 16 + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - call 020f0h ; e8 a2 ef - jmp near 03377h ; e9 26 02 - mov dx, word [bp+014h] ; 8b 56 14 - mov ax, word [bp+010h] ; 8b 46 10 - call 00d19h ; e8 bf db - jmp near 03377h ; e9 1a 02 - mov ax, word [bp+016h] ; 8b 46 16 + call 02149h ; e8 6f ef + jmp near 03403h ; e9 26 02 + mov dx, word [bp+010h] ; 8b 56 10 + mov ax, word [bp+00ch] ; 8b 46 0c + call 00d2eh ; e8 48 db + jmp near 03403h ; e9 1a 02 + mov ax, word [bp+012h] ; 8b 46 12 xor ah, ah ; 30 e4 cmp ax, strict word 00030h ; 3d 30 00 - jnbe near 03377h ; 0f 87 0e 02 + jnbe near 03403h ; 0f 87 0e 02 push CS ; 0e pop ES ; 07 mov cx, strict word 0000fh ; b9 0f 00 - mov di, 02f88h ; bf 88 2f + mov di, 03014h ; bf 14 30 repne scasb ; f2 ae sal cx, 1 ; d1 e1 mov di, cx ; 89 cf - mov ax, word [cs:di+02f96h] ; 2e 8b 85 96 2f + mov ax, word [cs:di+03022h] ; 2e 8b 85 22 30 jmp ax ; ff e0 - mov ax, word [bp+010h] ; 8b 46 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 xor ah, ah ; 30 e4 push ax ; 50 - mov al, byte [bp+010h] ; 8a 46 10 + mov al, byte [bp+00ch] ; 8a 46 0c xor ah, ah ; 30 e4 push ax ; 50 - push word [bp+012h] ; ff 76 12 - mov al, byte [bp+016h] ; 8a 46 16 + push word [bp+00eh] ; ff 76 0e + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - mov cx, word [bp+014h] ; 8b 4e 14 - mov bx, word [bp+00ch] ; 8b 5e 0c - mov dx, word [bp+01ah] ; 8b 56 1a - call 0248dh ; e8 ec f2 - jmp near 03377h ; e9 d3 01 - mov al, byte [bp+010h] ; 8a 46 10 + mov cx, word [bp+010h] ; 8b 4e 10 + mov bx, word [bp+008h] ; 8b 5e 08 + mov dx, word [bp+016h] ; 8b 56 16 + call 024f4h ; e8 c7 f2 + jmp near 03403h ; e9 d3 01 + mov al, byte [bp+00ch] ; 8a 46 0c movzx dx, al ; 0f b6 d0 - mov al, byte [bp+016h] ; 8a 46 16 + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - call 02505h ; e8 53 f3 - jmp near 03377h ; e9 c2 01 - mov al, byte [bp+010h] ; 8a 46 10 + call 02571h ; e8 33 f3 + jmp near 03403h ; e9 c2 01 + mov al, byte [bp+00ch] ; 8a 46 0c movzx dx, al ; 0f b6 d0 - mov al, byte [bp+016h] ; 8a 46 16 + mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 - call 02571h ; e8 ae f3 - jmp near 03377h ; e9 b1 01 - mov al, byte [bp+010h] ; 8a 46 10 + call 025e1h ; e8 92 f3 + jmp near 03403h ; e9 b1 01 + mov al, byte [bp+00ch] ; 8a 46 0c movzx dx, al ; 0f b6 d0 - mov al, byte [bp+016h] ; 8a 46 16 - xor ah, ah ; 30 e4 - call 025dfh ; e8 0b f4 - jmp near 03377h ; e9 a0 01 - mov dx, word [bp+00ch] ; 8b 56 0c - mov ax, word [bp+01ah] ; 8b 46 1a - call 0264dh ; e8 6d f4 - jmp near 03377h ; e9 94 01 mov al, byte [bp+012h] ; 8a 46 12 xor ah, ah ; 30 e4 + call 02653h ; e8 f3 f3 + jmp near 03403h ; e9 a0 01 + mov dx, word [bp+008h] ; 8b 56 08 + mov ax, word [bp+016h] ; 8b 46 16 + call 026c5h ; e8 59 f4 + jmp near 03403h ; e9 94 01 + mov al, byte [bp+00eh] ; 8a 46 0e + xor ah, ah ; 30 e4 push ax ; 50 - mov al, byte [bp+010h] ; 8a 46 10 + mov al, byte [bp+00ch] ; 8a 46 0c movzx cx, al ; 0f b6 c8 - mov bx, word [bp+014h] ; 8b 5e 14 - mov dx, word [bp+00ch] ; 8b 56 0c - mov ax, word [bp+01ah] ; 8b 46 1a - call 02652h ; e8 57 f4 - jmp near 03377h ; e9 79 01 - mov al, byte [bp+010h] ; 8a 46 10 + mov bx, word [bp+010h] ; 8b 5e 10 + mov dx, word [bp+008h] ; 8b 56 08 + mov ax, word [bp+016h] ; 8b 46 16 + call 026cah ; e8 43 f4 + jmp near 03403h ; e9 79 01 + mov al, byte [bp+00ch] ; 8a 46 0c xor ah, ah ; 30 e4 - call 02659h ; e8 53 f4 - jmp near 03377h ; e9 6e 01 - mov al, byte [bp+010h] ; 8a 46 10 + call 026d1h ; e8 3f f4 + jmp near 03403h ; e9 6e 01 + mov al, byte [bp+00ch] ; 8a 46 0c xor ah, ah ; 30 e4 - call 0265eh ; e8 4d f4 - jmp near 03377h ; e9 63 01 - mov al, byte [bp+010h] ; 8a 46 10 + call 026d6h ; e8 39 f4 + jmp near 03403h ; e9 63 01 + mov al, byte [bp+00ch] ; 8a 46 0c xor ah, ah ; 30 e4 - call 02663h ; e8 47 f4 - jmp near 03377h ; e9 58 01 - lea ax, [bp+012h] ; 8d 46 12 + call 026dbh ; e8 33 f4 + jmp near 03403h ; e9 58 01 + lea ax, [bp+00eh] ; 8d 46 0e push ax ; 50 - lea cx, [bp+014h] ; 8d 4e 14 - lea bx, [bp+00ch] ; 8d 5e 0c - lea dx, [bp+01ah] ; 8d 56 1a - mov ax, word [bp+010h] ; 8b 46 10 + lea cx, [bp+010h] ; 8d 4e 10 + lea bx, [bp+008h] ; 8d 5e 08 + lea dx, [bp+016h] ; 8d 56 16 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 - call 00b66h ; e8 31 d9 - jmp near 03377h ; e9 3f 01 - mov ax, word [bp+010h] ; 8b 46 10 + call 00b73h ; e8 b2 d8 + jmp near 03403h ; e9 3f 01 + mov ax, word [bp+00ch] ; 8b 46 0c xor ah, ah ; 30 e4 cmp ax, strict word 00036h ; 3d 36 00 - je short 0326ah ; 74 28 + je short 032f6h ; 74 28 cmp ax, strict word 00035h ; 3d 35 00 - je short 03254h ; 74 0d + je short 032e0h ; 74 0d cmp ax, strict word 00020h ; 3d 20 00 - jne near 03377h ; 0f 85 29 01 - call 02668h ; e8 17 f4 - jmp near 03377h ; e9 23 01 + jne near 03403h ; 0f 85 29 01 + call 026e0h ; e8 03 f4 + jmp near 03403h ; e9 23 01 movzx ax, cl ; 0f b6 c1 - mov bx, word [bp+012h] ; 8b 5e 12 - mov dx, word [bp+01ah] ; 8b 56 1a - call 0266dh ; e8 0d f4 - mov ax, word [bp+016h] ; 8b 46 16 + mov bx, word [bp+00eh] ; 8b 5e 0e + mov dx, word [bp+016h] ; 8b 56 16 + call 026e5h ; e8 f9 f3 + mov ax, word [bp+012h] ; 8b 46 12 xor al, al ; 30 c0 or AL, strict byte 012h ; 0c 12 - jmp near 0301ah ; e9 b0 fd + jmp near 030a6h ; e9 b0 fd mov al, cl ; 88 c8 xor ah, ah ; 30 e4 - call 02672h ; e8 01 f4 - jmp short 03260h ; eb ed - push word [bp+00ch] ; ff 76 0c - push word [bp+01ah] ; ff 76 1a - mov al, byte [bp+012h] ; 8a 46 12 + call 026eah ; e8 ed f3 + jmp short 032ech ; eb ed + push word [bp+008h] ; ff 76 08 + push word [bp+016h] ; ff 76 16 + mov al, byte [bp+00eh] ; 8a 46 0e xor ah, ah ; 30 e4 push ax ; 50 - mov ax, word [bp+012h] ; 8b 46 12 + mov ax, word [bp+00eh] ; 8b 46 0e shr ax, 008h ; c1 e8 08 xor ah, ah ; 30 e4 push ax ; 50 - mov al, byte [bp+010h] ; 8a 46 10 + mov al, byte [bp+00ch] ; 8a 46 0c movzx bx, al ; 0f b6 d8 - mov ax, word [bp+010h] ; 8b 46 10 + mov ax, word [bp+00ch] ; 8b 46 0c shr ax, 008h ; c1 e8 08 movzx dx, al ; 0f b6 d0 movzx ax, cl ; 0f b6 c1 - mov cx, word [bp+014h] ; 8b 4e 14 - call 02677h ; e8 d7 f3 - jmp near 03377h ; e9 d4 00 + mov cx, word [bp+010h] ; 8b 4e 10 + call 026efh ; e8 c3 f3 + jmp near 03403h ; e9 d4 00 mov bx, si ; 89 f3 - mov dx, word [bp+01ah] ; 8b 56 1a - mov ax, word [bp+010h] ; 8b 46 10 - call 0270eh ; e8 60 f4 - mov ax, word [bp+016h] ; 8b 46 16 + mov dx, word [bp+016h] ; 8b 56 16 + mov ax, word [bp+00ch] ; 8b 46 0c + call 0278bh ; e8 51 f4 + mov ax, word [bp+012h] ; 8b 46 12 xor al, al ; 30 c0 or AL, strict byte 01bh ; 0c 1b - jmp near 0301ah ; e9 62 fd - mov ax, word [bp+016h] ; 8b 46 16 + jmp near 030a6h ; e9 62 fd + mov ax, word [bp+012h] ; 8b 46 12 xor ah, ah ; 30 e4 cmp ax, strict word 00002h ; 3d 02 00 - je short 032e4h ; 74 22 + je short 03370h ; 74 22 cmp ax, strict word 00001h ; 3d 01 00 - je short 032d6h ; 74 0f + je short 03362h ; 74 0f test ax, ax ; 85 c0 - jne short 032f0h ; 75 25 - lea dx, [bp+010h] ; 8d 56 10 - mov ax, word [bp+014h] ; 8b 46 14 - call 0282fh ; e8 5b f5 - jmp short 032f0h ; eb 1a - mov bx, word [bp+010h] ; 8b 5e 10 - mov dx, word [bp+01ah] ; 8b 56 1a - mov ax, word [bp+014h] ; 8b 46 14 - call 0283eh ; e8 5c f5 - jmp short 032f0h ; eb 0c - mov bx, word [bp+010h] ; 8b 5e 10 - mov dx, word [bp+01ah] ; 8b 56 1a - mov ax, word [bp+014h] ; 8b 46 14 - call 02ba3h ; e8 b3 f8 - mov ax, word [bp+016h] ; 8b 46 16 + jne short 0337ch ; 75 25 + lea dx, [bp+00ch] ; 8d 56 0c + mov ax, word [bp+010h] ; 8b 46 10 + call 028afh ; e8 4f f5 + jmp short 0337ch ; eb 1a + mov bx, word [bp+00ch] ; 8b 5e 0c + mov dx, word [bp+016h] ; 8b 56 16 + mov ax, word [bp+010h] ; 8b 46 10 + call 028c1h ; e8 53 f5 + jmp short 0337ch ; eb 0c + mov bx, word [bp+00ch] ; 8b 5e 0c + mov dx, word [bp+016h] ; 8b 56 16 + mov ax, word [bp+010h] ; 8b 46 10 + call 02c2ah ; e8 ae f8 + mov ax, word [bp+012h] ; 8b 46 12 xor al, al ; 30 c0 or AL, strict byte 01ch ; 0c 1c - jmp near 0301ah ; e9 20 fd - call 007a4h ; e8 a7 d4 + jmp near 030a6h ; e9 20 fd + call 007a4h ; e8 1b d4 test ax, ax ; 85 c0 - je near 03372h ; 0f 84 6f 00 - mov ax, word [bp+016h] ; 8b 46 16 + je near 033feh ; 0f 84 6f 00 + mov ax, word [bp+012h] ; 8b 46 12 xor ah, ah ; 30 e4 cmp ax, strict word 00002h ; 3d 02 00 - jc short 03320h ; 72 13 - jbe short 03346h ; 76 37 + jc short 033ach ; 72 13 + jbe short 033d2h ; 76 37 cmp ax, strict word 0000ah ; 3d 0a 00 - je short 0336bh ; 74 57 + je short 033f7h ; 74 57 cmp ax, strict word 00009h ; 3d 09 00 - je short 0336bh ; 74 52 + je short 033f7h ; 74 52 cmp ax, strict word 00004h ; 3d 04 00 - je short 03356h ; 74 38 - jmp short 0336bh ; eb 4b + je short 033e2h ; 74 38 + jmp short 033f7h ; eb 4b cmp ax, strict word 00001h ; 3d 01 00 - je short 03336h ; 74 11 + je short 033c2h ; 74 11 test ax, ax ; 85 c0 - jne short 0336bh ; 75 42 + jne short 033f7h ; 75 42 mov bx, si ; 89 f3 - mov dx, word [bp+01ah] ; 8b 56 1a - lea ax, [bp+016h] ; 8d 46 16 - call 03486h ; e8 52 01 - jmp short 03377h ; eb 41 - mov cx, si ; 89 f1 - mov bx, word [bp+01ah] ; 8b 5e 1a - mov dx, word [bp+014h] ; 8b 56 14 - lea ax, [bp+016h] ; 8d 46 16 - call 035aah ; e8 66 02 - jmp short 03377h ; eb 31 + mov dx, word [bp+016h] ; 8b 56 16 + lea ax, [bp+012h] ; 8d 46 12 + call 03530h ; e8 70 01 + jmp short 03403h ; eb 41 mov cx, si ; 89 f1 - mov bx, word [bp+01ah] ; 8b 5e 1a + mov bx, word [bp+016h] ; 8b 5e 16 mov dx, word [bp+010h] ; 8b 56 10 - lea ax, [bp+016h] ; 8d 46 16 - call 0365ah ; e8 06 03 - jmp short 03377h ; eb 21 - lea ax, [bp+010h] ; 8d 46 10 + lea ax, [bp+012h] ; 8d 46 12 + call 03659h ; e8 89 02 + jmp short 03403h ; eb 31 + mov cx, si ; 89 f1 + mov bx, word [bp+016h] ; 8b 5e 16 + mov dx, word [bp+00ch] ; 8b 56 0c + lea ax, [bp+012h] ; 8d 46 12 + call 0370dh ; e8 2d 03 + jmp short 03403h ; eb 21 + lea ax, [bp+00ch] ; 8d 46 0c push ax ; 50 - mov cx, word [bp+01ah] ; 8b 4e 1a - mov bx, word [bp+012h] ; 8b 5e 12 - mov dx, word [bp+014h] ; 8b 56 14 - lea ax, [bp+016h] ; 8d 46 16 - call 03836h ; e8 cd 04 - jmp short 03377h ; eb 0c - mov word [bp+016h], 00100h ; c7 46 16 00 01 - jmp short 03377h ; eb 05 - mov word [bp+016h], 00100h ; c7 46 16 00 01 - leave ; c9 + mov cx, word [bp+016h] ; 8b 4e 16 + mov bx, word [bp+00eh] ; 8b 5e 0e + mov dx, word [bp+010h] ; 8b 56 10 + lea ax, [bp+012h] ; 8d 46 12 + call 038f4h ; e8 ff 04 + jmp short 03403h ; eb 0c + mov word [bp+012h], 00100h ; c7 46 12 00 01 + jmp short 03403h ; eb 05 + mov word [bp+012h], 00100h ; c7 46 12 00 01 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn ; c3 -dispi_set_xres_: ; 0xc337b LB 0x18 - push bx ; 53 - push dx ; 52 +dispi_set_xres_: ; 0xc340a LB 0x1b push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 + push dx ; 52 mov bx, ax ; 89 c3 mov ax, strict word 00001h ; b8 01 00 mov dx, 001ceh ; ba ce 01 @@ -5911,15 +6013,16 @@ dispi_set_xres_: ; 0xc337b LB 0x18 mov ax, bx ; 89 d8 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef - pop bp ; 5d + lea sp, [bp-004h] ; 8d 66 fc pop dx ; 5a pop bx ; 5b + pop bp ; 5d retn ; c3 -dispi_set_yres_: ; 0xc3393 LB 0x18 - push bx ; 53 - push dx ; 52 +dispi_set_yres_: ; 0xc3425 LB 0x1b push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 + push dx ; 52 mov bx, ax ; 89 c3 mov ax, strict word 00002h ; b8 02 00 mov dx, 001ceh ; ba ce 01 @@ -5927,15 +6030,16 @@ dispi_set_yres_: ; 0xc3393 LB 0x18 mov ax, bx ; 89 d8 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef - pop bp ; 5d + lea sp, [bp-004h] ; 8d 66 fc pop dx ; 5a pop bx ; 5b + pop bp ; 5d retn ; c3 -dispi_set_bpp_: ; 0xc33ab LB 0x18 - push bx ; 53 - push dx ; 52 +dispi_set_bpp_: ; 0xc3440 LB 0x1b push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 + push dx ; 52 mov bx, ax ; 89 c3 mov ax, strict word 00003h ; b8 03 00 mov dx, 001ceh ; ba ce 01 @@ -5943,26 +6047,28 @@ dispi_set_bpp_: ; 0xc33ab LB 0x18 mov ax, bx ; 89 d8 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef - pop bp ; 5d + lea sp, [bp-004h] ; 8d 66 fc pop dx ; 5a pop bx ; 5b + pop bp ; 5d retn ; c3 -in_word_: ; 0xc33c3 LB 0xf - push bx ; 53 +in_word_: ; 0xc345b LB 0x12 push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 mov bx, ax ; 89 c3 mov ax, dx ; 89 d0 mov dx, bx ; 89 da out DX, ax ; ef in ax, DX ; ed - pop bp ; 5d + lea sp, [bp-002h] ; 8d 66 fe pop bx ; 5b + pop bp ; 5d retn ; c3 -in_byte_: ; 0xc33d2 LB 0x11 - push bx ; 53 +in_byte_: ; 0xc346d LB 0x14 push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 mov bx, ax ; 89 c3 mov ax, dx ; 89 d0 mov dx, bx ; 89 da @@ -5970,26 +6076,28 @@ in_byte_: ; 0xc33d2 LB 0x11 in AL, DX ; ec db 02ah, 0e4h ; sub ah, ah ; 2a e4 - pop bp ; 5d + lea sp, [bp-002h] ; 8d 66 fe pop bx ; 5b + pop bp ; 5d retn ; c3 -dispi_get_id_: ; 0xc33e3 LB 0x11 - push dx ; 52 +dispi_get_id_: ; 0xc3481 LB 0x14 push bp ; 55 mov bp, sp ; 89 e5 + push dx ; 52 xor ax, ax ; 31 c0 mov dx, 001ceh ; ba ce 01 out DX, ax ; ef mov dx, 001cfh ; ba cf 01 in ax, DX ; ed - pop bp ; 5d + lea sp, [bp-002h] ; 8d 66 fe pop dx ; 5a + pop bp ; 5d retn ; c3 -dispi_set_id_: ; 0xc33f4 LB 0x17 - push bx ; 53 - push dx ; 52 +dispi_set_id_: ; 0xc3495 LB 0x1a push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 + push dx ; 52 mov bx, ax ; 89 c3 xor ax, ax ; 31 c0 mov dx, 001ceh ; ba ce 01 @@ -5997,107 +6105,112 @@ dispi_set_id_: ; 0xc33f4 LB 0x17 mov ax, bx ; 89 d8 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef - pop bp ; 5d + lea sp, [bp-004h] ; 8d 66 fc pop dx ; 5a pop bx ; 5b + pop bp ; 5d retn ; c3 -vbe_init_: ; 0xc340b LB 0x29 - push bx ; 53 - push dx ; 52 +vbe_init_: ; 0xc34af LB 0x2c push bp ; 55 mov bp, sp ; 89 e5 + push bx ; 53 + push dx ; 52 mov ax, 0b0c0h ; b8 c0 b0 - call 033f4h ; e8 de ff - call 033e3h ; e8 ca ff + call 03495h ; e8 db ff + call 03481h ; e8 c4 ff cmp ax, 0b0c0h ; 3d c0 b0 - jne short 03430h ; 75 12 + jne short 034d4h ; 75 12 mov bx, strict word 00001h ; bb 01 00 mov dx, 000b9h ; ba b9 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 cf fa + call 02f85h ; e8 b7 fa mov ax, 0b0c4h ; b8 c4 b0 - call 033f4h ; e8 c4 ff - pop bp ; 5d + call 03495h ; e8 c1 ff + lea sp, [bp-004h] ; 8d 66 fc pop dx ; 5a pop bx ; 5b + pop bp ; 5d retn ; c3 -mode_info_find_mode_: ; 0xc3434 LB 0x52 +mode_info_find_mode_: ; 0xc34db LB 0x55 + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - push bp ; 55 - mov bp, sp ; 89 e5 mov di, ax ; 89 c7 mov si, dx ; 89 d6 xor dx, dx ; 31 d2 mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 7c ff + call 0345bh ; e8 6d ff cmp ax, 077cch ; 3d cc 77 - jne short 0347eh ; 75 32 + jne short 03525h ; 75 32 mov bx, strict word 00004h ; bb 04 00 mov dx, bx ; 89 da mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 6c ff + call 0345bh ; e8 5d ff mov cx, ax ; 89 c1 cmp cx, strict byte 0ffffh ; 83 f9 ff - je short 0347eh ; 74 20 + je short 03525h ; 74 20 lea dx, [bx+002h] ; 8d 57 02 mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 5c ff + call 0345bh ; e8 4d ff lea dx, [bx+044h] ; 8d 57 44 cmp cx, di ; 39 f9 - jne short 0347ah ; 75 0c + jne short 03521h ; 75 0c test si, si ; 85 f6 - jne short 03476h ; 75 04 + jne short 0351dh ; 75 04 mov ax, bx ; 89 d8 - jmp short 03480h ; eb 0a + jmp short 03527h ; eb 0a test AL, strict byte 080h ; a8 80 - jne short 03472h ; 75 f8 + jne short 03519h ; 75 f8 mov bx, dx ; 89 d3 - jmp short 03451h ; eb d3 + jmp short 034f8h ; eb d3 xor ax, ax ; 31 c0 - pop bp ; 5d + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -vbe_biosfn_return_controller_information_: ; 0xc3486 LB 0x124 +vbe_biosfn_return_controller_information_: ; 0xc3530 LB 0x129 + push bp ; 55 + mov bp, sp ; 89 e5 push cx ; 51 push si ; 56 push di ; 57 - enter 0000ah, 000h ; c8 0a 00 00 + sub sp, strict byte 0000ah ; 83 ec 0a mov si, ax ; 89 c6 mov di, dx ; 89 d7 - mov word [bp-004h], bx ; 89 5e fc - mov word [bp-006h], strict word 00022h ; c7 46 fa 22 00 - call 005a7h ; e8 0b d1 - mov word [bp-00ah], ax ; 89 46 f6 - mov bx, word [bp-004h] ; 8b 5e fc - mov word [bp-002h], di ; 89 7e fe + mov word [bp-00ah], bx ; 89 5e f6 + mov word [bp-00ch], strict word 00022h ; c7 46 f4 22 00 + call 005a7h ; e8 5f d0 + mov word [bp-010h], ax ; 89 46 f0 + mov bx, word [bp-00ah] ; 8b 5e f6 + mov word [bp-008h], di ; 89 7e f8 xor dx, dx ; 31 d2 mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 16 ff + call 0345bh ; e8 02 ff cmp ax, 077cch ; 3d cc 77 - je short 034bch ; 74 0a + je short 03568h ; 74 0a push SS ; 16 pop ES ; 07 mov word [es:si], 00100h ; 26 c7 04 00 01 - jmp near 035a5h ; e9 e9 00 + jmp near 03651h ; e9 e9 00 mov cx, strict word 00004h ; b9 04 00 - mov word [bp-008h], strict word 00000h ; c7 46 f8 00 00 - mov es, [bp-002h] ; 8e 46 fe + mov word [bp-00eh], strict word 00000h ; c7 46 f2 00 00 + mov es, [bp-008h] ; 8e 46 f8 cmp word [es:bx+002h], 03245h ; 26 81 7f 02 45 32 - jne short 034d6h ; 75 07 + jne short 03582h ; 75 07 cmp word [es:bx], 04256h ; 26 81 3f 56 42 - je short 034e5h ; 74 0f + je short 03591h ; 74 0f cmp word [es:bx+002h], 04153h ; 26 81 7f 02 53 41 - jne short 034eah ; 75 0c + jne short 03596h ; 75 0c cmp word [es:bx], 04556h ; 26 81 3f 56 45 - jne short 034eah ; 75 05 - mov word [bp-008h], strict word 00001h ; c7 46 f8 01 00 - mov es, [bp-002h] ; 8e 46 fe + jne short 03596h ; 75 05 + mov word [bp-00eh], strict word 00001h ; c7 46 f2 01 00 + mov es, [bp-008h] ; 8e 46 f8 db 066h, 026h, 0c7h, 007h, 056h, 045h, 053h, 041h ; mov dword [es:bx], strict dword 041534556h ; 66 26 c7 07 56 45 53 41 mov word [es:bx+004h], 00200h ; 26 c7 47 04 00 02 @@ -6106,16 +6219,16 @@ vbe_biosfn_return_controller_information_: ; 0xc3486 LB 0x124 db 066h, 026h, 0c7h, 047h, 00ah, 001h, 000h, 000h, 000h ; mov dword [es:bx+00ah], strict dword 000000001h ; 66 26 c7 47 0a 01 00 00 00 mov word [es:bx+010h], di ; 26 89 7f 10 - mov ax, word [bp-004h] ; 8b 46 fc + mov ax, word [bp-00ah] ; 8b 46 f6 add ax, strict word 00022h ; 05 22 00 mov word [es:bx+00eh], ax ; 26 89 47 0e mov dx, strict word 0ffffh ; ba ff ff mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 9e fe - mov es, [bp-002h] ; 8e 46 fe + call 0345bh ; e8 8a fe + mov es, [bp-008h] ; 8e 46 f8 mov word [es:bx+012h], ax ; 26 89 47 12 - cmp word [bp-008h], strict byte 00000h ; 83 7e f8 00 - je short 03556h ; 74 24 + cmp word [bp-00eh], strict byte 00000h ; 83 7e f2 00 + je short 03602h ; 74 24 mov word [es:bx+014h], strict word 00003h ; 26 c7 47 14 03 00 mov word [es:bx+016h], 07e35h ; 26 c7 47 16 35 7e mov [es:bx+018h], ds ; 26 8c 5f 18 @@ -6126,216 +6239,226 @@ vbe_biosfn_return_controller_information_: ; 0xc3486 LB 0x124 mov dx, cx ; 89 ca add dx, strict byte 0001bh ; 83 c2 1b mov ax, 003b6h ; b8 b6 03 - call 033d2h ; e8 71 fe + call 0346dh ; e8 60 fe xor ah, ah ; 30 e4 - cmp ax, word [bp-00ah] ; 3b 46 f6 - jnbe short 03581h ; 77 19 + cmp ax, word [bp-010h] ; 3b 46 f0 + jnbe short 0362dh ; 77 19 mov dx, cx ; 89 ca mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 53 fe + call 0345bh ; e8 3f fe mov bx, ax ; 89 c3 - mov dx, word [bp-004h] ; 8b 56 fc - add dx, word [bp-006h] ; 03 56 fa + mov dx, word [bp-00ah] ; 8b 56 f6 + add dx, word [bp-00ch] ; 03 56 f4 mov ax, di ; 89 f8 - call 02f15h ; e8 98 f9 - add word [bp-006h], strict byte 00002h ; 83 46 fa 02 + call 02fa1h ; e8 78 f9 + add word [bp-00ch], strict byte 00002h ; 83 46 f4 02 add cx, strict byte 00044h ; 83 c1 44 mov dx, cx ; 89 ca mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 37 fe + call 0345bh ; e8 23 fe mov bx, ax ; 89 c3 cmp ax, strict word 0ffffh ; 3d ff ff - jne short 03556h ; 75 c3 - mov dx, word [bp-004h] ; 8b 56 fc - add dx, word [bp-006h] ; 03 56 fa + jne short 03602h ; 75 c3 + mov dx, word [bp-00ah] ; 8b 56 f6 + add dx, word [bp-00ch] ; 03 56 f4 mov ax, di ; 89 f8 - call 02f15h ; e8 77 f9 + call 02fa1h ; e8 57 f9 push SS ; 16 pop ES ; 07 mov word [es:si], strict word 0004fh ; 26 c7 04 4f 00 - leave ; c9 + lea sp, [bp-006h] ; 8d 66 fa pop di ; 5f pop si ; 5e pop cx ; 59 + pop bp ; 5d retn ; c3 -vbe_biosfn_return_mode_information_: ; 0xc35aa LB 0xb0 +vbe_biosfn_return_mode_information_: ; 0xc3659 LB 0xb4 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00004h, 000h ; c8 04 00 00 + push ax ; 50 + push ax ; 50 push ax ; 50 mov ax, dx ; 89 d0 mov si, bx ; 89 de - mov word [bp-002h], cx ; 89 4e fe + mov word [bp-006h], cx ; 89 4e fa test dh, 040h ; f6 c6 40 db 00fh, 095h, 0c2h ; setne dl ; 0f 95 c2 xor dh, dh ; 30 f6 and ah, 001h ; 80 e4 01 - call 03434h ; e8 6e fe - mov word [bp-004h], ax ; 89 46 fc + call 034dbh ; e8 65 fe + mov word [bp-008h], ax ; 89 46 f8 test ax, ax ; 85 c0 - je near 0364bh ; 0f 84 7c 00 + je near 036fbh ; 0f 84 7c 00 mov cx, 00100h ; b9 00 01 xor ax, ax ; 31 c0 - mov di, word [bp-002h] ; 8b 7e fe + mov di, word [bp-006h] ; 8b 7e fa mov es, bx ; 8e c3 cld ; fc - jcxz 035deh ; e3 02 + jcxz 0368eh ; e3 02 rep stosb ; f3 aa xor cx, cx ; 31 c9 - jmp short 035e7h ; eb 05 + jmp short 03697h ; eb 05 cmp cx, strict byte 00042h ; 83 f9 42 - jnc short 03604h ; 73 1d - mov dx, word [bp-004h] ; 8b 56 fc + jnc short 036b4h ; 73 1d + mov dx, word [bp-008h] ; 8b 56 f8 inc dx ; 42 inc dx ; 42 add dx, cx ; 01 ca mov ax, 003b6h ; b8 b6 03 - call 033d2h ; e8 de fd + call 0346dh ; e8 c9 fd movzx bx, al ; 0f b6 d8 - mov dx, word [bp-002h] ; 8b 56 fe + mov dx, word [bp-006h] ; 8b 56 fa add dx, cx ; 01 ca mov ax, si ; 89 f0 - call 02ef9h ; e8 f8 f8 + call 02f85h ; e8 d4 f8 inc cx ; 41 - jmp short 035e2h ; eb de - mov dx, word [bp-002h] ; 8b 56 fe + jmp short 03692h ; eb de + mov dx, word [bp-006h] ; 8b 56 fa inc dx ; 42 inc dx ; 42 mov ax, si ; 89 f0 - call 02eebh ; e8 dd f8 + call 02f77h ; e8 b9 f8 test AL, strict byte 001h ; a8 01 - je short 0362eh ; 74 1c - mov dx, word [bp-002h] ; 8b 56 fe + je short 036deh ; 74 1c + mov dx, word [bp-006h] ; 8b 56 fa add dx, strict byte 0000ch ; 83 c2 0c mov bx, 00605h ; bb 05 06 mov ax, si ; 89 f0 - call 02f15h ; e8 f5 f8 - mov dx, word [bp-002h] ; 8b 56 fe + call 02fa1h ; e8 d1 f8 + mov dx, word [bp-006h] ; 8b 56 fa add dx, strict byte 0000eh ; 83 c2 0e mov bx, 0c000h ; bb 00 c0 mov ax, si ; 89 f0 - call 02f15h ; e8 e7 f8 + call 02fa1h ; e8 c3 f8 mov ax, strict word 0000bh ; b8 0b 00 mov dx, 001ceh ; ba ce 01 out DX, ax ; ef mov dx, 001cfh ; ba cf 01 in ax, DX ; ed - mov dx, word [bp-002h] ; 8b 56 fe + mov dx, word [bp-006h] ; 8b 56 fa add dx, strict byte 0002ah ; 83 c2 2a mov bx, ax ; 89 c3 mov ax, si ; 89 f0 - call 02f15h ; e8 cf f8 + call 02fa1h ; e8 ab f8 mov ax, strict word 0004fh ; b8 4f 00 - jmp short 0364eh ; eb 03 + jmp short 036feh ; eb 03 mov ax, 00100h ; b8 00 01 push SS ; 16 pop ES ; 07 - mov bx, word [bp-006h] ; 8b 5e fa + mov bx, word [bp-00ah] ; 8b 5e f6 mov word [es:bx], ax ; 26 89 07 - leave ; c9 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn ; c3 -vbe_biosfn_set_mode_: ; 0xc365a LB 0xe4 +vbe_biosfn_set_mode_: ; 0xc370d LB 0xe9 + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00006h, 000h ; c8 06 00 00 + sub sp, strict byte 00006h ; 83 ec 06 mov si, ax ; 89 c6 - mov word [bp-006h], dx ; 89 56 fa - test byte [bp-005h], 040h ; f6 46 fb 40 + mov word [bp-00ah], dx ; 89 56 f6 + test byte [bp-009h], 040h ; f6 46 f7 40 db 00fh, 095h, 0c0h ; setne al ; 0f 95 c0 movzx dx, al ; 0f b6 d0 mov ax, dx ; 89 d0 test dx, dx ; 85 d2 - je short 03678h ; 74 03 + je short 0372dh ; 74 03 mov dx, strict word 00040h ; ba 40 00 - mov byte [bp-002h], dl ; 88 56 fe - test byte [bp-005h], 080h ; f6 46 fb 80 - je short 03686h ; 74 05 + mov byte [bp-006h], dl ; 88 56 fa + test byte [bp-009h], 080h ; f6 46 f7 80 + je short 0373bh ; 74 05 mov dx, 00080h ; ba 80 00 - jmp short 03688h ; eb 02 + jmp short 0373dh ; eb 02 xor dx, dx ; 31 d2 - mov byte [bp-004h], dl ; 88 56 fc - and byte [bp-005h], 001h ; 80 66 fb 01 - cmp word [bp-006h], 00100h ; 81 7e fa 00 01 - jnc short 036a8h ; 73 12 + mov byte [bp-008h], dl ; 88 56 f8 + and byte [bp-009h], 001h ; 80 66 f7 01 + cmp word [bp-00ah], 00100h ; 81 7e f6 00 01 + jnc short 0375dh ; 73 12 xor ax, ax ; 31 c0 - call 005c9h ; e8 2e cf - movzx ax, byte [bp-006h] ; 0f b6 46 fa - call 00fb8h ; e8 16 d9 + call 005c9h ; e8 79 ce + movzx ax, byte [bp-00ah] ; 0f b6 46 f6 + call 00fdch ; e8 85 d8 mov ax, strict word 0004fh ; b8 4f 00 - jmp near 03737h ; e9 8f 00 + jmp near 037ech ; e9 8f 00 mov dx, ax ; 89 c2 - mov ax, word [bp-006h] ; 8b 46 fa - call 03434h ; e8 84 fd + mov ax, word [bp-00ah] ; 8b 46 f6 + call 034dbh ; e8 76 fd mov bx, ax ; 89 c3 test ax, ax ; 85 c0 - je near 03734h ; 0f 84 7c 00 + je near 037e9h ; 0f 84 7c 00 lea dx, [bx+014h] ; 8d 57 14 mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 02 fd + call 0345bh ; e8 e5 fc mov cx, ax ; 89 c1 lea dx, [bx+016h] ; 8d 57 16 mov ax, 003b6h ; b8 b6 03 - call 033c3h ; e8 f7 fc + call 0345bh ; e8 da fc mov di, ax ; 89 c7 lea dx, [bx+01bh] ; 8d 57 1b mov ax, 003b6h ; b8 b6 03 - call 033d2h ; e8 fb fc + call 0346dh ; e8 e1 fc mov bl, al ; 88 c3 mov dl, al ; 88 c2 xor ax, ax ; 31 c0 - call 005c9h ; e8 e9 ce + call 005c9h ; e8 34 ce cmp bl, 004h ; 80 fb 04 - jne short 036ebh ; 75 06 + jne short 037a0h ; 75 06 mov ax, strict word 0006ah ; b8 6a 00 - call 00fb8h ; e8 cd d8 + call 00fdch ; e8 3c d8 movzx ax, dl ; 0f b6 c2 - call 033abh ; e8 ba fc + call 03440h ; e8 9a fc mov ax, cx ; 89 c8 - call 0337bh ; e8 85 fc + call 0340ah ; e8 5f fc mov ax, di ; 89 f8 - call 03393h ; e8 98 fc + call 03425h ; e8 75 fc xor ax, ax ; 31 c0 - call 005e7h ; e8 e7 ce - mov al, byte [bp-004h] ; 8a 46 fc + call 005e7h ; e8 32 ce + mov al, byte [bp-008h] ; 8a 46 f8 or AL, strict byte 001h ; 0c 01 movzx dx, al ; 0f b6 d0 - movzx ax, byte [bp-002h] ; 0f b6 46 fe + movzx ax, byte [bp-006h] ; 0f b6 46 fa or ax, dx ; 09 d0 - call 005c9h ; e8 b8 ce - call 006c3h ; e8 af cf - mov bx, word [bp-006h] ; 8b 5e fa + call 005c9h ; e8 03 ce + call 006c3h ; e8 fa ce + mov bx, word [bp-00ah] ; 8b 5e f6 mov dx, 000bah ; ba ba 00 mov ax, strict word 00040h ; b8 40 00 - call 02f15h ; e8 f5 f7 - mov al, byte [bp-004h] ; 8a 46 fc + call 02fa1h ; e8 cc f7 + mov al, byte [bp-008h] ; 8a 46 f8 or AL, strict byte 060h ; 0c 60 movzx bx, al ; 0f b6 d8 mov dx, 00087h ; ba 87 00 mov ax, strict word 00040h ; b8 40 00 - call 02ef9h ; e8 c8 f7 - jmp near 036a2h ; e9 6e ff + call 02f85h ; e8 9f f7 + jmp near 03757h ; e9 6e ff mov ax, 00100h ; b8 00 01 mov word [ss:si], ax ; 36 89 04 - leave ; c9 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn ; c3 -vbe_biosfn_read_video_state_size_: ; 0xc373e LB 0x8 +vbe_biosfn_read_video_state_size_: ; 0xc37f6 LB 0x8 push bp ; 55 mov bp, sp ; 89 e5 mov ax, strict word 00012h ; b8 12 00 pop bp ; 5d retn ; c3 -vbe_biosfn_save_video_state_: ; 0xc3746 LB 0x58 +vbe_biosfn_save_video_state_: ; 0xc37fe LB 0x5b + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 push di ; 57 - enter 00002h, 000h ; c8 02 00 00 + push ax ; 50 mov di, ax ; 89 c7 mov cx, dx ; 89 d1 mov ax, strict word 00004h ; b8 04 00 @@ -6343,21 +6466,21 @@ vbe_biosfn_save_video_state_: ; 0xc3746 LB 0x58 out DX, ax ; ef mov dx, 001cfh ; ba cf 01 in ax, DX ; ed - mov word [bp-002h], ax ; 89 46 fe + mov word [bp-00ah], ax ; 89 46 f6 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, di ; 89 f8 - call 02f15h ; e8 ac f7 + call 02fa1h ; e8 80 f7 inc cx ; 41 inc cx ; 41 - test byte [bp-002h], 001h ; f6 46 fe 01 - je short 03798h ; 74 27 + test byte [bp-00ah], 001h ; f6 46 f6 01 + je short 03850h ; 74 27 mov si, strict word 00001h ; be 01 00 - jmp short 0377bh ; eb 05 + jmp short 03833h ; eb 05 cmp si, strict byte 00009h ; 83 fe 09 - jnbe short 03798h ; 77 1d + jnbe short 03850h ; 77 1d cmp si, strict byte 00004h ; 83 fe 04 - je short 03795h ; 74 15 + je short 0384dh ; 74 15 mov ax, si ; 89 f0 mov dx, 001ceh ; ba ce 01 out DX, ax ; ef @@ -6366,43 +6489,46 @@ vbe_biosfn_save_video_state_: ; 0xc3746 LB 0x58 mov bx, ax ; 89 c3 mov dx, cx ; 89 ca mov ax, di ; 89 f8 - call 02f15h ; e8 82 f7 + call 02fa1h ; e8 56 f7 inc cx ; 41 inc cx ; 41 inc si ; 46 - jmp short 03776h ; eb de - leave ; c9 + jmp short 0382eh ; eb de + lea sp, [bp-008h] ; 8d 66 f8 pop di ; 5f pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -vbe_biosfn_restore_video_state_: ; 0xc379e LB 0x98 +vbe_biosfn_restore_video_state_: ; 0xc3859 LB 0x9b + push bp ; 55 + mov bp, sp ; 89 e5 push bx ; 53 push cx ; 51 push si ; 56 - enter 00002h, 000h ; c8 02 00 00 + push ax ; 50 mov cx, ax ; 89 c1 mov bx, dx ; 89 d3 - call 02f07h ; e8 5b f7 - mov word [bp-002h], ax ; 89 46 fe + call 02f93h ; e8 2c f7 + mov word [bp-008h], ax ; 89 46 f8 inc bx ; 43 inc bx ; 43 - test byte [bp-002h], 001h ; f6 46 fe 01 - jne short 037c7h ; 75 10 + test byte [bp-008h], 001h ; f6 46 f8 01 + jne short 03882h ; 75 10 mov ax, strict word 00004h ; b8 04 00 mov dx, 001ceh ; ba ce 01 out DX, ax ; ef - mov ax, word [bp-002h] ; 8b 46 fe + mov ax, word [bp-008h] ; 8b 46 f8 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef - jmp short 03831h ; eb 6a + jmp short 038ech ; eb 6a mov ax, strict word 00001h ; b8 01 00 mov dx, 001ceh ; ba ce 01 out DX, ax ; ef mov dx, bx ; 89 da mov ax, cx ; 89 c8 - call 02f07h ; e8 32 f7 + call 02f93h ; e8 03 f7 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef inc bx ; 43 @@ -6412,7 +6538,7 @@ vbe_biosfn_restore_video_state_: ; 0xc379e LB 0x98 out DX, ax ; ef mov dx, bx ; 89 da mov ax, cx ; 89 c8 - call 02f07h ; e8 1e f7 + call 02f93h ; e8 ef f6 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef inc bx ; 43 @@ -6422,7 +6548,7 @@ vbe_biosfn_restore_video_state_: ; 0xc379e LB 0x98 out DX, ax ; ef mov dx, bx ; 89 da mov ax, cx ; 89 c8 - call 02f07h ; e8 0a f7 + call 02f93h ; e8 db f6 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef inc bx ; 43 @@ -6430,94 +6556,98 @@ vbe_biosfn_restore_video_state_: ; 0xc379e LB 0x98 mov ax, strict word 00004h ; b8 04 00 mov dx, 001ceh ; ba ce 01 out DX, ax ; ef - mov ax, word [bp-002h] ; 8b 46 fe + mov ax, word [bp-008h] ; 8b 46 f8 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef mov si, strict word 00005h ; be 05 00 - jmp short 0381bh ; eb 05 + jmp short 038d6h ; eb 05 cmp si, strict byte 00009h ; 83 fe 09 - jnbe short 03831h ; 77 16 + jnbe short 038ech ; 77 16 mov ax, si ; 89 f0 mov dx, 001ceh ; ba ce 01 out DX, ax ; ef mov dx, bx ; 89 da mov ax, cx ; 89 c8 - call 02f07h ; e8 df f6 + call 02f93h ; e8 b0 f6 mov dx, 001cfh ; ba cf 01 out DX, ax ; ef inc bx ; 43 inc bx ; 43 inc si ; 46 - jmp short 03816h ; eb e5 - leave ; c9 + jmp short 038d1h ; eb e5 + lea sp, [bp-006h] ; 8d 66 fa pop si ; 5e pop cx ; 59 pop bx ; 5b + pop bp ; 5d retn ; c3 -vbe_biosfn_save_restore_state_: ; 0xc3836 LB 0x89 +vbe_biosfn_save_restore_state_: ; 0xc38f4 LB 0x8c + push bp ; 55 + mov bp, sp ; 89 e5 push si ; 56 push di ; 57 - enter 00002h, 000h ; c8 02 00 00 + push ax ; 50 mov si, ax ; 89 c6 - mov word [bp-002h], dx ; 89 56 fe + mov word [bp-006h], dx ; 89 56 fa mov ax, bx ; 89 d8 - mov bx, word [bp+008h] ; 8b 5e 08 + mov bx, word [bp+004h] ; 8b 5e 04 mov di, strict word 0004fh ; bf 4f 00 xor ah, ah ; 30 e4 cmp ax, strict word 00002h ; 3d 02 00 - je short 03895h ; 74 45 + je short 03953h ; 74 45 cmp ax, strict word 00001h ; 3d 01 00 - je short 03879h ; 74 24 + je short 03937h ; 74 24 test ax, ax ; 85 c0 - jne short 038b1h ; 75 58 - mov ax, word [bp-002h] ; 8b 46 fe - call 0280ch ; e8 ad ef + jne short 0396fh ; 75 58 + mov ax, word [bp-006h] ; 8b 46 fa + call 0288ch ; e8 6f ef mov cx, ax ; 89 c1 - test byte [bp-002h], 008h ; f6 46 fe 08 - je short 0386ch ; 74 05 - call 0373eh ; e8 d4 fe + test byte [bp-006h], 008h ; f6 46 fa 08 + je short 0392ah ; 74 05 + call 037f6h ; e8 ce fe add ax, cx ; 01 c8 add ax, strict word 0003fh ; 05 3f 00 shr ax, 006h ; c1 e8 06 push SS ; 16 pop ES ; 07 mov word [es:bx], ax ; 26 89 07 - jmp short 038b4h ; eb 3b + jmp short 03972h ; eb 3b push SS ; 16 pop ES ; 07 mov bx, word [es:bx] ; 26 8b 1f mov dx, cx ; 89 ca - mov ax, word [bp-002h] ; 8b 46 fe - call 0283eh ; e8 b8 ef - test byte [bp-002h], 008h ; f6 46 fe 08 - je short 038b4h ; 74 28 + mov ax, word [bp-006h] ; 8b 46 fa + call 028c1h ; e8 7d ef + test byte [bp-006h], 008h ; f6 46 fa 08 + je short 03972h ; 74 28 mov dx, ax ; 89 c2 mov ax, cx ; 89 c8 - call 03746h ; e8 b3 fe - jmp short 038b4h ; eb 1f + call 037feh ; e8 ad fe + jmp short 03972h ; eb 1f push SS ; 16 pop ES ; 07 mov bx, word [es:bx] ; 26 8b 1f mov dx, cx ; 89 ca - mov ax, word [bp-002h] ; 8b 46 fe - call 02ba3h ; e8 01 f3 - test byte [bp-002h], 008h ; f6 46 fe 08 - je short 038b4h ; 74 0c + mov ax, word [bp-006h] ; 8b 46 fa + call 02c2ah ; e8 ca f2 + test byte [bp-006h], 008h ; f6 46 fa 08 + je short 03972h ; 74 0c mov dx, ax ; 89 c2 mov ax, cx ; 89 c8 - call 0379eh ; e8 ef fe - jmp short 038b4h ; eb 03 + call 03859h ; e8 ec fe + jmp short 03972h ; eb 03 mov di, 00100h ; bf 00 01 push SS ; 16 pop ES ; 07 mov word [es:si], di ; 26 89 3c - leave ; c9 + lea sp, [bp-004h] ; 8d 66 fc pop di ; 5f pop si ; 5e + pop bp ; 5d retn 00002h ; c2 02 00 - ; Padding 0xd41 bytes at 0xc38bf - times 3393 db 0 + ; Padding 0xc80 bytes at 0xc3980 + times 3200 db 0 section VBE32 progbits vstart=0x4600 align=1 ; size=0x115 class=CODE group=AUTO vesa_pm_start: ; 0xc4600 LB 0x114 @@ -6649,10 +6779,10 @@ vesa_pm_end: ; 0xc4714 LB 0x1 ; Padding 0xeb bytes at 0xc4715 times 235 db 0 -section _DATA progbits vstart=0x4800 align=1 ; size=0x36e0 class=DATA group=DGROUP -_msg_vga_init: ; 0xc4800 LB 0x2e - db 'Oracle VM VirtualBox Version 4.2.4 VGA BIOS', 00dh, 00ah, 000h -_vga_modes: ; 0xc482e LB 0x80 +section _DATA progbits vstart=0x4800 align=1 ; size=0x36e1 class=DATA group=DGROUP +_msg_vga_init: ; 0xc4800 LB 0x2f + db 'Oracle VM VirtualBox Version 4.3.10 VGA BIOS', 00dh, 00ah, 000h +_vga_modes: ; 0xc482f LB 0x80 db 000h, 000h, 000h, 004h, 000h, 0b8h, 0ffh, 002h, 001h, 000h, 000h, 004h, 000h, 0b8h, 0ffh, 002h db 002h, 000h, 000h, 004h, 000h, 0b8h, 0ffh, 002h, 003h, 000h, 000h, 004h, 000h, 0b8h, 0ffh, 002h db 004h, 001h, 002h, 002h, 000h, 0b8h, 0ffh, 001h, 005h, 001h, 002h, 002h, 000h, 0b8h, 0ffh, 001h @@ -6661,11 +6791,11 @@ _vga_modes: ; 0xc482e LB 0x80 db 00fh, 001h, 003h, 001h, 000h, 0a0h, 0ffh, 000h, 010h, 001h, 004h, 004h, 000h, 0a0h, 0ffh, 002h db 011h, 001h, 003h, 001h, 000h, 0a0h, 0ffh, 002h, 012h, 001h, 004h, 004h, 000h, 0a0h, 0ffh, 002h db 013h, 001h, 005h, 008h, 000h, 0a0h, 0ffh, 003h, 06ah, 001h, 004h, 004h, 000h, 0a0h, 0ffh, 002h -_line_to_vpti: ; 0xc48ae LB 0x10 +_line_to_vpti: ; 0xc48af LB 0x10 db 017h, 017h, 018h, 018h, 004h, 005h, 006h, 007h, 00dh, 00eh, 011h, 012h, 01ah, 01bh, 01ch, 01dh -_dac_regs: ; 0xc48be LB 0x4 +_dac_regs: ; 0xc48bf LB 0x4 dd 0ff3f3f3fh -_video_param_table: ; 0xc48c2 LB 0x780 +_video_param_table: ; 0xc48c3 LB 0x780 db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h @@ -6786,7 +6916,7 @@ _video_param_table: ; 0xc48c2 LB 0x780 db 072h, 0f0h, 000h, 060h, 000h, 000h, 000h, 000h, 000h, 000h, 059h, 08dh, 057h, 032h, 000h, 057h db 073h, 0e3h, 0ffh, 000h, 001h, 002h, 003h, 004h, 005h, 014h, 007h, 038h, 039h, 03ah, 03bh, 03ch db 03dh, 03eh, 03fh, 001h, 000h, 00fh, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 005h, 00fh, 0ffh -_palette0: ; 0xc5042 LB 0xc0 +_palette0: ; 0xc5043 LB 0xc0 db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah db 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah @@ -6799,7 +6929,7 @@ _palette0: ; 0xc5042 LB 0xc0 db 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah db 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 02ah, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh db 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh, 03fh -_palette1: ; 0xc5102 LB 0xc0 +_palette1: ; 0xc5103 LB 0xc0 db 000h, 000h, 000h, 000h, 000h, 02ah, 000h, 02ah, 000h, 000h, 02ah, 02ah, 02ah, 000h, 000h, 02ah db 000h, 02ah, 02ah, 015h, 000h, 02ah, 02ah, 02ah, 000h, 000h, 000h, 000h, 000h, 02ah, 000h, 02ah db 000h, 000h, 02ah, 02ah, 02ah, 000h, 000h, 02ah, 000h, 02ah, 02ah, 015h, 000h, 02ah, 02ah, 02ah @@ -6812,7 +6942,7 @@ _palette1: ; 0xc5102 LB 0xc0 db 015h, 015h, 015h, 015h, 015h, 03fh, 015h, 03fh, 015h, 015h, 03fh, 03fh, 03fh, 015h, 015h, 03fh db 015h, 03fh, 03fh, 03fh, 015h, 03fh, 03fh, 03fh, 015h, 015h, 015h, 015h, 015h, 03fh, 015h, 03fh db 015h, 015h, 03fh, 03fh, 03fh, 015h, 015h, 03fh, 015h, 03fh, 03fh, 03fh, 015h, 03fh, 03fh, 03fh -_palette2: ; 0xc51c2 LB 0xc0 +_palette2: ; 0xc51c3 LB 0xc0 db 000h, 000h, 000h, 000h, 000h, 02ah, 000h, 02ah, 000h, 000h, 02ah, 02ah, 02ah, 000h, 000h, 02ah db 000h, 02ah, 02ah, 02ah, 000h, 02ah, 02ah, 02ah, 000h, 000h, 015h, 000h, 000h, 03fh, 000h, 02ah db 015h, 000h, 02ah, 03fh, 02ah, 000h, 015h, 02ah, 000h, 03fh, 02ah, 02ah, 015h, 02ah, 02ah, 03fh @@ -6825,7 +6955,7 @@ _palette2: ; 0xc51c2 LB 0xc0 db 015h, 015h, 000h, 015h, 015h, 02ah, 015h, 03fh, 000h, 015h, 03fh, 02ah, 03fh, 015h, 000h, 03fh db 015h, 02ah, 03fh, 03fh, 000h, 03fh, 03fh, 02ah, 015h, 015h, 015h, 015h, 015h, 03fh, 015h, 03fh db 015h, 015h, 03fh, 03fh, 03fh, 015h, 015h, 03fh, 015h, 03fh, 03fh, 03fh, 015h, 03fh, 03fh, 03fh -_palette3: ; 0xc5282 LB 0x300 +_palette3: ; 0xc5283 LB 0x300 db 000h, 000h, 000h, 000h, 000h, 02ah, 000h, 02ah, 000h, 000h, 02ah, 02ah, 02ah, 000h, 000h, 02ah db 000h, 02ah, 02ah, 015h, 000h, 02ah, 02ah, 02ah, 015h, 015h, 015h, 015h, 015h, 03fh, 015h, 03fh db 015h, 015h, 03fh, 03fh, 03fh, 015h, 015h, 03fh, 015h, 03fh, 03fh, 03fh, 015h, 03fh, 03fh, 03fh @@ -6874,12 +7004,12 @@ _palette3: ; 0xc5282 LB 0x300 db 00bh, 010h, 00bh, 00bh, 010h, 00ch, 00bh, 010h, 00dh, 00bh, 010h, 00fh, 00bh, 010h, 010h, 00bh db 00fh, 010h, 00bh, 00dh, 010h, 00bh, 00ch, 010h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h -_static_functionality: ; 0xc5582 LB 0x10 +_static_functionality: ; 0xc5583 LB 0x10 db 0ffh, 0e0h, 00fh, 000h, 000h, 000h, 000h, 007h, 002h, 008h, 0e7h, 00ch, 000h, 000h, 000h, 000h -_video_save_pointer_table: ; 0xc5592 LB 0x1c - db 0c2h, 048h, 000h, 0c0h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h +_video_save_pointer_table: ; 0xc5593 LB 0x1c + db 0c3h, 048h, 000h, 0c0h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h -_vgafont8: ; 0xc55ae LB 0x800 +_vgafont8: ; 0xc55af LB 0x800 db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 07eh, 081h, 0a5h, 081h, 0bdh, 099h, 081h, 07eh db 07eh, 0ffh, 0dbh, 0ffh, 0c3h, 0e7h, 0ffh, 07eh, 06ch, 0feh, 0feh, 0feh, 07ch, 038h, 010h, 000h db 010h, 038h, 07ch, 0feh, 07ch, 038h, 010h, 000h, 038h, 07ch, 038h, 0feh, 0feh, 07ch, 038h, 07ch @@ -7008,7 +7138,7 @@ _vgafont8: ; 0xc55ae LB 0x800 db 000h, 000h, 000h, 000h, 018h, 000h, 000h, 000h, 00fh, 00ch, 00ch, 00ch, 0ech, 06ch, 03ch, 01ch db 078h, 06ch, 06ch, 06ch, 06ch, 000h, 000h, 000h, 070h, 018h, 030h, 060h, 078h, 000h, 000h, 000h db 000h, 000h, 03ch, 03ch, 03ch, 03ch, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h -_vgafont14: ; 0xc5dae LB 0xe00 +_vgafont14: ; 0xc5daf LB 0xe00 db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 07eh, 081h, 0a5h, 081h, 081h, 0bdh, 099h, 081h, 07eh, 000h, 000h, 000h, 000h, 000h, 07eh, 0ffh db 0dbh, 0ffh, 0ffh, 0c3h, 0e7h, 0ffh, 07eh, 000h, 000h, 000h, 000h, 000h, 000h, 06ch, 0feh, 0feh @@ -7233,7 +7363,7 @@ _vgafont14: ; 0xc5dae LB 0xe00 db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 070h, 0d8h, 030h, 060h, 0c8h, 0f8h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 07ch, 07ch, 07ch, 07ch, 07ch, 07ch, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h -_vgafont16: ; 0xc6bae LB 0x1000 +_vgafont16: ; 0xc6baf LB 0x1000 db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 07eh, 081h, 0a5h, 081h, 081h, 0bdh, 099h, 081h, 081h, 07eh, 000h, 000h, 000h, 000h db 000h, 000h, 07eh, 0ffh, 0dbh, 0ffh, 0ffh, 0c3h, 0e7h, 0ffh, 0ffh, 07eh, 000h, 000h, 000h, 000h @@ -7490,7 +7620,7 @@ _vgafont16: ; 0xc6bae LB 0x1000 db 000h, 070h, 0d8h, 030h, 060h, 0c8h, 0f8h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 07ch, 07ch, 07ch, 07ch, 07ch, 07ch, 07ch, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h -_vgafont14alt: ; 0xc7bae LB 0x12d +_vgafont14alt: ; 0xc7baf LB 0x12d db 01dh, 000h, 000h, 000h, 000h, 024h, 066h, 0ffh, 066h, 024h, 000h, 000h, 000h, 000h, 000h, 022h db 000h, 063h, 063h, 063h, 022h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 02bh, 000h db 000h, 000h, 018h, 018h, 018h, 0ffh, 018h, 018h, 018h, 000h, 000h, 000h, 000h, 02dh, 000h, 000h @@ -7510,7 +7640,7 @@ _vgafont14alt: ; 0xc7bae LB 0x12d db 000h, 0fch, 066h, 066h, 07ch, 062h, 066h, 06fh, 066h, 066h, 0f3h, 000h, 000h, 000h, 0f1h, 000h db 000h, 018h, 018h, 018h, 0ffh, 018h, 018h, 018h, 000h, 0ffh, 000h, 000h, 000h, 0f6h, 000h, 000h db 018h, 018h, 000h, 000h, 0ffh, 000h, 000h, 018h, 018h, 000h, 000h, 000h, 000h -_vgafont16alt: ; 0xc7cdb LB 0x145 +_vgafont16alt: ; 0xc7cdc LB 0x144 db 01dh, 000h, 000h, 000h, 000h, 000h, 024h, 066h, 0ffh, 066h, 024h, 000h, 000h, 000h, 000h, 000h db 000h, 030h, 000h, 000h, 03ch, 066h, 0c3h, 0c3h, 0dbh, 0dbh, 0c3h, 0c3h, 066h, 03ch, 000h, 000h db 000h, 000h, 04dh, 000h, 000h, 0c3h, 0e7h, 0ffh, 0ffh, 0dbh, 0c3h, 0c3h, 0c3h, 0c3h, 0c3h, 000h @@ -7531,31 +7661,34 @@ _vgafont16alt: ; 0xc7cdb LB 0x145 db 09eh, 000h, 0fch, 066h, 066h, 07ch, 062h, 066h, 06fh, 066h, 066h, 066h, 0f3h, 000h, 000h, 000h db 000h, 0abh, 000h, 0c0h, 0c0h, 0c2h, 0c6h, 0cch, 018h, 030h, 060h, 0ceh, 09bh, 006h, 00ch, 01fh db 000h, 000h, 0ach, 000h, 0c0h, 0c0h, 0c2h, 0c6h, 0cch, 018h, 030h, 066h, 0ceh, 096h, 03eh, 006h - db 006h, 000h, 000h, 000h, 000h + db 006h, 000h, 000h, 000h _vbebios_copyright: ; 0xc7e20 LB 0x15 db 'VirtualBox VESA BIOS', 000h _vbebios_vendor_name: ; 0xc7e35 LB 0x13 db 'Oracle Corporation', 000h _vbebios_product_name: ; 0xc7e48 LB 0x21 db 'Oracle VM VirtualBox VBE Adapter', 000h -_vbebios_product_revision: ; 0xc7e69 LB 0x23 - db 'Oracle VM VirtualBox Version 4.2.4', 000h -_vbebios_info_string: ; 0xc7e8c LB 0x2b +_vbebios_product_revision: ; 0xc7e69 LB 0x24 + db 'Oracle VM VirtualBox Version 4.3.10', 000h +_vbebios_info_string: ; 0xc7e8d LB 0x2b db 'VirtualBox VBE Display Adapter enabled', 00dh, 00ah, 00dh, 00ah, 000h -_no_vbebios_info_string: ; 0xc7eb7 LB 0x29 +_no_vbebios_info_string: ; 0xc7eb8 LB 0x29 db 'No VirtualBox VBE support available!', 00dh, 00ah, 00dh, 00ah, 000h -section CONST progbits vstart=0x7ee0 align=1 ; size=0x0 class=DATA group=DGROUP + ; Padding 0x1 bytes at 0xc7ee1 + db 001h -section CONST2 progbits vstart=0x7ee0 align=1 ; size=0x0 class=DATA group=DGROUP +section CONST progbits vstart=0x7ee2 align=1 ; size=0x0 class=DATA group=DGROUP - ; Padding 0x120 bytes at 0xc7ee0 - db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h - db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h - db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h - db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h - db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h - db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h +section CONST2 progbits vstart=0x7ee2 align=1 ; size=0x0 class=DATA group=DGROUP + + ; Padding 0x11e bytes at 0xc7ee2 + db 000h, 000h, 000h, 000h, 001h, 000h, 000h, 000h, 000h, 000h, 000h, 02fh, 068h, 06fh, 06dh, 065h + db 02fh, 066h, 06dh, 033h, 02fh, 073h, 072h, 063h, 02fh, 076h, 062h, 06fh, 078h, 02dh, 034h, 02eh + db 033h, 02fh, 06fh, 075h, 074h, 02fh, 06ch, 069h, 06eh, 075h, 078h, 02eh, 061h, 06dh, 064h, 036h + db 034h, 02fh, 072h, 065h, 06ch, 065h, 061h, 073h, 065h, 02fh, 06fh, 062h, 06ah, 02fh, 056h, 042h + db 06fh, 078h, 056h, 067h, 061h, 042h, 069h, 06fh, 073h, 02fh, 056h, 042h, 06fh, 078h, 056h, 067h + db 061h, 042h, 069h, 06fh, 073h, 02eh, 073h, 079h, 06dh, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h @@ -7567,4 +7700,4 @@ section CONST2 progbits vstart=0x7ee0 align=1 ; size=0x0 class=DATA group=DGROUP db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h - db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 0cch + db 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 000h, 068h diff --git a/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.md5sum b/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.md5sum index f33ee963..cb2d8015 100644 --- a/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.md5sum +++ b/src/VBox/Devices/Graphics/BIOS/VBoxVgaBiosAlternative.md5sum @@ -1 +1 @@ -1de522806e0717fd9235c1bf7f70bf1c *VBoxVgaBios.rom +25d0dc05c628f90ff6b5aa5e3987ba1f *VBoxVgaBios.rom diff --git a/src/VBox/Devices/Graphics/BIOS/inlines.h b/src/VBox/Devices/Graphics/BIOS/inlines.h index f147698f..4b3fe3d8 100644 --- a/src/VBox/Devices/Graphics/BIOS/inlines.h +++ b/src/VBox/Devices/Graphics/BIOS/inlines.h @@ -3,7 +3,7 @@ */ /* - * Copyright (C) 2010-2011 Oracle Corporation + * Copyright (C) 2010-2012 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; diff --git a/src/VBox/Devices/Graphics/BIOS/vbe.c b/src/VBox/Devices/Graphics/BIOS/vbe.c index 77b74a95..bc8d2bd0 100644 --- a/src/VBox/Devices/Graphics/BIOS/vbe.c +++ b/src/VBox/Devices/Graphics/BIOS/vbe.c @@ -178,7 +178,7 @@ static uint16_t mode_info_find_mode(uint16_t mode, Boolean using_lfb) { uint16_t sig, vmode, attrs; uint16_t cur_info_ofs; /* Current offset in mode list. */ - + /* Read and check the VBE Extra Data signature. */ sig = in_word(VBE_EXTRA_PORT, 0); if (sig != VBEHEADER_MAGIC) { @@ -187,14 +187,14 @@ static uint16_t mode_info_find_mode(uint16_t mode, Boolean using_lfb) #endif return 0; } - + cur_info_ofs = sizeof(VBEHeader); - + vmode = in_word(VBE_EXTRA_PORT, cur_info_ofs + offsetof(ModeInfoListItem, mode)/*&cur_info->mode*/); while (vmode != VBE_VESA_MODE_END_OF_LIST) { attrs = in_word(VBE_EXTRA_PORT, /*&cur_info->info.ModeAttributes*/cur_info_ofs + offsetof(ModeInfoListItem, info.ModeAttributes) ); - + if (vmode == mode) { if (!using_lfb) @@ -216,7 +216,7 @@ static uint16_t mode_info_find_mode(uint16_t mode, Boolean using_lfb) static ModeInfoListItem* mode_info_find_mode(uint16_t mode, Boolean using_lfb) { ModeInfoListItem *cur_info = &mode_info_list; - + while (cur_info->mode != VBE_VESA_MODE_END_OF_LIST) { if (cur_info->mode == mode) @@ -649,7 +649,7 @@ void vbe_biosfn_restore_video_state(uint16_t ES, uint16_t BX) * BX = Number of 64-byte blocks to hold the state buffer (if DL=00h) * */ -void vbe_biosfn_save_restore_state(uint16_t STACK_BASED *AX, uint16_t CX, uint16_t DX, +void vbe_biosfn_save_restore_state(uint16_t STACK_BASED *AX, uint16_t CX, uint16_t DX, uint16_t ES, uint16_t STACK_BASED *BX) { uint16_t result, val; diff --git a/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp b/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp new file mode 100644 index 00000000..8d473a0d --- /dev/null +++ b/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp @@ -0,0 +1,3196 @@ +/** @file + * VMWare SVGA device + */ +/* + * Copyright (C) 2013 Oracle Corporation + * + * This file is part of VirtualBox Open Source Edition (OSE), as + * available from http://www.virtualbox.org. This file is free software; + * you can redistribute it and/or modify it under the terms of the GNU + * General Public License (GPL) as published by the Free Software + * Foundation, in version 2 as it comes in the "COPYING" file of the + * VirtualBox OSE distribution. VirtualBox OSE is distributed in the + * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. + */ + + +/******************************************************************************* +* Header Files * +*******************************************************************************/ +#define LOG_GROUP LOG_GROUP_DEV_VMSVGA +#include <VBox/vmm/pdmdev.h> +#include <VBox/version.h> +#include <VBox/err.h> +#include <VBox/log.h> +#include <VBox/vmm/pgm.h> + +#include <iprt/assert.h> +#include <iprt/semaphore.h> +#include <iprt/uuid.h> +#ifdef IN_RING3 +#include <iprt/mem.h> +#endif + +#include <VBox/VMMDev.h> +#include <VBox/VBoxVideo.h> +#include <VBox/bioslogo.h> + +/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */ +#include "DevVGA.h" + +#ifdef DEBUG +/* Enable to log FIFO register accesses. */ +//#define DEBUG_FIFO_ACCESS +/* Enable to log GMR page accesses. */ +//#define DEBUG_GMR_ACCESS +#endif + +#include "DevVGA-SVGA.h" +#include "vmsvga/svga_reg.h" +#include "vmsvga/svga_escape.h" +#include "vmsvga/svga_overlay.h" +#include "vmsvga/svga3d_reg.h" +#include "vmsvga/svga3d_caps.h" +#ifdef VBOX_WITH_VMSVGA3D +#include "DevVGA-SVGA3d.h" +#endif + +/******************************************************************************* +* Structures and Typedefs * +*******************************************************************************/ +/* 64-bit GMR descriptor */ +typedef struct +{ + RTGCPHYS GCPhys; + uint64_t numPages; +} VMSVGAGMRDESCRIPTOR, *PVMSVGAGMRDESCRIPTOR; + +/* GMR slot */ +typedef struct +{ + uint32_t cbTotal; + uint32_t numDescriptors; + PVMSVGAGMRDESCRIPTOR paDesc; +} GMR, *PGMR; + +/* Internal SVGA state. */ +typedef struct +{ + GMR aGMR[VMSVGA_MAX_GMR_IDS]; + struct + { + SVGAGuestPtr ptr; + uint32_t bytesPerLine; + SVGAGMRImageFormat format; + } GMRFB; + SVGAColorBGRX colorAnnotation; + STAMPROFILE StatR3CmdPresent; + STAMPROFILE StatR3CmdDrawPrimitive; + STAMPROFILE StatR3CmdSurfaceDMA; +} VMSVGASTATE, *PVMSVGASTATE; + +#ifdef IN_RING3 + +/** + * SSM descriptor table for the VMSVGAGMRDESCRIPTOR structure. + */ +static SSMFIELD const g_aVMSVGAGMRDESCRIPTORFields[] = +{ + SSMFIELD_ENTRY_GCPHYS( VMSVGAGMRDESCRIPTOR, GCPhys), + SSMFIELD_ENTRY( VMSVGAGMRDESCRIPTOR, numPages), + SSMFIELD_ENTRY_TERM() +}; + +/** + * SSM descriptor table for the GMR structure. + */ +static SSMFIELD const g_aGMRFields[] = +{ + SSMFIELD_ENTRY( GMR, cbTotal), + SSMFIELD_ENTRY( GMR, numDescriptors), + SSMFIELD_ENTRY_IGN_HCPTR( GMR, paDesc), + SSMFIELD_ENTRY_TERM() +}; + +/** + * SSM descriptor table for the VMSVGASTATE structure. + */ +static SSMFIELD const g_aVMSVGASTATEFields[] = +{ + SSMFIELD_ENTRY_IGNORE( VMSVGASTATE, aGMR), + SSMFIELD_ENTRY( VMSVGASTATE, GMRFB), + SSMFIELD_ENTRY( VMSVGASTATE, colorAnnotation), + SSMFIELD_ENTRY_IGNORE( VMSVGASTATE, StatR3CmdPresent), + SSMFIELD_ENTRY_IGNORE( VMSVGASTATE, StatR3CmdDrawPrimitive), + SSMFIELD_ENTRY_IGNORE( VMSVGASTATE, StatR3CmdSurfaceDMA), + SSMFIELD_ENTRY_TERM() +}; + +/** + * SSM descriptor table for the VGAState.svga structure. + */ +static SSMFIELD const g_aVGAStateSVGAFields[] = +{ + SSMFIELD_ENTRY_IGNORE( VGAState, svga.u64HostWindowId), + SSMFIELD_ENTRY_IGN_HCPTR( VGAState, svga.pFIFOR3), + SSMFIELD_ENTRY_IGN_HCPTR( VGAState, svga.pFIFOR0), + SSMFIELD_ENTRY_IGN_HCPTR( VGAState, svga.pSVGAState), + SSMFIELD_ENTRY_IGN_HCPTR( VGAState, svga.p3dState), + SSMFIELD_ENTRY_IGNORE( VGAState, svga.pFrameBufferBackup), + SSMFIELD_ENTRY_IGN_GCPHYS( VGAState, svga.GCPhysFIFO), + SSMFIELD_ENTRY_IGNORE( VGAState, svga.cbFIFO), + SSMFIELD_ENTRY( VGAState, svga.u32SVGAId), + SSMFIELD_ENTRY( VGAState, svga.fEnabled), + SSMFIELD_ENTRY( VGAState, svga.fConfigured), + SSMFIELD_ENTRY( VGAState, svga.fBusy), + SSMFIELD_ENTRY( VGAState, svga.fTraces), + SSMFIELD_ENTRY( VGAState, svga.u32GuestId), + SSMFIELD_ENTRY( VGAState, svga.cScratchRegion), + SSMFIELD_ENTRY( VGAState, svga.au32ScratchRegion), + SSMFIELD_ENTRY( VGAState, svga.u32IrqStatus), + SSMFIELD_ENTRY( VGAState, svga.u32IrqMask), + SSMFIELD_ENTRY( VGAState, svga.u32PitchLock), + SSMFIELD_ENTRY( VGAState, svga.u32CurrentGMRId), + SSMFIELD_ENTRY( VGAState, svga.u32RegCaps), + SSMFIELD_ENTRY_IGNORE( VGAState, svga.BasePort), + SSMFIELD_ENTRY( VGAState, svga.u32IndexReg), + SSMFIELD_ENTRY_IGNORE( VGAState, svga.FIFORequestSem), + SSMFIELD_ENTRY_IGN_HCPTR( VGAState, svga.pFIFOIOThread), + SSMFIELD_ENTRY( VGAState, svga.iWidth), + SSMFIELD_ENTRY( VGAState, svga.iHeight), + SSMFIELD_ENTRY( VGAState, svga.iBpp), + SSMFIELD_ENTRY( VGAState, svga.cbScanline), + SSMFIELD_ENTRY( VGAState, svga.u32MaxWidth), + SSMFIELD_ENTRY( VGAState, svga.u32MaxHeight), + SSMFIELD_ENTRY( VGAState, svga.u32ActionFlags), + SSMFIELD_ENTRY( VGAState, svga.f3DEnabled), + SSMFIELD_ENTRY( VGAState, svga.fVRAMTracking), + SSMFIELD_ENTRY( VGAState, svga.Padding6), + SSMFIELD_ENTRY_TERM() +}; +#endif /* IN_RING3 */ + +RT_C_DECLS_BEGIN + +#ifdef IN_RING3 +static void vmsvgaSetTraces(PVGASTATE pThis, bool fTraces); +#endif + +RT_C_DECLS_END + + +#ifdef LOG_ENABLED +/** + * Index register string name lookup + * + * @returns Index register string or "UNKNOWN" + * @param pThis VMSVGA State + */ +static const char *vmsvgaIndexToString(PVGASTATE pThis) +{ + switch (pThis->svga.u32IndexReg) + { + case SVGA_REG_ID: + return "SVGA_REG_ID"; + case SVGA_REG_ENABLE: + return "SVGA_REG_ENABLE"; + case SVGA_REG_WIDTH: + return "SVGA_REG_WIDTH"; + case SVGA_REG_HEIGHT: + return "SVGA_REG_HEIGHT"; + case SVGA_REG_MAX_WIDTH: + return "SVGA_REG_MAX_WIDTH"; + case SVGA_REG_MAX_HEIGHT: + return "SVGA_REG_MAX_HEIGHT"; + case SVGA_REG_DEPTH: + return "SVGA_REG_DEPTH"; + case SVGA_REG_BITS_PER_PIXEL: /* Current bpp in the guest */ + return "SVGA_REG_BITS_PER_PIXEL"; + case SVGA_REG_HOST_BITS_PER_PIXEL: /* (Deprecated) */ + return "SVGA_REG_HOST_BITS_PER_PIXEL"; + case SVGA_REG_PSEUDOCOLOR: + return "SVGA_REG_PSEUDOCOLOR"; + case SVGA_REG_RED_MASK: + return "SVGA_REG_RED_MASK"; + case SVGA_REG_GREEN_MASK: + return "SVGA_REG_GREEN_MASK"; + case SVGA_REG_BLUE_MASK: + return "SVGA_REG_BLUE_MASK"; + case SVGA_REG_BYTES_PER_LINE: + return "SVGA_REG_BYTES_PER_LINE"; + case SVGA_REG_VRAM_SIZE: /* VRAM size */ + return "SVGA_REG_VRAM_SIZE"; + case SVGA_REG_FB_START: /* Frame buffer physical address. */ + return "SVGA_REG_FB_START"; + case SVGA_REG_FB_OFFSET: /* Offset of the frame buffer in VRAM */ + return "SVGA_REG_FB_OFFSET"; + case SVGA_REG_FB_SIZE: /* Frame buffer size */ + return "SVGA_REG_FB_SIZE"; + case SVGA_REG_CAPABILITIES: + return "SVGA_REG_CAPABILITIES"; + case SVGA_REG_MEM_START: /* FIFO start */ + return "SVGA_REG_MEM_START"; + case SVGA_REG_MEM_SIZE: /* FIFO size */ + return "SVGA_REG_MEM_SIZE"; + case SVGA_REG_CONFIG_DONE: /* Set when memory area configured */ + return "SVGA_REG_CONFIG_DONE"; + case SVGA_REG_SYNC: /* See "FIFO Synchronization Registers" */ + return "SVGA_REG_SYNC"; + case SVGA_REG_BUSY: /* See "FIFO Synchronization Registers" */ + return "SVGA_REG_BUSY"; + case SVGA_REG_GUEST_ID: /* Set guest OS identifier */ + return "SVGA_REG_GUEST_ID"; + case SVGA_REG_SCRATCH_SIZE: /* Number of scratch registers */ + return "SVGA_REG_SCRATCH_SIZE"; + case SVGA_REG_MEM_REGS: /* Number of FIFO registers */ + return "SVGA_REG_MEM_REGS"; + case SVGA_REG_PITCHLOCK: /* Fixed pitch for all modes */ + return "SVGA_REG_PITCHLOCK"; + case SVGA_REG_IRQMASK: /* Interrupt mask */ + return "SVGA_REG_IRQMASK"; + case SVGA_REG_GMR_ID: + return "SVGA_REG_GMR_ID"; + case SVGA_REG_GMR_DESCRIPTOR: + return "SVGA_REG_GMR_DESCRIPTOR"; + case SVGA_REG_GMR_MAX_IDS: + return "SVGA_REG_GMR_MAX_IDS"; + case SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH: + return "SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH"; + case SVGA_REG_TRACES: /* Enable trace-based updates even when FIFO is on */ + return "SVGA_REG_TRACES"; + case SVGA_REG_GMRS_MAX_PAGES: /* Maximum number of 4KB pages for all GMRs */ + return "SVGA_REG_GMRS_MAX_PAGES"; + case SVGA_REG_MEMORY_SIZE: /* Total dedicated device memory excluding FIFO */ + return "SVGA_REG_MEMORY_SIZE"; + case SVGA_REG_TOP: /* Must be 1 more than the last register */ + return "SVGA_REG_TOP"; + case SVGA_PALETTE_BASE: /* Base of SVGA color map */ + return "SVGA_PALETTE_BASE"; + case SVGA_REG_CURSOR_ID: + return "SVGA_REG_CURSOR_ID"; + case SVGA_REG_CURSOR_X: + return "SVGA_REG_CURSOR_X"; + case SVGA_REG_CURSOR_Y: + return "SVGA_REG_CURSOR_Y"; + case SVGA_REG_CURSOR_ON: + return "SVGA_REG_CURSOR_ON"; + case SVGA_REG_NUM_GUEST_DISPLAYS:/* Number of guest displays in X/Y direction */ + return "SVGA_REG_NUM_GUEST_DISPLAYS"; + case SVGA_REG_DISPLAY_ID: /* Display ID for the following display attributes */ + return "SVGA_REG_DISPLAY_ID"; + case SVGA_REG_DISPLAY_IS_PRIMARY:/* Whether this is a primary display */ + return "SVGA_REG_DISPLAY_IS_PRIMARY"; + case SVGA_REG_DISPLAY_POSITION_X:/* The display position x */ + return "SVGA_REG_DISPLAY_POSITION_X"; + case SVGA_REG_DISPLAY_POSITION_Y:/* The display position y */ + return "SVGA_REG_DISPLAY_POSITION_Y"; + case SVGA_REG_DISPLAY_WIDTH: /* The display's width */ + return "SVGA_REG_DISPLAY_WIDTH"; + case SVGA_REG_DISPLAY_HEIGHT: /* The display's height */ + return "SVGA_REG_DISPLAY_HEIGHT"; + case SVGA_REG_NUM_DISPLAYS: /* (Deprecated) */ + return "SVGA_REG_NUM_DISPLAYS"; + + default: + if ( pThis->svga.u32IndexReg >= SVGA_SCRATCH_BASE + && pThis->svga.u32IndexReg < SVGA_SCRATCH_BASE + pThis->svga.cScratchRegion) + { + return "SVGA_SCRATCH_BASE reg"; + } + return "UNKNOWN"; + } +} + +/** + * FIFO command name lookup + * + * @returns FIFO command string or "UNKNOWN" + * @param u32Cmd FIFO command + */ +static const char *vmsvgaFIFOCmdToString(uint32_t u32Cmd) +{ + switch (u32Cmd) + { + case SVGA_CMD_INVALID_CMD: + return "SVGA_CMD_INVALID_CMD"; + case SVGA_CMD_UPDATE: + return "SVGA_CMD_UPDATE"; + case SVGA_CMD_RECT_COPY: + return "SVGA_CMD_RECT_COPY"; + case SVGA_CMD_DEFINE_CURSOR: + return "SVGA_CMD_DEFINE_CURSOR"; + case SVGA_CMD_DEFINE_ALPHA_CURSOR: + return "SVGA_CMD_DEFINE_ALPHA_CURSOR"; + case SVGA_CMD_UPDATE_VERBOSE: + return "SVGA_CMD_UPDATE_VERBOSE"; + case SVGA_CMD_FRONT_ROP_FILL: + return "SVGA_CMD_FRONT_ROP_FILL"; + case SVGA_CMD_FENCE: + return "SVGA_CMD_FENCE"; + case SVGA_CMD_ESCAPE: + return "SVGA_CMD_ESCAPE"; + case SVGA_CMD_DEFINE_SCREEN: + return "SVGA_CMD_DEFINE_SCREEN"; + case SVGA_CMD_DESTROY_SCREEN: + return "SVGA_CMD_DESTROY_SCREEN"; + case SVGA_CMD_DEFINE_GMRFB: + return "SVGA_CMD_DEFINE_GMRFB"; + case SVGA_CMD_BLIT_GMRFB_TO_SCREEN: + return "SVGA_CMD_BLIT_GMRFB_TO_SCREEN"; + case SVGA_CMD_BLIT_SCREEN_TO_GMRFB: + return "SVGA_CMD_BLIT_SCREEN_TO_GMRFB"; + case SVGA_CMD_ANNOTATION_FILL: + return "SVGA_CMD_ANNOTATION_FILL"; + case SVGA_CMD_ANNOTATION_COPY: + return "SVGA_CMD_ANNOTATION_COPY"; + case SVGA_CMD_DEFINE_GMR2: + return "SVGA_CMD_DEFINE_GMR2"; + case SVGA_CMD_REMAP_GMR2: + return "SVGA_CMD_REMAP_GMR2"; + case SVGA_3D_CMD_SURFACE_DEFINE: + return "SVGA_3D_CMD_SURFACE_DEFINE"; + case SVGA_3D_CMD_SURFACE_DESTROY: + return "SVGA_3D_CMD_SURFACE_DESTROY"; + case SVGA_3D_CMD_SURFACE_COPY: + return "SVGA_3D_CMD_SURFACE_COPY"; + case SVGA_3D_CMD_SURFACE_STRETCHBLT: + return "SVGA_3D_CMD_SURFACE_STRETCHBLT"; + case SVGA_3D_CMD_SURFACE_DMA: + return "SVGA_3D_CMD_SURFACE_DMA"; + case SVGA_3D_CMD_CONTEXT_DEFINE: + return "SVGA_3D_CMD_CONTEXT_DEFINE"; + case SVGA_3D_CMD_CONTEXT_DESTROY: + return "SVGA_3D_CMD_CONTEXT_DESTROY"; + case SVGA_3D_CMD_SETTRANSFORM: + return "SVGA_3D_CMD_SETTRANSFORM"; + case SVGA_3D_CMD_SETZRANGE: + return "SVGA_3D_CMD_SETZRANGE"; + case SVGA_3D_CMD_SETRENDERSTATE: + return "SVGA_3D_CMD_SETRENDERSTATE"; + case SVGA_3D_CMD_SETRENDERTARGET: + return "SVGA_3D_CMD_SETRENDERTARGET"; + case SVGA_3D_CMD_SETTEXTURESTATE: + return "SVGA_3D_CMD_SETTEXTURESTATE"; + case SVGA_3D_CMD_SETMATERIAL: + return "SVGA_3D_CMD_SETMATERIAL"; + case SVGA_3D_CMD_SETLIGHTDATA: + return "SVGA_3D_CMD_SETLIGHTDATA"; + case SVGA_3D_CMD_SETLIGHTENABLED: + return "SVGA_3D_CMD_SETLIGHTENABLED"; + case SVGA_3D_CMD_SETVIEWPORT: + return "SVGA_3D_CMD_SETVIEWPORT"; + case SVGA_3D_CMD_SETCLIPPLANE: + return "SVGA_3D_CMD_SETCLIPPLANE"; + case SVGA_3D_CMD_CLEAR: + return "SVGA_3D_CMD_CLEAR"; + case SVGA_3D_CMD_PRESENT: + return "SVGA_3D_CMD_PRESENT"; + case SVGA_3D_CMD_SHADER_DEFINE: + return "SVGA_3D_CMD_SHADER_DEFINE"; + case SVGA_3D_CMD_SHADER_DESTROY: + return "SVGA_3D_CMD_SHADER_DESTROY"; + case SVGA_3D_CMD_SET_SHADER: + return "SVGA_3D_CMD_SET_SHADER"; + case SVGA_3D_CMD_SET_SHADER_CONST: + return "SVGA_3D_CMD_SET_SHADER_CONST"; + case SVGA_3D_CMD_DRAW_PRIMITIVES: + return "SVGA_3D_CMD_DRAW_PRIMITIVES"; + case SVGA_3D_CMD_SETSCISSORRECT: + return "SVGA_3D_CMD_SETSCISSORRECT"; + case SVGA_3D_CMD_BEGIN_QUERY: + return "SVGA_3D_CMD_BEGIN_QUERY"; + case SVGA_3D_CMD_END_QUERY: + return "SVGA_3D_CMD_END_QUERY"; + case SVGA_3D_CMD_WAIT_FOR_QUERY: + return "SVGA_3D_CMD_WAIT_FOR_QUERY"; + case SVGA_3D_CMD_PRESENT_READBACK: + return "SVGA_3D_CMD_PRESENT_READBACK"; + case SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN: + return "SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN"; + case SVGA_3D_CMD_SURFACE_DEFINE_V2: + return "SVGA_3D_CMD_SURFACE_DEFINE_V2"; + case SVGA_3D_CMD_GENERATE_MIPMAPS: + return "SVGA_3D_CMD_GENERATE_MIPMAPS"; + case SVGA_3D_CMD_ACTIVATE_SURFACE: + return "SVGA_3D_CMD_ACTIVATE_SURFACE"; + case SVGA_3D_CMD_DEACTIVATE_SURFACE: + return "SVGA_3D_CMD_DEACTIVATE_SURFACE"; + default: + return "UNKNOWN"; + } +} +#endif + +/** + * Read port register + * + * @returns VBox status code. + * @param pThis VMSVGA State + * @param pu32 Where to store the read value + */ +PDMBOTHCBDECL(int) vmsvgaReadPort(PVGASTATE pThis, uint32_t *pu32) +{ + int rc = VINF_SUCCESS; + + *pu32 = 0; + switch (pThis->svga.u32IndexReg) + { + case SVGA_REG_ID: + *pu32 = pThis->svga.u32SVGAId; + break; + + case SVGA_REG_ENABLE: + *pu32 = pThis->svga.fEnabled; + break; + + case SVGA_REG_WIDTH: + { + if ( pThis->svga.fEnabled + && pThis->svga.iWidth != -1) + { + *pu32 = pThis->svga.iWidth; + } + else + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; +#else + *pu32 = pThis->pDrv->cx; +#endif + } + break; + } + + case SVGA_REG_HEIGHT: + { + if ( pThis->svga.fEnabled + && pThis->svga.iHeight != -1) + { + *pu32 = pThis->svga.iHeight; + } + else + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; +#else + *pu32 = pThis->pDrv->cy; +#endif + } + break; + } + + case SVGA_REG_MAX_WIDTH: + *pu32 = pThis->svga.u32MaxWidth; + break; + + case SVGA_REG_MAX_HEIGHT: + *pu32 = pThis->svga.u32MaxHeight; + break; + + case SVGA_REG_DEPTH: + /* This returns the color depth of the current mode. */ + switch (pThis->svga.iBpp) + { + case 15: + case 16: + case 24: + *pu32 = pThis->svga.iBpp; + break; + + default: + case 32: + *pu32 = 24; /* The upper 8 bits are either alpha bits or not used. */ + break; + } + break; + + case SVGA_REG_HOST_BITS_PER_PIXEL: /* (Deprecated) */ + if ( pThis->svga.fEnabled + && pThis->svga.iBpp != (unsigned)-1) + { + *pu32 = pThis->svga.iBpp; + } + else + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; +#else + *pu32 = pThis->pDrv->cBits; +#endif + } + break; + + case SVGA_REG_BITS_PER_PIXEL: /* Current bpp in the guest */ + if ( pThis->svga.fEnabled + && pThis->svga.iBpp != (unsigned)-1) + { + *pu32 = (pThis->svga.iBpp + 7) & ~7; + } + else + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; +#else + *pu32 = (pThis->pDrv->cBits + 7) & ~7; +#endif + } + break; + + case SVGA_REG_PSEUDOCOLOR: + *pu32 = 0; + break; + + case SVGA_REG_RED_MASK: + case SVGA_REG_GREEN_MASK: + case SVGA_REG_BLUE_MASK: + { + uint32_t iBpp; + + if ( pThis->svga.fEnabled + && pThis->svga.iBpp != (unsigned)-1) + { + iBpp = pThis->svga.iBpp; + } + else + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; + break; +#else + iBpp = pThis->pDrv->cBits; +#endif + } + uint32_t u32RedMask, u32GreenMask, u32BlueMask; + switch (iBpp) + { + case 8: + u32RedMask = 0x07; + u32GreenMask = 0x38; + u32BlueMask = 0xc0; + break; + + case 15: + u32RedMask = 0x0000001f; + u32GreenMask = 0x000003e0; + u32BlueMask = 0x00007c00; + break; + + case 16: + u32RedMask = 0x0000001f; + u32GreenMask = 0x000007e0; + u32BlueMask = 0x0000f800; + break; + + case 24: + case 32: + default: + u32RedMask = 0x00ff0000; + u32GreenMask = 0x0000ff00; + u32BlueMask = 0x000000ff; + break; + } + switch (pThis->svga.u32IndexReg) + { + case SVGA_REG_RED_MASK: + *pu32 = u32RedMask; + break; + + case SVGA_REG_GREEN_MASK: + *pu32 = u32GreenMask; + break; + + case SVGA_REG_BLUE_MASK: + *pu32 = u32BlueMask; + break; + } + break; + } + + case SVGA_REG_BYTES_PER_LINE: + { + if ( pThis->svga.fEnabled + && pThis->svga.cbScanline) + { + *pu32 = pThis->svga.cbScanline; + } + else + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; +#else + *pu32 = pThis->pDrv->cbScanline; +#endif + } + break; + } + + case SVGA_REG_VRAM_SIZE: /* VRAM size */ + *pu32 = pThis->vram_size; + break; + + case SVGA_REG_FB_START: /* Frame buffer physical address. */ + Assert(pThis->GCPhysVRAM <= 0xffffffff); + *pu32 = pThis->GCPhysVRAM; + break; + + case SVGA_REG_FB_OFFSET: /* Offset of the frame buffer in VRAM */ + /* Always zero in our case. */ + *pu32 = 0; + break; + + case SVGA_REG_FB_SIZE: /* Frame buffer size */ + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; +#else + /* VMWare testcases want at least 4 MB in case the hardware is disabled. */ + if ( pThis->svga.fEnabled + && pThis->svga.iHeight != -1) + { + /* Hardware enabled; return real framebuffer size .*/ + *pu32 = (uint32_t)pThis->svga.iHeight * pThis->svga.cbScanline; + } + else + *pu32 = RT_MAX(0x100000, (uint32_t)pThis->pDrv->cy * pThis->pDrv->cbScanline); + + *pu32 = RT_MIN(pThis->vram_size, *pu32); + Log(("h=%d w=%d bpp=%d\n", pThis->pDrv->cy, pThis->pDrv->cx, pThis->pDrv->cBits)); +#endif + break; + } + + case SVGA_REG_CAPABILITIES: + *pu32 = pThis->svga.u32RegCaps; + break; + + case SVGA_REG_MEM_START: /* FIFO start */ + Assert(pThis->svga.GCPhysFIFO <= 0xffffffff); + *pu32 = pThis->svga.GCPhysFIFO; + break; + + case SVGA_REG_MEM_SIZE: /* FIFO size */ + *pu32 = pThis->svga.cbFIFO; + break; + + case SVGA_REG_CONFIG_DONE: /* Set when memory area configured */ + *pu32 = pThis->svga.fConfigured; + break; + + case SVGA_REG_SYNC: /* See "FIFO Synchronization Registers" */ + *pu32 = 0; + break; + + case SVGA_REG_BUSY: /* See "FIFO Synchronization Registers" */ + if (pThis->svga.fBusy) + { +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_READ; + break; +#else + /* @todo bit crude */ + RTThreadSleep(50); +#endif + } + *pu32 = pThis->svga.fBusy; + break; + + case SVGA_REG_GUEST_ID: /* Set guest OS identifier */ + *pu32 = pThis->svga.u32GuestId; + break; + + case SVGA_REG_SCRATCH_SIZE: /* Number of scratch registers */ + *pu32 = pThis->svga.cScratchRegion; + break; + + case SVGA_REG_MEM_REGS: /* Number of FIFO registers */ + *pu32 = SVGA_FIFO_NUM_REGS; + break; + + case SVGA_REG_PITCHLOCK: /* Fixed pitch for all modes */ + *pu32 = pThis->svga.u32PitchLock; + break; + + case SVGA_REG_IRQMASK: /* Interrupt mask */ + *pu32 = pThis->svga.u32IrqMask; + break; + + /* See "Guest memory regions" below. */ + case SVGA_REG_GMR_ID: + *pu32 = pThis->svga.u32CurrentGMRId; + break; + + case SVGA_REG_GMR_DESCRIPTOR: + /* Write only */ + *pu32 = 0; + break; + + case SVGA_REG_GMR_MAX_IDS: + *pu32 = VMSVGA_MAX_GMR_IDS; + break; + + case SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH: + *pu32 = VMSVGA_MAX_GMR_PAGES; + break; + + case SVGA_REG_TRACES: /* Enable trace-based updates even when FIFO is on */ + *pu32 = pThis->svga.fTraces; + break; + + case SVGA_REG_GMRS_MAX_PAGES: /* Maximum number of 4KB pages for all GMRs */ + *pu32 = VMSVGA_MAX_GMR_PAGES; + break; + + case SVGA_REG_MEMORY_SIZE: /* Total dedicated device memory excluding FIFO */ + *pu32 = VMSVGA_SURFACE_SIZE; + break; + + case SVGA_REG_TOP: /* Must be 1 more than the last register */ + break; + + case SVGA_PALETTE_BASE: /* Base of SVGA color map */ + break; + /* Next 768 (== 256*3) registers exist for colormap */ + + /* Mouse cursor support. */ + case SVGA_REG_CURSOR_ID: + case SVGA_REG_CURSOR_X: + case SVGA_REG_CURSOR_Y: + case SVGA_REG_CURSOR_ON: + break; + + /* Legacy multi-monitor support */ + case SVGA_REG_NUM_GUEST_DISPLAYS:/* Number of guest displays in X/Y direction */ + *pu32 = 1; + break; + + case SVGA_REG_DISPLAY_ID: /* Display ID for the following display attributes */ + case SVGA_REG_DISPLAY_IS_PRIMARY:/* Whether this is a primary display */ + case SVGA_REG_DISPLAY_POSITION_X:/* The display position x */ + case SVGA_REG_DISPLAY_POSITION_Y:/* The display position y */ + *pu32 = 0; + break; + + case SVGA_REG_DISPLAY_WIDTH: /* The display's width */ + *pu32 = pThis->svga.iWidth; + break; + + case SVGA_REG_DISPLAY_HEIGHT: /* The display's height */ + *pu32 = pThis->svga.iHeight; + break; + + case SVGA_REG_NUM_DISPLAYS: /* (Deprecated) */ + *pu32 = 1; /* Must return something sensible here otherwise the Linux driver will take a legacy code path without 3d support. */ + break; + + default: + if ( pThis->svga.u32IndexReg >= SVGA_SCRATCH_BASE + && pThis->svga.u32IndexReg < SVGA_SCRATCH_BASE + pThis->svga.cScratchRegion) + { + *pu32 = pThis->svga.au32ScratchRegion[pThis->svga.u32IndexReg - SVGA_SCRATCH_BASE]; + } + break; + } + Log(("vmsvgaReadPort index=%s (%d) val=%x rc=%x\n", vmsvgaIndexToString(pThis), pThis->svga.u32IndexReg, *pu32, rc)); + return rc; +} + +#ifdef IN_RING3 +/** + * Apply the current resolution settings to change the video mode. + * + * @returns VBox status code. + * @param pThis VMSVGA State + */ +int vmsvgaChangeMode(PVGASTATE pThis) +{ + int rc; + + if ( pThis->svga.iWidth == -1 + || pThis->svga.iHeight == -1 + || pThis->svga.iBpp == (unsigned)-1) + { + /* Mode change in progress; wait for all values to be set. */ + Log(("vmsvgaChangeMode: BOGUS sEnable LFB mode and resize to (%d,%d) bpp=%d\n", pThis->svga.iWidth, pThis->svga.iHeight, pThis->svga.iBpp)); + return VINF_SUCCESS; + } + + if ( pThis->last_bpp == (unsigned)pThis->svga.iBpp + && pThis->last_scr_width == (unsigned)pThis->svga.iWidth + && pThis->last_scr_height == (unsigned)pThis->svga.iHeight + && pThis->last_width == (unsigned)pThis->svga.iWidth + && pThis->last_height == (unsigned)pThis->svga.iHeight + ) + { + /* Nothing to do. */ + Log(("vmsvgaChangeMode: nothing changed; ignore\n")); + return VINF_SUCCESS; + } + + Log(("vmsvgaChangeMode: sEnable LFB mode and resize to (%d,%d) bpp=%d\n", pThis->svga.iWidth, pThis->svga.iHeight, pThis->svga.iBpp)); + pThis->svga.cbScanline = ((pThis->svga.iWidth * pThis->svga.iBpp + 7) & ~7) / 8; + + pThis->pDrv->pfnLFBModeChange(pThis->pDrv, true); + rc = pThis->pDrv->pfnResize(pThis->pDrv, pThis->svga.iBpp, pThis->CTX_SUFF(vram_ptr), pThis->svga.cbScanline, pThis->svga.iWidth, pThis->svga.iHeight); + AssertRC(rc); + AssertReturn(rc == VINF_SUCCESS || rc == VINF_VGA_RESIZE_IN_PROGRESS, rc); + + /* last stuff */ + pThis->last_bpp = pThis->svga.iBpp; + pThis->last_scr_width = pThis->svga.iWidth; + pThis->last_scr_height = pThis->svga.iHeight; + pThis->last_width = pThis->svga.iWidth; + pThis->last_height = pThis->svga.iHeight; + + ASMAtomicOrU32(&pThis->svga.u32ActionFlags, VMSVGA_ACTION_CHANGEMODE); + + return VINF_SUCCESS; +} +#endif /* IN_RING3 */ + +/** + * Write port register + * + * @returns VBox status code. + * @param pThis VMSVGA State + * @param u32 Value to write + */ +PDMBOTHCBDECL(int) vmsvgaWritePort(PVGASTATE pThis, uint32_t u32) +{ + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + int rc = VINF_SUCCESS; + + Log(("vmsvgaWritePort index=%s (%d) val=%x\n", vmsvgaIndexToString(pThis), pThis->svga.u32IndexReg, u32)); + switch (pThis->svga.u32IndexReg) + { + case SVGA_REG_ID: + if ( u32 == SVGA_ID_0 + || u32 == SVGA_ID_1 + || u32 == SVGA_ID_2) + pThis->svga.u32SVGAId = u32; + break; + + case SVGA_REG_ENABLE: + if ( pThis->svga.fEnabled == u32 + && pThis->last_bpp == (unsigned)pThis->svga.iBpp + && pThis->last_scr_width == (unsigned)pThis->svga.iWidth + && pThis->last_scr_height == (unsigned)pThis->svga.iHeight + && pThis->last_width == (unsigned)pThis->svga.iWidth + && pThis->last_height == (unsigned)pThis->svga.iHeight + ) + /* Nothing to do. */ + break; + +#ifdef IN_RING3 + if ( u32 == 1 + && pThis->svga.fEnabled == false) + { + /* Make a backup copy of the first 32k in order to save font data etc. */ + memcpy(pThis->svga.pFrameBufferBackup, pThis->vram_ptrR3, VMSVGA_FRAMEBUFFER_BACKUP_SIZE); + } + + pThis->svga.fEnabled = u32; + if (pThis->svga.fEnabled) + { + if ( pThis->svga.iWidth == -1 + && pThis->svga.iHeight == -1 + && pThis->svga.iBpp == (unsigned)-1) + { + /* Keep the current mode. */ + pThis->svga.iWidth = pThis->pDrv->cx; + pThis->svga.iHeight = pThis->pDrv->cy; + pThis->svga.iBpp = (pThis->pDrv->cBits + 7) & ~7; + } + + if ( pThis->svga.iWidth != -1 + && pThis->svga.iHeight != -1 + && pThis->svga.iBpp != (unsigned)-1) + { + rc = vmsvgaChangeMode(pThis); + AssertRCReturn(rc, rc); + } + Log(("configured=%d busy=%d\n", pThis->svga.fConfigured, pThis->svga.pFIFOR3[SVGA_FIFO_BUSY])); + uint32_t *pFIFO = pThis->svga.pFIFOR3; + Log(("next %x stop %x\n", pFIFO[SVGA_FIFO_NEXT_CMD], pFIFO[SVGA_FIFO_STOP])); + + /* Disable or enable dirty page tracking according to the current fTraces value. */ + vmsvgaSetTraces(pThis, !!pThis->svga.fTraces); + } + else + { + /* Restore the text mode backup. */ + memcpy(pThis->vram_ptrR3, pThis->svga.pFrameBufferBackup, VMSVGA_FRAMEBUFFER_BACKUP_SIZE); + +/* pThis->svga.iHeight = -1; + pThis->svga.iWidth = -1; + pThis->svga.iBpp = -1; + pThis->svga.cbScanline = 0; */ + pThis->pDrv->pfnLFBModeChange(pThis->pDrv, false); + + /* Enable dirty page tracking again when going into legacy mode. */ + vmsvgaSetTraces(pThis, true); + } +#else + rc = VINF_IOM_R3_IOPORT_WRITE; +#endif + break; + + case SVGA_REG_WIDTH: + if (pThis->svga.iWidth == (int) u32) + break; /* nop */ + + pThis->svga.iWidth = (int) u32; + if (pThis->svga.fEnabled) + { +#ifdef IN_RING3 + rc = vmsvgaChangeMode(pThis); + AssertRCReturn(rc, rc); +#else + rc = VINF_IOM_R3_IOPORT_WRITE; + break; +#endif + } + break; + + case SVGA_REG_HEIGHT: + if (pThis->svga.iHeight == (int) u32) + break; /* nop */ + + pThis->svga.iHeight = (int) u32; + if (pThis->svga.fEnabled) + { +#ifdef IN_RING3 + rc = vmsvgaChangeMode(pThis); + AssertRCReturn(rc, rc); +#else + rc = VINF_IOM_R3_IOPORT_WRITE; + break; +#endif + } + break; + + case SVGA_REG_DEPTH: + /* @todo read-only?? */ + break; + + case SVGA_REG_BITS_PER_PIXEL: /* Current bpp in the guest */ + if (pThis->svga.iBpp == u32) + break; /* nop */ + + pThis->svga.iBpp = u32; + if (pThis->svga.fEnabled) + { +#ifdef IN_RING3 + rc = vmsvgaChangeMode(pThis); + AssertRCReturn(rc, rc); +#else + rc = VINF_IOM_R3_IOPORT_WRITE; + break; +#endif + } + break; + + case SVGA_REG_PSEUDOCOLOR: + break; + + case SVGA_REG_CONFIG_DONE: /* Set when memory area configured */ +#ifdef IN_RING3 + pThis->svga.fConfigured = u32; + /* Disabling the FIFO enables tracing (dirty page detection) by default. */ + if (!pThis->svga.fConfigured) + { + pThis->svga.fTraces = true; + } + vmsvgaSetTraces(pThis, !!pThis->svga.fTraces); +#else + rc = VINF_IOM_R3_IOPORT_WRITE; +#endif + break; + + case SVGA_REG_SYNC: /* See "FIFO Synchronization Registers" */ + if ( pThis->svga.fEnabled + && pThis->svga.fConfigured) + { +#ifdef IN_RING3 + Log(("SVGA_REG_SYNC: SVGA_FIFO_BUSY=%d\n", pThis->svga.pFIFOR3[SVGA_FIFO_BUSY])); + pThis->svga.fBusy = true; + pThis->svga.pFIFOR3[SVGA_FIFO_BUSY] = pThis->svga.fBusy; + + /* Kick the FIFO thread to start processing commands again. */ + RTSemEventSignal(pThis->svga.FIFORequestSem); +#else + rc = VINF_IOM_R3_IOPORT_WRITE; +#endif + } + /* else nothing to do. */ + else + Log(("Sync ignored enabled=%d configured=%d\n", pThis->svga.fEnabled, pThis->svga.fConfigured)); + + break; + + case SVGA_REG_BUSY: /* See "FIFO Synchronization Registers" (read-only) */ + break; + + case SVGA_REG_GUEST_ID: /* Set guest OS identifier */ + pThis->svga.u32GuestId = u32; + break; + + case SVGA_REG_PITCHLOCK: /* Fixed pitch for all modes */ + pThis->svga.u32PitchLock = u32; + break; + + case SVGA_REG_IRQMASK: /* Interrupt mask */ + pThis->svga.u32IrqMask = u32; + + /* Irq pending after the above change? */ + if (pThis->svga.u32IrqMask & pThis->svga.u32IrqStatus) + { + Log(("SVGA_REG_IRQMASK: Trigger interrupt with status %x\n", pThis->svga.u32IrqStatus)); + PDMDevHlpPCISetIrqNoWait(pThis->CTX_SUFF(pDevIns), 0, 1); + } + else + PDMDevHlpPCISetIrqNoWait(pThis->CTX_SUFF(pDevIns), 0, 0); + break; + + /* Mouse cursor support */ + case SVGA_REG_CURSOR_ID: + case SVGA_REG_CURSOR_X: + case SVGA_REG_CURSOR_Y: + case SVGA_REG_CURSOR_ON: + break; + + /* Legacy multi-monitor support */ + case SVGA_REG_NUM_GUEST_DISPLAYS:/* Number of guest displays in X/Y direction */ + break; + case SVGA_REG_DISPLAY_ID: /* Display ID for the following display attributes */ + break; + case SVGA_REG_DISPLAY_IS_PRIMARY:/* Whether this is a primary display */ + break; + case SVGA_REG_DISPLAY_POSITION_X:/* The display position x */ + break; + case SVGA_REG_DISPLAY_POSITION_Y:/* The display position y */ + break; + case SVGA_REG_DISPLAY_WIDTH: /* The display's width */ + break; + case SVGA_REG_DISPLAY_HEIGHT: /* The display's height */ + break; +#ifdef VBOX_WITH_VMSVGA3D + /* See "Guest memory regions" below. */ + case SVGA_REG_GMR_ID: + pThis->svga.u32CurrentGMRId = u32; + break; + + case SVGA_REG_GMR_DESCRIPTOR: +#ifndef IN_RING3 + rc = VINF_IOM_R3_IOPORT_WRITE; + break; +#else + { + SVGAGuestMemDescriptor desc; + RTGCPHYS GCPhys = (RTGCPHYS)u32 << PAGE_SHIFT; + RTGCPHYS GCPhysBase = GCPhys; + uint32_t idGMR = pThis->svga.u32CurrentGMRId; + uint32_t cDescriptorsAllocated = 16; + uint32_t iDescriptor = 0; + + /* Validate current GMR id. */ + AssertBreak(idGMR < VMSVGA_MAX_GMR_IDS); + + /* Free the old GMR if present. */ + vmsvgaGMRFree(pThis, idGMR); + + /* Just undefine the GMR? */ + if (GCPhys == 0) + break; + + pSVGAState->aGMR[idGMR].paDesc = (PVMSVGAGMRDESCRIPTOR)RTMemAllocZ(cDescriptorsAllocated * sizeof(VMSVGAGMRDESCRIPTOR)); + AssertReturn(pSVGAState->aGMR[idGMR].paDesc, VERR_NO_MEMORY); + + /* Never cross a page boundary automatically. */ + while (PHYS_PAGE_ADDRESS(GCPhys) == PHYS_PAGE_ADDRESS(GCPhysBase)) + { + /* Read descriptor. */ + rc = PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, &desc, sizeof(desc)); + AssertRCBreak(rc); + + if ( desc.ppn == 0 + && desc.numPages == 0) + break; /* terminator */ + + if ( desc.ppn != 0 + && desc.numPages == 0) + { + /* Pointer to the next physical page of descriptors. */ + GCPhys = GCPhysBase = desc.ppn << PAGE_SHIFT; + } + else + { + if (iDescriptor == cDescriptorsAllocated) + { + cDescriptorsAllocated += 16; + pSVGAState->aGMR[idGMR].paDesc = (PVMSVGAGMRDESCRIPTOR)RTMemRealloc(pSVGAState->aGMR[idGMR].paDesc, cDescriptorsAllocated * sizeof(VMSVGAGMRDESCRIPTOR)); + AssertReturn(pSVGAState->aGMR[idGMR].paDesc, VERR_NO_MEMORY); + } + + pSVGAState->aGMR[idGMR].paDesc[iDescriptor].GCPhys = desc.ppn << PAGE_SHIFT; + pSVGAState->aGMR[idGMR].paDesc[iDescriptor++].numPages = desc.numPages; + pSVGAState->aGMR[idGMR].cbTotal += desc.numPages * PAGE_SIZE; + + /* Continue with the next descriptor. */ + GCPhys += sizeof(desc); + } + } + pSVGAState->aGMR[idGMR].numDescriptors = iDescriptor; + Log(("Defined new gmr %x numDescriptors=%d cbTotal=%x\n", idGMR, iDescriptor, pSVGAState->aGMR[idGMR].cbTotal)); + + if (!pSVGAState->aGMR[idGMR].numDescriptors) + { + AssertFailed(); + RTMemFree(pSVGAState->aGMR[idGMR].paDesc); + pSVGAState->aGMR[idGMR].paDesc = NULL; + } + AssertRC(rc); + break; + } +#endif +#endif // VBOX_WITH_VMSVGA3D + + case SVGA_REG_TRACES: /* Enable trace-based updates even when FIFO is on */ + if (pThis->svga.fTraces == u32) + break; /* nothing to do */ + +#ifdef IN_RING3 + vmsvgaSetTraces(pThis, !!u32); +#else + rc = VINF_IOM_R3_IOPORT_WRITE; +#endif + break; + + case SVGA_REG_TOP: /* Must be 1 more than the last register */ + break; + + case SVGA_PALETTE_BASE: /* Base of SVGA color map */ + break; + /* Next 768 (== 256*3) registers exist for colormap */ + + case SVGA_REG_NUM_DISPLAYS: /* (Deprecated) */ + Log(("Write to deprecated register %x - val %x ignored\n", pThis->svga.u32IndexReg, u32)); + break; + + case SVGA_REG_FB_START: + case SVGA_REG_MEM_START: + case SVGA_REG_HOST_BITS_PER_PIXEL: + case SVGA_REG_MAX_WIDTH: + case SVGA_REG_MAX_HEIGHT: + case SVGA_REG_VRAM_SIZE: + case SVGA_REG_FB_SIZE: + case SVGA_REG_CAPABILITIES: + case SVGA_REG_MEM_SIZE: + case SVGA_REG_SCRATCH_SIZE: /* Number of scratch registers */ + case SVGA_REG_MEM_REGS: /* Number of FIFO registers */ + case SVGA_REG_BYTES_PER_LINE: + case SVGA_REG_FB_OFFSET: + case SVGA_REG_RED_MASK: + case SVGA_REG_GREEN_MASK: + case SVGA_REG_BLUE_MASK: + case SVGA_REG_GMRS_MAX_PAGES: /* Maximum number of 4KB pages for all GMRs */ + case SVGA_REG_MEMORY_SIZE: /* Total dedicated device memory excluding FIFO */ + case SVGA_REG_GMR_MAX_IDS: + case SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH: + /* Read only - ignore. */ + Log(("Write to R/O register %x - val %x ignored\n", pThis->svga.u32IndexReg, u32)); + break; + + default: + if ( pThis->svga.u32IndexReg >= SVGA_SCRATCH_BASE + && pThis->svga.u32IndexReg < SVGA_SCRATCH_BASE + pThis->svga.cScratchRegion) + { + pThis->svga.au32ScratchRegion[pThis->svga.u32IndexReg - SVGA_SCRATCH_BASE] = u32; + } + break; + } + return rc; +} + +/** + * Port I/O Handler for IN operations. + * + * @returns VINF_SUCCESS or VINF_EM_*. + * @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned. + * + * @param pDevIns The device instance. + * @param pvUser User argument. + * @param uPort Port number used for the IN operation. + * @param pu32 Where to store the result. This is always a 32-bit + * variable regardless of what @a cb might say. + * @param cb Number of bytes read. + */ +PDMBOTHCBDECL(int) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + int rc = VINF_SUCCESS; + + /* Ignore non-dword accesses. */ + if (cb != 4) + { + Log(("Ignoring non-dword read at %x cb=%d\n", Port, cb)); + *pu32 = ~0; + return VINF_SUCCESS; + } + + switch (Port - pThis->svga.BasePort) + { + case SVGA_INDEX_PORT: + *pu32 = pThis->svga.u32IndexReg; + break; + + case SVGA_VALUE_PORT: + return vmsvgaReadPort(pThis, pu32); + + case SVGA_BIOS_PORT: + Log(("Ignoring BIOS port read\n")); + *pu32 = 0; + break; + + case SVGA_IRQSTATUS_PORT: + Log(("vmsvgaIORead: SVGA_IRQSTATUS_PORT %x\n", pThis->svga.u32IrqStatus)); + *pu32 = pThis->svga.u32IrqStatus; + break; + } + return rc; +} + +/** + * Port I/O Handler for OUT operations. + * + * @returns VINF_SUCCESS or VINF_EM_*. + * + * @param pDevIns The device instance. + * @param pvUser User argument. + * @param uPort Port number used for the OUT operation. + * @param u32 The value to output. + * @param cb The value size in bytes. + */ +PDMBOTHCBDECL(int) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + int rc = VINF_SUCCESS; + + /* Ignore non-dword accesses. */ + if (cb != 4) + { + Log(("Ignoring non-dword write at %x val=%x cb=%d\n", Port, u32, cb)); + return VINF_SUCCESS; + } + + switch (Port - pThis->svga.BasePort) + { + case SVGA_INDEX_PORT: + pThis->svga.u32IndexReg = u32; + break; + + case SVGA_VALUE_PORT: + return vmsvgaWritePort(pThis, u32); + + case SVGA_BIOS_PORT: + Log(("Ignoring BIOS port write (val=%x)\n", u32)); + break; + + case SVGA_IRQSTATUS_PORT: + Log(("vmsvgaIOWrite SVGA_IRQSTATUS_PORT %x: status %x -> %x\n", u32, pThis->svga.u32IrqStatus, pThis->svga.u32IrqStatus & ~u32)); + ASMAtomicAndU32(&pThis->svga.u32IrqStatus, ~u32); + /* Clear the irq in case all events have been cleared. */ + if (!(pThis->svga.u32IrqStatus & pThis->svga.u32IrqMask)) + PDMDevHlpPCISetIrqNoWait(pDevIns, 0, 0); + break; + } + return rc; +} + +#ifdef DEBUG_FIFO_ACCESS + +# ifdef IN_RING3 +/** + * Handle LFB access. + * @returns VBox status code. + * @param pVM VM handle. + * @param pThis VGA device instance data. + * @param GCPhys The access physical address. + * @param fWriteAccess Read or write access + */ +static int vmsvgaFIFOAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, bool fWriteAccess) +{ + RTGCPHYS GCPhysOffset = GCPhys - pThis->svga.GCPhysFIFO; + uint32_t *pFIFO = pThis->svga.pFIFOR3; + + switch (GCPhysOffset >> 2) + { + case SVGA_FIFO_MIN: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_MIN = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_MAX: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_MAX = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_NEXT_CMD: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_NEXT_CMD = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_STOP: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_STOP = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_CAPABILITIES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_CAPABILITIES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_FLAGS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_FLAGS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_FENCE: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_FENCE = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_HWVERSION: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_HWVERSION = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_PITCHLOCK: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_PITCHLOCK = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_CURSOR_ON: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_CURSOR_ON = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_CURSOR_X: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_CURSOR_X = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_CURSOR_Y: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_CURSOR_Y = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_CURSOR_COUNT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_CURSOR_COUNT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_CURSOR_LAST_UPDATED: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_CURSOR_LAST_UPDATED = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_RESERVED: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_RESERVED = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_CURSOR_SCREEN_ID: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_CURSOR_SCREEN_ID = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_DEAD: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_DEAD = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_HWVERSION_REVISED: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_HWVERSION_REVISED = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_3D: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_3D = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_LIGHTS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_LIGHTS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_TEXTURES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_TEXTURES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_CLIP_PLANES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_CLIP_PLANES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_VERTEX_SHADER_VERSION: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_VERTEX_SHADER: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_VERTEX_SHADER = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_FRAGMENT_SHADER: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_FRAGMENT_SHADER = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_RENDER_TARGETS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_RENDER_TARGETS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_S23E8_TEXTURES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_S23E8_TEXTURES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_S10E5_TEXTURES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_S10E5_TEXTURES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_D16_BUFFER_FORMAT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_D16_BUFFER_FORMAT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_QUERY_TYPES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_QUERY_TYPES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_POINT_SIZE: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_POINT_SIZE = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_SHADER_TEXTURES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_VOLUME_EXTENT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_VERTEX_INDEX: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_VERTEX_INDEX = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_TEXTURE_OPS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_TEXTURE_OPS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_Z_D16: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_DXT1: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_DXT1 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_DXT2: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_DXT2 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_DXT3: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_DXT3 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_DXT4: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_DXT4 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_DXT5: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_DXT5 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_V16U16: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_V16U16 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_G16R16: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_G16R16 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_UYVY: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_UYVY = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_YUY2: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_YUY2 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_ALPHATOCOVERAGE: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_ALPHATOCOVERAGE = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SUPERSAMPLE: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SUPERSAMPLE = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_AUTOGENMIPMAPS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_AUTOGENMIPMAPS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_NV12: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_NV12 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_AYUV: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_AYUV = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_CONTEXT_IDS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_CONTEXT_IDS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_MAX_SURFACE_IDS: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_MAX_SURFACE_IDS = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_BC4_UNORM: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_BC4_UNORM = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS + SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_3D_CAPS_LAST: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_3D_CAPS_LAST = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_GUEST_3D_HWVERSION: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_GUEST_3D_HWVERSION = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_FENCE_GOAL: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_FENCE_GOAL = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + case SVGA_FIFO_BUSY: + Log(("vmsvgaFIFOAccess [0x%x]: %s SVGA_FIFO_BUSY = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", pFIFO[GCPhysOffset >> 2])); + break; + default: + Log(("vmsvgaFIFOAccess [0x%x]: %s access at offset %x = %x\n", GCPhysOffset >> 2, (fWriteAccess) ? "WRITE" : "READ", GCPhysOffset, pFIFO[GCPhysOffset >> 2])); + break; + } + + return VINF_EM_RAW_EMULATE_INSTR; +} + +/** + * HC access handler for the FIFO. + * + * @returns VINF_SUCCESS if the handler have carried out the operation. + * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation. + * @param pVM VM Handle. + * @param GCPhys The physical address the guest is writing to. + * @param pvPhys The HC mapping of that address. + * @param pvBuf What the guest is reading/writing. + * @param cbBuf How much it's reading/writing. + * @param enmAccessType The access type. + * @param pvUser User argument. + */ +static DECLCALLBACK(int) vmsvgaR3FIFOAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser) +{ + PVGASTATE pThis = (PVGASTATE)pvUser; + int rc; + Assert(pThis); + Assert(GCPhys >= pThis->GCPhysVRAM); + NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); + + rc = vmsvgaFIFOAccess(pVM, pThis, GCPhys, enmAccessType == PGMACCESSTYPE_WRITE); + if (RT_SUCCESS(rc)) + return VINF_PGM_HANDLER_DO_DEFAULT; + AssertMsg(rc <= VINF_SUCCESS, ("rc=%Rrc\n", rc)); + return rc; +} +# endif /* IN_RING3 */ +#endif /* DEBUG */ + +#ifdef DEBUG_GMR_ACCESS +/** + * HC access handler for the FIFO. + * + * @returns VINF_SUCCESS if the handler have carried out the operation. + * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation. + * @param pVM VM Handle. + * @param GCPhys The physical address the guest is writing to. + * @param pvPhys The HC mapping of that address. + * @param pvBuf What the guest is reading/writing. + * @param cbBuf How much it's reading/writing. + * @param enmAccessType The access type. + * @param pvUser User argument. + */ +static DECLCALLBACK(int) vmsvgaR3GMRAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser) +{ + PVGASTATE pThis = (PVGASTATE)pvUser; + Assert(pThis); + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); + + Log(("vmsvgaR3GMRAccessHandler: GMR access to page %RGp\n", GCPhys)); + + for (uint32_t i = 0; i < RT_ELEMENTS(pSVGAState->aGMR); i++) + { + PGMR pGMR = &pSVGAState->aGMR[i]; + + if (pGMR->numDescriptors) + { + for (uint32_t j = 0; j < pGMR->numDescriptors; j++) + { + if ( GCPhys >= pGMR->paDesc[j].GCPhys + && GCPhys < pGMR->paDesc[j].GCPhys + pGMR->paDesc[j].numPages * PAGE_SIZE) + { + /* + * Turn off the write handler for this particular page and make it R/W. + * Then return telling the caller to restart the guest instruction. + */ + int rc = PGMHandlerPhysicalPageTempOff(pVM, pGMR->paDesc[j].GCPhys, GCPhys); + goto end; + } + } + } + } +end: + return VINF_PGM_HANDLER_DO_DEFAULT; +} + +#ifdef IN_RING3 +/* Callback handler for VMR3ReqCallWait */ +static DECLCALLBACK(int) vmsvgaRegisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + PGMR pGMR = &pSVGAState->aGMR[gmrId]; + int rc; + + for (uint32_t i = 0; i < pGMR->numDescriptors; i++) + { + rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pThis->pDevInsR3), + PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, + pGMR->paDesc[i].GCPhys, pGMR->paDesc[i].GCPhys + pGMR->paDesc[i].numPages * PAGE_SIZE - 1, + vmsvgaR3GMRAccessHandler, pThis, + NULL, NULL, NULL, + NULL, NULL, NULL, + "VMSVGA GMR"); + AssertRC(rc); + } + return VINF_SUCCESS; +} + +/* Callback handler for VMR3ReqCallWait */ +static DECLCALLBACK(int) vmsvgaUnregisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + PGMR pGMR = &pSVGAState->aGMR[gmrId]; + + for (uint32_t i = 0; i < pGMR->numDescriptors; i++) + { + int rc = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pThis->pDevInsR3), pGMR->paDesc[i].GCPhys); + AssertRC(rc); + } + return VINF_SUCCESS; +} + +/* Callback handler for VMR3ReqCallWait */ +static DECLCALLBACK(int) vmsvgaResetGMRHandlers(PVGASTATE pThis) +{ + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + + for (uint32_t i = 0; i < RT_ELEMENTS(pSVGAState->aGMR); i++) + { + PGMR pGMR = &pSVGAState->aGMR[i]; + + if (pGMR->numDescriptors) + { + for (uint32_t j = 0; j < pGMR->numDescriptors; j++) + { + int rc = PGMHandlerPhysicalReset(PDMDevHlpGetVM(pThis->pDevInsR3), pGMR->paDesc[j].GCPhys); + AssertRC(rc); + } + } + } + return VINF_SUCCESS; +} +#endif /* IN_RING3 */ + + +#endif /* DEBUG_GMR_ACCESS */ + +/* -=-=-=-=-=- Ring 3 -=-=-=-=-=- */ + +#ifdef IN_RING3 + +#include <iprt/mem.h> + +static void *vmsvgaFIFOGetCmdBuffer(PPDMTHREAD pThread, uint32_t *pFIFO, uint32_t cbCmd, uint32_t *pSize, void **ppfBounceBuffer) +{ + uint32_t cbLeft; + uint32_t cbFIFOCmd = pFIFO[SVGA_FIFO_MAX] - pFIFO[SVGA_FIFO_MIN]; + uint32_t u32Current = pFIFO[SVGA_FIFO_STOP] + sizeof(uint32_t); /* skip command dword */ + uint8_t *pCmdBuffer; + + Assert(ppfBounceBuffer); + + *pSize += cbCmd; + *ppfBounceBuffer = NULL; + + while (pThread->enmState == PDMTHREADSTATE_RUNNING) + { + Assert(pFIFO[SVGA_FIFO_NEXT_CMD] != pFIFO[SVGA_FIFO_STOP]); + + if (pFIFO[SVGA_FIFO_NEXT_CMD] >= u32Current) + cbLeft = pFIFO[SVGA_FIFO_NEXT_CMD] - u32Current; + else + cbLeft = cbFIFOCmd - (u32Current - pFIFO[SVGA_FIFO_NEXT_CMD]); + + if (cbCmd <= cbLeft) + break; + + /* Guest still busy copying into the FIFO; wait a bit. */ + Log(("Guest still copying (%x vs %x) current %x next %x stop %x; sleep a bit\n", cbCmd, cbLeft, u32Current, pFIFO[SVGA_FIFO_NEXT_CMD], pFIFO[SVGA_FIFO_STOP])); + RTThreadSleep(2); + } + + if (u32Current + cbCmd <= pFIFO[SVGA_FIFO_MAX]) + { + pCmdBuffer = (uint8_t *)pFIFO + u32Current; + } + else + { + /* command data split; allocate memory and copy. */ + uint8_t *pFIFOMin = (uint8_t *)pFIFO + pFIFO[SVGA_FIFO_MIN]; + uint32_t cbPart1 = pFIFO[SVGA_FIFO_MAX] - u32Current; + uint32_t cbPart2 = cbCmd - cbPart1; + + LogFlow(("Split data buffer at %x (%d-%d)\n", u32Current, cbPart1, cbPart2)); + pCmdBuffer = (uint8_t *)RTMemAlloc(cbCmd); + AssertReturn(pCmdBuffer, NULL); + *ppfBounceBuffer = (void *)pCmdBuffer; + + memcpy(pCmdBuffer, (uint8_t *)pFIFO + u32Current, cbPart1); + memcpy(pCmdBuffer + cbPart1, pFIFOMin, cbPart2); + } + + return pCmdBuffer; +} + + +/* The async FIFO handling thread. */ +static DECLCALLBACK(int) vmsvgaFIFOLoop(PPDMDEVINS pDevIns, PPDMTHREAD pThread) +{ + PVGASTATE pThis = (PVGASTATE)pThread->pvUser; + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + int rc; + + if (pThread->enmState == PDMTHREADSTATE_INITIALIZING) + return VINF_SUCCESS; + + LogFlow(("vmsvgaFIFOLoop: started loop\n")); + while (pThread->enmState == PDMTHREADSTATE_RUNNING) + { + uint32_t *pFIFO = pThis->svga.pFIFOR3; + + /* Wait for at most 250 ms to start polling. */ + rc = RTSemEventWait(pThis->svga.FIFORequestSem, 250); + AssertBreak(RT_SUCCESS(rc) || rc == VERR_TIMEOUT); + if (pThread->enmState != PDMTHREADSTATE_RUNNING) + { + LogFlow(("vmsvgaFIFOLoop: thread state %x\n", pThread->enmState)); + return VINF_SUCCESS; + } + if (rc == VERR_TIMEOUT) + { + if (pFIFO[SVGA_FIFO_NEXT_CMD] == pFIFO[SVGA_FIFO_STOP]) + continue; + + Log(("vmsvgaFIFOLoop: timeout\n")); + } + Log(("vmsvgaFIFOLoop: enabled=%d configured=%d busy=%d\n", pThis->svga.fEnabled, pThis->svga.fConfigured, pThis->svga.pFIFOR3[SVGA_FIFO_BUSY])); + Log(("vmsvgaFIFOLoop: min %x max %x\n", pFIFO[SVGA_FIFO_MIN], pFIFO[SVGA_FIFO_MAX])); + Log(("vmsvgaFIFOLoop: next %x stop %x\n", pFIFO[SVGA_FIFO_NEXT_CMD], pFIFO[SVGA_FIFO_STOP])); + + if ( !pThis->svga.fEnabled + || !pThis->svga.fConfigured) + { + pThis->svga.fBusy = false; + pThis->svga.pFIFOR3[SVGA_FIFO_BUSY] = pThis->svga.fBusy; + continue; /* device not enabled. */ + } + + if (pFIFO[SVGA_FIFO_STOP] >= pFIFO[SVGA_FIFO_MAX]) + { + Log(("vmsvgaFIFOLoop: Invalid stop %x max=%x\n", pFIFO[SVGA_FIFO_STOP], pFIFO[SVGA_FIFO_MAX])); + continue; /* invalid. */ + } + + if (pFIFO[SVGA_FIFO_MAX] < VMSVGA_FIFO_SIZE) + { + Log(("vmsvgaFIFOLoop: Invalid max %x fifo max=%x\n", pFIFO[SVGA_FIFO_MAX], VMSVGA_FIFO_SIZE)); + continue; /* invalid. */ + } + + if (pFIFO[SVGA_FIFO_STOP] < pFIFO[SVGA_FIFO_MIN]) + { + Log(("vmsvgaFIFOLoop: Invalid stop %x min=%x\n", pFIFO[SVGA_FIFO_STOP], pFIFO[SVGA_FIFO_MIN])); + continue; /* invalid. */ + } + pThis->svga.fBusy = true; + pThis->svga.pFIFOR3[SVGA_FIFO_BUSY] = pThis->svga.fBusy; + + /* Execute all queued FIFO commands. */ + while ( pThread->enmState == PDMTHREADSTATE_RUNNING + && pFIFO[SVGA_FIFO_NEXT_CMD] != pFIFO[SVGA_FIFO_STOP]) + { + uint32_t u32Cmd; + uint32_t u32Current, size; + uint32_t u32IrqStatus = 0; + bool fTriggerIrq = false; + void *pBounceBuffer = NULL; + + /* First check any pending actions. */ + if (ASMBitTestAndClear(&pThis->svga.u32ActionFlags, VMSVGA_ACTION_CHANGEMODE_BIT)) +#ifdef VBOX_WITH_VMSVGA3D + vmsvga3dChangeMode(pThis); +#else + {} +#endif + u32Current = pFIFO[SVGA_FIFO_STOP]; + + u32Cmd = u32Current / sizeof(uint32_t); + LogFlow(("vmsvgaFIFOLoop: FIFO command (iCmd=0x%x) %s 0x%x\n", u32Cmd, vmsvgaFIFOCmdToString(pFIFO[u32Cmd]), pFIFO[u32Cmd])); + size = sizeof(uint32_t); /* command dword */ + + switch (pFIFO[u32Cmd]) + { + case SVGA_CMD_INVALID_CMD: + /* Nothing to do. */ + break; + + case SVGA_CMD_FENCE: + { + SVGAFifoCmdFence *pCmdFence = (SVGAFifoCmdFence *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdFence), &size, &pBounceBuffer); + + Log(("vmsvgaFIFOLoop: SVGA_CMD_FENCE %x\n", pCmdFence->fence)); + pFIFO[SVGA_FIFO_FENCE] = pCmdFence->fence; + if (pThis->svga.u32IrqMask & SVGA_IRQFLAG_ANY_FENCE) + { + Log(("vmsvgaFIFOLoop: any fence irq\n")); + u32IrqStatus |= SVGA_IRQFLAG_ANY_FENCE; + } + else + if ( (pThis->svga.u32IrqMask & SVGA_IRQFLAG_FENCE_GOAL) + && pFIFO[SVGA_FIFO_FENCE_GOAL] == pCmdFence->fence) + { + Log(("vmsvgaFIFOLoop: fence goal reached irq (fence=%x)\n", pCmdFence->fence)); + u32IrqStatus |= SVGA_IRQFLAG_FENCE_GOAL; + } + break; + } + case SVGA_CMD_UPDATE: + case SVGA_CMD_UPDATE_VERBOSE: + { + SVGAFifoCmdUpdate *pUpdate = (SVGAFifoCmdUpdate *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdUpdate), &size, &pBounceBuffer); + + Log(("vmsvgaFIFOLoop: UPDATE (%d,%d)(%d,%d)\n", pUpdate->x, pUpdate->y, pUpdate->width, pUpdate->height)); + vgaR3UpdateDisplay(pThis, pUpdate->x, pUpdate->y, pUpdate->width, pUpdate->height); + break; + } + + case SVGA_CMD_DEFINE_CURSOR: + { + /* Followed by bitmap data. */ + SVGAFifoCmdDefineCursor *pCursor = (SVGAFifoCmdDefineCursor *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdDefineCursor), &size, &pBounceBuffer); + + AssertFailed(); + break; + } + + case SVGA_CMD_DEFINE_ALPHA_CURSOR: + { + /* Followed by bitmap data. */ + SVGAFifoCmdDefineAlphaCursor *pCursor = (SVGAFifoCmdDefineAlphaCursor *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdDefineAlphaCursor), &size, &pBounceBuffer); + uint32_t cbCursorShape, cbAndMask; + uint8_t *pCursorCopy; + uint32_t cbCmd; + + Log(("vmsvgaFIFOLoop: ALPHA_CURSOR id=%d size (%d,%d) hotspot (%d,%d)\n", pCursor->id, pCursor->width, pCursor->height, pCursor->hotspotX, pCursor->hotspotY)); + + /* Refetch the command buffer with the added bitmap data; undo size increase (ugly) */ + cbCmd = sizeof(SVGAFifoCmdDefineAlphaCursor) + pCursor->width * pCursor->height * sizeof(uint32_t) /* 32-bit BRGA format */; + size = sizeof(uint32_t); /* command dword */ + if (pBounceBuffer) + RTMemFree(pBounceBuffer); + pCursor = (SVGAFifoCmdDefineAlphaCursor *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, cbCmd, &size, &pBounceBuffer); + + /* The mouse pointer interface always expects an AND mask followed by the color data (XOR mask). */ + cbAndMask = (pCursor->width + 7) / 8 * pCursor->height; /* size of the AND mask */ + cbAndMask = ((cbAndMask + 3) & ~3); /* + gap for alignment */ + cbCursorShape = cbAndMask + pCursor->width * sizeof(uint32_t) * pCursor->height; /* + size of the XOR mask (32-bit BRGA format) */ + + pCursorCopy = (uint8_t *)RTMemAlloc(cbCursorShape); + AssertBreak(pCursorCopy); + + LogFlow(("Cursor data:\n%.*Rhxd\n", pCursor->width * pCursor->height * sizeof(uint32_t), pCursor+1)); + + /* Transparency is defined by the alpha bytes, so make the whole bitmap visible. */ + memset(pCursorCopy, 0xff, cbAndMask); + /* Colour data */ + memcpy(pCursorCopy + cbAndMask, (pCursor + 1), pCursor->width * pCursor->height * sizeof(uint32_t)); + + rc = pThis->pDrv->pfnVBVAMousePointerShape (pThis->pDrv, + true, + true, + pCursor->hotspotX, + pCursor->hotspotY, + pCursor->width, + pCursor->height, + pCursorCopy); + AssertRC(rc); + RTMemFree(pCursorCopy); + + break; + } + + case SVGA_CMD_ESCAPE: + { + /* Followed by nsize bytes of data. */ + SVGAFifoCmdEscape *pEscape = (SVGAFifoCmdEscape *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdEscape), &size, &pBounceBuffer); + uint32_t cbCmd; + + /* Refetch the command buffer with the variable data; undo size increase (ugly) */ + cbCmd = sizeof(SVGAFifoCmdEscape) + pEscape->size; + size = sizeof(uint32_t); /* command dword */ + if (pBounceBuffer) + RTMemFree(pBounceBuffer); + pEscape = (SVGAFifoCmdEscape *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, cbCmd, &size, &pBounceBuffer); + + if (pEscape->nsid == SVGA_ESCAPE_NSID_VMWARE) + { + Assert(pEscape->size >= sizeof(uint32_t)); + uint32_t cmd = *(uint32_t *)(pEscape + 1); + Log(("vmsvgaFIFOLoop: ESCAPE (%x %x) VMWARE cmd=%x\n", pEscape->nsid, pEscape->size, cmd)); + + switch (cmd) + { + case SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS: + { + SVGAEscapeVideoSetRegs *pVideoCmd = (SVGAEscapeVideoSetRegs *)(pEscape + 1); + uint32_t cRegs = (pEscape->size - sizeof(pVideoCmd->header)) / sizeof(pVideoCmd->items[0]); + + Log(("SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS: stream %x\n", pVideoCmd->header.streamId)); + for (uint32_t iReg = 0; iReg < cRegs; iReg++) + { + Log(("SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS: reg %x val %x\n", pVideoCmd->items[iReg].registerId, pVideoCmd->items[iReg].value)); + } + break; + } + + case SVGA_ESCAPE_VMWARE_VIDEO_FLUSH: + SVGAEscapeVideoFlush *pVideoCmd = (SVGAEscapeVideoFlush *)(pEscape + 1); + Log(("SVGA_ESCAPE_VMWARE_VIDEO_FLUSH: stream %x\n", pVideoCmd->streamId)); + break; + } + } + else + Log(("vmsvgaFIFOLoop: ESCAPE %x %x\n", pEscape->nsid, pEscape->size)); + + break; + } +#ifdef VBOX_WITH_VMSVGA3D + case SVGA_CMD_DEFINE_GMR2: + { + SVGAFifoCmdDefineGMR2 *pCmd = (SVGAFifoCmdDefineGMR2 *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdDefineGMR2), &size, &pBounceBuffer); + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_GMR2 id=%x %x pages\n", pCmd->gmrId, pCmd->numPages)); + + /* Validate current GMR id. */ + AssertBreak(pCmd->gmrId < VMSVGA_MAX_GMR_IDS); + AssertBreak(pCmd->numPages <= VMSVGA_MAX_GMR_PAGES); + + if (!pCmd->numPages) + vmsvgaGMRFree(pThis, pCmd->gmrId); + /* else everything done in remap */ + + break; + } + + case SVGA_CMD_REMAP_GMR2: + { + /* Followed by page descriptors. */ + SVGAFifoCmdRemapGMR2 *pCmd = (SVGAFifoCmdRemapGMR2 *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdRemapGMR2), &size, &pBounceBuffer); + uint32_t cbPageDesc = (pCmd->flags & SVGA_REMAP_GMR2_PPN64) ? sizeof(uint64_t) : sizeof(uint32_t); + uint32_t cbCmd; + + Log(("vmsvgaFIFOLoop: SVGA_CMD_REMAP_GMR2 id=%x flags=%x offset=%x npages=%x\n", pCmd->gmrId, pCmd->flags, pCmd->offsetPages, pCmd->numPages)); + + /* @todo */ + AssertBreak(pCmd->offsetPages == 0); + + /* Refetch the command buffer with the variable data; undo size increase (ugly) */ + cbCmd = sizeof(SVGAFifoCmdRemapGMR2); + if (pCmd->flags & SVGA_REMAP_GMR2_VIA_GMR) + cbCmd += sizeof(SVGAGuestPtr); + else + if (pCmd->flags & SVGA_REMAP_GMR2_SINGLE_PPN) + { + cbCmd += cbPageDesc; + pCmd->numPages = 1; + } + else + cbCmd += cbPageDesc * pCmd->numPages; + size = sizeof(uint32_t); /* command dword */ + + if (pBounceBuffer) + RTMemFree(pBounceBuffer); + pCmd = (SVGAFifoCmdRemapGMR2 *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, cbCmd, &size, &pBounceBuffer); + AssertReturn(pCmd, VERR_INTERNAL_ERROR); + + PGMR pGMR = &pSVGAState->aGMR[pCmd->gmrId]; + + /* Validate current GMR id. */ + AssertBreak(pCmd->gmrId < VMSVGA_MAX_GMR_IDS); + AssertBreak(pCmd->numPages <= VMSVGA_MAX_GMR_PAGES); + + /* Free the old GMR if present. */ + vmsvgaGMRFree(pThis, pCmd->gmrId); + + pGMR->paDesc = (PVMSVGAGMRDESCRIPTOR)RTMemAllocZ(pCmd->numPages * sizeof(VMSVGAGMRDESCRIPTOR)); + AssertBreak(pGMR->paDesc); + + if (pCmd->flags & SVGA_REMAP_GMR2_VIA_GMR) + { + /* @todo */ + AssertFailed(); + } + else + { + uint32_t *pPage32 = (uint32_t *)(pCmd + 1); + uint64_t *pPage64 = (uint64_t *)(pCmd + 1); + uint32_t iDescriptor = 0; + RTGCPHYS GCPhys; + + if (pCmd->flags & SVGA_REMAP_GMR2_PPN64) + GCPhys = (pPage64[0] << PAGE_SHIFT) & 0x00000FFFFFFFFFFFULL; /* seeing rubbish in the top bits with certain linux guests*/ + else + GCPhys = pPage32[0] << PAGE_SHIFT; + + pGMR->paDesc[0].GCPhys = GCPhys; + pGMR->paDesc[0].numPages = 1; + pGMR->cbTotal = PAGE_SIZE; + + for (uint32_t i = 1; i < pCmd->numPages; i++) + { + if (pCmd->flags & SVGA_REMAP_GMR2_PPN64) + GCPhys = (pPage64[i] << PAGE_SHIFT) & 0x00000FFFFFFFFFFFULL; /* seeing rubbish in the top bits with certain linux guests*/ + else + GCPhys = pPage32[i] << PAGE_SHIFT; + + /* Continuous physical memory? */ + if (GCPhys == pGMR->paDesc[iDescriptor].GCPhys + pGMR->paDesc[iDescriptor].numPages * PAGE_SIZE) + { + Assert(pGMR->paDesc[iDescriptor].numPages); + pGMR->paDesc[iDescriptor].numPages++; + LogFlow(("Page %x GCPhys=%RGp successor\n", i, GCPhys)); + } + else + { + iDescriptor++; + pGMR->paDesc[iDescriptor].GCPhys = GCPhys; + pGMR->paDesc[iDescriptor].numPages = 1; + LogFlow(("Page %x GCPhys=%RGp\n", i, pGMR->paDesc[iDescriptor].GCPhys)); + } + + pGMR->cbTotal += PAGE_SIZE; + } + LogFlow(("Nr of descriptors %x\n", iDescriptor + 1)); + pGMR->numDescriptors = iDescriptor + 1; + } + +#ifdef DEBUG_GMR_ACCESS + VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaRegisterGMR, 2, pThis->pDevInsR3, pCmd->gmrId); +#endif + break; + } +#endif // VBOX_WITH_VMSVGA3D + case SVGA_CMD_DEFINE_SCREEN: + { + /* @note optional size depending on the capabilities */ + Assert(!(pThis->svga.pFIFOR3[SVGA_FIFO_CAPABILITIES] & SVGA_FIFO_CAP_SCREEN_OBJECT)); + SVGAFifoCmdDefineScreen *pCmd = (SVGAFifoCmdDefineScreen *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdDefineScreen), &size, &pBounceBuffer); + + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_SCREEN id=%x flags=%x size=(%d,%d) root=(%d,%d)\n", pCmd->screen.id, pCmd->screen.flags, pCmd->screen.size.width, pCmd->screen.size.height, pCmd->screen.root.x, pCmd->screen.root.y)); + if (pCmd->screen.flags & SVGA_SCREEN_HAS_ROOT) + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_SCREEN flags SVGA_SCREEN_HAS_ROOT\n")); + if (pCmd->screen.flags & SVGA_SCREEN_IS_PRIMARY) + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_SCREEN flags SVGA_SCREEN_IS_PRIMARY\n")); + if (pCmd->screen.flags & SVGA_SCREEN_FULLSCREEN_HINT) + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_SCREEN flags SVGA_SCREEN_FULLSCREEN_HINT\n")); + if (pCmd->screen.flags & SVGA_SCREEN_DEACTIVATE ) + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_SCREEN flags SVGA_SCREEN_DEACTIVATE \n")); + if (pCmd->screen.flags & SVGA_SCREEN_BLANKING) + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_SCREEN flags SVGA_SCREEN_BLANKING\n")); + + pThis->svga.iWidth = pCmd->screen.size.width; + pThis->svga.iHeight = pCmd->screen.size.height; + vmsvgaChangeMode(pThis); + break; + } + + case SVGA_CMD_DESTROY_SCREEN: + { + SVGAFifoCmdDestroyScreen *pCmd = (SVGAFifoCmdDestroyScreen *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdDestroyScreen), &size, &pBounceBuffer); + + Log(("vmsvgaFIFOLoop: SVGA_CMD_DESTROY_SCREEN id=%x\n", pCmd->screenId)); + break; + } +#ifdef VBOX_WITH_VMSVGA3D + case SVGA_CMD_DEFINE_GMRFB: + { + SVGAFifoCmdDefineGMRFB *pCmd = (SVGAFifoCmdDefineGMRFB *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdDefineGMRFB), &size, &pBounceBuffer); + + Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_GMRFB gmr=%x offset=%x bytesPerLine=%x bpp=%d color depth=%d\n", pCmd->ptr.gmrId, pCmd->ptr.offset, pCmd->bytesPerLine, pCmd->format.s.bitsPerPixel, pCmd->format.s.colorDepth)); + pSVGAState->GMRFB.ptr = pCmd->ptr; + pSVGAState->GMRFB.bytesPerLine = pCmd->bytesPerLine; + pSVGAState->GMRFB.format = pCmd->format; + break; + } + + case SVGA_CMD_BLIT_GMRFB_TO_SCREEN: + { + SVGAFifoCmdBlitGMRFBToScreen *pCmd = (SVGAFifoCmdBlitGMRFBToScreen *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdBlitGMRFBToScreen), &size, &pBounceBuffer); + int32_t width, height; + + Log(("vmsvgaFIFOLoop: SVGA_CMD_BLIT_GMRFB_TO_SCREEN src=(%d,%d) dest id=%d (%d,%d)(%d,%d)\n", pCmd->srcOrigin.x, pCmd->srcOrigin.y, pCmd->destScreenId, pCmd->destRect.left, pCmd->destRect.top, pCmd->destRect.right, pCmd->destRect.bottom)); + + /* @todo */ + AssertBreak(pSVGAState->GMRFB.format.s.bitsPerPixel == pThis->svga.iBpp); + AssertBreak(pCmd->destScreenId == 0); + + if (pCmd->destRect.left < 0) + pCmd->destRect.left = 0; + if (pCmd->destRect.top < 0) + pCmd->destRect.top = 0; + if (pCmd->destRect.right < 0) + pCmd->destRect.right = 0; + if (pCmd->destRect.bottom < 0) + pCmd->destRect.bottom = 0; + + width = pCmd->destRect.right - pCmd->destRect.left; + height = pCmd->destRect.bottom - pCmd->destRect.top; + + if ( width == 0 + || height == 0) + break; /* Nothing to do. */ + + /* Clip to screen dimensions. */ + if (width > pThis->svga.iWidth) + width = pThis->svga.iWidth; + if (height > pThis->svga.iHeight) + height = pThis->svga.iHeight; + + unsigned offsetSource = (pCmd->srcOrigin.x * pSVGAState->GMRFB.format.s.bitsPerPixel) / 8 + pSVGAState->GMRFB.bytesPerLine * pCmd->srcOrigin.y; + unsigned offsetDest = (pCmd->destRect.left * RT_ALIGN(pThis->svga.iBpp, 8)) / 8 + pThis->svga.cbScanline * pCmd->destRect.top; + unsigned cbCopyWidth = (width * RT_ALIGN(pThis->svga.iBpp, 8)) / 8; + + rc = vmsvgaGMRTransfer(pThis, SVGA3D_WRITE_HOST_VRAM, pThis->CTX_SUFF(vram_ptr) + offsetDest, pThis->svga.cbScanline, pSVGAState->GMRFB.ptr, offsetSource, pSVGAState->GMRFB.bytesPerLine, cbCopyWidth, height); + AssertRC(rc); + + vgaR3UpdateDisplay(pThis, pCmd->destRect.left, pCmd->destRect.top, pCmd->destRect.right - pCmd->destRect.left, pCmd->destRect.bottom - pCmd->destRect.top); + break; + } + + case SVGA_CMD_BLIT_SCREEN_TO_GMRFB: + { + SVGAFifoCmdBlitScreenToGMRFB *pCmd = (SVGAFifoCmdBlitScreenToGMRFB *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdBlitScreenToGMRFB), &size, &pBounceBuffer); + + /* @note this can fetch 3d render results as well!! */ + Log(("vmsvgaFIFOLoop: SVGA_CMD_BLIT_SCREEN_TO_GMRFB dest=(%d,%d) src id=%d (%d,%d)(%d,%d)\n", pCmd->destOrigin.x, pCmd->destOrigin.y, pCmd->srcScreenId, pCmd->srcRect.left, pCmd->srcRect.top, pCmd->srcRect.right, pCmd->srcRect.bottom)); + AssertFailed(); + break; + } +#endif // VBOX_WITH_VMSVGA3D + case SVGA_CMD_ANNOTATION_FILL: + { + SVGAFifoCmdAnnotationFill *pCmd = (SVGAFifoCmdAnnotationFill *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdAnnotationFill), &size, &pBounceBuffer); + + Log(("vmsvgaFIFOLoop: SVGA_CMD_ANNOTATION_FILL red=%x green=%x blue=%x\n", pCmd->color.s.r, pCmd->color.s.g, pCmd->color.s.b)); + pSVGAState->colorAnnotation = pCmd->color; + break; + } + + case SVGA_CMD_ANNOTATION_COPY: + { + SVGAFifoCmdAnnotationCopy *pCmd = (SVGAFifoCmdAnnotationCopy*)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGAFifoCmdAnnotationCopy), &size, &pBounceBuffer); + + Log(("vmsvgaFIFOLoop: SVGA_CMD_ANNOTATION_COPY\n")); + AssertFailed(); + break; + } + + default: +#ifdef VBOX_WITH_VMSVGA3D + if ( pFIFO[u32Cmd] >= SVGA_3D_CMD_BASE + && pFIFO[u32Cmd] < SVGA_3D_CMD_MAX) + { + /* All 3d commands start with a common header, which defines the size of the command. */ + SVGA3dCmdHeader *pHdr = (SVGA3dCmdHeader *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, sizeof(SVGA3dCmdHeader), &size, &pBounceBuffer); + uint32_t cbCmd; + + /* Refetch the command buffer with the variable data; undo size increase (ugly) */ + cbCmd = sizeof(SVGA3dCmdHeader) + pHdr->size; + size = sizeof(uint32_t); /* command dword */ + if (pBounceBuffer) + RTMemFree(pBounceBuffer); + pHdr = (SVGA3dCmdHeader *)vmsvgaFIFOGetCmdBuffer(pThread, pFIFO, cbCmd, &size, &pBounceBuffer); + + switch (pFIFO[u32Cmd]) + { + case SVGA_3D_CMD_SURFACE_DEFINE: + { + SVGA3dCmdDefineSurface *pCmd = (SVGA3dCmdDefineSurface *)(pHdr + 1); + uint32_t cMipLevels; + + cMipLevels = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGA3dSize); + rc = vmsvga3dSurfaceDefine(pThis, pCmd->sid, (uint32_t)pCmd->surfaceFlags, pCmd->format, pCmd->face, 0, SVGA3D_TEX_FILTER_NONE, cMipLevels, (SVGA3dSize *)(pCmd + 1)); +#ifdef DEBUG_GMR_ACCESS + VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaResetGMRHandlers, 1, pThis); +#endif + break; + } + + case SVGA_3D_CMD_SURFACE_DEFINE_V2: + { + SVGA3dCmdDefineSurface_v2 *pCmd = (SVGA3dCmdDefineSurface_v2 *)(pHdr + 1); + uint32_t cMipLevels; + + cMipLevels = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGA3dSize); + rc = vmsvga3dSurfaceDefine(pThis, pCmd->sid, pCmd->surfaceFlags, pCmd->format, pCmd->face, pCmd->multisampleCount, pCmd->autogenFilter, cMipLevels, (SVGA3dSize *)(pCmd + 1)); + break; + } + + case SVGA_3D_CMD_SURFACE_DESTROY: + { + SVGA3dCmdDestroySurface *pCmd = (SVGA3dCmdDestroySurface *)(pHdr + 1); + rc = vmsvga3dSurfaceDestroy(pThis, pCmd->sid); + break; + } + + case SVGA_3D_CMD_SURFACE_COPY: + { + SVGA3dCmdSurfaceCopy *pCmd = (SVGA3dCmdSurfaceCopy *)(pHdr + 1); + uint32_t cCopyBoxes; + + cCopyBoxes = (pHdr->size - sizeof(pCmd)) / sizeof(SVGA3dCopyBox); + rc = vmsvga3dSurfaceCopy(pThis, pCmd->dest, pCmd->src, cCopyBoxes, (SVGA3dCopyBox *)(pCmd + 1)); + break; + } + + case SVGA_3D_CMD_SURFACE_STRETCHBLT: + { + SVGA3dCmdSurfaceStretchBlt *pCmd = (SVGA3dCmdSurfaceStretchBlt *)(pHdr + 1); + + rc = vmsvga3dSurfaceStretchBlt(pThis, pCmd->dest, pCmd->boxDest, pCmd->src, pCmd->boxSrc, pCmd->mode); + break; + } + + case SVGA_3D_CMD_SURFACE_DMA: + { + SVGA3dCmdSurfaceDMA *pCmd = (SVGA3dCmdSurfaceDMA *)(pHdr + 1); + uint32_t cCopyBoxes; + + cCopyBoxes = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGA3dCopyBox); + STAM_PROFILE_START(&pSVGAState->StatR3CmdSurfaceDMA, a); + rc = vmsvga3dSurfaceDMA(pThis, pCmd->guest, pCmd->host, pCmd->transfer, cCopyBoxes, (SVGA3dCopyBox *)(pCmd + 1)); + STAM_PROFILE_STOP(&pSVGAState->StatR3CmdSurfaceDMA, a); + break; + } + + case SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN: + { + SVGA3dCmdBlitSurfaceToScreen *pCmd = (SVGA3dCmdBlitSurfaceToScreen *)(pHdr + 1); + uint32_t cRects; + + cRects = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGASignedRect); + rc = vmsvga3dSurfaceBlitToScreen(pThis, pCmd->destScreenId, pCmd->destRect, pCmd->srcImage, pCmd->srcRect, cRects, (SVGASignedRect *)(pCmd + 1)); + break; + } + + case SVGA_3D_CMD_CONTEXT_DEFINE: + { + SVGA3dCmdDefineContext *pCmd = (SVGA3dCmdDefineContext *)(pHdr + 1); + + rc = vmsvga3dContextDefine(pThis, pCmd->cid); + break; + } + + case SVGA_3D_CMD_CONTEXT_DESTROY: + { + SVGA3dCmdDestroyContext *pCmd = (SVGA3dCmdDestroyContext *)(pHdr + 1); + + rc = vmsvga3dContextDestroy(pThis, pCmd->cid); + break; + } + + case SVGA_3D_CMD_SETTRANSFORM: + { + SVGA3dCmdSetTransform *pCmd = (SVGA3dCmdSetTransform *)(pHdr + 1); + + rc = vmsvga3dSetTransform(pThis, pCmd->cid, pCmd->type, pCmd->matrix); + break; + } + + case SVGA_3D_CMD_SETZRANGE: + { + SVGA3dCmdSetZRange *pCmd = (SVGA3dCmdSetZRange *)(pHdr + 1); + + rc = vmsvga3dSetZRange(pThis, pCmd->cid, pCmd->zRange); + break; + } + + case SVGA_3D_CMD_SETRENDERSTATE: + { + SVGA3dCmdSetRenderState *pCmd = (SVGA3dCmdSetRenderState *)(pHdr + 1); + uint32_t cRenderStates; + + cRenderStates = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGA3dRenderState); + rc = vmsvga3dSetRenderState(pThis, pCmd->cid, cRenderStates, (SVGA3dRenderState *)(pCmd + 1)); + break; + } + + case SVGA_3D_CMD_SETRENDERTARGET: + { + SVGA3dCmdSetRenderTarget *pCmd = (SVGA3dCmdSetRenderTarget *)(pHdr + 1); + + rc = vmsvga3dSetRenderTarget(pThis, pCmd->cid, pCmd->type, pCmd->target); + break; + } + + case SVGA_3D_CMD_SETTEXTURESTATE: + { + SVGA3dCmdSetTextureState *pCmd = (SVGA3dCmdSetTextureState *)(pHdr + 1); + uint32_t cTextureStates; + + cTextureStates = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGA3dTextureState); + rc = vmsvga3dSetTextureState(pThis, pCmd->cid, cTextureStates, (SVGA3dTextureState *)(pCmd + 1)); + break; + } + + case SVGA_3D_CMD_SETMATERIAL: + { + SVGA3dCmdSetMaterial *pCmd = (SVGA3dCmdSetMaterial *)(pHdr + 1); + + rc = vmsvga3dSetMaterial(pThis, pCmd->cid, pCmd->face, &pCmd->material); + break; + } + + case SVGA_3D_CMD_SETLIGHTDATA: + { + SVGA3dCmdSetLightData *pCmd = (SVGA3dCmdSetLightData *)(pHdr + 1); + + rc = vmsvga3dSetLightData(pThis, pCmd->cid, pCmd->index, &pCmd->data); + break; + } + + case SVGA_3D_CMD_SETLIGHTENABLED: + { + SVGA3dCmdSetLightEnabled *pCmd = (SVGA3dCmdSetLightEnabled *)(pHdr + 1); + + rc = vmsvga3dSetLightEnabled(pThis, pCmd->cid, pCmd->index, pCmd->enabled); + break; + } + + case SVGA_3D_CMD_SETVIEWPORT: + { + SVGA3dCmdSetViewport *pCmd = (SVGA3dCmdSetViewport *)(pHdr + 1); + + rc = vmsvga3dSetViewPort(pThis, pCmd->cid, &pCmd->rect); + break; + } + + case SVGA_3D_CMD_SETCLIPPLANE: + { + SVGA3dCmdSetClipPlane *pCmd = (SVGA3dCmdSetClipPlane *)(pHdr + 1); + + rc = vmsvga3dSetClipPlane(pThis, pCmd->cid, pCmd->index, pCmd->plane); + break; + } + + case SVGA_3D_CMD_CLEAR: + { + SVGA3dCmdClear *pCmd = (SVGA3dCmdClear *)(pHdr + 1); + uint32_t cRects; + + cRects = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGA3dRect); + rc = vmsvga3dCommandClear(pThis, pCmd->cid, pCmd->clearFlag, pCmd->color, pCmd->depth, pCmd->stencil, cRects, (SVGA3dRect *)(pCmd + 1)); + break; + } + + case SVGA_3D_CMD_PRESENT: + { + SVGA3dCmdPresent *pCmd = (SVGA3dCmdPresent *)(pHdr + 1); + uint32_t cRects; + + cRects = (pHdr->size - sizeof(*pCmd)) / sizeof(SVGA3dCopyRect); + + STAM_PROFILE_START(&pSVGAState->StatR3CmdPresent, a); + rc = vmsvga3dCommandPresent(pThis, pCmd->sid, cRects, (SVGA3dCopyRect *)(pCmd + 1)); + STAM_PROFILE_STOP(&pSVGAState->StatR3CmdPresent, a); + break; + } + + case SVGA_3D_CMD_SHADER_DEFINE: + { + SVGA3dCmdDefineShader *pCmd = (SVGA3dCmdDefineShader *)(pHdr + 1); + uint32_t cbData; + + cbData = (pHdr->size - sizeof(*pCmd)); + rc = vmsvga3dShaderDefine(pThis, pCmd->cid, pCmd->shid, pCmd->type, cbData, (uint32_t *)(pCmd + 1)); + break; + } + + case SVGA_3D_CMD_SHADER_DESTROY: + { + SVGA3dCmdDestroyShader *pCmd = (SVGA3dCmdDestroyShader *)(pHdr + 1); + + rc = vmsvga3dShaderDestroy(pThis, pCmd->cid, pCmd->shid, pCmd->type); + break; + } + + case SVGA_3D_CMD_SET_SHADER: + { + SVGA3dCmdSetShader *pCmd = (SVGA3dCmdSetShader *)(pHdr + 1); + + rc = vmsvga3dShaderSet(pThis, pCmd->cid, pCmd->type, pCmd->shid); + break; + } + + case SVGA_3D_CMD_SET_SHADER_CONST: + { + SVGA3dCmdSetShaderConst *pCmd = (SVGA3dCmdSetShaderConst *)(pHdr + 1); + + uint32_t cRegisters = (pHdr->size - sizeof(*pCmd)) / sizeof(pCmd->values) + 1; + rc = vmsvga3dShaderSetConst(pThis, pCmd->cid, pCmd->reg, pCmd->type, pCmd->ctype, cRegisters, pCmd->values); + break; + } + + case SVGA_3D_CMD_DRAW_PRIMITIVES: + { + SVGA3dCmdDrawPrimitives *pCmd = (SVGA3dCmdDrawPrimitives *)(pHdr + 1); + uint32_t cVertexDivisor; + + cVertexDivisor = (pHdr->size - sizeof(*pCmd) - sizeof(SVGA3dVertexDecl) * pCmd->numVertexDecls - sizeof(SVGA3dPrimitiveRange) * pCmd->numRanges); + Assert(pCmd->numRanges <= SVGA3D_MAX_DRAW_PRIMITIVE_RANGES); + Assert(pCmd->numVertexDecls <= SVGA3D_MAX_VERTEX_ARRAYS); + Assert(!cVertexDivisor || cVertexDivisor == pCmd->numVertexDecls); + + SVGA3dVertexDecl *pVertexDecl = (SVGA3dVertexDecl *)(pCmd + 1); + SVGA3dPrimitiveRange *pNumRange = (SVGA3dPrimitiveRange *) (&pVertexDecl[pCmd->numVertexDecls]); + SVGA3dVertexDivisor *pVertexDivisor = (cVertexDivisor) ? (SVGA3dVertexDivisor *)(&pNumRange[pCmd->numRanges]) : NULL; + + STAM_PROFILE_START(&pSVGAState->StatR3CmdDrawPrimitive, a); + rc = vmsvga3dDrawPrimitives(pThis, pCmd->cid, pCmd->numVertexDecls, pVertexDecl, pCmd->numRanges, pNumRange, cVertexDivisor, pVertexDivisor); + STAM_PROFILE_STOP(&pSVGAState->StatR3CmdDrawPrimitive, a); + break; + } + + case SVGA_3D_CMD_SETSCISSORRECT: + { + SVGA3dCmdSetScissorRect *pCmd = (SVGA3dCmdSetScissorRect *)(pHdr + 1); + + rc = vmsvga3dSetScissorRect(pThis, pCmd->cid, &pCmd->rect); + break; + } + + case SVGA_3D_CMD_BEGIN_QUERY: + { + SVGA3dCmdBeginQuery *pCmd = (SVGA3dCmdBeginQuery *)(pHdr + 1); + + rc = vmsvga3dQueryBegin(pThis, pCmd->cid, pCmd->type); + break; + } + + case SVGA_3D_CMD_END_QUERY: + { + SVGA3dCmdEndQuery *pCmd = (SVGA3dCmdEndQuery *)(pHdr + 1); + + rc = vmsvga3dQueryEnd(pThis, pCmd->cid, pCmd->type, pCmd->guestResult); + break; + } + + case SVGA_3D_CMD_WAIT_FOR_QUERY: + { + SVGA3dCmdWaitForQuery *pCmd = (SVGA3dCmdWaitForQuery *)(pHdr + 1); + + rc = vmsvga3dQueryWait(pThis, pCmd->cid, pCmd->type, pCmd->guestResult); + break; + } + + case SVGA_3D_CMD_GENERATE_MIPMAPS: + { + SVGA3dCmdGenerateMipmaps *pCmd = (SVGA3dCmdGenerateMipmaps *)(pHdr + 1); + + rc = vmsvga3dGenerateMipmaps(pThis, pCmd->sid, pCmd->filter); + break; + } + + case SVGA_3D_CMD_ACTIVATE_SURFACE: + case SVGA_3D_CMD_DEACTIVATE_SURFACE: + /* context id + surface id? */ + break; + } + } + else +#endif // VBOX_WITH_VMSVGA3D + AssertFailed(); + } + if (pBounceBuffer) + RTMemFree(pBounceBuffer); + + /* Go to the next slot */ + if (u32Current + size >= pFIFO[SVGA_FIFO_MAX]) + ASMAtomicWriteU32(&pFIFO[SVGA_FIFO_STOP], pFIFO[SVGA_FIFO_MIN] + u32Current + size - pFIFO[SVGA_FIFO_MAX]); + else + ASMAtomicWriteU32(&pFIFO[SVGA_FIFO_STOP], u32Current + size); + + /* FIFO progress might trigger an interrupt. */ + if (pThis->svga.u32IrqMask & SVGA_IRQFLAG_FIFO_PROGRESS) + { + Log(("vmsvgaFIFOLoop: fifo progress irq\n")); + u32IrqStatus |= SVGA_IRQFLAG_FIFO_PROGRESS; + } + + /* Irq pending? */ + if (pThis->svga.u32IrqMask & u32IrqStatus) + { + Log(("vmsvgaFIFOLoop: Trigger interrupt with status %x\n", u32IrqStatus)); + ASMAtomicOrU32(&pThis->svga.u32IrqStatus, u32IrqStatus); + PDMDevHlpPCISetIrqNoWait(pDevIns, 0, 1); + } + } + /* Done? */ + if (pFIFO[SVGA_FIFO_NEXT_CMD] == pFIFO[SVGA_FIFO_STOP]) + { + Log(("vmsvgaFIFOLoop: emptied the FIFO next=%x stop=%x\n", pFIFO[SVGA_FIFO_NEXT_CMD], pFIFO[SVGA_FIFO_STOP])); + pThis->svga.fBusy = false; + pThis->svga.pFIFOR3[SVGA_FIFO_BUSY] = pThis->svga.fBusy; + } + } + return VINF_SUCCESS; +} + +/** + * Free the specified GMR + * + * @param pThis VGA device instance data. + * @param idGMR GMR id + */ +void vmsvgaGMRFree(PVGASTATE pThis, uint32_t idGMR) +{ + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + + /* Free the old descriptor if present. */ + if (pSVGAState->aGMR[idGMR].numDescriptors) + { +#ifdef DEBUG_GMR_ACCESS + VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaUnregisterGMR, 2, pThis->pDevInsR3, idGMR); +#endif + + Assert(pSVGAState->aGMR[idGMR].paDesc); + RTMemFree(pSVGAState->aGMR[idGMR].paDesc); + pSVGAState->aGMR[idGMR].paDesc = NULL; + pSVGAState->aGMR[idGMR].numDescriptors = 0; + pSVGAState->aGMR[idGMR].cbTotal = 0; + } + Assert(!pSVGAState->aGMR[idGMR].cbTotal); +} + +/** + * Copy from a GMR to host memory or vice versa + * + * @returns VBox status code. + * @param pThis VGA device instance data. + * @param transfer Transfer type (read/write) + * @param pDest Host destination pointer + * @param cbDestPitch Destination buffer pitch + * @param src GMR description + * @param cbSrcOffset Source buffer offset + * @param cbSrcPitch Source buffer pitch + * @param cbWidth Source width in bytes + * @param cHeight Source height + */ +int vmsvgaGMRTransfer(PVGASTATE pThis, const SVGA3dTransferType transfer, uint8_t *pDest, uint32_t cbDestPitch, SVGAGuestPtr src, uint32_t cbSrcOffset, uint32_t cbSrcPitch, uint32_t cbWidth, uint32_t cHeight) +{ + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + PGMR pGMR; + int rc; + PVMSVGAGMRDESCRIPTOR pDesc; + unsigned uDescOffset = 0; + + Log(("vmsvgaGMRTransfer: gmr=%x offset=%x pitch=%d cbWidth=%d cHeight=%d; src offset=%d src pitch=%d\n", src.gmrId, src.offset, cbDestPitch, cbWidth, cHeight, cbSrcOffset, cbSrcPitch)); + Assert(cbWidth && cHeight); + + /* Shortcut for the framebuffer. */ + if (src.gmrId == SVGA_GMR_FRAMEBUFFER) + { + cbSrcOffset += src.offset; + AssertReturn(cbSrcOffset + cbSrcPitch * (cHeight - 1) + cbWidth <= pThis->vram_size, VERR_INVALID_PARAMETER); + + uint8_t *pSrc = pThis->CTX_SUFF(vram_ptr) + cbSrcOffset; + + if (transfer == SVGA3D_READ_HOST_VRAM) + { + /* switch src & dest */ + uint8_t *pTemp = pDest; + uint32_t cbTempPitch = cbDestPitch; + + pDest = pSrc; + pSrc = pTemp; + + cbDestPitch = cbSrcPitch; + cbSrcPitch = cbTempPitch; + } + + if ( pThis->svga.cbScanline == cbDestPitch + && cbWidth == cbDestPitch) + { + memcpy(pDest, pSrc, cbWidth * cHeight); + } + else + { + for(uint32_t i = 0; i < cHeight; i++) + { + memcpy(pDest, pSrc, cbWidth); + + pDest += cbDestPitch; + pSrc += cbSrcPitch; + } + } + return VINF_SUCCESS; + } + + AssertReturn(src.gmrId < VMSVGA_MAX_GMR_IDS, VERR_INVALID_PARAMETER); + pGMR = &pSVGAState->aGMR[src.gmrId]; + pDesc = pGMR->paDesc; + + cbSrcOffset += src.offset; + AssertReturn(cbSrcOffset + cbSrcPitch * (cHeight - 1) + cbWidth <= pGMR->cbTotal, VERR_INVALID_PARAMETER); + + for (unsigned i = 0; i < cHeight; i++) + { + unsigned cbCurrentWidth = cbWidth; + unsigned uCurrentOffset = cbSrcOffset; + uint8_t *pCurrentDest = pDest; + + /* Find the right descriptor */ + while (uDescOffset + pDesc->numPages * PAGE_SIZE <= uCurrentOffset) + { + uDescOffset += pDesc->numPages * PAGE_SIZE; + AssertReturn(uDescOffset < pGMR->cbTotal, VERR_INTERNAL_ERROR); /* overflow protection */ + pDesc++; + } + + while (cbCurrentWidth) + { + unsigned cbToCopy; + + if (uCurrentOffset + cbCurrentWidth <= uDescOffset + pDesc->numPages * PAGE_SIZE) + cbToCopy = cbCurrentWidth; + else + cbToCopy = (uDescOffset + pDesc->numPages * PAGE_SIZE - uCurrentOffset); + + LogFlow(("vmsvgaGMRTransfer: %s phys=%RGp\n", (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", pDesc->GCPhys + uCurrentOffset - uDescOffset)); + + if (transfer == SVGA3D_WRITE_HOST_VRAM) + rc = PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), pDesc->GCPhys + uCurrentOffset - uDescOffset, pCurrentDest, cbToCopy); + else + rc = PDMDevHlpPhysWrite(pThis->CTX_SUFF(pDevIns), pDesc->GCPhys + uCurrentOffset - uDescOffset, pCurrentDest, cbToCopy); + AssertRCBreak(rc); + + cbCurrentWidth -= cbToCopy; + uCurrentOffset += cbToCopy; + pCurrentDest += cbToCopy; + + /* Go to the next descriptor if there's anything left. */ + if (cbCurrentWidth) + { + uDescOffset += pDesc->numPages * PAGE_SIZE; + pDesc++; + } + } + + cbSrcOffset += cbSrcPitch; + pDest += cbDestPitch; + } + + return VINF_SUCCESS; +} + +/** + * Unblock the FIFO I/O thread so it can respond to a state change. + * + * @returns VBox status code. + * @param pDevIns The VGA device instance. + * @param pThread The send thread. + */ +static DECLCALLBACK(int) vmsvgaFIFOLoopWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread) +{ + PVGASTATE pThis = (PVGASTATE)pThread->pvUser; + Log(("vmsvgaFIFOLoopWakeUp\n")); + return RTSemEventSignal(pThis->svga.FIFORequestSem); +} + +/** + * Enables or disables dirty page tracking for the framebuffer + * + * @param pThis VGA device instance data. + * @param fTraces Enable/disable traces + */ +static void vmsvgaSetTraces(PVGASTATE pThis, bool fTraces) +{ + if ( (!pThis->svga.fConfigured || !pThis->svga.fEnabled) + && !fTraces) + { + //Assert(pThis->svga.fTraces); + Log(("vmsvgaSetTraces: *not* allowed to disable dirty page tracking when the device is in legacy mode.\n")); + return; + } + + pThis->svga.fTraces = fTraces; + if (pThis->svga.fTraces) + { + unsigned cbFrameBuffer = pThis->vram_size; + + Log(("vmsvgaSetTraces: enable dirty page handling for the frame buffer only (%x bytes)\n", 0)); + if (pThis->svga.iHeight != -1) + { + Assert(pThis->svga.cbScanline); + /* Hardware enabled; return real framebuffer size .*/ + cbFrameBuffer = (uint32_t)pThis->svga.iHeight * pThis->svga.cbScanline; + cbFrameBuffer = RT_ALIGN(cbFrameBuffer, PAGE_SIZE); + } + + if (!pThis->svga.fVRAMTracking) + { + Log(("vmsvgaSetTraces: enable frame buffer dirty page tracking. (%x bytes; vram %x)\n", cbFrameBuffer, pThis->vram_size)); + vgaR3RegisterVRAMHandler(pThis, cbFrameBuffer); + pThis->svga.fVRAMTracking = true; + } + } + else + { + if (pThis->svga.fVRAMTracking) + { + Log(("vmsvgaSetTraces: disable frame buffer dirty page tracking\n")); + vgaR3UnregisterVRAMHandler(pThis); + pThis->svga.fVRAMTracking = false; + } + } +} + +/** + * Callback function for mapping a PCI I/O region. + * + * @return VBox status code. + * @param pPciDev Pointer to PCI device. + * Use pPciDev->pDevIns to get the device instance. + * @param iRegion The region number. + * @param GCPhysAddress Physical address of the region. + * If iType is PCI_ADDRESS_SPACE_IO, this is an + * I/O port, else it's a physical address. + * This address is *NOT* relative + * to pci_mem_base like earlier! + * @param enmType One of the PCI_ADDRESS_SPACE_* values. + */ +DECLCALLBACK(int) vmsvgaR3IORegionMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) +{ + int rc; + PPDMDEVINS pDevIns = pPciDev->pDevIns; + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + + if (enmType == PCI_ADDRESS_SPACE_IO) + { + AssertReturn(iRegion == 0, VERR_INTERNAL_ERROR); + rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, cb, 0, vmsvgaIOWrite, vmsvgaIORead, NULL /* OutStr */, NULL /* InStr */, "VMSVGA"); + if (RT_FAILURE(rc)) + return rc; + + pThis->svga.BasePort = GCPhysAddress; + Log(("vmsvgaR3IORegionMap: base port = %x\n", pThis->svga.BasePort)); + } + else + { + AssertReturn(iRegion == 2 && enmType == PCI_ADDRESS_SPACE_MEM, VERR_INTERNAL_ERROR); + if (GCPhysAddress != NIL_RTGCPHYS) + { + /* + * Mapping the FIFO RAM. + */ + rc = PDMDevHlpMMIO2Map(pDevIns, iRegion, GCPhysAddress); + AssertRC(rc); + +#ifdef DEBUG_FIFO_ACCESS + if (RT_SUCCESS(rc)) + { + rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), + PGMPHYSHANDLERTYPE_PHYSICAL_ALL, + GCPhysAddress, GCPhysAddress + (VMSVGA_FIFO_SIZE - 1), + vmsvgaR3FIFOAccessHandler, pThis, + NULL, NULL, NULL, + NULL, NULL, NULL, + "VMSVGA FIFO"); + AssertRC(rc); + } +#endif + if (RT_SUCCESS(rc)) + { + pThis->svga.GCPhysFIFO = GCPhysAddress; + Log(("vmsvgaR3IORegionMap: FIFO address = %RGp\n", GCPhysAddress)); + } + } + else + { + Assert(pThis->svga.GCPhysFIFO); +#ifdef DEBUG_FIFO_ACCESS + rc = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), pThis->svga.GCPhysFIFO); + AssertRC(rc); +#endif + pThis->svga.GCPhysFIFO = 0; + } + + } + return VINF_SUCCESS; +} + + +/** + * @copydoc FNSSMDEVLOADEXEC + */ +int vmsvgaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + int rc; + + /* Load our part of the VGAState */ + rc = SSMR3GetStruct(pSSM, &pThis->svga, g_aVGAStateSVGAFields); + AssertReturn(rc, rc); + + /* Load the framebuffer backup. */ + rc = SSMR3GetMem(pSSM, pThis->svga.pFrameBufferBackup, VMSVGA_FRAMEBUFFER_BACKUP_SIZE); + AssertReturn(rc, rc); + + /* Load the VMSVGA state. */ + rc = SSMR3GetStruct(pSSM, pSVGAState, g_aVMSVGASTATEFields); + AssertReturn(rc, rc); + + /* Save the GMR state */ + for (uint32_t i = 0; i < RT_ELEMENTS(pSVGAState->aGMR); i++) + { + rc = SSMR3GetStruct(pSSM, &pSVGAState->aGMR[i], g_aGMRFields); + AssertReturn(rc, rc); + + for (uint32_t j = 0; j < pSVGAState->aGMR[i].numDescriptors; j++) + { + rc = SSMR3GetStruct(pSSM, &pSVGAState->aGMR[i].paDesc[j], g_aVMSVGAGMRDESCRIPTORFields); + AssertReturn(rc, rc); + } + } + +#ifdef VBOX_WITH_VMSVGA3D + if ( uVersion >= VGA_SAVEDSTATE_VERSION_VMSVGA + && pThis->svga.f3DEnabled) + vmsvga3dLoadExec(pThis, pSSM, uVersion, uPass); +#endif + + return VINF_SUCCESS; +} + + +/** + * @copydoc FNSSMDEVSAVEEXEC + */ +int vmsvgaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + int rc; + + /* Save our part of the VGAState */ + rc = SSMR3PutStruct(pSSM, &pThis->svga, g_aVGAStateSVGAFields); + AssertReturn(rc, rc); + + /* Save the framebuffer backup. */ + rc = SSMR3PutMem(pSSM, pThis->svga.pFrameBufferBackup, VMSVGA_FRAMEBUFFER_BACKUP_SIZE); + AssertReturn(rc, rc); + + /* Save the VMSVGA state. */ + rc = SSMR3PutStruct(pSSM, pSVGAState, g_aVMSVGASTATEFields); + AssertReturn(rc, rc); + + /* Save the GMR state */ + for (uint32_t i = 0; i < RT_ELEMENTS(pSVGAState->aGMR); i++) + { + rc = SSMR3PutStruct(pSSM, &pSVGAState->aGMR[i], g_aGMRFields); + AssertReturn(rc, rc); + + for (uint32_t j = 0; j < pSVGAState->aGMR[i].numDescriptors; j++) + { + rc = SSMR3PutStruct(pSSM, &pSVGAState->aGMR[i].paDesc[j], g_aVMSVGAGMRDESCRIPTORFields); + AssertReturn(rc, rc); + } + } + +#ifdef VBOX_WITH_VMSVGA3D + if (pThis->svga.f3DEnabled) + vmsvga3dSaveExec(pThis, pSSM); +#endif + return VINF_SUCCESS; +} + +/** + * Cleans up the SVGA hardware state + * + * @returns VBox status code. + * @param pDevIns The device instance. + */ +int vmsvgaDestruct(PPDMDEVINS pDevIns) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVMSVGASTATE pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + + if (pSVGAState) + { + for (unsigned i = 0; i < RT_ELEMENTS(pSVGAState->aGMR); i++) + { + if (pSVGAState->aGMR[i].paDesc) + RTMemFree(pSVGAState->aGMR[i].paDesc); + } + RTMemFree(pSVGAState); + } + +#ifdef VBOX_WITH_VMSVGA3D + /** @todo */ + if (pThis->svga.f3DEnabled) + vmsvga3dTerminate(pThis); +#endif + return VINF_SUCCESS; +} + +/** + * Initialize the SVGA hardware state + * + * @returns VBox status code. + * @param pDevIns The device instance. + */ +int vmsvgaInit(PPDMDEVINS pDevIns) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVMSVGASTATE pSVGAState; + PVM pVM = PDMDevHlpGetVM(pDevIns); + int rc; + + pThis->svga.cScratchRegion = VMSVGA_SCRATCH_SIZE; + memset(pThis->svga.au32ScratchRegion, 0, sizeof(pThis->svga.au32ScratchRegion)); + + pThis->svga.pSVGAState = RTMemAllocZ(sizeof(VMSVGASTATE)); + AssertReturn(pThis->svga.pSVGAState, VERR_NO_MEMORY); + pSVGAState = (PVMSVGASTATE)pThis->svga.pSVGAState; + + /* Necessary for creating a backup of the text mode frame buffer when switching into svga mode. */ + pThis->svga.pFrameBufferBackup = RTMemAllocZ(VMSVGA_FRAMEBUFFER_BACKUP_SIZE); + AssertReturn(pThis->svga.pFrameBufferBackup, VERR_NO_MEMORY); + + /* Create event semaphore. */ + rc = RTSemEventCreate(&pThis->svga.FIFORequestSem); + if (RT_FAILURE(rc)) + { + Log(("%s: Failed to create event semaphore for FIFO handling.\n", __FUNCTION__)); + return rc; + } + + /* Register caps. */ + pThis->svga.u32RegCaps = SVGA_CAP_GMR | SVGA_CAP_GMR2 | SVGA_CAP_CURSOR | SVGA_CAP_CURSOR_BYPASS_2 | SVGA_CAP_EXTENDED_FIFO | SVGA_CAP_IRQMASK | SVGA_CAP_PITCHLOCK | SVGA_CAP_TRACES | SVGA_CAP_SCREEN_OBJECT_2; +#ifdef VBOX_WITH_VMSVGA3D + pThis->svga.u32RegCaps |= SVGA_CAP_3D; +#endif + + /* Setup FIFO capabilities. */ + pThis->svga.pFIFOR3[SVGA_FIFO_CAPABILITIES] = SVGA_FIFO_CAP_FENCE | SVGA_FIFO_CAP_CURSOR_BYPASS_3 | SVGA_FIFO_CAP_GMR2 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED | SVGA_FIFO_CAP_SCREEN_OBJECT_2; + + /* Valid with SVGA_FIFO_CAP_SCREEN_OBJECT_2 */ + pThis->svga.pFIFOR3[SVGA_FIFO_CURSOR_SCREEN_ID] = SVGA_ID_INVALID; + + pThis->svga.pFIFOR3[SVGA_FIFO_3D_HWVERSION] = pThis->svga.pFIFOR3[SVGA_FIFO_3D_HWVERSION_REVISED] = 0; /* no 3d available. */ +#ifdef VBOX_WITH_VMSVGA3D + if (pThis->svga.f3DEnabled) + { + rc = vmsvga3dInit(pThis); + if (RT_FAILURE(rc)) + pThis->svga.f3DEnabled = false; + } +#endif + /* VRAM tracking is enabled by default during bootup. */ + pThis->svga.fVRAMTracking = true; + + /* Invalidate current settings. */ + pThis->svga.iWidth = -1; + pThis->svga.iHeight = -1; + pThis->svga.iBpp = -1; + pThis->svga.cbScanline = 0; + + pThis->svga.u32MaxWidth = VBE_DISPI_MAX_YRES; + pThis->svga.u32MaxHeight = VBE_DISPI_MAX_XRES; + while (pThis->svga.u32MaxWidth * pThis->svga.u32MaxHeight * 4 /* 32 bpp */ > pThis->vram_size) + { + pThis->svga.u32MaxWidth -= 256; + pThis->svga.u32MaxHeight -= 256; + } + Log(("VMSVGA: Maximum size (%d,%d)\n", pThis->svga.u32MaxWidth, pThis->svga.u32MaxHeight)); + + /* Create the async IO thread. */ + rc = PDMDevHlpThreadCreate(pDevIns, &pThis->svga.pFIFOIOThread, pThis, vmsvgaFIFOLoop, vmsvgaFIFOLoopWakeUp, 0, + RTTHREADTYPE_IO, "VMSVGA FIFO"); + if (RT_FAILURE(rc)) + { + AssertMsgFailed(("%s: Async IO Thread creation for FIFO handling failed rc=%d\n", __FUNCTION__, rc)); + return rc; + } + + /* + * Statistics. + */ + STAM_REG(pVM, &pSVGAState->StatR3CmdPresent, STAMTYPE_PROFILE, "/Devices/VMSVGA/3d/Cmd/Present", STAMUNIT_TICKS_PER_CALL, "Profiling of Present."); + STAM_REG(pVM, &pSVGAState->StatR3CmdDrawPrimitive, STAMTYPE_PROFILE, "/Devices/VMSVGA/3d/Cmd/DrawPrimitive", STAMUNIT_TICKS_PER_CALL, "Profiling of DrawPrimitive."); + STAM_REG(pVM, &pSVGAState->StatR3CmdSurfaceDMA, STAMTYPE_PROFILE, "/Devices/VMSVGA/3d/Cmd/SurfaceDMA", STAMUNIT_TICKS_PER_CALL, "Profiling of SurfaceDMA."); + + return VINF_SUCCESS; +} + + +/** + * Power On notification. + * + * @returns VBox status. + * @param pDevIns The device instance data. + * + * @remarks Caller enters the device critical section. + */ +DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns) +{ + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + int rc; +#ifdef VBOX_WITH_VMSVGA3D + if (pThis->svga.f3DEnabled) + { + rc = vmsvga3dPowerOn(pThis); + + if (RT_SUCCESS(rc)) + { + SVGA3dCapsRecord *pCaps; + SVGA3dCapPair *pData; + uint32_t idxCap = 0; + + /* 3d hardware version; latest and greatest */ + pThis->svga.pFIFOR3[SVGA_FIFO_3D_HWVERSION_REVISED] = SVGA3D_HWVERSION_CURRENT; + pThis->svga.pFIFOR3[SVGA_FIFO_3D_HWVERSION] = SVGA3D_HWVERSION_CURRENT; + + pCaps = (SVGA3dCapsRecord *)&pThis->svga.pFIFOR3[SVGA_FIFO_3D_CAPS]; + pCaps->header.type = SVGA3DCAPS_RECORD_DEVCAPS; + pData = (SVGA3dCapPair *)&pCaps->data; + + /* Fill out all 3d capabilities. */ + for (unsigned i = 0; i < SVGA3D_DEVCAP_MAX; i++) + { + uint32_t val = 0; + + rc = vmsvga3dQueryCaps(pThis, i, &val); + if (RT_SUCCESS(rc)) + { + pData[idxCap][0] = i; + pData[idxCap][1] = val; + idxCap++; + } + } + pCaps->header.length = (sizeof(pCaps->header) + idxCap * sizeof(SVGA3dCapPair)) / sizeof(uint32_t); + pCaps = (SVGA3dCapsRecord *)((uint32_t *)pCaps + pCaps->header.length); + + /* Mark end of record array. */ + pCaps->header.length = 0; + } + } +#endif // VBOX_WITH_VMSVGA3D +} + +#endif /* IN_RING3 */ + diff --git a/src/VBox/Devices/Graphics/DevVGA-SVGA.h b/src/VBox/Devices/Graphics/DevVGA-SVGA.h new file mode 100644 index 00000000..31564e49 --- /dev/null +++ b/src/VBox/Devices/Graphics/DevVGA-SVGA.h @@ -0,0 +1,46 @@ +/** @file + * VMware SVGA device + */ +/* + * Copyright (C) 2013 Oracle Corporation + * + * This file is part of VirtualBox Open Source Edition (OSE), as + * available from http://www.virtualbox.org. This file is free software; + * you can redistribute it and/or modify it under the terms of the GNU + * General Public License (GPL) as published by the Free Software + * Foundation, in version 2 as it comes in the "COPYING" file of the + * VirtualBox OSE distribution. VirtualBox OSE is distributed in the + * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. + */ + +#ifndef __DEVVGA_SVGA_H__ +#define __DEVVGA_SVGA_H__ + + +/** Default FIFO size. */ +#define VMSVGA_FIFO_SIZE 0x20000 +/** Default scratch region size. */ +#define VMSVGA_SCRATCH_SIZE 0x100 +/** Surface memory available to the guest. */ +#define VMSVGA_SURFACE_SIZE (512*1024*1024) +/** Maximum GMR pages. */ +#define VMSVGA_MAX_GMR_PAGES 0x2000 +/** Maximum nr of GMR ids. */ +#define VMSVGA_MAX_GMR_IDS 0x100 +/** Size of the region to backup when switching into svga mode. */ +#define VMSVGA_FRAMEBUFFER_BACKUP_SIZE (32*1024) + +/* u32ActionFlags */ +#define VMSVGA_ACTION_CHANGEMODE_BIT 0 +#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT) + +DECLCALLBACK(int) vmsvgaR3IORegionMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType); + +int vmsvgaInit(PPDMDEVINS pDevIns); +int vmsvgaDestruct(PPDMDEVINS pDevIns); +int vmsvgaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass); +int vmsvgaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM); +DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns); + +#endif /* __DEVVGA_SVGA_H__ */ + diff --git a/src/VBox/Devices/Graphics/DevVGA.cpp b/src/VBox/Devices/Graphics/DevVGA.cpp index 14164a0a..da28d9be 100644 --- a/src/VBox/Devices/Graphics/DevVGA.cpp +++ b/src/VBox/Devices/Graphics/DevVGA.cpp @@ -4,7 +4,7 @@ */ /* - * Copyright (C) 2006-2011 Oracle Corporation + * Copyright (C) 2006-2013 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; @@ -45,7 +45,7 @@ *******************************************************************************/ /* WARNING!!! All defines that affect VGAState should be placed to DevVGA.h !!! - * NEVER place them here as this would lead to VGAState inconsistency + * NEVER place them here as this would lead to VGASTATE inconsistency * across different .cpp files !!! */ /** The size of the VGA GC mapping. @@ -58,7 +58,7 @@ #define VGA_MAPPING_SIZE _512K #ifdef VBOX_WITH_HGSMI -#define PCIDEV_2_VGASTATE(pPciDev) ((VGAState *)((uintptr_t)pPciDev - RT_OFFSETOF(VGAState, Dev))) +#define PCIDEV_2_VGASTATE(pPciDev) ((PVGASTATE)((uintptr_t)pPciDev - RT_OFFSETOF(VGASTATE, Dev))) #endif /* VBOX_WITH_HGSMI */ /** Converts a vga adaptor state pointer to a device instance pointer. */ #define VGASTATE2DEVINS(pVgaState) ((pVgaState)->CTX_SUFF(pDevIns)) @@ -137,6 +137,10 @@ #include "VBoxDD.h" #include "VBoxDD2.h" +#ifdef VBOX_WITH_VMSVGA +#include "DevVGA-SVGA.h" +#include "vmsvga/svga_reg.h" +#endif /******************************************************************************* * Structures and Typedefs * @@ -236,7 +240,7 @@ typedef WINHDR *PWINHDR; /** The BIOS boot menu text position, X. */ #define LOGO_F12TEXT_X 304 /** The BIOS boot menu text position, Y. */ -#define LOGO_F12TEXT_Y 464 +#define LOGO_F12TEXT_Y 460 /** Width of the "Press F12 to select boot device." bitmap. Anything that exceeds the limit of F12BootText below is filled with @@ -304,7 +308,7 @@ static const uint8_t g_abLogoF12BootText[] = * @param pThis VGA instance data. * @param offVRAM The VRAM offset of the page to set. */ -DECLINLINE(void) vga_set_dirty(VGAState *pThis, RTGCPHYS offVRAM) +DECLINLINE(void) vga_set_dirty(PVGASTATE pThis, RTGCPHYS offVRAM) { AssertMsg(offVRAM < pThis->vram_size, ("offVRAM = %p, pThis->vram_size = %p\n", offVRAM, pThis->vram_size)); ASMBitSet(&pThis->au32DirtyBitmap[0], offVRAM >> PAGE_SHIFT); @@ -319,7 +323,7 @@ DECLINLINE(void) vga_set_dirty(VGAState *pThis, RTGCPHYS offVRAM) * @param pThis VGA instance data. * @param offVRAM The VRAM offset of the page to check. */ -DECLINLINE(bool) vga_is_dirty(VGAState *pThis, RTGCPHYS offVRAM) +DECLINLINE(bool) vga_is_dirty(PVGASTATE pThis, RTGCPHYS offVRAM) { AssertMsg(offVRAM < pThis->vram_size, ("offVRAM = %p, pThis->vram_size = %p\n", offVRAM, pThis->vram_size)); return ASMBitTest(&pThis->au32DirtyBitmap[0], offVRAM >> PAGE_SHIFT); @@ -332,7 +336,7 @@ DECLINLINE(bool) vga_is_dirty(VGAState *pThis, RTGCPHYS offVRAM) * @param offVRAMStart Offset into the VRAM buffer of the first page. * @param offVRAMEnd Offset into the VRAM buffer of the last page - exclusive. */ -DECLINLINE(void) vga_reset_dirty(VGAState *pThis, RTGCPHYS offVRAMStart, RTGCPHYS offVRAMEnd) +DECLINLINE(void) vga_reset_dirty(PVGASTATE pThis, RTGCPHYS offVRAMStart, RTGCPHYS offVRAMEnd) { Assert(offVRAMStart < pThis->vram_size); Assert(offVRAMEnd <= pThis->vram_size); @@ -462,7 +466,7 @@ static uint8_t expand4to8[16]; * Vertical Retrace bit is set when vertical retrace (vsync) is active. * Unless the CRTC is horribly misprogrammed, vsync implies vblank. */ -static void vga_update_retrace_state(VGAState *s) +static void vga_update_retrace_state(PVGASTATE pThis) { unsigned htotal_cclks, vtotal_lines, chars_per_sec; unsigned hblank_start_cclk, hblank_end_cclk, hblank_width, hblank_skew_cclks; @@ -470,21 +474,21 @@ static void vga_update_retrace_state(VGAState *s) unsigned vblank_start_line, vblank_end, vblank_width; unsigned char_dots, clock_doubled, clock_index; const int clocks[] = {25175000, 28322000, 25175000, 25175000}; - vga_retrace_s *r = &s->retrace_state; + vga_retrace_s *r = &pThis->retrace_state; /* For horizontal timings, we only care about the blanking start/end. */ - htotal_cclks = s->cr[0x00] + 5; - hblank_start_cclk = s->cr[0x02]; - hblank_end_cclk = (s->cr[0x03] & 0x1f) + ((s->cr[0x05] & 0x80) >> 2); - hblank_skew_cclks = (s->cr[0x03] >> 5) & 3; + htotal_cclks = pThis->cr[0x00] + 5; + hblank_start_cclk = pThis->cr[0x02]; + hblank_end_cclk = (pThis->cr[0x03] & 0x1f) + ((pThis->cr[0x05] & 0x80) >> 2); + hblank_skew_cclks = (pThis->cr[0x03] >> 5) & 3; /* For vertical timings, we need both the blanking start/end... */ - vtotal_lines = s->cr[0x06] + ((s->cr[0x07] & 1) << 8) + ((s->cr[0x07] & 0x20) << 4) + 2; - vblank_start_line = s->cr[0x15] + ((s->cr[0x07] & 8) << 5) + ((s->cr[0x09] & 0x20) << 4); - vblank_end = s->cr[0x16]; + vtotal_lines = pThis->cr[0x06] + ((pThis->cr[0x07] & 1) << 8) + ((pThis->cr[0x07] & 0x20) << 4) + 2; + vblank_start_line = pThis->cr[0x15] + ((pThis->cr[0x07] & 8) << 5) + ((pThis->cr[0x09] & 0x20) << 4); + vblank_end = pThis->cr[0x16]; /* ... and the vertical retrace (vsync) start/end. */ - vsync_start_line = s->cr[0x10] + ((s->cr[0x07] & 4) << 6) + ((s->cr[0x07] & 0x80) << 2); - vsync_end = s->cr[0x11] & 0xf; + vsync_start_line = pThis->cr[0x10] + ((pThis->cr[0x07] & 4) << 6) + ((pThis->cr[0x07] & 0x80) << 2); + vsync_end = pThis->cr[0x11] & 0xf; /* Calculate the blanking and sync widths. The way it's implemented in * the VGA with limited-width compare counters is quite a piece of work. @@ -494,9 +498,9 @@ static void vga_update_retrace_state(VGAState *s) vsync_width = (vsync_end - vsync_start_line) & 0xf; /* 4 bits */ /* Calculate the dot and character clock rates. */ - clock_doubled = (s->sr[0x01] >> 3) & 1; /* Clock doubling bit. */ - clock_index = (s->msr >> 2) & 3; - char_dots = (s->sr[0x01] & 1) ? 8 : 9; /* 8 or 9 dots per cclk. */ + clock_doubled = (pThis->sr[0x01] >> 3) & 1; /* Clock doubling bit. */ + clock_index = (pThis->msr >> 2) & 3; + char_dots = (pThis->sr[0x01] & 1) ? 8 : 9; /* 8 or 9 dots per cclk. */ chars_per_sec = clocks[clock_index] / char_dots; Assert(chars_per_sec); /* Can't possibly be zero. */ @@ -538,16 +542,16 @@ static void vga_update_retrace_state(VGAState *s) Assert(r->h_total_ns); /* See h_total. */ } -static uint8_t vga_retrace(VGAState *s) +static uint8_t vga_retrace(PVGASTATE pThis) { - vga_retrace_s *r = &s->retrace_state; + vga_retrace_s *r = &pThis->retrace_state; if (r->frame_ns) { - uint8_t val = s->st01 & ~(ST01_V_RETRACE | ST01_DISP_ENABLE); + uint8_t val = pThis->st01 & ~(ST01_V_RETRACE | ST01_DISP_ENABLE); unsigned cur_frame_ns, cur_line_ns; uint64_t time_ns; - time_ns = PDMDevHlpTMTimeVirtGetNano(VGASTATE2DEVINS(s)); + time_ns = PDMDevHlpTMTimeVirtGetNano(VGASTATE2DEVINS(pThis)); /* Determine the time within the frame. */ cur_frame_ns = time_ns % r->frame_ns; @@ -567,13 +571,13 @@ static uint8_t vga_retrace(VGAState *s) } return val; } else { - return s->st01 ^ (ST01_V_RETRACE | ST01_DISP_ENABLE); + return pThis->st01 ^ (ST01_V_RETRACE | ST01_DISP_ENABLE); } } -int vga_ioport_invalid(VGAState *s, uint32_t addr) +int vga_ioport_invalid(PVGASTATE pThis, uint32_t addr) { - if (s->msr & MSR_COLOR_EMULATION) { + if (pThis->msr & MSR_COLOR_EMULATION) { /* Color */ return (addr >= 0x3b0 && addr <= 0x3bf); } else { @@ -582,80 +586,79 @@ int vga_ioport_invalid(VGAState *s, uint32_t addr) } } -static uint32_t vga_ioport_read(void *opaque, uint32_t addr) +static uint32_t vga_ioport_read(PVGASTATE pThis, uint32_t addr) { - VGAState *s = (VGAState*)opaque; int val, index; /* check port range access depending on color/monochrome mode */ - if (vga_ioport_invalid(s, addr)) { + if (vga_ioport_invalid(pThis, addr)) { val = 0xff; Log(("VGA: following read ignored\n")); } else { switch(addr) { case 0x3c0: - if (s->ar_flip_flop == 0) { - val = s->ar_index; + if (pThis->ar_flip_flop == 0) { + val = pThis->ar_index; } else { val = 0; } break; case 0x3c1: - index = s->ar_index & 0x1f; + index = pThis->ar_index & 0x1f; if (index < 21) - val = s->ar[index]; + val = pThis->ar[index]; else val = 0; break; case 0x3c2: - val = s->st00; + val = pThis->st00; break; case 0x3c4: - val = s->sr_index; + val = pThis->sr_index; break; case 0x3c5: - val = s->sr[s->sr_index]; - Log2(("vga: read SR%x = 0x%02x\n", s->sr_index, val)); + val = pThis->sr[pThis->sr_index]; + Log2(("vga: read SR%x = 0x%02x\n", pThis->sr_index, val)); break; case 0x3c7: - val = s->dac_state; + val = pThis->dac_state; break; case 0x3c8: - val = s->dac_write_index; + val = pThis->dac_write_index; break; case 0x3c9: - val = s->palette[s->dac_read_index * 3 + s->dac_sub_index]; - if (++s->dac_sub_index == 3) { - s->dac_sub_index = 0; - s->dac_read_index++; + val = pThis->palette[pThis->dac_read_index * 3 + pThis->dac_sub_index]; + if (++pThis->dac_sub_index == 3) { + pThis->dac_sub_index = 0; + pThis->dac_read_index++; } break; case 0x3ca: - val = s->fcr; + val = pThis->fcr; break; case 0x3cc: - val = s->msr; + val = pThis->msr; break; case 0x3ce: - val = s->gr_index; + val = pThis->gr_index; break; case 0x3cf: - val = s->gr[s->gr_index]; - Log2(("vga: read GR%x = 0x%02x\n", s->gr_index, val)); + val = pThis->gr[pThis->gr_index]; + Log2(("vga: read GR%x = 0x%02x\n", pThis->gr_index, val)); break; case 0x3b4: case 0x3d4: - val = s->cr_index; + val = pThis->cr_index; break; case 0x3b5: case 0x3d5: - val = s->cr[s->cr_index]; - Log2(("vga: read CR%x = 0x%02x\n", s->cr_index, val)); + val = pThis->cr[pThis->cr_index]; + Log2(("vga: read CR%x = 0x%02x\n", pThis->cr_index, val)); break; case 0x3ba: case 0x3da: - val = s->st01 = vga_retrace(s); - s->ar_flip_flop = 0; + val = pThis->st01 = vga_retrace(pThis); + pThis->ar_flip_flop = 0; break; default: val = 0x00; @@ -666,118 +669,117 @@ static uint32_t vga_ioport_read(void *opaque, uint32_t addr) return val; } -static void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) +static void vga_ioport_write(PVGASTATE pThis, uint32_t addr, uint32_t val) { - VGAState *s = (VGAState*)opaque; int index; Log(("VGA: write addr=0x%04x data=0x%02x\n", addr, val)); /* check port range access depending on color/monochrome mode */ - if (vga_ioport_invalid(s, addr)) { + if (vga_ioport_invalid(pThis, addr)) { Log(("VGA: previous write ignored\n")); return; } switch(addr) { case 0x3c0: - if (s->ar_flip_flop == 0) { + if (pThis->ar_flip_flop == 0) { val &= 0x3f; - s->ar_index = val; + pThis->ar_index = val; } else { - index = s->ar_index & 0x1f; + index = pThis->ar_index & 0x1f; switch(index) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: - s->ar[index] = val & 0x3f; + pThis->ar[index] = val & 0x3f; break; case 0x10: - s->ar[index] = val & ~0x10; + pThis->ar[index] = val & ~0x10; break; case 0x11: - s->ar[index] = val; + pThis->ar[index] = val; break; case 0x12: - s->ar[index] = val & ~0xc0; + pThis->ar[index] = val & ~0xc0; break; case 0x13: - s->ar[index] = val & ~0xf0; + pThis->ar[index] = val & ~0xf0; break; case 0x14: - s->ar[index] = val & ~0xf0; + pThis->ar[index] = val & ~0xf0; break; default: break; } } - s->ar_flip_flop ^= 1; + pThis->ar_flip_flop ^= 1; break; case 0x3c2: - s->msr = val & ~0x10; - if (s->fRealRetrace) - vga_update_retrace_state(s); - s->st00 = (s->st00 & ~0x10) | (0x90 >> ((val >> 2) & 0x3)); + pThis->msr = val & ~0x10; + if (pThis->fRealRetrace) + vga_update_retrace_state(pThis); + pThis->st00 = (pThis->st00 & ~0x10) | (0x90 >> ((val >> 2) & 0x3)); break; case 0x3c4: - s->sr_index = val & 7; + pThis->sr_index = val & 7; break; case 0x3c5: - Log2(("vga: write SR%x = 0x%02x\n", s->sr_index, val)); - s->sr[s->sr_index] = val & sr_mask[s->sr_index]; + Log2(("vga: write SR%x = 0x%02x\n", pThis->sr_index, val)); + pThis->sr[pThis->sr_index] = val & sr_mask[pThis->sr_index]; /* Allow SR07 to disable VBE. */ - if (s->sr_index == 0x07 && !(val & 1)) + if (pThis->sr_index == 0x07 && !(val & 1)) { - s->vbe_regs[VBE_DISPI_INDEX_ENABLE] = VBE_DISPI_DISABLED; - s->bank_offset = 0; + pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] = VBE_DISPI_DISABLED; + pThis->bank_offset = 0; } - if (s->fRealRetrace && s->sr_index == 0x01) - vga_update_retrace_state(s); + if (pThis->fRealRetrace && pThis->sr_index == 0x01) + vga_update_retrace_state(pThis); #ifndef IN_RC /* The VGA region is (could be) affected by this change; reset all aliases we've created. */ - if ( s->sr_index == 4 /* mode */ - || s->sr_index == 2 /* plane mask */) + if ( pThis->sr_index == 4 /* mode */ + || pThis->sr_index == 2 /* plane mask */) { - if (s->fRemappedVGA) + if (pThis->fRemappedVGA) { - IOMMMIOResetRegion(PDMDevHlpGetVM(s->CTX_SUFF(pDevIns)), 0x000a0000); - s->fRemappedVGA = false; + IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000); + pThis->fRemappedVGA = false; } } #endif break; case 0x3c7: - s->dac_read_index = val; - s->dac_sub_index = 0; - s->dac_state = 3; + pThis->dac_read_index = val; + pThis->dac_sub_index = 0; + pThis->dac_state = 3; break; case 0x3c8: - s->dac_write_index = val; - s->dac_sub_index = 0; - s->dac_state = 0; + pThis->dac_write_index = val; + pThis->dac_sub_index = 0; + pThis->dac_state = 0; break; case 0x3c9: - s->dac_cache[s->dac_sub_index] = val; - if (++s->dac_sub_index == 3) { - memcpy(&s->palette[s->dac_write_index * 3], s->dac_cache, 3); - s->dac_sub_index = 0; - s->dac_write_index++; + pThis->dac_cache[pThis->dac_sub_index] = val; + if (++pThis->dac_sub_index == 3) { + memcpy(&pThis->palette[pThis->dac_write_index * 3], pThis->dac_cache, 3); + pThis->dac_sub_index = 0; + pThis->dac_write_index++; } break; case 0x3ce: - s->gr_index = val & 0x0f; + pThis->gr_index = val & 0x0f; break; case 0x3cf: - Log2(("vga: write GR%x = 0x%02x\n", s->gr_index, val)); - s->gr[s->gr_index] = val & gr_mask[s->gr_index]; + Log2(("vga: write GR%x = 0x%02x\n", pThis->gr_index, val)); + pThis->gr[pThis->gr_index] = val & gr_mask[pThis->gr_index]; #ifndef IN_RC /* The VGA region is (could be) affected by this change; reset all aliases we've created. */ - if (s->gr_index == 6 /* memory map mode */) + if (pThis->gr_index == 6 /* memory map mode */) { - if (s->fRemappedVGA) + if (pThis->fRemappedVGA) { - IOMMMIOResetRegion(PDMDevHlpGetVM(s->CTX_SUFF(pDevIns)), 0x000a0000); - s->fRemappedVGA = false; + IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000); + pThis->fRemappedVGA = false; } } #endif @@ -785,23 +787,23 @@ static void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) case 0x3b4: case 0x3d4: - s->cr_index = val; + pThis->cr_index = val; break; case 0x3b5: case 0x3d5: - Log2(("vga: write CR%x = 0x%02x\n", s->cr_index, val)); + Log2(("vga: write CR%x = 0x%02x\n", pThis->cr_index, val)); /* handle CR0-7 protection */ - if ((s->cr[0x11] & 0x80) && s->cr_index <= 7) { + if ((pThis->cr[0x11] & 0x80) && pThis->cr_index <= 7) { /* can always write bit 4 of CR7 */ - if (s->cr_index == 7) - s->cr[7] = (s->cr[7] & ~0x10) | (val & 0x10); + if (pThis->cr_index == 7) + pThis->cr[7] = (pThis->cr[7] & ~0x10) | (val & 0x10); return; } - s->cr[s->cr_index] = val; + pThis->cr[pThis->cr_index] = val; - if (s->fRealRetrace) { + if (pThis->fRealRetrace) { /* The following registers are only updated during a mode set. */ - switch(s->cr_index) { + switch(pThis->cr_index) { case 0x00: case 0x02: case 0x03: @@ -813,36 +815,34 @@ static void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) case 0x11: case 0x15: case 0x16: - vga_update_retrace_state(s); + vga_update_retrace_state(pThis); break; } } break; case 0x3ba: case 0x3da: - s->fcr = val & 0x10; + pThis->fcr = val & 0x10; break; } } #ifdef CONFIG_BOCHS_VBE -static uint32_t vbe_ioport_read_index(void *opaque, uint32_t addr) +static uint32_t vbe_ioport_read_index(PVGASTATE pThis, uint32_t addr) { - VGAState *s = (VGAState*)opaque; - uint32_t val = s->vbe_index; + uint32_t val = pThis->vbe_index; NOREF(addr); return val; } -static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr) +static uint32_t vbe_ioport_read_data(PVGASTATE pThis, uint32_t addr) { - VGAState *s = (VGAState*)opaque; uint32_t val; NOREF(addr); - if (s->vbe_index < VBE_DISPI_INDEX_NB) { - if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_GETCAPS) { - switch(s->vbe_index) { + if (pThis->vbe_index < VBE_DISPI_INDEX_NB) { + if (pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_GETCAPS) { + switch(pThis->vbe_index) { /* XXX: do not hardcode ? */ case VBE_DISPI_INDEX_XRES: val = VBE_DISPI_MAX_XRES; @@ -854,26 +854,26 @@ static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr) val = VBE_DISPI_MAX_BPP; break; default: - Assert(s->vbe_index < VBE_DISPI_INDEX_NB); - val = s->vbe_regs[s->vbe_index]; + Assert(pThis->vbe_index < VBE_DISPI_INDEX_NB); + val = pThis->vbe_regs[pThis->vbe_index]; break; } } else { - switch(s->vbe_index) { + switch(pThis->vbe_index) { case VBE_DISPI_INDEX_VBOX_VIDEO: /* Reading from the port means that the old additions are requesting the number of monitors. */ val = 1; break; default: - Assert(s->vbe_index < VBE_DISPI_INDEX_NB); - val = s->vbe_regs[s->vbe_index]; + Assert(pThis->vbe_index < VBE_DISPI_INDEX_NB); + val = pThis->vbe_regs[pThis->vbe_index]; break; } } } else { val = 0; } - Log(("VBE: read index=0x%x val=0x%x\n", s->vbe_index, val)); + Log(("VBE: read index=0x%x val=0x%x\n", pThis->vbe_index, val)); return val; } @@ -912,106 +912,105 @@ static uint32_t calc_line_width(uint16_t bpp, uint32_t pitch) } #endif -static void recalculate_data(VGAState *s, bool fVirtHeightOnly) +static void recalculate_data(PVGASTATE pThis, bool fVirtHeightOnly) { - uint16_t cBPP = s->vbe_regs[VBE_DISPI_INDEX_BPP]; - uint16_t cVirtWidth = s->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH]; - uint16_t cX = s->vbe_regs[VBE_DISPI_INDEX_XRES]; + uint16_t cBPP = pThis->vbe_regs[VBE_DISPI_INDEX_BPP]; + uint16_t cVirtWidth = pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH]; + uint16_t cX = pThis->vbe_regs[VBE_DISPI_INDEX_XRES]; if (!cBPP || !cX) return; /* Not enough data has been set yet. */ uint32_t cbLinePitch = calc_line_pitch(cBPP, cVirtWidth); if (!cbLinePitch) cbLinePitch = calc_line_pitch(cBPP, cX); Assert(cbLinePitch != 0); - uint32_t cVirtHeight = s->vram_size / cbLinePitch; + uint32_t cVirtHeight = pThis->vram_size / cbLinePitch; if (!fVirtHeightOnly) { - uint16_t offX = s->vbe_regs[VBE_DISPI_INDEX_X_OFFSET]; - uint16_t offY = s->vbe_regs[VBE_DISPI_INDEX_Y_OFFSET]; + uint16_t offX = pThis->vbe_regs[VBE_DISPI_INDEX_X_OFFSET]; + uint16_t offY = pThis->vbe_regs[VBE_DISPI_INDEX_Y_OFFSET]; uint32_t offStart = cbLinePitch * offY; if (cBPP == 4) offStart += offX >> 1; else offStart += offX * ((cBPP + 7) >> 3); offStart >>= 2; - s->vbe_line_offset = RT_MIN(cbLinePitch, s->vram_size); - s->vbe_start_addr = RT_MIN(offStart, s->vram_size); + pThis->vbe_line_offset = RT_MIN(cbLinePitch, pThis->vram_size); + pThis->vbe_start_addr = RT_MIN(offStart, pThis->vram_size); } /* The VBE_DISPI_INDEX_VIRT_HEIGHT is used to prevent setting resolution bigger than VRAM permits * it is used instead of VBE_DISPI_INDEX_YRES *only* in case - * s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] < s->vbe_regs[VBE_DISPI_INDEX_YRES] - * We can not simply do s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] = cVirtHeight since + * pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] < pThis->vbe_regs[VBE_DISPI_INDEX_YRES] + * We can not simply do pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] = cVirtHeight since * the cVirtHeight we calculated can exceed the 16bit value range - * instead we'll check if it's bigger than s->vbe_regs[VBE_DISPI_INDEX_YRES], and if yes, - * assign the s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] with a dummy UINT16_MAX value - * that is always bigger than s->vbe_regs[VBE_DISPI_INDEX_YRES] - * to just ensure the s->vbe_regs[VBE_DISPI_INDEX_YRES] is always used */ - s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] = (cVirtHeight >= (uint32_t)s->vbe_regs[VBE_DISPI_INDEX_YRES]) ? UINT16_MAX : (uint16_t)cVirtHeight; + * instead we'll check if it's bigger than pThis->vbe_regs[VBE_DISPI_INDEX_YRES], and if yes, + * assign the pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] with a dummy UINT16_MAX value + * that is always bigger than pThis->vbe_regs[VBE_DISPI_INDEX_YRES] + * to just ensure the pThis->vbe_regs[VBE_DISPI_INDEX_YRES] is always used */ + pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] = (cVirtHeight >= (uint32_t)pThis->vbe_regs[VBE_DISPI_INDEX_YRES]) + ? UINT16_MAX : (uint16_t)cVirtHeight; } -static void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val) +static void vbe_ioport_write_index(PVGASTATE pThis, uint32_t addr, uint32_t val) { - VGAState *s = (VGAState*)opaque; - s->vbe_index = val; + pThis->vbe_index = val; NOREF(addr); } -static int vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) +static int vbe_ioport_write_data(PVGASTATE pThis, uint32_t addr, uint32_t val) { - VGAState *s = (VGAState*)opaque; uint32_t max_bank; NOREF(addr); - if (s->vbe_index <= VBE_DISPI_INDEX_NB) { + if (pThis->vbe_index <= VBE_DISPI_INDEX_NB) { bool fRecalculate = false; - Log(("VBE: write index=0x%x val=0x%x\n", s->vbe_index, val)); - switch(s->vbe_index) { + Log(("VBE: write index=0x%x val=0x%x\n", pThis->vbe_index, val)); + switch(pThis->vbe_index) { case VBE_DISPI_INDEX_ID: if (val == VBE_DISPI_ID0 || val == VBE_DISPI_ID1 || val == VBE_DISPI_ID2 || val == VBE_DISPI_ID3 || val == VBE_DISPI_ID4) { - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; } if (val == VBE_DISPI_ID_VBOX_VIDEO) { - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; } else if (val == VBE_DISPI_ID_ANYX) { - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; } #ifdef VBOX_WITH_HGSMI else if (val == VBE_DISPI_ID_HGSMI) { - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; } #endif /* VBOX_WITH_HGSMI */ break; case VBE_DISPI_INDEX_XRES: if (val <= VBE_DISPI_MAX_XRES) { - s->vbe_regs[s->vbe_index] = val; - s->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH] = val; + pThis->vbe_regs[pThis->vbe_index] = val; + pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH] = val; fRecalculate = true; } break; case VBE_DISPI_INDEX_YRES: if (val <= VBE_DISPI_MAX_YRES) - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; break; case VBE_DISPI_INDEX_BPP: if (val == 0) val = 8; if (val == 4 || val == 8 || val == 15 || val == 16 || val == 24 || val == 32) { - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; fRecalculate = true; } break; case VBE_DISPI_INDEX_BANK: - if (s->vbe_regs[VBE_DISPI_INDEX_BPP] <= 4) - max_bank = s->vbe_bank_max >> 2; /* Each bank really covers 256K */ + if (pThis->vbe_regs[VBE_DISPI_INDEX_BPP] <= 4) + max_bank = pThis->vbe_bank_max >> 2; /* Each bank really covers 256K */ else - max_bank = s->vbe_bank_max; + max_bank = pThis->vbe_bank_max; /* Old software may pass garbage in the high byte of bank. If the maximum * bank fits into a single byte, toss the high byte the user supplied. */ @@ -1019,15 +1018,15 @@ static int vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) val &= 0xff; if (val > max_bank) val = max_bank; - s->vbe_regs[s->vbe_index] = val; - s->bank_offset = (val << 16); + pThis->vbe_regs[pThis->vbe_index] = val; + pThis->bank_offset = (val << 16); #ifndef IN_RC /* The VGA region is (could be) affected by this change; reset all aliases we've created. */ - if (s->fRemappedVGA) + if (pThis->fRemappedVGA) { - IOMMMIOResetRegion(PDMDevHlpGetVM(s->CTX_SUFF(pDevIns)), 0x000a0000); - s->fRemappedVGA = false; + IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000); + pThis->fRemappedVGA = false; } #endif break; @@ -1037,102 +1036,105 @@ static int vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) return VINF_IOM_R3_IOPORT_WRITE; #else if ((val & VBE_DISPI_ENABLED) && - !(s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) { + !(pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) { int h, shift_control; /* Check the values before we screw up with a resolution which is too big or small. */ - size_t cb = s->vbe_regs[VBE_DISPI_INDEX_XRES]; - if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) - cb = s->vbe_regs[VBE_DISPI_INDEX_XRES] >> 1; + size_t cb = pThis->vbe_regs[VBE_DISPI_INDEX_XRES]; + if (pThis->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) + cb = pThis->vbe_regs[VBE_DISPI_INDEX_XRES] >> 1; else - cb = s->vbe_regs[VBE_DISPI_INDEX_XRES] * ((s->vbe_regs[VBE_DISPI_INDEX_BPP] + 7) >> 3); - cb *= s->vbe_regs[VBE_DISPI_INDEX_YRES]; - uint16_t cVirtWidth = s->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH]; + cb = pThis->vbe_regs[VBE_DISPI_INDEX_XRES] * ((pThis->vbe_regs[VBE_DISPI_INDEX_BPP] + 7) >> 3); + cb *= pThis->vbe_regs[VBE_DISPI_INDEX_YRES]; + uint16_t cVirtWidth = pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH]; if (!cVirtWidth) - cVirtWidth = s->vbe_regs[VBE_DISPI_INDEX_XRES]; + cVirtWidth = pThis->vbe_regs[VBE_DISPI_INDEX_XRES]; if ( !cVirtWidth - || !s->vbe_regs[VBE_DISPI_INDEX_YRES] - || cb > s->vram_size) + || !pThis->vbe_regs[VBE_DISPI_INDEX_YRES] + || cb > pThis->vram_size) { AssertMsgFailed(("VIRT WIDTH=%d YRES=%d cb=%d vram_size=%d\n", - s->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH], s->vbe_regs[VBE_DISPI_INDEX_YRES], cb, s->vram_size)); + pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH], pThis->vbe_regs[VBE_DISPI_INDEX_YRES], cb, pThis->vram_size)); return VINF_SUCCESS; /* Note: silent failure like before */ } /* When VBE interface is enabled, it is reset. */ - s->vbe_regs[VBE_DISPI_INDEX_X_OFFSET] = 0; - s->vbe_regs[VBE_DISPI_INDEX_Y_OFFSET] = 0; + pThis->vbe_regs[VBE_DISPI_INDEX_X_OFFSET] = 0; + pThis->vbe_regs[VBE_DISPI_INDEX_Y_OFFSET] = 0; fRecalculate = true; /* clear the screen (should be done in BIOS) */ if (!(val & VBE_DISPI_NOCLEARMEM)) { - uint16_t cY = RT_MIN(s->vbe_regs[VBE_DISPI_INDEX_YRES], - s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT]); - uint16_t cbLinePitch = s->vbe_line_offset; - memset(s->CTX_SUFF(vram_ptr), 0, + uint16_t cY = RT_MIN(pThis->vbe_regs[VBE_DISPI_INDEX_YRES], + pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT]); + uint16_t cbLinePitch = pThis->vbe_line_offset; + memset(pThis->CTX_SUFF(vram_ptr), 0, cY * cbLinePitch); } /* we initialize the VGA graphic mode (should be done in BIOS) */ - s->gr[0x06] = (s->gr[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */ - s->cr[0x17] |= 3; /* no CGA modes */ - s->cr[0x13] = s->vbe_line_offset >> 3; + pThis->gr[0x06] = (pThis->gr[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */ + pThis->cr[0x17] |= 3; /* no CGA modes */ + pThis->cr[0x13] = pThis->vbe_line_offset >> 3; /* width */ - s->cr[0x01] = (cVirtWidth >> 3) - 1; + pThis->cr[0x01] = (cVirtWidth >> 3) - 1; /* height (only meaningful if < 1024) */ - h = s->vbe_regs[VBE_DISPI_INDEX_YRES] - 1; - s->cr[0x12] = h; - s->cr[0x07] = (s->cr[0x07] & ~0x42) | + h = pThis->vbe_regs[VBE_DISPI_INDEX_YRES] - 1; + pThis->cr[0x12] = h; + pThis->cr[0x07] = (pThis->cr[0x07] & ~0x42) | ((h >> 7) & 0x02) | ((h >> 3) & 0x40); /* line compare to 1023 */ - s->cr[0x18] = 0xff; - s->cr[0x07] |= 0x10; - s->cr[0x09] |= 0x40; + pThis->cr[0x18] = 0xff; + pThis->cr[0x07] |= 0x10; + pThis->cr[0x09] |= 0x40; - if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) { + if (pThis->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) { shift_control = 0; - s->sr[0x01] &= ~8; /* no double line */ + pThis->sr[0x01] &= ~8; /* no double line */ } else { shift_control = 2; - s->sr[4] |= 0x08; /* set chain 4 mode */ - s->sr[2] |= 0x0f; /* activate all planes */ + pThis->sr[4] |= 0x08; /* set chain 4 mode */ + pThis->sr[2] |= 0x0f; /* activate all planes */ /* Indicate non-VGA mode in SR07. */ - s->sr[7] |= 1; + pThis->sr[7] |= 1; } - s->gr[0x05] = (s->gr[0x05] & ~0x60) | (shift_control << 5); - s->cr[0x09] &= ~0x9f; /* no double scan */ + pThis->gr[0x05] = (pThis->gr[0x05] & ~0x60) | (shift_control << 5); + pThis->cr[0x09] &= ~0x9f; /* no double scan */ /* sunlover 30.05.2007 * The ar_index remains with bit 0x20 cleared after a switch from fullscreen * DOS mode on Windows XP guest. That leads to GMODE_BLANK in vga_update_display. * But the VBE mode is graphics, so not a blank anymore. */ - s->ar_index |= 0x20; + pThis->ar_index |= 0x20; } else { /* XXX: the bios should do that */ /* sunlover 21.12.2006 * Here is probably more to reset. When this was executed in GC * then the *update* functions could not detect a mode change. - * Or may be these update function should take the s->vbe_regs[s->vbe_index] + * Or may be these update function should take the pThis->vbe_regs[pThis->vbe_index] * into account when detecting a mode change. * * The 'mode reset not detected' problem is now fixed by executing the * VBE_DISPI_INDEX_ENABLE case always in RING3 in order to call the * LFBChange callback. */ - s->bank_offset = 0; + pThis->bank_offset = 0; } - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; /* * LFB video mode is either disabled or changed. This notification * is used by the display to disable VBVA. */ - s->pDrv->pfnLFBModeChange(s->pDrv, (val & VBE_DISPI_ENABLED) != 0); + pThis->pDrv->pfnLFBModeChange(pThis->pDrv, (val & VBE_DISPI_ENABLED) != 0); +#ifdef VBOX_WITH_HGSMI + VBVAPause(pThis, (val & VBE_DISPI_ENABLED) == 0); +#endif /* VBOX_WITH_HGSMI */ /* The VGA region is (could be) affected by this change; reset all aliases we've created. */ - if (s->fRemappedVGA) + if (pThis->fRemappedVGA) { - IOMMMIOResetRegion(PDMDevHlpGetVM(s->CTX_SUFF(pDevIns)), 0x000a0000); - s->fRemappedVGA = false; + IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000); + pThis->fRemappedVGA = false; } break; #endif /* IN_RING3 */ @@ -1140,7 +1142,7 @@ static int vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) case VBE_DISPI_INDEX_X_OFFSET: case VBE_DISPI_INDEX_Y_OFFSET: { - s->vbe_regs[s->vbe_index] = val; + pThis->vbe_regs[pThis->vbe_index] = val; fRecalculate = true; } break; @@ -1151,15 +1153,15 @@ static int vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) /* Changes in the VGA device are minimal. The device is bypassed. The driver does all work. */ if (val == VBOX_VIDEO_DISABLE_ADAPTER_MEMORY) { - s->pDrv->pfnProcessAdapterData(s->pDrv, NULL, 0); + pThis->pDrv->pfnProcessAdapterData(pThis->pDrv, NULL, 0); } else if (val == VBOX_VIDEO_INTERPRET_ADAPTER_MEMORY) { - s->pDrv->pfnProcessAdapterData(s->pDrv, s->CTX_SUFF(vram_ptr), s->vram_size); + pThis->pDrv->pfnProcessAdapterData(pThis->pDrv, pThis->CTX_SUFF(vram_ptr), pThis->vram_size); } else if ((val & 0xFFFF0000) == VBOX_VIDEO_INTERPRET_DISPLAY_MEMORY_BASE) { - s->pDrv->pfnProcessDisplayData(s->pDrv, s->CTX_SUFF(vram_ptr), val & 0xFFFF); + pThis->pDrv->pfnProcessDisplayData(pThis->pDrv, pThis->CTX_SUFF(vram_ptr), val & 0xFFFF); } #endif /* IN_RING3 */ break; @@ -1168,7 +1170,7 @@ static int vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) } if (fRecalculate) { - recalculate_data(s, false); + recalculate_data(pThis, false); } } return VINF_SUCCESS; @@ -1176,15 +1178,14 @@ static int vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) #endif /* called for accesses between 0xa0000 and 0xc0000 */ -static uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr, int *prc) +static uint32_t vga_mem_readb(PVGASTATE pThis, target_phys_addr_t addr, int *prc) { - VGAState *s = (VGAState*)opaque; int memory_map_mode, plane; uint32_t ret; Log3(("vga: read [0x%x] -> ", addr)); /* convert to VGA memory offset */ - memory_map_mode = (s->gr[6] >> 2) & 3; + memory_map_mode = (pThis->gr[6] >> 2) & 3; #ifndef IN_RC RTGCPHYS GCPhys = addr; /* save original address */ #endif @@ -1196,7 +1197,7 @@ static uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr, int *prc) case 1: if (addr >= 0x10000) return 0xff; - addr += s->bank_offset; + addr += pThis->bank_offset; break; case 2: addr -= 0x10000; @@ -1211,42 +1212,43 @@ static uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr, int *prc) break; } - if (s->sr[4] & 0x08) { + if (pThis->sr[4] & 0x08) { /* chain 4 mode : simplest access */ # ifndef IN_RC /* If all planes are accessible, then map the page to the frame buffer and make it writable. */ - if ( (s->sr[2] & 3) == 3 - && !vga_is_dirty(s, addr)) + if ( (pThis->sr[2] & 3) == 3 + && !vga_is_dirty(pThis, addr)) { /** @todo only allow read access (doesn't work now) */ - STAM_COUNTER_INC(&s->StatMapPage); - IOMMMIOMapMMIO2Page(PDMDevHlpGetVM(s->CTX_SUFF(pDevIns)), GCPhys, s->GCPhysVRAM + addr, X86_PTE_RW|X86_PTE_P); + STAM_COUNTER_INC(&pThis->StatMapPage); + IOMMMIOMapMMIO2Page(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), GCPhys, + pThis->GCPhysVRAM + addr, X86_PTE_RW | X86_PTE_P); /* Set as dirty as write accesses won't be noticed now. */ - vga_set_dirty(s, addr); - s->fRemappedVGA = true; + vga_set_dirty(pThis, addr); + pThis->fRemappedVGA = true; } # endif /* IN_RC */ - VERIFY_VRAM_READ_OFF_RETURN(s, addr, *prc); - ret = s->CTX_SUFF(vram_ptr)[addr]; - } else if (!(s->sr[4] & 0x04)) { /* Host access is controlled by SR4, not GR5! */ + VERIFY_VRAM_READ_OFF_RETURN(pThis, addr, *prc); + ret = pThis->CTX_SUFF(vram_ptr)[addr]; + } else if (!(pThis->sr[4] & 0x04)) { /* Host access is controlled by SR4, not GR5! */ /* odd/even mode (aka text mode mapping) */ - plane = (s->gr[4] & 2) | (addr & 1); + plane = (pThis->gr[4] & 2) | (addr & 1); /* See the comment for a similar line in vga_mem_writeb. */ RTGCPHYS off = ((addr & ~1) << 2) | plane; - VERIFY_VRAM_READ_OFF_RETURN(s, off, *prc); - ret = s->CTX_SUFF(vram_ptr)[off]; + VERIFY_VRAM_READ_OFF_RETURN(pThis, off, *prc); + ret = pThis->CTX_SUFF(vram_ptr)[off]; } else { /* standard VGA latched access */ - VERIFY_VRAM_READ_OFF_RETURN(s, addr, *prc); - s->latch = ((uint32_t *)s->CTX_SUFF(vram_ptr))[addr]; + VERIFY_VRAM_READ_OFF_RETURN(pThis, addr, *prc); + pThis->latch = ((uint32_t *)pThis->CTX_SUFF(vram_ptr))[addr]; - if (!(s->gr[5] & 0x08)) { + if (!(pThis->gr[5] & 0x08)) { /* read mode 0 */ - plane = s->gr[4]; - ret = GET_PLANE(s->latch, plane); + plane = pThis->gr[4]; + ret = GET_PLANE(pThis->latch, plane); } else { /* read mode 1 */ - ret = (s->latch ^ mask16[s->gr[2]]) & mask16[s->gr[7]]; + ret = (pThis->latch ^ mask16[pThis->gr[2]]) & mask16[pThis->gr[7]]; ret |= ret >> 16; ret |= ret >> 8; ret = (~ret) & 0xff; @@ -1257,15 +1259,14 @@ static uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr, int *prc) } /* called for accesses between 0xa0000 and 0xc0000 */ -static int vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) +static int vga_mem_writeb(PVGASTATE pThis, target_phys_addr_t addr, uint32_t val) { - VGAState *s = (VGAState*)opaque; int memory_map_mode, plane, write_mode, b, func_select, mask; uint32_t write_mask, bit_mask, set_mask; Log3(("vga: [0x%x] = 0x%02x\n", addr, val)); /* convert to VGA memory offset */ - memory_map_mode = (s->gr[6] >> 2) & 3; + memory_map_mode = (pThis->gr[6] >> 2) & 3; #ifndef IN_RC RTGCPHYS GCPhys = addr; /* save original address */ #endif @@ -1277,7 +1278,7 @@ static int vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) case 1: if (addr >= 0x10000) return VINF_SUCCESS; - addr += s->bank_offset; + addr += pThis->bank_offset; break; case 2: addr -= 0x10000; @@ -1292,122 +1293,123 @@ static int vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) break; } - if (s->sr[4] & 0x08) { + if (pThis->sr[4] & 0x08) { /* chain 4 mode : simplest access */ plane = addr & 3; mask = (1 << plane); - if (s->sr[2] & mask) { + if (pThis->sr[2] & mask) { # ifndef IN_RC /* If all planes are accessible, then map the page to the frame buffer and make it writable. */ - if ( (s->sr[2] & 3) == 3 - && !vga_is_dirty(s, addr)) + if ( (pThis->sr[2] & 3) == 3 + && !vga_is_dirty(pThis, addr)) { - STAM_COUNTER_INC(&s->StatMapPage); - IOMMMIOMapMMIO2Page(PDMDevHlpGetVM(s->CTX_SUFF(pDevIns)), GCPhys, s->GCPhysVRAM + addr, X86_PTE_RW | X86_PTE_P); - s->fRemappedVGA = true; + STAM_COUNTER_INC(&pThis->StatMapPage); + IOMMMIOMapMMIO2Page(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), GCPhys, + pThis->GCPhysVRAM + addr, X86_PTE_RW | X86_PTE_P); + pThis->fRemappedVGA = true; } # endif /* IN_RC */ - VERIFY_VRAM_WRITE_OFF_RETURN(s, addr); - s->CTX_SUFF(vram_ptr)[addr] = val; + VERIFY_VRAM_WRITE_OFF_RETURN(pThis, addr); + pThis->CTX_SUFF(vram_ptr)[addr] = val; Log3(("vga: chain4: [0x%x]\n", addr)); - s->plane_updated |= mask; /* only used to detect font change */ - vga_set_dirty(s, addr); + pThis->plane_updated |= mask; /* only used to detect font change */ + vga_set_dirty(pThis, addr); } - } else if (!(s->sr[4] & 0x04)) { /* Host access is controlled by SR4, not GR5! */ + } else if (!(pThis->sr[4] & 0x04)) { /* Host access is controlled by SR4, not GR5! */ /* odd/even mode (aka text mode mapping) */ - plane = (s->gr[4] & 2) | (addr & 1); + plane = (pThis->gr[4] & 2) | (addr & 1); mask = (1 << plane); - if (s->sr[2] & mask) { + if (pThis->sr[2] & mask) { /* 'addr' is offset in a plane, bit 0 selects the plane. * Mask the bit 0, convert plane index to vram offset, * that is multiply by the number of planes, * and select the plane byte in the vram offset. */ addr = ((addr & ~1) << 2) | plane; - VERIFY_VRAM_WRITE_OFF_RETURN(s, addr); - s->CTX_SUFF(vram_ptr)[addr] = val; + VERIFY_VRAM_WRITE_OFF_RETURN(pThis, addr); + pThis->CTX_SUFF(vram_ptr)[addr] = val; Log3(("vga: odd/even: [0x%x]\n", addr)); - s->plane_updated |= mask; /* only used to detect font change */ - vga_set_dirty(s, addr); + pThis->plane_updated |= mask; /* only used to detect font change */ + vga_set_dirty(pThis, addr); } } else { /* standard VGA latched access */ - VERIFY_VRAM_WRITE_OFF_RETURN(s, addr * 4 + 3); + VERIFY_VRAM_WRITE_OFF_RETURN(pThis, addr * 4 + 3); #ifdef IN_RING0 - if (((++s->cLatchAccesses) & s->uMaskLatchAccess) == s->uMaskLatchAccess) + if (((++pThis->cLatchAccesses) & pThis->uMaskLatchAccess) == pThis->uMaskLatchAccess) { static uint32_t const s_aMask[5] = { 0x3ff, 0x1ff, 0x7f, 0x3f, 0x1f}; static uint64_t const s_aDelta[5] = {10000000, 5000000, 2500000, 1250000, 625000}; - if (PDMDevHlpCanEmulateIoBlock(s->CTX_SUFF(pDevIns))) + if (PDMDevHlpCanEmulateIoBlock(pThis->CTX_SUFF(pDevIns))) { uint64_t u64CurTime = RTTimeSystemNanoTS(); /* About 1000 (or more) accesses per 10 ms will trigger a reschedule * to the recompiler */ - if (u64CurTime - s->u64LastLatchedAccess < s_aDelta[s->iMask]) + if (u64CurTime - pThis->u64LastLatchedAccess < s_aDelta[pThis->iMask]) { - s->u64LastLatchedAccess = 0; - s->iMask = RT_MIN(s->iMask + 1U, RT_ELEMENTS(s_aMask) - 1U); - s->uMaskLatchAccess = s_aMask[s->iMask]; - s->cLatchAccesses = s->uMaskLatchAccess - 1; + pThis->u64LastLatchedAccess = 0; + pThis->iMask = RT_MIN(pThis->iMask + 1U, RT_ELEMENTS(s_aMask) - 1U); + pThis->uMaskLatchAccess = s_aMask[pThis->iMask]; + pThis->cLatchAccesses = pThis->uMaskLatchAccess - 1; return VINF_EM_RAW_EMULATE_IO_BLOCK; } - if (s->u64LastLatchedAccess) + if (pThis->u64LastLatchedAccess) { - Log2(("Reset mask (was %d) delta %RX64 (limit %x)\n", s->iMask, u64CurTime - s->u64LastLatchedAccess, s_aDelta[s->iMask])); - if (s->iMask) - s->iMask--; - s->uMaskLatchAccess = s_aMask[s->iMask]; + Log2(("Reset mask (was %d) delta %RX64 (limit %x)\n", pThis->iMask, u64CurTime - pThis->u64LastLatchedAccess, s_aDelta[pThis->iMask])); + if (pThis->iMask) + pThis->iMask--; + pThis->uMaskLatchAccess = s_aMask[pThis->iMask]; } - s->u64LastLatchedAccess = u64CurTime; + pThis->u64LastLatchedAccess = u64CurTime; } else { - s->u64LastLatchedAccess = 0; - s->iMask = 0; - s->uMaskLatchAccess = s_aMask[s->iMask]; - s->cLatchAccesses = 0; + pThis->u64LastLatchedAccess = 0; + pThis->iMask = 0; + pThis->uMaskLatchAccess = s_aMask[pThis->iMask]; + pThis->cLatchAccesses = 0; } } #endif - write_mode = s->gr[5] & 3; + write_mode = pThis->gr[5] & 3; switch(write_mode) { default: case 0: /* rotate */ - b = s->gr[3] & 7; + b = pThis->gr[3] & 7; val = ((val >> b) | (val << (8 - b))) & 0xff; val |= val << 8; val |= val << 16; /* apply set/reset mask */ - set_mask = mask16[s->gr[1]]; - val = (val & ~set_mask) | (mask16[s->gr[0]] & set_mask); - bit_mask = s->gr[8]; + set_mask = mask16[pThis->gr[1]]; + val = (val & ~set_mask) | (mask16[pThis->gr[0]] & set_mask); + bit_mask = pThis->gr[8]; break; case 1: - val = s->latch; + val = pThis->latch; goto do_write; case 2: val = mask16[val & 0x0f]; - bit_mask = s->gr[8]; + bit_mask = pThis->gr[8]; break; case 3: /* rotate */ - b = s->gr[3] & 7; + b = pThis->gr[3] & 7; val = (val >> b) | (val << (8 - b)); - bit_mask = s->gr[8] & val; - val = mask16[s->gr[0]]; + bit_mask = pThis->gr[8] & val; + val = mask16[pThis->gr[0]]; break; } /* apply logical operation */ - func_select = s->gr[3] >> 3; + func_select = pThis->gr[3] >> 3; switch(func_select) { case 0: default: @@ -1415,34 +1417,34 @@ static int vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) break; case 1: /* and */ - val &= s->latch; + val &= pThis->latch; break; case 2: /* or */ - val |= s->latch; + val |= pThis->latch; break; case 3: /* xor */ - val ^= s->latch; + val ^= pThis->latch; break; } /* apply bit mask */ bit_mask |= bit_mask << 8; bit_mask |= bit_mask << 16; - val = (val & bit_mask) | (s->latch & ~bit_mask); + val = (val & bit_mask) | (pThis->latch & ~bit_mask); do_write: /* mask data according to sr[2] */ - mask = s->sr[2]; - s->plane_updated |= mask; /* only used to detect font change */ + mask = pThis->sr[2]; + pThis->plane_updated |= mask; /* only used to detect font change */ write_mask = mask16[mask]; - ((uint32_t *)s->CTX_SUFF(vram_ptr))[addr] = - (((uint32_t *)s->CTX_SUFF(vram_ptr))[addr] & ~write_mask) | + ((uint32_t *)pThis->CTX_SUFF(vram_ptr))[addr] = + (((uint32_t *)pThis->CTX_SUFF(vram_ptr))[addr] & ~write_mask) | (val & write_mask); Log3(("vga: latch: [0x%x] mask=0x%08x val=0x%08x\n", addr * 4, write_mask, val)); - vga_set_dirty(s, (addr << 2)); + vga_set_dirty(pThis, (addr << 2)); } return VINF_SUCCESS; @@ -1450,14 +1452,13 @@ static int vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) #if defined(IN_RING3) typedef void vga_draw_glyph8_func(uint8_t *d, int linesize, - const uint8_t *font_ptr, int h, - uint32_t fgcol, uint32_t bgcol, - int dscan); + const uint8_t *font_ptr, int h, + uint32_t fgcol, uint32_t bgcol, + int dscan); typedef void vga_draw_glyph9_func(uint8_t *d, int linesize, const uint8_t *font_ptr, int h, uint32_t fgcol, uint32_t bgcol, int dup9); -typedef void vga_draw_line_func(VGAState *s1, uint8_t *d, - const uint8_t *s, int width); +typedef void vga_draw_line_func(PVGASTATE pThis, uint8_t *pbDst, const uint8_t *pbSrc, int width); static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b) { @@ -1524,23 +1525,23 @@ static unsigned int rgb_to_pixel32_dup(unsigned int r, unsigned int g, unsigned } /* return true if the palette was modified */ -static bool update_palette16(VGAState *s) +static bool update_palette16(PVGASTATE pThis) { bool full_update = false; int i; uint32_t v, col, *palette; - palette = s->last_palette; + palette = pThis->last_palette; for(i = 0; i < 16; i++) { - v = s->ar[i]; - if (s->ar[0x10] & 0x80) - v = ((s->ar[0x14] & 0xf) << 4) | (v & 0xf); + v = pThis->ar[i]; + if (pThis->ar[0x10] & 0x80) + v = ((pThis->ar[0x14] & 0xf) << 4) | (v & 0xf); else - v = ((s->ar[0x14] & 0xc) << 4) | (v & 0x3f); + v = ((pThis->ar[0x14] & 0xc) << 4) | (v & 0x3f); v = v * 3; - col = s->rgb_to_pixel(c6_to_8(s->palette[v]), - c6_to_8(s->palette[v + 1]), - c6_to_8(s->palette[v + 2])); + col = pThis->rgb_to_pixel(c6_to_8(pThis->palette[v]), + c6_to_8(pThis->palette[v + 1]), + c6_to_8(pThis->palette[v + 2])); if (col != palette[i]) { full_update = true; palette[i] = col; @@ -1550,26 +1551,26 @@ static bool update_palette16(VGAState *s) } /* return true if the palette was modified */ -static bool update_palette256(VGAState *s) +static bool update_palette256(PVGASTATE pThis) { bool full_update = false; int i; uint32_t v, col, *palette; int wide_dac; - palette = s->last_palette; + palette = pThis->last_palette; v = 0; - wide_dac = (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & (VBE_DISPI_ENABLED | VBE_DISPI_8BIT_DAC)) + wide_dac = (pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & (VBE_DISPI_ENABLED | VBE_DISPI_8BIT_DAC)) == (VBE_DISPI_ENABLED | VBE_DISPI_8BIT_DAC); for(i = 0; i < 256; i++) { if (wide_dac) - col = s->rgb_to_pixel(s->palette[v], - s->palette[v + 1], - s->palette[v + 2]); + col = pThis->rgb_to_pixel(pThis->palette[v], + pThis->palette[v + 1], + pThis->palette[v + 2]); else - col = s->rgb_to_pixel(c6_to_8(s->palette[v]), - c6_to_8(s->palette[v + 1]), - c6_to_8(s->palette[v + 2])); + col = pThis->rgb_to_pixel(c6_to_8(pThis->palette[v]), + c6_to_8(pThis->palette[v + 1]), + c6_to_8(pThis->palette[v + 2])); if (col != palette[i]) { full_update = true; palette[i] = col; @@ -1579,36 +1580,36 @@ static bool update_palette256(VGAState *s) return full_update; } -static void vga_get_offsets(VGAState *s, +static void vga_get_offsets(PVGASTATE pThis, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare) { uint32_t start_addr, line_offset, line_compare; #ifdef CONFIG_BOCHS_VBE - if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { - line_offset = s->vbe_line_offset; - start_addr = s->vbe_start_addr; + if (pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { + line_offset = pThis->vbe_line_offset; + start_addr = pThis->vbe_start_addr; line_compare = 65535; } else #endif { /* compute line_offset in bytes */ - line_offset = s->cr[0x13]; + line_offset = pThis->cr[0x13]; line_offset <<= 3; - if (!(s->cr[0x14] & 0x40) && !(s->cr[0x17] & 0x40)) + if (!(pThis->cr[0x14] & 0x40) && !(pThis->cr[0x17] & 0x40)) { /* Word mode. Used for odd/even modes. */ line_offset *= 2; } /* starting address */ - start_addr = s->cr[0x0d] | (s->cr[0x0c] << 8); + start_addr = pThis->cr[0x0d] | (pThis->cr[0x0c] << 8); /* line compare */ - line_compare = s->cr[0x18] | - ((s->cr[0x07] & 0x10) << 4) | - ((s->cr[0x09] & 0x40) << 3); + line_compare = pThis->cr[0x18] | + ((pThis->cr[0x07] & 0x10) << 4) | + ((pThis->cr[0x09] & 0x40) << 3); } *pline_offset = line_offset; *pstart_addr = start_addr; @@ -1616,19 +1617,19 @@ static void vga_get_offsets(VGAState *s, } /* update start_addr and line_offset. Return TRUE if modified */ -static bool update_basic_params(VGAState *s) +static bool update_basic_params(PVGASTATE pThis) { bool full_update = false; uint32_t start_addr, line_offset, line_compare; - s->get_offsets(s, &line_offset, &start_addr, &line_compare); + pThis->get_offsets(pThis, &line_offset, &start_addr, &line_compare); - if (line_offset != s->line_offset || - start_addr != s->start_addr || - line_compare != s->line_compare) { - s->line_offset = line_offset; - s->start_addr = start_addr; - s->line_compare = line_compare; + if (line_offset != pThis->line_offset || + start_addr != pThis->start_addr || + line_compare != pThis->line_compare) { + pThis->line_offset = line_offset; + pThis->start_addr = start_addr; + pThis->line_compare = line_compare; full_update = true; } return full_update; @@ -1695,7 +1696,7 @@ static const uint8_t cursor_glyph[32 * 4] = { * - underline * - flashing */ -static int vga_draw_text(VGAState *s, bool full_update, bool fFailOnResize, bool reset_dirty) +static int vga_draw_text(PVGASTATE pThis, bool full_update, bool fFailOnResize, bool reset_dirty) { int cx, cy, cheight, cw, ch, cattr, height, width, ch_attr; int cx_min, cx_max, linesize, x_incr; @@ -1709,54 +1710,54 @@ static int vga_draw_text(VGAState *s, bool full_update, bool fFailOnResize, bool vga_draw_glyph8_func *vga_draw_glyph8; vga_draw_glyph9_func *vga_draw_glyph9; - full_update |= update_palette16(s); - palette = s->last_palette; + full_update |= update_palette16(pThis); + palette = pThis->last_palette; /* compute font data address (in plane 2) */ - v = s->sr[3]; + v = pThis->sr[3]; offset = (((v >> 4) & 1) | ((v << 1) & 6)) * 8192 * 4 + 2; - if (offset != s->font_offsets[0]) { - s->font_offsets[0] = offset; + if (offset != pThis->font_offsets[0]) { + pThis->font_offsets[0] = offset; full_update = true; } - font_base[0] = s->CTX_SUFF(vram_ptr) + offset; + font_base[0] = pThis->CTX_SUFF(vram_ptr) + offset; offset = (((v >> 5) & 1) | ((v >> 1) & 6)) * 8192 * 4 + 2; - font_base[1] = s->CTX_SUFF(vram_ptr) + offset; - if (offset != s->font_offsets[1]) { - s->font_offsets[1] = offset; + font_base[1] = pThis->CTX_SUFF(vram_ptr) + offset; + if (offset != pThis->font_offsets[1]) { + pThis->font_offsets[1] = offset; full_update = true; } - if (s->plane_updated & (1 << 2)) { + if (pThis->plane_updated & (1 << 2)) { /* if the plane 2 was modified since the last display, it indicates the font may have been modified */ - s->plane_updated = 0; + pThis->plane_updated = 0; full_update = true; } - full_update |= update_basic_params(s); + full_update |= update_basic_params(pThis); - line_offset = s->line_offset; - s1 = s->CTX_SUFF(vram_ptr) + (s->start_addr * 8); /** @todo r=bird: Add comment why we do *8 instead of *4, it's not so obvious... */ + line_offset = pThis->line_offset; + s1 = pThis->CTX_SUFF(vram_ptr) + (pThis->start_addr * 8); /** @todo r=bird: Add comment why we do *8 instead of *4, it's not so obvious... */ /* double scanning - not for 9-wide modes */ - dscan = (s->cr[9] >> 7) & 1; + dscan = (pThis->cr[9] >> 7) & 1; /* total width & height */ - cheight = (s->cr[9] & 0x1f) + 1; + cheight = (pThis->cr[9] & 0x1f) + 1; cw = 8; - if (!(s->sr[1] & 0x01)) + if (!(pThis->sr[1] & 0x01)) cw = 9; - if (s->sr[1] & 0x08) + if (pThis->sr[1] & 0x08) cw = 16; /* NOTE: no 18 pixel wide */ - x_incr = cw * ((s->pDrv->cBits + 7) >> 3); - width = (s->cr[0x01] + 1); - if (s->cr[0x06] == 100) { + x_incr = cw * ((pThis->pDrv->cBits + 7) >> 3); + width = (pThis->cr[0x01] + 1); + if (pThis->cr[0x06] == 100) { /* ugly hack for CGA 160x100x16 - explain me the logic */ height = 100; } else { - height = s->cr[0x12] | - ((s->cr[0x07] & 0x02) << 7) | - ((s->cr[0x07] & 0x40) << 3); + height = pThis->cr[0x12] | + ((pThis->cr[0x07] & 0x02) << 7) | + ((pThis->cr[0x07] & 0x40) << 3); height = (height + 1) / cheight; } if ((height * width) > CH_ATTR_SIZE) { @@ -1764,56 +1765,56 @@ static int vga_draw_text(VGAState *s, bool full_update, bool fFailOnResize, bool return VINF_SUCCESS; } - if (width != (int)s->last_width || height != (int)s->last_height || - cw != s->last_cw || cheight != s->last_ch) { + if (width != (int)pThis->last_width || height != (int)pThis->last_height || + cw != pThis->last_cw || cheight != pThis->last_ch) { if (fFailOnResize) { /* The caller does not want to call the pfnResize. */ return VERR_TRY_AGAIN; } - s->last_scr_width = width * cw; - s->last_scr_height = height * cheight; + pThis->last_scr_width = width * cw; + pThis->last_scr_height = height * cheight; /* For text modes the direct use of guest VRAM is not implemented, so bpp and cbLine are 0 here. */ - int rc = s->pDrv->pfnResize(s->pDrv, 0, NULL, 0, s->last_scr_width, s->last_scr_height); - s->last_width = width; - s->last_height = height; - s->last_ch = cheight; - s->last_cw = cw; + int rc = pThis->pDrv->pfnResize(pThis->pDrv, 0, NULL, 0, pThis->last_scr_width, pThis->last_scr_height); + pThis->last_width = width; + pThis->last_height = height; + pThis->last_ch = cheight; + pThis->last_cw = cw; full_update = true; if (rc == VINF_VGA_RESIZE_IN_PROGRESS) return rc; AssertRC(rc); } - cursor_offset = ((s->cr[0x0e] << 8) | s->cr[0x0f]) - s->start_addr; - if (cursor_offset != s->cursor_offset || - s->cr[0xa] != s->cursor_start || - s->cr[0xb] != s->cursor_end) { + cursor_offset = ((pThis->cr[0x0e] << 8) | pThis->cr[0x0f]) - pThis->start_addr; + if (cursor_offset != pThis->cursor_offset || + pThis->cr[0xa] != pThis->cursor_start || + pThis->cr[0xb] != pThis->cursor_end) { /* if the cursor position changed, we update the old and new chars */ - if (s->cursor_offset < CH_ATTR_SIZE) - s->last_ch_attr[s->cursor_offset] = ~0; + if (pThis->cursor_offset < CH_ATTR_SIZE) + pThis->last_ch_attr[pThis->cursor_offset] = ~0; if (cursor_offset < CH_ATTR_SIZE) - s->last_ch_attr[cursor_offset] = ~0; - s->cursor_offset = cursor_offset; - s->cursor_start = s->cr[0xa]; - s->cursor_end = s->cr[0xb]; + pThis->last_ch_attr[cursor_offset] = ~0; + pThis->cursor_offset = cursor_offset; + pThis->cursor_start = pThis->cr[0xa]; + pThis->cursor_end = pThis->cr[0xb]; } - cursor_ptr = s->CTX_SUFF(vram_ptr) + (s->start_addr + cursor_offset) * 8; - depth_index = get_depth_index(s->pDrv->cBits); + cursor_ptr = pThis->CTX_SUFF(vram_ptr) + (pThis->start_addr + cursor_offset) * 8; + depth_index = get_depth_index(pThis->pDrv->cBits); if (cw == 16) vga_draw_glyph8 = vga_draw_glyph16_table[depth_index]; else vga_draw_glyph8 = vga_draw_glyph8_table[depth_index]; vga_draw_glyph9 = vga_draw_glyph9_table[depth_index]; - dest = s->pDrv->pu8Data; - linesize = s->pDrv->cbScanline; - ch_attr_ptr = s->last_ch_attr; + dest = pThis->pDrv->pu8Data; + linesize = pThis->pDrv->cbScanline; + ch_attr_ptr = pThis->last_ch_attr; cy_start = -1; cx_max_upd = -1; cx_min_upd = width; - for(cy = 0; cy < height; cy = cy + (1 << dscan)) { + for(cy = 0; cy < (height - dscan); cy = cy + (1 << dscan)) { d1 = dest; src = s1; cx_min = width; @@ -1839,21 +1840,23 @@ static int vga_draw_text(VGAState *s, bool full_update, bool fFailOnResize, bool bgcol = palette[cattr >> 4]; fgcol = palette[cattr & 0x0f]; if (cw != 9) { - vga_draw_glyph8(d1, linesize, - font_ptr, cheight, fgcol, bgcol, dscan); + if (pThis->fRenderVRAM) + vga_draw_glyph8(d1, linesize, + font_ptr, cheight, fgcol, bgcol, dscan); } else { dup9 = 0; - if (ch >= 0xb0 && ch <= 0xdf && (s->ar[0x10] & 0x04)) + if (ch >= 0xb0 && ch <= 0xdf && (pThis->ar[0x10] & 0x04)) dup9 = 1; - vga_draw_glyph9(d1, linesize, - font_ptr, cheight, fgcol, bgcol, dup9); + if (pThis->fRenderVRAM) + vga_draw_glyph9(d1, linesize, + font_ptr, cheight, fgcol, bgcol, dup9); } if (src == cursor_ptr && - !(s->cr[0x0a] & 0x20)) { + !(pThis->cr[0x0a] & 0x20)) { int line_start, line_last, h; /* draw the cursor */ - line_start = s->cr[0x0a] & 0x1f; - line_last = s->cr[0x0b] & 0x1f; + line_start = pThis->cr[0x0a] & 0x1f; + line_last = pThis->cr[0x0b] & 0x1f; /* XXX: check that */ if (line_last > cheight - 1) line_last = cheight - 1; @@ -1861,11 +1864,13 @@ static int vga_draw_text(VGAState *s, bool full_update, bool fFailOnResize, bool h = line_last - line_start + 1; d = d1 + (linesize * line_start << dscan); if (cw != 9) { - vga_draw_glyph8(d, linesize, - cursor_glyph, h, fgcol, bgcol, dscan); + if (pThis->fRenderVRAM) + vga_draw_glyph8(d, linesize, + cursor_glyph, h, fgcol, bgcol, dscan); } else { - vga_draw_glyph9(d, linesize, - cursor_glyph, h, fgcol, bgcol, 1); + if (pThis->fRenderVRAM) + vga_draw_glyph9(d, linesize, + cursor_glyph, h, fgcol, bgcol, 1); } } } @@ -1884,8 +1889,8 @@ static int vga_draw_text(VGAState *s, bool full_update, bool fFailOnResize, bool cx_max_upd = cx_max; } else if (cy_start >= 0) { /* Flush updates to display. */ - s->pDrv->pfnUpdateRect(s->pDrv, cx_min_upd * cw, cy_start * cheight, - (cx_max_upd - cx_min_upd + 1) * cw, (cy - cy_start) * cheight); + pThis->pDrv->pfnUpdateRect(pThis->pDrv, cx_min_upd * cw, cy_start * cheight, + (cx_max_upd - cx_min_upd + 1) * cw, (cy - cy_start) * cheight); cy_start = -1; cx_max_upd = -1; cx_min_upd = width; @@ -1895,8 +1900,8 @@ static int vga_draw_text(VGAState *s, bool full_update, bool fFailOnResize, bool } if (cy_start >= 0) /* Flush any remaining changes to display. */ - s->pDrv->pfnUpdateRect(s->pDrv, cx_min_upd * cw, cy_start * cheight, - (cx_max_upd - cx_min_upd + 1) * cw, (cy - cy_start) * cheight); + pThis->pDrv->pfnUpdateRect(pThis->pDrv, cx_min_upd * cw, cy_start * cheight, + (cx_max_upd - cx_min_upd + 1) * cw, (cy - cy_start) * cheight); return VINF_SUCCESS; } @@ -1966,12 +1971,12 @@ static vga_draw_line_func *vga_draw_line_table[4 * VGA_DRAW_LINE_NB] = { vga_draw_line32_32, }; -static int vga_get_bpp(VGAState *s) +static int vga_get_bpp(PVGASTATE pThis) { int ret; #ifdef CONFIG_BOCHS_VBE - if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { - ret = s->vbe_regs[VBE_DISPI_INDEX_BPP]; + if (pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { + ret = pThis->vbe_regs[VBE_DISPI_INDEX_BPP]; } else #endif { @@ -1980,21 +1985,21 @@ static int vga_get_bpp(VGAState *s) return ret; } -static void vga_get_resolution(VGAState *s, int *pwidth, int *pheight) +static void vga_get_resolution(PVGASTATE pThis, int *pwidth, int *pheight) { int width, height; #ifdef CONFIG_BOCHS_VBE - if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { - width = s->vbe_regs[VBE_DISPI_INDEX_XRES]; - height = RT_MIN(s->vbe_regs[VBE_DISPI_INDEX_YRES], - s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT]); + if (pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { + width = pThis->vbe_regs[VBE_DISPI_INDEX_XRES]; + height = RT_MIN(pThis->vbe_regs[VBE_DISPI_INDEX_YRES], + pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT]); } else #endif { - width = (s->cr[0x01] + 1) * 8; - height = s->cr[0x12] | - ((s->cr[0x07] & 0x02) << 7) | - ((s->cr[0x07] & 0x40) << 3); + width = (pThis->cr[0x01] + 1) * 8; + height = pThis->cr[0x12] | + ((pThis->cr[0x07] & 0x02) << 7) | + ((pThis->cr[0x07] & 0x40) << 3); height = (height + 1); } *pwidth = width; @@ -2009,19 +2014,19 @@ static void vga_get_resolution(VGAState *s, int *pwidth, int *pheight) * * @returns VINF_SUCCESS on success. * @returns VINF_VGA_RESIZE_IN_PROGRESS if the operation wasn't complete. - * @param s Pointer to the vga status. + * @param pThis Pointer to the vga state. * @param cx The width. * @param cy The height. */ -static int vga_resize_graphic(VGAState *s, int cx, int cy) +static int vga_resize_graphic(PVGASTATE pThis, int cx, int cy) { - const unsigned cBits = s->get_bpp(s); + const unsigned cBits = pThis->get_bpp(pThis); int rc; AssertReturn(cx, VERR_INVALID_PARAMETER); AssertReturn(cy, VERR_INVALID_PARAMETER); - AssertPtrReturn(s, VERR_INVALID_POINTER); - AssertReturn(s->line_offset, VERR_INTERNAL_ERROR); + AssertPtrReturn(pThis, VERR_INVALID_POINTER); + AssertReturn(pThis->line_offset, VERR_INTERNAL_ERROR); #if 0 //def VBOX_WITH_VDMA /* @todo: we get a second resize here when VBVA is on, while we actually should not */ @@ -2031,16 +2036,16 @@ static int vga_resize_graphic(VGAState *s, int cx, int cy) * event and generally only pfnVBVAxxx calls should be used with HGSMI + VBVA * * The reason for doing this for WDDM driver only now is to avoid regressions of the current code */ - PVBOXVDMAHOST pVdma = s->pVdma; + PVBOXVDMAHOST pVdma = pThis->pVdma; if (pVdma && vboxVDMAIsEnabled(pVdma)) rc = VINF_SUCCESS; else #endif { /* Skip the resize if the values are not valid. */ - if (s->start_addr * 4 + s->line_offset * cy < s->vram_size) + if (pThis->start_addr * 4 + pThis->line_offset * cy < pThis->vram_size) /* Take into account the programmed start address (in DWORDs) of the visible screen. */ - rc = s->pDrv->pfnResize(s->pDrv, cBits, s->CTX_SUFF(vram_ptr) + s->start_addr * 4, s->line_offset, cx, cy); + rc = pThis->pDrv->pfnResize(pThis->pDrv, cBits, pThis->CTX_SUFF(vram_ptr) + pThis->start_addr * 4, pThis->line_offset, cx, cy); else { /* Change nothing in the VGA state. Lets hope the guest will eventually programm correct values. */ @@ -2049,36 +2054,213 @@ static int vga_resize_graphic(VGAState *s, int cx, int cy) } /* last stuff */ - s->last_bpp = cBits; - s->last_scr_width = cx; - s->last_scr_height = cy; - s->last_width = cx; - s->last_height = cy; + pThis->last_bpp = cBits; + pThis->last_scr_width = cx; + pThis->last_scr_height = cy; + pThis->last_width = cx; + pThis->last_height = cy; if (rc == VINF_VGA_RESIZE_IN_PROGRESS) return rc; AssertRC(rc); /* update palette */ - switch (s->pDrv->cBits) + switch (pThis->pDrv->cBits) { - case 32: s->rgb_to_pixel = rgb_to_pixel32_dup; break; + case 32: pThis->rgb_to_pixel = rgb_to_pixel32_dup; break; case 16: - default: s->rgb_to_pixel = rgb_to_pixel16_dup; break; - case 15: s->rgb_to_pixel = rgb_to_pixel15_dup; break; - case 8: s->rgb_to_pixel = rgb_to_pixel8_dup; break; - } - if (s->shift_control == 0) - update_palette16(s); - else if (s->shift_control == 1) - update_palette16(s); + default: pThis->rgb_to_pixel = rgb_to_pixel16_dup; break; + case 15: pThis->rgb_to_pixel = rgb_to_pixel15_dup; break; + case 8: pThis->rgb_to_pixel = rgb_to_pixel8_dup; break; + } + if (pThis->shift_control == 0) + update_palette16(pThis); + else if (pThis->shift_control == 1) + update_palette16(pThis); + return VINF_SUCCESS; +} + +#ifdef VBOX_WITH_VMSVGA +int vgaR3UpdateDisplay(VGAState *s, unsigned xStart, unsigned yStart, unsigned width, unsigned height) +{ + int bits; + uint32_t v; + vga_draw_line_func *vga_draw_line; + + if (!s->fRenderVRAM) + { + s->pDrv->pfnUpdateRect(s->pDrv, xStart, yStart, width, height); + return VINF_SUCCESS; + } + /* @todo might crash if a blit follows a resolution change very quickly (seen this many times!) */ + + if ( s->svga.iWidth == -1 + || s->svga.iHeight == -1 + || s->svga.iBpp == UINT32_MAX) + { + /* Intermediate state; skip redraws. */ + AssertFailed(); + return VINF_SUCCESS; + } + + switch(s->svga.iBpp) { + default: + case 0: + case 8: + AssertFailed(); + return VERR_NOT_IMPLEMENTED; + case 15: + v = VGA_DRAW_LINE15; + bits = 16; + break; + case 16: + v = VGA_DRAW_LINE16; + bits = 16; + break; + case 24: + v = VGA_DRAW_LINE24; + bits = 24; + break; + case 32: + v = VGA_DRAW_LINE32; + bits = 32; + break; + } + vga_draw_line = vga_draw_line_table[v * 4 + get_depth_index(s->pDrv->cBits)]; + + unsigned offsetSource = (xStart * bits) / 8 + s->svga.cbScanline * yStart; + unsigned offsetDest = (xStart * RT_ALIGN(s->pDrv->cBits, 8)) / 8 + s->pDrv->cbScanline * yStart; + + uint8_t *dest = s->pDrv->pu8Data + offsetDest; + uint8_t *src = s->CTX_SUFF(vram_ptr) + offsetSource; + + for(unsigned y = yStart; y < yStart + height; y++) + { + vga_draw_line(s, dest, src, width); + + dest += s->pDrv->cbScanline; + src += s->svga.cbScanline; + } + s->pDrv->pfnUpdateRect(s->pDrv, xStart, yStart, width, height); + + return VINF_SUCCESS; +} + +/* + * graphic modes + */ +static int vmsvga_draw_graphic(PVGASTATE pThis, bool full_update, bool fFailOnResize, bool reset_dirty) +{ + int y, page_min, page_max, linesize, y_start; + int width, height, page0, page1, bwidth, bits; + int disp_width; + uint8_t *d; + uint32_t v, addr1, addr; + vga_draw_line_func *vga_draw_line; + + if ( pThis->svga.iWidth == -1 + || pThis->svga.iHeight == -1 + || pThis->svga.iBpp == UINT32_MAX) + { + /* Intermediate state; skip redraws. */ + return VINF_SUCCESS; + } + + width = pThis->svga.iWidth; + height = pThis->svga.iHeight; + + disp_width = width; + + switch(pThis->svga.iBpp) { + default: + case 0: + case 8: + AssertFailed(); + return VERR_NOT_IMPLEMENTED; + case 15: + v = VGA_DRAW_LINE15; + bits = 16; + break; + case 16: + v = VGA_DRAW_LINE16; + bits = 16; + break; + case 24: + v = VGA_DRAW_LINE24; + bits = 24; + break; + case 32: + v = VGA_DRAW_LINE32; + bits = 32; + break; + } + vga_draw_line = vga_draw_line_table[v * 4 + get_depth_index(pThis->pDrv->cBits)]; + + if (pThis->cursor_invalidate) + pThis->cursor_invalidate(pThis); + + addr1 = 0; /* always start at the beginning of the framebuffer */ + bwidth = (width * bits + 7) / 8; /* The visible width of a scanline. */ + y_start = -1; + page_min = 0x7fffffff; + page_max = -1; + d = pThis->pDrv->pu8Data; + linesize = pThis->pDrv->cbScanline; + + for(y = 0; y < height; y++) + { + addr = addr1 + y * bwidth; + + page0 = addr & ~PAGE_OFFSET_MASK; + page1 = (addr + bwidth - 1) & ~PAGE_OFFSET_MASK; + bool update = full_update | vga_is_dirty(pThis, page0) | vga_is_dirty(pThis, page1); + if (page1 - page0 > PAGE_SIZE) + /* if wide line, can use another page */ + update |= vga_is_dirty(pThis, page0 + PAGE_SIZE); + /* explicit invalidation for the hardware cursor */ + update |= (pThis->invalidated_y_table[y >> 5] >> (y & 0x1f)) & 1; + if (update) + { + if (y_start < 0) + y_start = y; + if (page0 < page_min) + page_min = page0; + if (page1 > page_max) + page_max = page1; + if (pThis->fRenderVRAM) + vga_draw_line(pThis, d, pThis->CTX_SUFF(vram_ptr) + addr, width); + if (pThis->cursor_draw_line) + pThis->cursor_draw_line(pThis, d, y); + } else + { + if (y_start >= 0) + { + /* flush to display */ + Log(("Flush to display (%d,%d)(%d,%d)\n", 0, y_start, disp_width, y - y_start)); + pThis->pDrv->pfnUpdateRect(pThis->pDrv, 0, y_start, disp_width, y - y_start); + y_start = -1; + } + } + d += linesize; + } + if (y_start >= 0) + { + /* flush to display */ + Log(("Flush to display (%d,%d)(%d,%d)\n", 0, y_start, disp_width, y - y_start)); + pThis->pDrv->pfnUpdateRect(pThis->pDrv, 0, y_start, disp_width, y - y_start); + } + /* reset modified pages */ + if (page_max != -1 && reset_dirty) + vga_reset_dirty(pThis, page_min, page_max + PAGE_SIZE); + memset(pThis->invalidated_y_table, 0, ((height + 31) >> 5) * 4); return VINF_SUCCESS; } +#endif /* VBOX_WITH_VMSVGA */ /* * graphic modes */ -static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, bool reset_dirty) +static int vga_draw_graphic(PVGASTATE pThis, bool full_update, bool fFailOnResize, bool reset_dirty) { int y1, y2, y, page_min, page_max, linesize, y_start, double_scan; int width, height, shift_control, line_offset, page0, page1, bwidth, bits; @@ -2087,26 +2269,26 @@ static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, b uint32_t v, addr1, addr; vga_draw_line_func *vga_draw_line; - bool offsets_changed = update_basic_params(s); + bool offsets_changed = update_basic_params(pThis); full_update |= offsets_changed; - s->get_resolution(s, &width, &height); + pThis->get_resolution(pThis, &width, &height); disp_width = width; - shift_control = (s->gr[0x05] >> 5) & 3; - double_scan = (s->cr[0x09] >> 7); + shift_control = (pThis->gr[0x05] >> 5) & 3; + double_scan = (pThis->cr[0x09] >> 7); multi_run = double_scan; - if (shift_control != s->shift_control || - double_scan != s->double_scan) { + if (shift_control != pThis->shift_control || + double_scan != pThis->double_scan) { full_update = true; - s->shift_control = shift_control; - s->double_scan = double_scan; + pThis->shift_control = shift_control; + pThis->double_scan = double_scan; } if (shift_control == 0) { - full_update |= update_palette16(s); - if (s->sr[0x01] & 8) { + full_update |= update_palette16(pThis); + if (pThis->sr[0x01] & 8) { v = VGA_DRAW_LINE4D2; disp_width <<= 1; } else { @@ -2114,8 +2296,8 @@ static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, b } bits = 4; } else if (shift_control == 1) { - full_update |= update_palette16(s); - if (s->sr[0x01] & 8) { + full_update |= update_palette16(pThis); + if (pThis->sr[0x01] & 8) { v = VGA_DRAW_LINE2D2; disp_width <<= 1; } else { @@ -2123,15 +2305,15 @@ static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, b } bits = 4; } else { - switch(s->get_bpp(s)) { + switch(pThis->get_bpp(pThis)) { default: case 0: - full_update |= update_palette256(s); + full_update |= update_palette256(pThis); v = VGA_DRAW_LINE8D2; bits = 4; break; case 8: - full_update |= update_palette256(s); + full_update |= update_palette256(pThis); v = VGA_DRAW_LINE8; bits = 8; break; @@ -2153,61 +2335,61 @@ static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, b break; } } - if ( disp_width != (int)s->last_width - || height != (int)s->last_height - || s->get_bpp(s) != (int)s->last_bpp - || (offsets_changed && !s->fRenderVRAM)) + if ( disp_width != (int)pThis->last_width + || height != (int)pThis->last_height + || pThis->get_bpp(pThis) != (int)pThis->last_bpp + || (offsets_changed && !pThis->fRenderVRAM)) { if (fFailOnResize) { /* The caller does not want to call the pfnResize. */ return VERR_TRY_AGAIN; } - int rc = vga_resize_graphic(s, disp_width, height); + int rc = vga_resize_graphic(pThis, disp_width, height); if (rc != VINF_SUCCESS) /* Return any rc, particularly VINF_VGA_RESIZE_IN_PROGRESS, to the caller. */ return rc; full_update = true; } - vga_draw_line = vga_draw_line_table[v * 4 + get_depth_index(s->pDrv->cBits)]; + vga_draw_line = vga_draw_line_table[v * 4 + get_depth_index(pThis->pDrv->cBits)]; - if (s->cursor_invalidate) - s->cursor_invalidate(s); + if (pThis->cursor_invalidate) + pThis->cursor_invalidate(pThis); - line_offset = s->line_offset; + line_offset = pThis->line_offset; #if 0 Log(("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n", - width, height, v, line_offset, s->cr[9], s->cr[0x17], s->line_compare, s->sr[0x01])); + width, height, v, line_offset, pThis->cr[9], pThis->cr[0x17], pThis->line_compare, pThis->sr[0x01])); #endif - addr1 = (s->start_addr * 4); + addr1 = (pThis->start_addr * 4); bwidth = (width * bits + 7) / 8; /* The visible width of a scanline. */ y_start = -1; page_min = 0x7fffffff; page_max = -1; - d = s->pDrv->pu8Data; - linesize = s->pDrv->cbScanline; + d = pThis->pDrv->pu8Data; + linesize = pThis->pDrv->cbScanline; y1 = 0; - y2 = s->cr[0x09] & 0x1F; /* starting row scan count */ + y2 = pThis->cr[0x09] & 0x1F; /* starting row scan count */ for(y = 0; y < height; y++) { addr = addr1; /* CGA/MDA compatibility. Note that these addresses are all * shifted left by two compared to VGA specs. */ - if (!(s->cr[0x17] & 1)) { + if (!(pThis->cr[0x17] & 1)) { addr = (addr & ~(1 << 15)) | ((y1 & 1) << 15); } - if (!(s->cr[0x17] & 2)) { + if (!(pThis->cr[0x17] & 2)) { addr = (addr & ~(1 << 16)) | ((y1 & 2) << 15); } page0 = addr & TARGET_PAGE_MASK; page1 = (addr + bwidth - 1) & TARGET_PAGE_MASK; - bool update = full_update | vga_is_dirty(s, page0) | vga_is_dirty(s, page1); + bool update = full_update | vga_is_dirty(pThis, page0) | vga_is_dirty(pThis, page1); if (page1 - page0 > TARGET_PAGE_SIZE) { /* if wide line, can use another page */ - update |= vga_is_dirty(s, page0 + TARGET_PAGE_SIZE); + update |= vga_is_dirty(pThis, page0 + TARGET_PAGE_SIZE); } /* explicit invalidation for the hardware cursor */ - update |= (s->invalidated_y_table[y >> 5] >> (y & 0x1f)) & 1; + update |= (pThis->invalidated_y_table[y >> 5] >> (y & 0x1f)) & 1; if (update) { if (y_start < 0) y_start = y; @@ -2215,14 +2397,14 @@ static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, b page_min = page0; if (page1 > page_max) page_max = page1; - if (s->fRenderVRAM) - vga_draw_line(s, d, s->CTX_SUFF(vram_ptr) + addr, width); - if (s->cursor_draw_line) - s->cursor_draw_line(s, d, y); + if (pThis->fRenderVRAM) + vga_draw_line(pThis, d, pThis->CTX_SUFF(vram_ptr) + addr, width); + if (pThis->cursor_draw_line) + pThis->cursor_draw_line(pThis, d, y); } else { if (y_start >= 0) { /* flush to display */ - s->pDrv->pfnUpdateRect(s->pDrv, 0, y_start, disp_width, y - y_start); + pThis->pDrv->pfnUpdateRect(pThis->pDrv, 0, y_start, disp_width, y - y_start); y_start = -1; } } @@ -2231,7 +2413,7 @@ static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, b multi_run = double_scan; if (y2 == 0) { - y2 = s->cr[0x09] & 0x1F; + y2 = pThis->cr[0x09] & 0x1F; addr1 += line_offset; } else { --y2; @@ -2240,45 +2422,48 @@ static int vga_draw_graphic(VGAState *s, bool full_update, bool fFailOnResize, b multi_run--; } /* line compare acts on the displayed lines */ - if ((uint32_t)y == s->line_compare) + if ((uint32_t)y == pThis->line_compare) addr1 = 0; d += linesize; } if (y_start >= 0) { /* flush to display */ - s->pDrv->pfnUpdateRect(s->pDrv, 0, y_start, disp_width, y - y_start); + pThis->pDrv->pfnUpdateRect(pThis->pDrv, 0, y_start, disp_width, y - y_start); } /* reset modified pages */ if (page_max != -1 && reset_dirty) { - vga_reset_dirty(s, page_min, page_max + TARGET_PAGE_SIZE); + vga_reset_dirty(pThis, page_min, page_max + TARGET_PAGE_SIZE); } - memset(s->invalidated_y_table, 0, ((height + 31) >> 5) * 4); + memset(pThis->invalidated_y_table, 0, ((height + 31) >> 5) * 4); return VINF_SUCCESS; } -static void vga_draw_blank(VGAState *s, int full_update) +static void vga_draw_blank(PVGASTATE pThis, int full_update) { int i, w, val; uint8_t *d; - uint32_t cbScanline = s->pDrv->cbScanline; + uint32_t cbScanline = pThis->pDrv->cbScanline; - if (s->pDrv->pu8Data == s->vram_ptrR3) /* Do not clear the VRAM itself. */ + if (pThis->pDrv->pu8Data == pThis->vram_ptrR3) /* Do not clear the VRAM itself. */ return; if (!full_update) return; - if (s->last_scr_width <= 0 || s->last_scr_height <= 0) + if (pThis->last_scr_width <= 0 || pThis->last_scr_height <= 0) return; - if (s->pDrv->cBits == 8) - val = s->rgb_to_pixel(0, 0, 0); + if (pThis->pDrv->cBits == 8) + val = pThis->rgb_to_pixel(0, 0, 0); else val = 0; - w = s->last_scr_width * ((s->pDrv->cBits + 7) >> 3); - d = s->pDrv->pu8Data; - for(i = 0; i < (int)s->last_scr_height; i++) { - memset(d, val, w); - d += cbScanline; + w = pThis->last_scr_width * ((pThis->pDrv->cBits + 7) >> 3); + d = pThis->pDrv->pu8Data; + if (pThis->fRenderVRAM) + { + for(i = 0; i < (int)pThis->last_scr_height; i++) { + memset(d, val, w); + d += cbScanline; + } } - s->pDrv->pfnUpdateRect(s->pDrv, 0, 0, s->last_scr_width, s->last_scr_height); + pThis->pDrv->pfnUpdateRect(pThis->pDrv, 0, 0, pThis->last_scr_width, pThis->last_scr_height); } static DECLCALLBACK(void) voidUpdateRect(PPDMIDISPLAYCONNECTOR pInterface, uint32_t x, uint32_t y, uint32_t cx, uint32_t cy) @@ -2290,28 +2475,31 @@ static DECLCALLBACK(void) voidUpdateRect(PPDMIDISPLAYCONNECTOR pInterface, uint3 #define GMODE_TEXT 0 #define GMODE_GRAPH 1 #define GMODE_BLANK 2 +#ifdef VBOX_WITH_VMSVGA +#define GMODE_SVGA 3 +#endif -static int vga_update_display(PVGASTATE s, bool fUpdateAll, bool fFailOnResize, bool reset_dirty) +static int vga_update_display(PVGASTATE pThis, bool fUpdateAll, bool fFailOnResize, bool reset_dirty) { int rc = VINF_SUCCESS; int graphic_mode; - if (s->pDrv->cBits == 0) { + if (pThis->pDrv->cBits == 0) { /* nothing to do */ } else { - switch(s->pDrv->cBits) { + switch(pThis->pDrv->cBits) { case 8: - s->rgb_to_pixel = rgb_to_pixel8_dup; + pThis->rgb_to_pixel = rgb_to_pixel8_dup; break; case 15: - s->rgb_to_pixel = rgb_to_pixel15_dup; + pThis->rgb_to_pixel = rgb_to_pixel15_dup; break; default: case 16: - s->rgb_to_pixel = rgb_to_pixel16_dup; + pThis->rgb_to_pixel = rgb_to_pixel16_dup; break; case 32: - s->rgb_to_pixel = rgb_to_pixel32_dup; + pThis->rgb_to_pixel = rgb_to_pixel32_dup; break; } @@ -2330,131 +2518,147 @@ static int vga_update_display(PVGASTATE s, bool fUpdateAll, bool fFailOnResize, /* Detect the "screen blank" conditions. */ int fBlank = 0; - if (!(s->ar_index & 0x20) || (s->sr[0x01] & 0x20)) { + if (!(pThis->ar_index & 0x20) || (pThis->sr[0x01] & 0x20)) { fBlank = 1; } if (fBlank) { /* Provide a void pfnUpdateRect callback. */ - if (s->pDrv) { - pfnUpdateRect = s->pDrv->pfnUpdateRect; - s->pDrv->pfnUpdateRect = voidUpdateRect; + if (pThis->pDrv) { + pfnUpdateRect = pThis->pDrv->pfnUpdateRect; + pThis->pDrv->pfnUpdateRect = voidUpdateRect; } } /* Do a complete redraw, which will pick up a new screen resolution. */ - if (s->gr[6] & 1) { - s->graphic_mode = GMODE_GRAPH; - rc = vga_draw_graphic(s, 1, false, reset_dirty); +#ifdef VBOX_WITH_VMSVGA + if (pThis->svga.fEnabled) { + pThis->graphic_mode = GMODE_SVGA; + rc = vmsvga_draw_graphic(pThis, 1, false, reset_dirty); + } + else +#endif + if (pThis->gr[6] & 1) { + pThis->graphic_mode = GMODE_GRAPH; + rc = vga_draw_graphic(pThis, 1, false, reset_dirty); } else { - s->graphic_mode = GMODE_TEXT; - rc = vga_draw_text(s, 1, false, reset_dirty); + pThis->graphic_mode = GMODE_TEXT; + rc = vga_draw_text(pThis, 1, false, reset_dirty); } if (fBlank) { /* Set the current mode and restore the callback. */ - s->graphic_mode = GMODE_BLANK; - if (s->pDrv) { - s->pDrv->pfnUpdateRect = pfnUpdateRect; + pThis->graphic_mode = GMODE_BLANK; + if (pThis->pDrv) { + pThis->pDrv->pfnUpdateRect = pfnUpdateRect; } } return rc; } - if (!(s->ar_index & 0x20) || (s->sr[0x01] & 0x20)) { +#ifdef VBOX_WITH_VMSVGA + if (pThis->svga.fEnabled) { + graphic_mode = GMODE_SVGA; + } + else +#endif + if (!(pThis->ar_index & 0x20) || (pThis->sr[0x01] & 0x20)) { graphic_mode = GMODE_BLANK; } else { - graphic_mode = s->gr[6] & 1; + graphic_mode = pThis->gr[6] & 1; } - bool full_update = graphic_mode != s->graphic_mode; + bool full_update = graphic_mode != pThis->graphic_mode; if (full_update) { - s->graphic_mode = graphic_mode; + pThis->graphic_mode = graphic_mode; } switch(graphic_mode) { case GMODE_TEXT: - rc = vga_draw_text(s, full_update, fFailOnResize, reset_dirty); + rc = vga_draw_text(pThis, full_update, fFailOnResize, reset_dirty); break; case GMODE_GRAPH: - rc = vga_draw_graphic(s, full_update, fFailOnResize, reset_dirty); + rc = vga_draw_graphic(pThis, full_update, fFailOnResize, reset_dirty); + break; +#ifdef VBOX_WITH_VMSVGA + case GMODE_SVGA: + rc = vmsvga_draw_graphic(pThis, full_update, fFailOnResize, reset_dirty); break; +#endif case GMODE_BLANK: default: - vga_draw_blank(s, full_update); + vga_draw_blank(pThis, full_update); break; } } return rc; } -static void vga_save(QEMUFile *f, void *opaque) +static void vga_save(QEMUFile *f, PVGASTATE pThis) { - VGAState *s = (VGAState*)opaque; int i; - qemu_put_be32s(f, &s->latch); - qemu_put_8s(f, &s->sr_index); - qemu_put_buffer(f, s->sr, 8); - qemu_put_8s(f, &s->gr_index); - qemu_put_buffer(f, s->gr, 16); - qemu_put_8s(f, &s->ar_index); - qemu_put_buffer(f, s->ar, 21); - qemu_put_be32s(f, &s->ar_flip_flop); - qemu_put_8s(f, &s->cr_index); - qemu_put_buffer(f, s->cr, 256); - qemu_put_8s(f, &s->msr); - qemu_put_8s(f, &s->fcr); - qemu_put_8s(f, &s->st00); - qemu_put_8s(f, &s->st01); - - qemu_put_8s(f, &s->dac_state); - qemu_put_8s(f, &s->dac_sub_index); - qemu_put_8s(f, &s->dac_read_index); - qemu_put_8s(f, &s->dac_write_index); - qemu_put_buffer(f, s->dac_cache, 3); - qemu_put_buffer(f, s->palette, 768); - - qemu_put_be32s(f, &s->bank_offset); + qemu_put_be32s(f, &pThis->latch); + qemu_put_8s(f, &pThis->sr_index); + qemu_put_buffer(f, pThis->sr, 8); + qemu_put_8s(f, &pThis->gr_index); + qemu_put_buffer(f, pThis->gr, 16); + qemu_put_8s(f, &pThis->ar_index); + qemu_put_buffer(f, pThis->ar, 21); + qemu_put_be32s(f, &pThis->ar_flip_flop); + qemu_put_8s(f, &pThis->cr_index); + qemu_put_buffer(f, pThis->cr, 256); + qemu_put_8s(f, &pThis->msr); + qemu_put_8s(f, &pThis->fcr); + qemu_put_8s(f, &pThis->st00); + qemu_put_8s(f, &pThis->st01); + + qemu_put_8s(f, &pThis->dac_state); + qemu_put_8s(f, &pThis->dac_sub_index); + qemu_put_8s(f, &pThis->dac_read_index); + qemu_put_8s(f, &pThis->dac_write_index); + qemu_put_buffer(f, pThis->dac_cache, 3); + qemu_put_buffer(f, pThis->palette, 768); + + qemu_put_be32s(f, &pThis->bank_offset); #ifdef CONFIG_BOCHS_VBE qemu_put_byte(f, 1); - qemu_put_be16s(f, &s->vbe_index); + qemu_put_be16s(f, &pThis->vbe_index); for(i = 0; i < VBE_DISPI_INDEX_NB_SAVED; i++) - qemu_put_be16s(f, &s->vbe_regs[i]); - qemu_put_be32s(f, &s->vbe_start_addr); - qemu_put_be32s(f, &s->vbe_line_offset); + qemu_put_be16s(f, &pThis->vbe_regs[i]); + qemu_put_be32s(f, &pThis->vbe_start_addr); + qemu_put_be32s(f, &pThis->vbe_line_offset); #else qemu_put_byte(f, 0); #endif } -static int vga_load(QEMUFile *f, void *opaque, int version_id) +static int vga_load(QEMUFile *f, PVGASTATE pThis, int version_id) { - VGAState *s = (VGAState*)opaque; int is_vbe, i; uint32_t u32Dummy; - qemu_get_be32s(f, &s->latch); - qemu_get_8s(f, &s->sr_index); - qemu_get_buffer(f, s->sr, 8); - qemu_get_8s(f, &s->gr_index); - qemu_get_buffer(f, s->gr, 16); - qemu_get_8s(f, &s->ar_index); - qemu_get_buffer(f, s->ar, 21); - qemu_get_be32s(f, (uint32_t *)&s->ar_flip_flop); - qemu_get_8s(f, &s->cr_index); - qemu_get_buffer(f, s->cr, 256); - qemu_get_8s(f, &s->msr); - qemu_get_8s(f, &s->fcr); - qemu_get_8s(f, &s->st00); - qemu_get_8s(f, &s->st01); - - qemu_get_8s(f, &s->dac_state); - qemu_get_8s(f, &s->dac_sub_index); - qemu_get_8s(f, &s->dac_read_index); - qemu_get_8s(f, &s->dac_write_index); - qemu_get_buffer(f, s->dac_cache, 3); - qemu_get_buffer(f, s->palette, 768); - - qemu_get_be32s(f, (uint32_t *)&s->bank_offset); + qemu_get_be32s(f, &pThis->latch); + qemu_get_8s(f, &pThis->sr_index); + qemu_get_buffer(f, pThis->sr, 8); + qemu_get_8s(f, &pThis->gr_index); + qemu_get_buffer(f, pThis->gr, 16); + qemu_get_8s(f, &pThis->ar_index); + qemu_get_buffer(f, pThis->ar, 21); + qemu_get_be32s(f, (uint32_t *)&pThis->ar_flip_flop); + qemu_get_8s(f, &pThis->cr_index); + qemu_get_buffer(f, pThis->cr, 256); + qemu_get_8s(f, &pThis->msr); + qemu_get_8s(f, &pThis->fcr); + qemu_get_8s(f, &pThis->st00); + qemu_get_8s(f, &pThis->st01); + + qemu_get_8s(f, &pThis->dac_state); + qemu_get_8s(f, &pThis->dac_sub_index); + qemu_get_8s(f, &pThis->dac_read_index); + qemu_get_8s(f, &pThis->dac_write_index); + qemu_get_buffer(f, pThis->dac_cache, 3); + qemu_get_buffer(f, pThis->palette, 768); + + qemu_get_be32s(f, (uint32_t *)&pThis->bank_offset); is_vbe = qemu_get_byte(f); #ifdef CONFIG_BOCHS_VBE if (!is_vbe) @@ -2462,16 +2666,16 @@ static int vga_load(QEMUFile *f, void *opaque, int version_id) Log(("vga_load: !is_vbe !!\n")); return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; } - qemu_get_be16s(f, &s->vbe_index); + qemu_get_be16s(f, &pThis->vbe_index); for(i = 0; i < VBE_DISPI_INDEX_NB_SAVED; i++) - qemu_get_be16s(f, &s->vbe_regs[i]); + qemu_get_be16s(f, &pThis->vbe_regs[i]); if (version_id <= VGA_SAVEDSTATE_VERSION_INV_VHEIGHT) - recalculate_data(s, false); /* <- re-calculate the s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] since it might be invalid */ - qemu_get_be32s(f, &s->vbe_start_addr); - qemu_get_be32s(f, &s->vbe_line_offset); + recalculate_data(pThis, false); /* <- re-calculate the pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] since it might be invalid */ + qemu_get_be32s(f, &pThis->vbe_start_addr); + qemu_get_be32s(f, &pThis->vbe_line_offset); if (version_id < 2) qemu_get_be32s(f, &u32Dummy); - s->vbe_bank_max = (s->vram_size >> 16) - 1; + pThis->vbe_bank_max = (pThis->vram_size >> 16) - 1; #else if (is_vbe) { @@ -2481,7 +2685,7 @@ static int vga_load(QEMUFile *f, void *opaque, int version_id) #endif /* force refresh */ - s->graphic_mode = -1; + pThis->graphic_mode = -1; return 0; } @@ -2521,92 +2725,53 @@ static void vga_init_expand(void) /* -=-=-=-=-=- all contexts -=-=-=-=-=- */ /** - * Port I/O Handler for VGA OUT operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param u32 The value to output. - * @param cb The value size in bytes. + * @callback_method_impl{FNIOMIOPORTOUT,Generic VGA OUT dispatcher.} */ PDMBOTHCBDECL(int) vgaIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) { - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); - - int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_WRITE); - if (rc != VINF_SUCCESS) - return rc; + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); NOREF(pvUser); if (cb == 1) - vga_ioport_write(s, Port, u32); + vga_ioport_write(pThis, Port, u32); else if (cb == 2) { - vga_ioport_write(s, Port, u32 & 0xff); - vga_ioport_write(s, Port + 1, u32 >> 8); + vga_ioport_write(pThis, Port, u32 & 0xff); + vga_ioport_write(pThis, Port + 1, u32 >> 8); } - PDMCritSectLeave(&s->lock); return VINF_SUCCESS; } /** - * Port I/O Handler for VGA IN operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param pu32 Where to store the result. - * @param cb Number of bytes read. + * @callback_method_impl{FNIOMIOPORTOUT,Generic VGA IN dispatcher.} */ PDMBOTHCBDECL(int) vgaIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) { - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); NOREF(pvUser); - int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_READ); - if (rc != VINF_SUCCESS) - return rc; - - rc = VERR_IOM_IOPORT_UNUSED; + int rc = VINF_SUCCESS; if (cb == 1) - { - *pu32 = vga_ioport_read(s, Port); - rc = VINF_SUCCESS; - } + *pu32 = vga_ioport_read(pThis, Port); else if (cb == 2) - { - *pu32 = vga_ioport_read(s, Port) - | (vga_ioport_read(s, Port + 1) << 8); - rc = VINF_SUCCESS; - } - PDMCritSectLeave(&s->lock); + *pu32 = vga_ioport_read(pThis, Port) + | (vga_ioport_read(pThis, Port + 1) << 8); + else + rc = VERR_IOM_IOPORT_UNUSED; return rc; } /** - * Port I/O Handler for VBE OUT operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param u32 The value to output. - * @param cb The value size in bytes. + * @callback_method_impl{FNIOMIOPORTOUT,VBE Data Port OUT handler.} */ PDMBOTHCBDECL(int) vgaIOPortWriteVBEData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) { - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); - - int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_WRITE); - if (rc != VINF_SUCCESS) - return rc; + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); NOREF(pvUser); @@ -2614,41 +2779,33 @@ PDMBOTHCBDECL(int) vgaIOPortWriteVBEData(PPDMDEVINS pDevIns, void *pvUser, RTIOP /* * This has to be done on the host in order to execute the connector callbacks. */ - if ( s->vbe_index == VBE_DISPI_INDEX_ENABLE - || s->vbe_index == VBE_DISPI_INDEX_VBOX_VIDEO) + if ( pThis->vbe_index == VBE_DISPI_INDEX_ENABLE + || pThis->vbe_index == VBE_DISPI_INDEX_VBOX_VIDEO) { Log(("vgaIOPortWriteVBEData: VBE_DISPI_INDEX_ENABLE - Switching to host...\n")); - PDMCritSectLeave(&s->lock); return VINF_IOM_R3_IOPORT_WRITE; } #endif #ifdef VBE_BYTEWISE_IO if (cb == 1) { - if (!s->fWriteVBEData) + if (!pThis->fWriteVBEData) { - if ( (s->vbe_index == VBE_DISPI_INDEX_ENABLE) + if ( (pThis->vbe_index == VBE_DISPI_INDEX_ENABLE) && (u32 & VBE_DISPI_ENABLED)) { - s->fWriteVBEData = false; - rc = vbe_ioport_write_data(s, Port, u32 & 0xFF); - PDMCritSectLeave(&s->lock); - return rc; - } - else - { - s->cbWriteVBEData = u32 & 0xFF; - s->fWriteVBEData = true; - PDMCritSectLeave(&s->lock); - return VINF_SUCCESS; + pThis->fWriteVBEData = false; + return vbe_ioport_write_data(pThis, Port, u32 & 0xFF); } + + pThis->cbWriteVBEData = u32 & 0xFF; + pThis->fWriteVBEData = true; + return VINF_SUCCESS; } - else - { - u32 = (s->cbWriteVBEData << 8) | (u32 & 0xFF); - s->fWriteVBEData = false; - cb = 2; - } + + u32 = (pThis->cbWriteVBEData << 8) | (u32 & 0xFF); + pThis->fWriteVBEData = false; + cb = 2; } #endif if (cb == 2 || cb == 4) @@ -2659,205 +2816,134 @@ PDMBOTHCBDECL(int) vgaIOPortWriteVBEData(PPDMDEVINS pDevIns, void *pvUser, RTIOP // * Since we're not mapping the entire framebuffer any longer that // * has to be done on the host. // */ -// if ( (s->vbe_index == VBE_DISPI_INDEX_ENABLE) +// if ( (pThis->vbe_index == VBE_DISPI_INDEX_ENABLE) // && (u32 & VBE_DISPI_ENABLED)) // { // Log(("vgaIOPortWriteVBEData: VBE_DISPI_INDEX_ENABLE & VBE_DISPI_ENABLED - Switching to host...\n")); // return VINF_IOM_R3_IOPORT_WRITE; // } //#endif - rc = vbe_ioport_write_data(s, Port, u32); - PDMCritSectLeave(&s->lock); - return rc; + return vbe_ioport_write_data(pThis, Port, u32); } - else - AssertMsgFailed(("vgaIOPortWriteVBEData: Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); + AssertMsgFailed(("vgaIOPortWriteVBEData: Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); - PDMCritSectLeave(&s->lock); return VINF_SUCCESS; } /** - * Port I/O Handler for VBE OUT operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param u32 The value to output. - * @param cb The value size in bytes. + * @callback_method_impl{FNIOMIOPORTOUT,VBE Index Port OUT handler.} */ PDMBOTHCBDECL(int) vgaIOPortWriteVBEIndex(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) { - NOREF(pvUser); - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); - - int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_WRITE); - if (rc != VINF_SUCCESS) - return rc; + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); NOREF(pvUser); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); #ifdef VBE_BYTEWISE_IO if (cb == 1) { - if (!s->fWriteVBEIndex) + if (!pThis->fWriteVBEIndex) { - s->cbWriteVBEIndex = u32 & 0x00FF; - s->fWriteVBEIndex = true; - PDMCritSectLeave(&s->lock); - return VINF_SUCCESS; - } - else - { - s->fWriteVBEIndex = false; - vbe_ioport_write_index(s, Port, (s->cbWriteVBEIndex << 8) | (u32 & 0x00FF)); - PDMCritSectLeave(&s->lock); + pThis->cbWriteVBEIndex = u32 & 0x00FF; + pThis->fWriteVBEIndex = true; return VINF_SUCCESS; } + pThis->fWriteVBEIndex = false; + vbe_ioport_write_index(pThis, Port, (pThis->cbWriteVBEIndex << 8) | (u32 & 0x00FF)); + return VINF_SUCCESS; } - else #endif + if (cb == 2) - vbe_ioport_write_index(s, Port, u32); + vbe_ioport_write_index(pThis, Port, u32); else AssertMsgFailed(("vgaIOPortWriteVBEIndex: Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); - PDMCritSectLeave(&s->lock); return VINF_SUCCESS; } /** - * Port I/O Handler for VBE IN operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param pu32 Where to store the result. - * @param cb Number of bytes to read. + * @callback_method_impl{FNIOMIOPORTOUT,VBE Data Port IN handler.} */ PDMBOTHCBDECL(int) vgaIOPortReadVBEData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) { - NOREF(pvUser); - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); NOREF(pvUser); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); - int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_READ); - if (rc != VINF_SUCCESS) - return rc; #ifdef VBE_BYTEWISE_IO if (cb == 1) { - if (!s->fReadVBEData) - { - *pu32 = (vbe_ioport_read_data(s, Port) >> 8) & 0xFF; - s->fReadVBEData = true; - PDMCritSectLeave(&s->lock); - return VINF_SUCCESS; - } - else + if (!pThis->fReadVBEData) { - *pu32 = vbe_ioport_read_data(s, Port) & 0xFF; - s->fReadVBEData = false; - PDMCritSectLeave(&s->lock); + *pu32 = (vbe_ioport_read_data(pThis, Port) >> 8) & 0xFF; + pThis->fReadVBEData = true; return VINF_SUCCESS; } + *pu32 = vbe_ioport_read_data(pThis, Port) & 0xFF; + pThis->fReadVBEData = false; + return VINF_SUCCESS; } - else #endif if (cb == 2) { - *pu32 = vbe_ioport_read_data(s, Port); - PDMCritSectLeave(&s->lock); + *pu32 = vbe_ioport_read_data(pThis, Port); return VINF_SUCCESS; } - else if (cb == 4) + if (cb == 4) { /* Quick hack for getting the vram size. */ - *pu32 = s->vram_size; - PDMCritSectLeave(&s->lock); + *pu32 = pThis->vram_size; return VINF_SUCCESS; } AssertMsgFailed(("vgaIOPortReadVBEData: Port=%#x cb=%d\n", Port, cb)); - PDMCritSectLeave(&s->lock); return VERR_IOM_IOPORT_UNUSED; } /** - * Port I/O Handler for VBE IN operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param pu32 Where to store the result. - * @param cb Number of bytes to read. + * @callback_method_impl{FNIOMIOPORTOUT,VBE Index Port IN handler.} */ PDMBOTHCBDECL(int) vgaIOPortReadVBEIndex(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) { NOREF(pvUser); - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); - - int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_READ); - if (rc != VINF_SUCCESS) - return rc; + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); #ifdef VBE_BYTEWISE_IO if (cb == 1) { - if (!s->fReadVBEIndex) + if (!pThis->fReadVBEIndex) { - *pu32 = (vbe_ioport_read_index(s, Port) >> 8) & 0xFF; - s->fReadVBEIndex = true; - PDMCritSectLeave(&s->lock); - return VINF_SUCCESS; - } - else - { - *pu32 = vbe_ioport_read_index(s, Port) & 0xFF; - s->fReadVBEIndex = false; - PDMCritSectLeave(&s->lock); + *pu32 = (vbe_ioport_read_index(pThis, Port) >> 8) & 0xFF; + pThis->fReadVBEIndex = true; return VINF_SUCCESS; } + *pu32 = vbe_ioport_read_index(pThis, Port) & 0xFF; + pThis->fReadVBEIndex = false; + return VINF_SUCCESS; } - else #endif if (cb == 2) { - *pu32 = vbe_ioport_read_index(s, Port); - PDMCritSectLeave(&s->lock); + *pu32 = vbe_ioport_read_index(pThis, Port); return VINF_SUCCESS; } - PDMCritSectLeave(&s->lock); AssertMsgFailed(("vgaIOPortReadVBEIndex: Port=%#x cb=%d\n", Port, cb)); return VERR_IOM_IOPORT_UNUSED; } #ifdef VBOX_WITH_HGSMI -#ifdef IN_RING3 +# ifdef IN_RING3 /** - * Port I/O Handler for HGSMI OUT operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the operation. - * @param u32 The value to output. - * @param cb The value size in bytes. + * @callback_method_impl{FNIOMIOPORTOUT,HGSMI OUT handler.} */ static DECLCALLBACK(int) vgaR3IOPortHGSMIWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) { + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); LogFlowFunc(("Port 0x%x, u32 0x%x, cb %d\n", Port, u32, cb)); - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); - int rc = PDMCritSectEnter(&s->lock, VERR_SEM_BUSY); - if (rc != VINF_SUCCESS) - return rc; NOREF(pvUser); @@ -2867,103 +2953,89 @@ static DECLCALLBACK(int) vgaR3IOPortHGSMIWrite(PPDMDEVINS pDevIns, void *pvUser, { case VGA_PORT_HGSMI_HOST: /* Host */ { -#if defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_VDMA) || defined(VBOX_WITH_WDDM) - if(u32 == HGSMIOFFSET_VOID) +# if defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_VDMA) || defined(VBOX_WITH_WDDM) + if (u32 == HGSMIOFFSET_VOID) { PDMDevHlpPCISetIrq(pDevIns, 0, PDM_IRQ_LEVEL_LOW); - HGSMIClearHostGuestFlags(s->pHGSMI, HGSMIHOSTFLAGS_IRQ -#ifdef VBOX_VDMA_WITH_WATCHDOG - | HGSMIHOSTFLAGS_WATCHDOG -#endif - | HGSMIHOSTFLAGS_VSYNC - ); + HGSMIClearHostGuestFlags(pThis->pHGSMI, + HGSMIHOSTFLAGS_IRQ +# ifdef VBOX_VDMA_WITH_WATCHDOG + | HGSMIHOSTFLAGS_WATCHDOG +# endif + | HGSMIHOSTFLAGS_VSYNC + ); } else -#endif +# endif { - HGSMIHostWrite(s->pHGSMI, u32); + HGSMIHostWrite(pThis->pHGSMI, u32); } - } break; + break; + } case VGA_PORT_HGSMI_GUEST: /* Guest */ - { - HGSMIGuestWrite(s->pHGSMI, u32); - } break; + HGSMIGuestWrite(pThis->pHGSMI, u32); + break; default: - { -#ifdef DEBUG_sunlover +# ifdef DEBUG_sunlover AssertMsgFailed(("vgaR3IOPortHGSMIWrite: Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); -#endif - } break; +# endif + break; } } else { -#ifdef DEBUG_sunlover +# ifdef DEBUG_sunlover AssertMsgFailed(("vgaR3IOPortHGSMIWrite: Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); -#endif +# endif } - PDMCritSectLeave(&s->lock); return VINF_SUCCESS; } + /** - * Port I/O Handler for HGSMI IN operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the operation. - * @param pu32 Where to store the result. - * @param cb Number of bytes to read. + * @callback_method_impl{FNIOMIOPORTOUT,HGSMI IN handler.} */ static DECLCALLBACK(int) vgaR3IOPortHGSMIRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) { + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); LogFlowFunc(("Port 0x%x, cb %d\n", Port, cb)); - VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); - - int rc = PDMCritSectEnter(&s->lock, VERR_SEM_BUSY); - if (rc != VINF_SUCCESS) - return rc; NOREF(pvUser); + int rc = VINF_SUCCESS; if (cb == 4) { switch (Port) { case VGA_PORT_HGSMI_HOST: /* Host */ - { - *pu32 = HGSMIHostRead(s->pHGSMI); - } break; + *pu32 = HGSMIHostRead(pThis->pHGSMI); + break; case VGA_PORT_HGSMI_GUEST: /* Guest */ - { - *pu32 = HGSMIGuestRead(s->pHGSMI); - } break; + *pu32 = HGSMIGuestRead(pThis->pHGSMI); + break; default: - { -#ifdef DEBUG_sunlover +# ifdef DEBUG_sunlover AssertMsgFailed(("vgaR3IOPortHGSMIRead: Port=%#x cb=%d\n", Port, cb)); -#endif +# endif rc = VERR_IOM_IOPORT_UNUSED; - } break; + break; } } else { -#ifdef DEBUG_sunlover +# ifdef DEBUG_sunlover Log(("vgaR3IOPortHGSMIRead: Port=%#x cb=%d\n", Port, cb)); -#endif +# endif rc = VERR_IOM_IOPORT_UNUSED; } - PDMCritSectLeave(&s->lock); return rc; } -#endif /* IN_RING3 */ +# endif /* IN_RING3 */ #endif /* VBOX_WITH_HGSMI */ @@ -2971,13 +3043,13 @@ static DECLCALLBACK(int) vgaR3IOPortHGSMIRead(PPDMDEVINS pDevIns, void *pvUser, /* -=-=-=-=-=- Guest Context -=-=-=-=-=- */ -/* - * Internal. For use inside VGAGCMemoryFillWrite only. +/** + * @internal. For use inside VGAGCMemoryFillWrite only. * Macro for apply logical operation and bit mask. */ -#define APPLY_LOGICAL_AND_MASK(s, val, bit_mask) \ +#define APPLY_LOGICAL_AND_MASK(pThis, val, bit_mask) \ /* apply logical operation */ \ - switch(s->gr[3] >> 3) \ + switch (pThis->gr[3] >> 3) \ { \ case 0: \ default: \ @@ -2985,19 +3057,19 @@ static DECLCALLBACK(int) vgaR3IOPortHGSMIRead(PPDMDEVINS pDevIns, void *pvUser, break; \ case 1: \ /* and */ \ - val &= s->latch; \ + val &= pThis->latch; \ break; \ case 2: \ /* or */ \ - val |= s->latch; \ + val |= pThis->latch; \ break; \ case 3: \ /* xor */ \ - val ^= s->latch; \ + val ^= pThis->latch; \ break; \ } \ /* apply bit mask */ \ - val = (val & bit_mask) | (s->latch & ~bit_mask) + val = (val & bit_mask) | (pThis->latch & ~bit_mask) /** * Legacy VGA memory (0xa0000 - 0xbffff) write hook, to be called from IOM and from the inside of VGADeviceGC.cpp. @@ -3179,57 +3251,40 @@ static int vgaInternalMMIOFill(PVGASTATE pThis, void *pvUser, RTGCPHYS GCPhysAdd return VINF_SUCCESS; } + /** - * Legacy VGA memory (0xa0000 - 0xbffff) write hook, to be called from IOM and from the inside of VGADeviceGC.cpp. - * This is the advanced version of vga_mem_writeb function. - * - * @returns VBox status code. - * @param pDevIns Pointer device instance. - * @param pvUser User argument - ignored. - * @param GCPhysAddr Physical address of memory to write. - * @param u32Item Data to write, up to 4 bytes. - * @param cbItem Size of data Item, only 1/2/4 bytes is allowed for now. - * @param cItems Number of data items to write. + * @callback_method_impl{FNIOMMMIOFILL, + * Legacy VGA memory (0xa0000 - 0xbffff) write hook, to be called from IOM and + * from the inside of VGADeviceGC.cpp. This is the advanced version of + * vga_mem_writeb function.} */ PDMBOTHCBDECL(int) vgaMMIOFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems) { PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); - int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_MMIO_WRITE); - if (rc != VINF_SUCCESS) - return rc; - - rc = vgaInternalMMIOFill(pThis, pvUser, GCPhysAddr, u32Item, cbItem, cItems); - PDMCritSectLeave(&pThis->lock); - return rc; + return vgaInternalMMIOFill(pThis, pvUser, GCPhysAddr, u32Item, cbItem, cItems); } #undef APPLY_LOGICAL_AND_MASK /** - * Legacy VGA memory (0xa0000 - 0xbffff) read hook, to be called from IOM. - * - * @returns VBox status code. - * @param pDevIns Pointer device instance. - * @param pvUser User argument - ignored. - * @param GCPhysAddr Physical address of memory to read. - * @param pv Where to store read data. - * @param cb Bytes to read. + * @callback_method_impl{FNIOMMMIOREAD, Legacy VGA memory (0xa0000 - 0xbffff) + * read hook, to be called from IOM.} */ PDMBOTHCBDECL(int) vgaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) { PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); STAM_PROFILE_START(&pThis->CTX_MID_Z(Stat,MemoryRead), a); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); NOREF(pvUser); - int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_MMIO_READ); - if (rc != VINF_SUCCESS) - return rc; - + int rc = VINF_SUCCESS; switch (cb) { case 1: - *(uint8_t *)pv = vga_mem_readb(pThis, GCPhysAddr, &rc); break; + *(uint8_t *)pv = vga_mem_readb(pThis, GCPhysAddr, &rc); + break; case 2: *(uint16_t *)pv = vga_mem_readb(pThis, GCPhysAddr, &rc) | (vga_mem_readb(pThis, GCPhysAddr + 1, &rc) << 8); @@ -3263,20 +3318,14 @@ PDMBOTHCBDECL(int) vgaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhys } } } + STAM_PROFILE_STOP(&pThis->CTX_MID_Z(Stat,MemoryRead), a); - PDMCritSectLeave(&pThis->lock); return rc; } /** - * Legacy VGA memory (0xa0000 - 0xbffff) write hook, to be called from IOM. - * - * @returns VBox status code. - * @param pDevIns Pointer device instance. - * @param pvUser User argument - ignored. - * @param GCPhysAddr Physical address of memory to write. - * @param pv Pointer to data. - * @param cb Bytes to write. + * @callback_method_impl{FNIOMMMIOWRITE, Legacy VGA memory (0xa0000 - 0xbffff) + * write hook, to be called from IOM.} */ PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) { @@ -3284,11 +3333,9 @@ PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhy uint8_t *pu8 = (uint8_t *)pv; NOREF(pvUser); STAM_PROFILE_START(&pThis->CTX_MID_Z(Stat,MemoryWrite), a); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); - int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_MMIO_WRITE); - if (rc != VINF_SUCCESS) - return rc; - + int rc; switch (cb) { case 1: @@ -3338,13 +3385,13 @@ PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhy break; #endif default: + rc = VINF_SUCCESS; while (cb-- > 0 && rc == VINF_SUCCESS) rc = vga_mem_writeb(pThis, GCPhysAddr++, *pu8++); break; } STAM_PROFILE_STOP(&pThis->CTX_MID_Z(Stat,MemoryWrite), a); - PDMCritSectLeave(&pThis->lock); return rc; } @@ -3359,7 +3406,7 @@ PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhy */ static int vgaLFBAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr) { - int rc = PDMCritSectEnter(&pThis->lock, VINF_EM_RAW_EMULATE_INSTR); + int rc = PDMCritSectEnter(&pThis->CritSect, VINF_EM_RAW_EMULATE_INSTR); if (rc != VINF_SUCCESS) return rc; @@ -3380,7 +3427,7 @@ static int vgaLFBAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr #ifndef IN_RING3 rc = PGMShwMakePageWritable(PDMDevHlpGetVMCPU(pThis->CTX_SUFF(pDevIns)), GCPtr, PGM_MK_PG_IS_MMIO2 | PGM_MK_PG_IS_WRITE_FAULT); - PDMCritSectLeave(&pThis->lock); + PDMCritSectLeave(&pThis->CritSect); AssertMsgReturn( rc == VINF_SUCCESS /* In the SMP case the page table might be removed while we wait for the PGM lock in the trap handler. */ || rc == VERR_PAGE_TABLE_NOT_PRESENT @@ -3388,13 +3435,13 @@ static int vgaLFBAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr ("PGMShwModifyPage -> GCPtr=%RGv rc=%d\n", GCPtr, rc), rc); #else /* IN_RING3 : We don't have any virtual page address of the access here. */ - PDMCritSectLeave(&pThis->lock); + PDMCritSectLeave(&pThis->CritSect); Assert(GCPtr == 0); #endif return VINF_SUCCESS; } - PDMCritSectLeave(&pThis->lock); + PDMCritSectLeave(&pThis->CritSect); AssertMsgFailed(("PGMHandlerPhysicalPageTempOff -> rc=%d\n", rc)); return rc; } @@ -3402,17 +3449,9 @@ static int vgaLFBAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr #ifdef IN_RC /** - * #PF Handler for VBE LFB access. - * - * @returns VBox status code (appropriate for GC return). - * @param pVM VM Handle. - * @param uErrorCode CPU Error code. - * @param pRegFrame Trap register frame. - * @param pvFault The fault address (cr2). - * @param GCPhysFault The GC physical address corresponding to pvFault. - * @param pvUser User argument, ignored. + * @callback_method_impl{FNPGMRCPHYSHANDLER, \#PF Handler for VBE LFB access.} */ -PDMBOTHCBDECL(int) vgaGCLFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) +PDMBOTHCBDECL(int) vgaRCLFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) { PVGASTATE pThis = (PVGASTATE)pvUser; AssertPtr(pThis); @@ -3426,15 +3465,7 @@ PDMBOTHCBDECL(int) vgaGCLFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXC #elif IN_RING0 /** - * #PF Handler for VBE LFB access. - * - * @returns VBox status code (appropriate for GC return). - * @param pVM VM Handle. - * @param uErrorCode CPU Error code. - * @param pRegFrame Trap register frame. - * @param pvFault The fault address (cr2). - * @param GCPhysFault The GC physical address corresponding to pvFault. - * @param pvUser User argument, ignored. + * @callback_method_impl{FNPGMR0PHYSHANDLER, \#PF Handler for VBE LFB access.} */ PDMBOTHCBDECL(int) vgaR0LFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) { @@ -3450,17 +3481,7 @@ PDMBOTHCBDECL(int) vgaR0LFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXC #else /* IN_RING3 */ /** - * HC access handler for the LFB. - * - * @returns VINF_SUCCESS if the handler have carried out the operation. - * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation. - * @param pVM VM Handle. - * @param GCPhys The physical address the guest is writing to. - * @param pvPhys The HC mapping of that address. - * @param pvBuf What the guest is reading/writing. - * @param cbBuf How much it's reading/writing. - * @param enmAccessType The access type. - * @param pvUser User argument. + * @callback_method_impl{FNPGMR3PHYSHANDLER, HC access handler for the LFB.} */ static DECLCALLBACK(int) vgaR3LFBAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser) { @@ -3481,15 +3502,8 @@ static DECLCALLBACK(int) vgaR3LFBAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *p /* -=-=-=-=-=- All rings: VGA BIOS I/Os -=-=-=-=-=- */ /** - * Port I/O Handler for VGA BIOS IN operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param pu32 Where to store the result. - * @param cb Number of bytes read. + * @callback_method_impl{FNIOMIOPORTIN, + * Port I/O Handler for VGA BIOS IN operations.} */ PDMBOTHCBDECL(int) vgaIOPortReadBIOS(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) { @@ -3502,25 +3516,15 @@ PDMBOTHCBDECL(int) vgaIOPortReadBIOS(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT } /** - * Port I/O Handler for VGA BIOS OUT operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param u32 The value to output. - * @param cb The value size in bytes. + * @callback_method_impl{FNIOMIOPORTOUT, + * Port I/O Handler for VGA BIOS IN operations.} */ PDMBOTHCBDECL(int) vgaIOPortWriteBIOS(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) { static int lastWasNotNewline = 0; /* We are only called in a single-threaded way */ PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); NOREF(pvUser); - - int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_IOPORT_WRITE); - if (rc != VINF_SUCCESS) - return rc; + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); /* * VGA BIOS char printing. @@ -3547,11 +3551,9 @@ PDMBOTHCBDECL(int) vgaIOPortWriteBIOS(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT else lastWasNotNewline = 1; #endif - PDMCritSectLeave(&pThis->lock); return VINF_SUCCESS; } - PDMCritSectLeave(&pThis->lock); /* not in use. */ return VERR_IOM_IOPORT_UNUSED; } @@ -3563,25 +3565,14 @@ PDMBOTHCBDECL(int) vgaIOPortWriteBIOS(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT # ifdef VBE_NEW_DYN_LIST /** - * Port I/O Handler for VBE Extra OUT operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param u32 The value to output. - * @param cb The value size in bytes. + * @callback_method_impl{FNIOMIOPORTOUT, + * Port I/O Handler for VBE Extra OUT operations.} */ PDMBOTHCBDECL(int) vbeIOPortWriteVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) { PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); - NOREF(pvUser); - NOREF(Port); - - int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_IOPORT_WRITE); - if (rc != VINF_SUCCESS) - return rc; + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); + NOREF(pvUser); NOREF(Port); if (cb == 2) { @@ -3590,64 +3581,46 @@ PDMBOTHCBDECL(int) vbeIOPortWriteVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIO } else Log(("vbeIOPortWriteVBEExtra: Ignoring invalid cb=%d writes to the VBE Extra port!!!\n", cb)); - PDMCritSectLeave(&pThis->lock); return VINF_SUCCESS; } /** - * Port I/O Handler for VBE Extra IN operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param pu32 Where to store the result. - * @param cb Number of bytes read. + * @callback_method_impl{FNIOMIOPORTIN, + * Port I/O Handler for VBE Extra IN operations.} */ PDMBOTHCBDECL(int) vbeIOPortReadVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) { PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); - NOREF(pvUser); - NOREF(Port); - - int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_IOPORT_READ); - if (rc != VINF_SUCCESS) - return rc; + NOREF(pvUser); NOREF(Port); + Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); + int rc = VINF_SUCCESS; if (pThis->u16VBEExtraAddress == 0xffff) { Log(("vbeIOPortReadVBEExtra: Requested number of 64k video banks\n")); *pu32 = pThis->vram_size / _64K; - rc = VINF_SUCCESS; } - else - if ( pThis->u16VBEExtraAddress >= pThis->cbVBEExtraData - || pThis->u16VBEExtraAddress + cb > pThis->cbVBEExtraData) + else if ( pThis->u16VBEExtraAddress >= pThis->cbVBEExtraData + || pThis->u16VBEExtraAddress + cb > pThis->cbVBEExtraData) { *pu32 = 0; Log(("vbeIOPortReadVBEExtra: Requested address is out of VBE data!!! Address=%#x(%d) cbVBEExtraData=%#x(%d)\n", pThis->u16VBEExtraAddress, pThis->u16VBEExtraAddress, pThis->cbVBEExtraData, pThis->cbVBEExtraData)); - rc = VINF_SUCCESS; } - else - if (cb == 1) + else if (cb == 1) { *pu32 = pThis->pu8VBEExtraData[pThis->u16VBEExtraAddress] & 0xFF; Log(("vbeIOPortReadVBEExtra: cb=%#x %.*Rhxs\n", cb, cb, pu32)); - rc = VINF_SUCCESS; } - else - if (cb == 2) + else if (cb == 2) { *pu32 = pThis->pu8VBEExtraData[pThis->u16VBEExtraAddress] | pThis->pu8VBEExtraData[pThis->u16VBEExtraAddress + 1] << 8; Log(("vbeIOPortReadVBEExtra: cb=%#x %.*Rhxs\n", cb, cb, pu32)); - rc = VINF_SUCCESS; } else { @@ -3655,7 +3628,6 @@ PDMBOTHCBDECL(int) vbeIOPortReadVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOP rc = VERR_IOM_IOPORT_UNUSED; } - PDMCritSectLeave(&pThis->lock); return rc; } # endif /* VBE_NEW_DYN_LIST */ @@ -3716,39 +3688,30 @@ static int vbeParseBitmap(PVGASTATE pThis) break; default: - AssertMsgFailed(("Unsupported bitmap header.\n")); + AssertLogRelMsgFailedReturn(("Unsupported bitmap header size %u.\n", pWinHdr->Size), + VERR_INVALID_PARAMETER); break; } - if (pThis->cxLogo > LOGO_MAX_WIDTH || pThis->cyLogo > LOGO_MAX_HEIGHT) - { - AssertMsgFailed(("Bitmap %ux%u is too big.\n", pThis->cxLogo, pThis->cyLogo)); - return VERR_INVALID_PARAMETER; - } + AssertLogRelMsgReturn(pThis->cxLogo <= LOGO_MAX_WIDTH && pThis->cyLogo <= LOGO_MAX_HEIGHT, + ("Bitmap %ux%u is too big.\n", pThis->cxLogo, pThis->cyLogo), + VERR_INVALID_PARAMETER); - if (pThis->cLogoPlanes != 1) - { - AssertMsgFailed(("Bitmap planes %u != 1.\n", pThis->cLogoPlanes)); - return VERR_INVALID_PARAMETER; - } + AssertLogRelMsgReturn(pThis->cLogoPlanes == 1, + ("Bitmap planes %u != 1.\n", pThis->cLogoPlanes), + VERR_INVALID_PARAMETER); - if (pThis->cLogoBits != 4 && pThis->cLogoBits != 8 && pThis->cLogoBits != 24) - { - AssertMsgFailed(("Unsupported %u depth.\n", pThis->cLogoBits)); - return VERR_INVALID_PARAMETER; - } + AssertLogRelMsgReturn(pThis->cLogoBits == 4 || pThis->cLogoBits == 8 || pThis->cLogoBits == 24, + ("Unsupported %u depth.\n", pThis->cLogoBits), + VERR_INVALID_PARAMETER); - if (pThis->cLogoUsedColors > 256) - { - AssertMsgFailed(("Unsupported %u colors.\n", pThis->cLogoUsedColors)); - return VERR_INVALID_PARAMETER; - } + AssertLogRelMsgReturn(pThis->cLogoUsedColors <= 256, + ("Unsupported %u colors.\n", pThis->cLogoUsedColors), + VERR_INVALID_PARAMETER); - if (pThis->LogoCompression != BMP_COMPRESS_NONE) - { - AssertMsgFailed(("Unsupported %u compression.\n", pThis->LogoCompression)); - return VERR_INVALID_PARAMETER; - } + AssertLogRelMsgReturn(pThis->LogoCompression == BMP_COMPRESS_NONE, + ("Unsupported %u compression.\n", pThis->LogoCompression), + VERR_INVALID_PARAMETER); /* * Read bitmap palette @@ -3784,6 +3747,8 @@ static int vbeParseBitmap(PVGASTATE pThis) */ pThis->pu8LogoBitmap = pThis->pu8Logo + sizeof(LOGOHDR) + bmpInfo->Offset; } + else + AssertLogRelMsgFailedReturn(("Not a BMP file.\n"), VERR_INVALID_PARAMETER); return VINF_SUCCESS; } @@ -3931,18 +3896,9 @@ static void vbeShowBitmap(uint16_t cBits, uint16_t xLogo, uint16_t yLogo, uint16 } - - /** - * Port I/O Handler for BIOS Logo OUT operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param u32 The value to output. - * @param cb The value size in bytes. + * @callback_method_impl{FNIOMIOPORTOUT, + * Port I/O Handler for BIOS Logo OUT operations.} */ PDMBOTHCBDECL(int) vbeIOPortWriteCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) { @@ -4043,15 +3999,8 @@ PDMBOTHCBDECL(int) vbeIOPortWriteCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOP /** - * Port I/O Handler for BIOS Logo IN operations. - * - * @returns VBox status code. - * - * @param pDevIns The device instance. - * @param pvUser User argument - ignored. - * @param Port Port number used for the IN operation. - * @param pu32 Where to store the result. - * @param cb Number of bytes read. + * @callback_method_impl{FNIOMIOPORTIN, + * Port I/O Handler for BIOS Logo IN operations.} */ PDMBOTHCBDECL(int) vbeIOPortReadCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) { @@ -4085,52 +4034,52 @@ PDMBOTHCBDECL(int) vbeIOPortReadCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPO return VINF_SUCCESS; } + +/* -=-=-=-=-=- Ring 3: Debug Info Handlers -=-=-=-=-=- */ + /** - * Info handler, device version. Dumps several interesting bits of the - * VGA state that are difficult to decode from the registers. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, + * Dumps several interesting bits of the VGA state that are difficult to + * decode from the registers.} */ static DECLCALLBACK(void) vgaInfoState(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); int is_graph, double_scan; int w, h, char_height, char_dots; int val, vfreq_hz, hfreq_hz; - vga_retrace_s *r = &s->retrace_state; + vga_retrace_s *r = &pThis->retrace_state; const char *clocks[] = { "25.175 MHz", "28.322 MHz", "External", "Reserved?!" }; NOREF(pszArgs); - is_graph = s->gr[6] & 1; - char_dots = (s->sr[0x01] & 1) ? 8 : 9; - double_scan = s->cr[9] >> 7; - pHlp->pfnPrintf(pHlp, "pixel clock: %s\n", clocks[(s->msr >> 2) & 3]); + is_graph = pThis->gr[6] & 1; + char_dots = (pThis->sr[0x01] & 1) ? 8 : 9; + double_scan = pThis->cr[9] >> 7; + pHlp->pfnPrintf(pHlp, "pixel clock: %s\n", clocks[(pThis->msr >> 2) & 3]); pHlp->pfnPrintf(pHlp, "double scanning %s\n", double_scan ? "on" : "off"); - pHlp->pfnPrintf(pHlp, "double clocking %s\n", s->sr[1] & 0x08 ? "on" : "off"); - val = s->cr[0] + 5; + pHlp->pfnPrintf(pHlp, "double clocking %s\n", pThis->sr[1] & 0x08 ? "on" : "off"); + val = pThis->cr[0] + 5; pHlp->pfnPrintf(pHlp, "htotal: %d px (%d cclk)\n", val * char_dots, val); - val = s->cr[6] + ((s->cr[7] & 1) << 8) + ((s->cr[7] & 0x20) << 4) + 2; + val = pThis->cr[6] + ((pThis->cr[7] & 1) << 8) + ((pThis->cr[7] & 0x20) << 4) + 2; pHlp->pfnPrintf(pHlp, "vtotal: %d px\n", val); - val = s->cr[1] + 1; + val = pThis->cr[1] + 1; w = val * char_dots; pHlp->pfnPrintf(pHlp, "hdisp : %d px (%d cclk)\n", w, val); - val = s->cr[0x12] + ((s->cr[7] & 2) << 7) + ((s->cr[7] & 0x40) << 4) + 1; + val = pThis->cr[0x12] + ((pThis->cr[7] & 2) << 7) + ((pThis->cr[7] & 0x40) << 4) + 1; h = val; pHlp->pfnPrintf(pHlp, "vdisp : %d px\n", val); - val = ((s->cr[9] & 0x40) << 3) + ((s->cr[7] & 0x10) << 4) + s->cr[0x18]; + val = ((pThis->cr[9] & 0x40) << 3) + ((pThis->cr[7] & 0x10) << 4) + pThis->cr[0x18]; pHlp->pfnPrintf(pHlp, "split : %d ln\n", val); - val = (s->cr[0xc] << 8) + s->cr[0xd]; + val = (pThis->cr[0xc] << 8) + pThis->cr[0xd]; pHlp->pfnPrintf(pHlp, "start : %#x\n", val); if (!is_graph) { - val = (s->cr[9] & 0x1f) + 1; + val = (pThis->cr[9] & 0x1f) + 1; char_height = val; pHlp->pfnPrintf(pHlp, "char height %d\n", val); pHlp->pfnPrintf(pHlp, "text mode %dx%d\n", w / char_dots, h / (char_height << double_scan)); } - if (s->fRealRetrace) + if (pThis->fRealRetrace) { val = r->hb_start; pHlp->pfnPrintf(pHlp, "hblank start: %d px (%d cclk)\n", val * char_dots, val); @@ -4145,7 +4094,7 @@ static DECLCALLBACK(void) vgaInfoState(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, c pHlp->pfnPrintf(pHlp, "vfreq: %d Hz, hfreq: %d.%03d kHz\n", vfreq_hz, hfreq_hz / 1000, hfreq_hz % 1000); } - pHlp->pfnPrintf(pHlp, "display refresh interval: %u ms\n", s->cMilliesRefreshInterval); + pHlp->pfnPrintf(pHlp, "display refresh interval: %u ms\n", pThis->cMilliesRefreshInterval); } @@ -4243,12 +4192,9 @@ static void vgaInfoTextWorker(PVGASTATE pThis, PCDBGFINFOHLP pHlp, /** - * Info handler, device version. Dumps VGA memory formatted as - * ASCII text, no attributes. Only looks at the first page. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, + * Dumps VGA memory formatted as ASCII text, no attributes. Only looks at the + * first page.} */ static DECLCALLBACK(void) vgaInfoText(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { @@ -4321,198 +4267,162 @@ static DECLCALLBACK(void) vgaInfoText(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, co /** - * Info handler, device version. Dumps VGA Sequencer registers. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, Dumps VGA Sequencer registers.} */ static DECLCALLBACK(void) vgaInfoSR(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); unsigned i; NOREF(pszArgs); - pHlp->pfnPrintf(pHlp, "VGA Sequencer (3C5): SR index 3C4:%02X\n", s->sr_index); - Assert(sizeof(s->sr) >= 8); + pHlp->pfnPrintf(pHlp, "VGA Sequencer (3C5): SR index 3C4:%02X\n", pThis->sr_index); + Assert(sizeof(pThis->sr) >= 8); for (i = 0; i < 5; ++i) - pHlp->pfnPrintf(pHlp, " SR%02X:%02X", i, s->sr[i]); + pHlp->pfnPrintf(pHlp, " SR%02X:%02X", i, pThis->sr[i]); pHlp->pfnPrintf(pHlp, "\n"); } /** - * Info handler, device version. Dumps VGA CRTC registers. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, Dumps VGA CRTC registers.} */ static DECLCALLBACK(void) vgaInfoCR(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); unsigned i; NOREF(pszArgs); - pHlp->pfnPrintf(pHlp, "VGA CRTC (3D5): CRTC index 3D4:%02X\n", s->cr_index); - Assert(sizeof(s->cr) >= 24); + pHlp->pfnPrintf(pHlp, "VGA CRTC (3D5): CRTC index 3D4:%02X\n", pThis->cr_index); + Assert(sizeof(pThis->cr) >= 24); for (i = 0; i < 10; ++i) - { - pHlp->pfnPrintf(pHlp, " CR%02X:%02X", i, s->cr[i]); - } + pHlp->pfnPrintf(pHlp, " CR%02X:%02X", i, pThis->cr[i]); pHlp->pfnPrintf(pHlp, "\n"); for (i = 10; i < 20; ++i) - { - pHlp->pfnPrintf(pHlp, " CR%02X:%02X", i, s->cr[i]); - } + pHlp->pfnPrintf(pHlp, " CR%02X:%02X", i, pThis->cr[i]); pHlp->pfnPrintf(pHlp, "\n"); for (i = 20; i < 25; ++i) - { - pHlp->pfnPrintf(pHlp, " CR%02X:%02X", i, s->cr[i]); - } + pHlp->pfnPrintf(pHlp, " CR%02X:%02X", i, pThis->cr[i]); pHlp->pfnPrintf(pHlp, "\n"); } /** - * Info handler, device version. Dumps VGA Graphics Controller registers. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, + * Dumps VGA Graphics Controller registers.} */ static DECLCALLBACK(void) vgaInfoGR(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); unsigned i; NOREF(pszArgs); - pHlp->pfnPrintf(pHlp, "VGA Graphics Controller (3CF): GR index 3CE:%02X\n", s->gr_index); - Assert(sizeof(s->gr) >= 9); + pHlp->pfnPrintf(pHlp, "VGA Graphics Controller (3CF): GR index 3CE:%02X\n", pThis->gr_index); + Assert(sizeof(pThis->gr) >= 9); for (i = 0; i < 9; ++i) { - pHlp->pfnPrintf(pHlp, " GR%02X:%02X", i, s->gr[i]); + pHlp->pfnPrintf(pHlp, " GR%02X:%02X", i, pThis->gr[i]); } pHlp->pfnPrintf(pHlp, "\n"); } /** - * Info handler, device version. Dumps VGA Sequencer registers. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, + * Dumps VGA Attribute Controller registers.} */ static DECLCALLBACK(void) vgaInfoAR(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); unsigned i; NOREF(pszArgs); pHlp->pfnPrintf(pHlp, "VGA Attribute Controller (3C0): index reg %02X, flip-flop: %d (%s)\n", - s->ar_index, s->ar_flip_flop, s->ar_flip_flop ? "data" : "index" ); - Assert(sizeof(s->ar) >= 0x14); + pThis->ar_index, pThis->ar_flip_flop, pThis->ar_flip_flop ? "data" : "index" ); + Assert(sizeof(pThis->ar) >= 0x14); pHlp->pfnPrintf(pHlp, " Palette:"); for (i = 0; i < 0x10; ++i) - { - pHlp->pfnPrintf(pHlp, " %02X", i, s->ar[i]); - } + pHlp->pfnPrintf(pHlp, " %02X", pThis->ar[i]); pHlp->pfnPrintf(pHlp, "\n"); for (i = 0x10; i <= 0x14; ++i) - { - pHlp->pfnPrintf(pHlp, " AR%02X:%02X", i, s->ar[i]); - } + pHlp->pfnPrintf(pHlp, " AR%02X:%02X", i, pThis->ar[i]); pHlp->pfnPrintf(pHlp, "\n"); } + /** - * Info handler, device version. Dumps VGA DAC registers. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, Dumps VGA DAC registers.} */ static DECLCALLBACK(void) vgaInfoDAC(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); unsigned i; NOREF(pszArgs); pHlp->pfnPrintf(pHlp, "VGA DAC contents:\n"); for (i = 0; i < 0x100; ++i) - { pHlp->pfnPrintf(pHlp, " %02X: %02X %02X %02X\n", - i, s->palette[i*3+0], s->palette[i*3+1], s->palette[i*3+2]); - } + i, pThis->palette[i*3+0], pThis->palette[i*3+1], pThis->palette[i*3+2]); } /** - * Info handler, device version. Dumps VBE registers. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, Dumps VBE registers.} */ static DECLCALLBACK(void) vgaInfoVBE(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); NOREF(pszArgs); - pHlp->pfnPrintf(pHlp, "LFB at %RGp\n", s->GCPhysVRAM); + pHlp->pfnPrintf(pHlp, "LFB at %RGp\n", pThis->GCPhysVRAM); - if (!(s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) + if (!(pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) { pHlp->pfnPrintf(pHlp, "VBE disabled\n"); return; } - pHlp->pfnPrintf(pHlp, "VBE state (chip ID 0x%04x):\n", s->vbe_regs[VBE_DISPI_INDEX_ID]); + pHlp->pfnPrintf(pHlp, "VBE state (chip ID 0x%04x):\n", pThis->vbe_regs[VBE_DISPI_INDEX_ID]); pHlp->pfnPrintf(pHlp, " Display resolution: %d x %d @ %dbpp\n", - s->vbe_regs[VBE_DISPI_INDEX_XRES], s->vbe_regs[VBE_DISPI_INDEX_YRES], - s->vbe_regs[VBE_DISPI_INDEX_BPP]); + pThis->vbe_regs[VBE_DISPI_INDEX_XRES], pThis->vbe_regs[VBE_DISPI_INDEX_YRES], + pThis->vbe_regs[VBE_DISPI_INDEX_BPP]); pHlp->pfnPrintf(pHlp, " Virtual resolution: %d x %d\n", - s->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH], s->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT]); + pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH], pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT]); pHlp->pfnPrintf(pHlp, " Display start addr: %d, %d\n", - s->vbe_regs[VBE_DISPI_INDEX_X_OFFSET], s->vbe_regs[VBE_DISPI_INDEX_Y_OFFSET]); - pHlp->pfnPrintf(pHlp, " Linear scanline pitch: 0x%04x\n", s->vbe_line_offset); - pHlp->pfnPrintf(pHlp, " Linear display start : 0x%04x\n", s->vbe_start_addr); - pHlp->pfnPrintf(pHlp, " Selected bank: 0x%04x\n", s->vbe_regs[VBE_DISPI_INDEX_BANK]); + pThis->vbe_regs[VBE_DISPI_INDEX_X_OFFSET], pThis->vbe_regs[VBE_DISPI_INDEX_Y_OFFSET]); + pHlp->pfnPrintf(pHlp, " Linear scanline pitch: 0x%04x\n", pThis->vbe_line_offset); + pHlp->pfnPrintf(pHlp, " Linear display start : 0x%04x\n", pThis->vbe_start_addr); + pHlp->pfnPrintf(pHlp, " Selected bank: 0x%04x\n", pThis->vbe_regs[VBE_DISPI_INDEX_BANK]); } /** - * Info handler, device version. Dumps register state relevant - * to 16-color planar graphics modes (GR/SR) in human-readable form. - * - * @param pDevIns Device instance which registered the info. - * @param pHlp Callback functions for doing output. - * @param pszArgs Argument string. Optional and specific to the handler. + * @callback_method_impl{FNDBGFHANDLERDEV, + * Dumps register state relevant to 16-color planar graphics modes (GR/SR) + * in human-readable form.} */ static DECLCALLBACK(void) vgaInfoPlanar(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) { - PVGASTATE s = PDMINS_2_DATA(pDevIns, PVGASTATE); + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); int val1, val2; NOREF(pszArgs); - val1 = (s->gr[5] >> 3) & 1; - val2 = s->gr[5] & 3; + val1 = (pThis->gr[5] >> 3) & 1; + val2 = pThis->gr[5] & 3; pHlp->pfnPrintf(pHlp, "read mode : %d write mode: %d\n", val1, val2); - val1 = s->gr[0]; - val2 = s->gr[1]; + val1 = pThis->gr[0]; + val2 = pThis->gr[1]; pHlp->pfnPrintf(pHlp, "set/reset data: %02X S/R enable: %02X\n", val1, val2); - val1 = s->gr[2]; - val2 = s->gr[4] & 3; + val1 = pThis->gr[2]; + val2 = pThis->gr[4] & 3; pHlp->pfnPrintf(pHlp, "color compare : %02X read map : %d\n", val1, val2); - val1 = s->gr[3] & 7; - val2 = (s->gr[3] >> 3) & 3; + val1 = pThis->gr[3] & 7; + val2 = (pThis->gr[3] >> 3) & 3; pHlp->pfnPrintf(pHlp, "rotate : %d function : %d\n", val1, val2); - val1 = s->gr[7]; - val2 = s->gr[8]; + val1 = pThis->gr[7]; + val2 = pThis->gr[8]; pHlp->pfnPrintf(pHlp, "don't care : %02X bit mask : %02X\n", val1, val2); - val1 = s->sr[2]; - val2 = s->sr[4] & 8; + val1 = pThis->sr[2]; + val2 = pThis->sr[4] & 8; pHlp->pfnPrintf(pHlp, "seq plane mask: %02X chain-4 : %s\n", val1, val2 ? "on" : "off"); } @@ -4607,15 +4517,25 @@ static DECLCALLBACK(int) vgaPortUpdateDisplay(PPDMIDISPLAYPORT pInterface) PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(pThis)); PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns); - int rc = PDMCritSectEnter(&pThis->lock, VERR_SEM_BUSY); + int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); AssertRC(rc); +#ifdef VBOX_WITH_VMSVGA + if ( pThis->svga.fEnabled + && !pThis->svga.fTraces) + { + /* Nothing to do as the guest will explicitely update us about frame buffer changes. */ + PDMCritSectLeave(&pThis->CritSect); + return VINF_SUCCESS; + } +#endif + #ifndef VBOX_WITH_HGSMI /* This should be called only in non VBVA mode. */ #else if (VBVAUpdateDisplay (pThis) == VINF_SUCCESS) { - PDMCritSectLeave(&pThis->lock); + PDMCritSectLeave(&pThis->CritSect); return VINF_SUCCESS; } #endif /* VBOX_WITH_HGSMI */ @@ -4633,26 +4553,29 @@ static DECLCALLBACK(int) vgaPortUpdateDisplay(PPDMIDISPLAYPORT pInterface) } rc = vga_update_display(pThis, false, false, true); - if (rc != VINF_SUCCESS) - { - PDMCritSectLeave(&pThis->lock); - return rc; - } - PDMCritSectLeave(&pThis->lock); - return VINF_SUCCESS; + PDMCritSectLeave(&pThis->CritSect); + return rc; } /** - * Internal vgaPortUpdateDisplayAll worker called under pThis->lock. + * Internal vgaPortUpdateDisplayAll worker called under pThis->CritSect. */ static int updateDisplayAll(PVGASTATE pThis) { PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns); +#ifdef VBOX_WITH_VMSVGA + if ( !pThis->svga.fEnabled + || pThis->svga.fTraces) + { +#endif /* The dirty bits array has been just cleared, reset handlers as well. */ if (pThis->GCPhysVRAM && pThis->GCPhysVRAM != NIL_RTGCPHYS) PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), pThis->GCPhysVRAM); +#ifdef VBOX_WITH_VMSVGA + } +#endif if (pThis->fRemappedVGA) { IOMMMIOResetRegion(PDMDevHlpGetVM(pDevIns), 0x000a0000); @@ -4682,12 +4605,12 @@ static DECLCALLBACK(int) vgaPortUpdateDisplayAll(PPDMIDISPLAYPORT pInterface) LogFlow(("vgaPortUpdateDisplayAll\n")); #endif /* DEBUG_sunlover */ - int rc = PDMCritSectEnter(&pThis->lock, VERR_SEM_BUSY); + int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); AssertRC(rc); rc = updateDisplayAll(pThis); - PDMCritSectLeave(&pThis->lock); + PDMCritSectLeave(&pThis->CritSect); return rc; } @@ -4746,7 +4669,7 @@ static DECLCALLBACK(int) vgaPortTakeScreenshot(PPDMIDISPLAYPORT pInterface, uint if (!RT_VALID_PTR(ppu8Data) || !RT_VALID_PTR(pcbData) || !RT_VALID_PTR(pcx) || !RT_VALID_PTR(pcy)) return VERR_INVALID_PARAMETER; - int rc = PDMCritSectEnter(&pThis->lock, VERR_SEM_BUSY); + int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); AssertRCReturn(rc, rc); /* @@ -4833,7 +4756,7 @@ static DECLCALLBACK(int) vgaPortTakeScreenshot(PPDMIDISPLAYPORT pInterface, uint else rc = VERR_NOT_SUPPORTED; - PDMCritSectLeave(&pThis->lock); + PDMCritSectLeave(&pThis->CritSect); LogFlow(("vgaPortTakeScreenshot: returns %Rrc (cbData=%d cx=%d cy=%d)\n", rc, *pcbData, *pcx, *pcy)); return rc; @@ -4873,7 +4796,7 @@ static DECLCALLBACK(int) vgaPortDisplayBlt(PPDMIDISPLAYPORT pInterface, const vo PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(pThis)); LogFlow(("vgaPortDisplayBlt: pvData=%p x=%d y=%d cx=%d cy=%d\n", pvData, x, y, cx, cy)); - rc = PDMCritSectEnter(&pThis->lock, VERR_SEM_BUSY); + rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); AssertRC(rc); /* @@ -4938,13 +4861,13 @@ static DECLCALLBACK(int) vgaPortDisplayBlt(PPDMIDISPLAYPORT pInterface, const vo else rc = VERR_INVALID_PARAMETER; - PDMCritSectLeave(&pThis->lock); + PDMCritSectLeave(&pThis->CritSect); LogFlow(("vgaPortDisplayBlt: returns %Rrc\n", rc)); return rc; } -static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, int32_t x, int32_t y, uint32_t w, uint32_t h) +static DECLCALLBACK(void) vgaPortUpdateDisplayRect(PPDMIDISPLAYPORT pInterface, int32_t x, int32_t y, uint32_t w, uint32_t h) { uint32_t v; vga_draw_line_func *vga_draw_line; @@ -4959,18 +4882,18 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, uint32_t u32OffsetSrc, u32Dummy; - PVGASTATE s = IDISPLAYPORT_2_VGASTATE(pInterface); + PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); #ifdef DEBUG_sunlover LogFlow(("vgaPortUpdateDisplayRect: %d,%d %dx%d\n", x, y, w, h)); #endif /* DEBUG_sunlover */ Assert(pInterface); - Assert(s->pDrv); - Assert(s->pDrv->pu8Data); + Assert(pThis->pDrv); + Assert(pThis->pDrv->pu8Data); /* Check if there is something to do at all. */ - if (!s->fRenderVRAM) + if (!pThis->fRenderVRAM) { /* The framebuffer uses the guest VRAM directly. */ #ifdef DEBUG_sunlover @@ -4979,7 +4902,7 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, return; } - int rc = PDMCritSectEnter(&s->lock, VERR_SEM_BUSY); + int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); AssertRC(rc); /* Correct negative x and y coordinates. */ @@ -4998,16 +4921,16 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, } /* Also check if coords are greater than the display resolution. */ - if (x + w > s->pDrv->cx) + if (x + w > pThis->pDrv->cx) { // x < 0 is not possible here - w = s->pDrv->cx > (uint32_t)x? s->pDrv->cx - x: 0; + w = pThis->pDrv->cx > (uint32_t)x? pThis->pDrv->cx - x: 0; } - if (y + h > s->pDrv->cy) + if (y + h > pThis->pDrv->cy) { // y < 0 is not possible here - h = s->pDrv->cy > (uint32_t)y? s->pDrv->cy - y: 0; + h = pThis->pDrv->cy > (uint32_t)y? pThis->pDrv->cy - y: 0; } #ifdef DEBUG_sunlover @@ -5021,7 +4944,7 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, #ifdef DEBUG_sunlover LogFlow(("vgaPortUpdateDisplayRect: nothing to do: %dx%d\n", w, h)); #endif /* DEBUG_sunlover */ - PDMCritSectLeave(&s->lock); + PDMCritSectLeave(&pThis->CritSect); return; } @@ -5031,7 +4954,7 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, */ /* Choose the rendering function. */ - switch(s->get_bpp(s)) + switch(pThis->get_bpp(pThis)) { default: case 0: @@ -5039,7 +4962,7 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, * by Display because VBVA buffer is being flushed. * Nothing to do, just return. */ - PDMCritSectLeave(&s->lock); + PDMCritSectLeave(&pThis->CritSect); return; case 8: v = VGA_DRAW_LINE8; @@ -5058,20 +4981,20 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, break; } - vga_draw_line = vga_draw_line_table[v * 4 + get_depth_index(s->pDrv->cBits)]; + vga_draw_line = vga_draw_line_table[v * 4 + get_depth_index(pThis->pDrv->cBits)]; /* Compute source and destination addresses and pitches. */ - cbPixelDst = (s->pDrv->cBits + 7) / 8; - cbLineDst = s->pDrv->cbScanline; - pu8Dst = s->pDrv->pu8Data + y * cbLineDst + x * cbPixelDst; + cbPixelDst = (pThis->pDrv->cBits + 7) / 8; + cbLineDst = pThis->pDrv->cbScanline; + pu8Dst = pThis->pDrv->pu8Data + y * cbLineDst + x * cbPixelDst; - cbPixelSrc = (s->get_bpp(s) + 7) / 8; - s->get_offsets(s, &cbLineSrc, &u32OffsetSrc, &u32Dummy); + cbPixelSrc = (pThis->get_bpp(pThis) + 7) / 8; + pThis->get_offsets(pThis, &cbLineSrc, &u32OffsetSrc, &u32Dummy); /* Assume that rendering is performed only on visible part of VRAM. * This is true because coordinates were verified. */ - pu8Src = s->vram_ptrR3; + pu8Src = pThis->vram_ptrR3; pu8Src += u32OffsetSrc * 4 + y * cbLineSrc + x * cbPixelSrc; /* Render VRAM to framebuffer. */ @@ -5082,12 +5005,12 @@ static DECLCALLBACK(void) vgaPortUpdateDisplayRect (PPDMIDISPLAYPORT pInterface, while (h-- > 0) { - vga_draw_line (s, pu8Dst, pu8Src, w); + vga_draw_line (pThis, pu8Dst, pu8Src, w); pu8Dst += cbLineDst; pu8Src += cbLineSrc; } - PDMCritSectLeave(&s->lock); + PDMCritSectLeave(&pThis->CritSect); #ifdef DEBUG_sunlover LogFlow(("vgaPortUpdateDisplayRect: completed.\n")); #endif /* DEBUG_sunlover */ @@ -5126,10 +5049,10 @@ static DECLCALLBACK(int) vgaPortCopyRect (PPDMIDISPLAYPORT pInterface, LogFlow(("vgaPortCopyRect: %d,%d %dx%d -> %d,%d\n", xSrc, ySrc, w, h, xDst, yDst)); #endif /* DEBUG_sunlover */ - PVGASTATE s = IDISPLAYPORT_2_VGASTATE(pInterface); + PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); Assert(pInterface); - Assert(s->pDrv); + Assert(pThis->pDrv); int32_t xSrcCorrected = xSrc; int32_t ySrcCorrected = ySrc; @@ -5213,9 +5136,16 @@ static DECLCALLBACK(int) vgaPortCopyRect (PPDMIDISPLAYPORT pInterface, break; } - int rc = PDMCritSectEnter(&s->lock, VERR_SEM_BUSY); + int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); AssertRC(rc); + /* This method only works if the VGA device is in a VBE mode. */ + if ((pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) == 0) + { + PDMCritSectLeave(&pThis->CritSect); + return VERR_INVALID_STATE; + } + vga_draw_line = vga_draw_line_table[v * 4 + get_depth_index(u32DstBitsPerPixel)]; /* Compute source and destination addresses and pitches. */ @@ -5233,12 +5163,12 @@ static DECLCALLBACK(int) vgaPortCopyRect (PPDMIDISPLAYPORT pInterface, while (hCorrected-- > 0) { - vga_draw_line (s, pu8DstPtr, pu8SrcPtr, wCorrected); + vga_draw_line (pThis, pu8DstPtr, pu8SrcPtr, wCorrected); pu8DstPtr += cbLineDst; pu8SrcPtr += cbLineSrc; } - PDMCritSectLeave(&s->lock); + PDMCritSectLeave(&pThis->CritSect); #ifdef DEBUG_sunlover LogFlow(("vgaPortCopyRect: completed.\n")); #endif /* DEBUG_sunlover */ @@ -5248,11 +5178,16 @@ static DECLCALLBACK(int) vgaPortCopyRect (PPDMIDISPLAYPORT pInterface, static DECLCALLBACK(void) vgaPortSetRenderVRAM(PPDMIDISPLAYPORT pInterface, bool fRender) { - PVGASTATE s = IDISPLAYPORT_2_VGASTATE(pInterface); + PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); LogFlow(("vgaPortSetRenderVRAM: fRender = %d\n", fRender)); - s->fRenderVRAM = fRender; + int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); + AssertRC(rc); + + pThis->fRenderVRAM = fRender; + + PDMCritSectLeave(&pThis->CritSect); } @@ -5271,8 +5206,42 @@ static DECLCALLBACK(void) vgaTimerRefresh(PPDMDEVINS pDevIns, PTMTIMER pTimer, v if (pThis->cMilliesRefreshInterval) TMTimerSetMillies(pTimer, pThis->cMilliesRefreshInterval); + +#ifdef VBOX_WITH_VIDEOHWACCEL + vbvaTimerCb(pThis); +#endif + + vboxCmdVBVACmdTimer(pThis); } +#ifdef VBOX_WITH_VMSVGA +int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer) +{ + PPDMDEVINS pDevIns = pVGAState->pDevInsR3; + + Assert(pVGAState->GCPhysVRAM); + + int rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), + PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, + pVGAState->GCPhysVRAM, pVGAState->GCPhysVRAM + (cbFrameBuffer - 1), + vgaR3LFBAccessHandler, pVGAState, + g_DeviceVga.szR0Mod, "vgaR0LFBAccessHandler", pDevIns->pvInstanceDataR0, + g_DeviceVga.szRCMod, "vgaGCLFBAccessHandler", pDevIns->pvInstanceDataRC, + "VGA LFB"); + AssertRC(rc); + return rc; +} + +int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState) +{ + PPDMDEVINS pDevIns = pVGAState->pDevInsR3; + + Assert(pVGAState->GCPhysVRAM); + int rc = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), pVGAState->GCPhysVRAM); + AssertRC(rc); + return rc; +} +#endif /* -=-=-=-=-=- Ring 3: PCI Device -=-=-=-=-=- */ @@ -5293,7 +5262,11 @@ static DECLCALLBACK(int) vgaR3IORegionMap(PPCIDEVICE pPciDev, /*unsigned*/ int i PPDMDEVINS pDevIns = pPciDev->pDevIns; PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); LogFlow(("vgaR3IORegionMap: iRegion=%d GCPhysAddress=%RGp cb=%#x enmType=%d\n", iRegion, GCPhysAddress, cb, enmType)); +#ifdef VBOX_WITH_VMSVGA + AssertReturn((iRegion == ((pThis->fVMSVGAEnabled) ? 1 : 0)) && (enmType == ((pThis->fVMSVGAEnabled) ? PCI_ADDRESS_SPACE_MEM : PCI_ADDRESS_SPACE_MEM_PREFETCH)), VERR_INTERNAL_ERROR); +#else AssertReturn(iRegion == 0 && enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH, VERR_INTERNAL_ERROR); +#endif if (GCPhysAddress != NIL_RTGCPHYS) { @@ -5309,7 +5282,7 @@ static DECLCALLBACK(int) vgaR3IORegionMap(PPCIDEVICE pPciDev, /*unsigned*/ int i GCPhysAddress, GCPhysAddress + (pThis->vram_size - 1), vgaR3LFBAccessHandler, pThis, g_DeviceVga.szR0Mod, "vgaR0LFBAccessHandler", pDevIns->pvInstanceDataR0, - g_DeviceVga.szRCMod, "vgaGCLFBAccessHandler", pDevIns->pvInstanceDataRC, + g_DeviceVga.szRCMod, "vgaRCLFBAccessHandler", pDevIns->pvInstanceDataRC, "VGA LFB"); AssertRC(rc); if (RT_SUCCESS(rc)) @@ -5326,6 +5299,9 @@ static DECLCALLBACK(int) vgaR3IORegionMap(PPCIDEVICE pPciDev, /*unsigned*/ int i * Deregister the access handler so PGM doesn't get upset. */ Assert(pThis->GCPhysVRAM); +#ifdef VBOX_WITH_VMSVGA + Assert(!pThis->svga.fEnabled); +#endif rc = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), pThis->GCPhysVRAM); AssertRC(rc); pThis->GCPhysVRAM = 0; @@ -5403,8 +5379,13 @@ static DECLCALLBACK(int) vgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) return rc; #else SSMR3PutBool(pSSM, false); - return VINF_SUCCESS; #endif +#ifdef VBOX_WITH_VMSVGA + if ( rc == VINF_SUCCESS + && pThis->fVMSVGAEnabled) + rc = vmsvgaSaveExec(pDevIns, pSSM); +#endif + return rc; } @@ -5455,6 +5436,14 @@ static DECLCALLBACK(int) vgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("HGSMI is not compiled in, but it is present in the saved state")); #endif } +#ifdef VBOX_WITH_VMSVGA + if ( uVersion >= VGA_SAVEDSTATE_VERSION_VMSVGA_2D + && pThis->fVMSVGAEnabled) + { + rc = vmsvgaLoadExec(pDevIns, pSSM, uVersion, uPass); + AssertRCReturn(rc, rc); + } +#endif } return VINF_SUCCESS; } @@ -5466,6 +5455,8 @@ static DECLCALLBACK(int) vgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint static DECLCALLBACK(int) vgaR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) { #ifdef VBOX_WITH_HGSMI + PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); + VBVAPause(pThis, (pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) == 0); return vboxVBVALoadStateDone(pDevIns, pSSM); #else return VINF_SUCCESS; @@ -5476,10 +5467,7 @@ static DECLCALLBACK(int) vgaR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) /* -=-=-=-=-=- Ring 3: Device callbacks -=-=-=-=-=- */ /** - * Reset notification. - * - * @returns VBox status. - * @param pDevIns The device instance data. + * @interface_method_impl{PDMDEVREG,pfnReset} */ static DECLCALLBACK(void) vgaR3Reset(PPDMDEVINS pDevIns) { @@ -5488,6 +5476,9 @@ static DECLCALLBACK(void) vgaR3Reset(PPDMDEVINS pDevIns) char *pchEnd; LogFlow(("vgaReset\n")); + if (pThis->pVdma) + vboxVDMAReset(pThis->pVdma); + #ifdef VBOX_WITH_HGSMI VBVAReset(pThis); #endif /* VBOX_WITH_HGSMI */ @@ -5554,7 +5545,11 @@ static DECLCALLBACK(void) vgaR3Reset(PPDMDEVINS pDevIns) /* notify port handler */ if (pThis->pDrv) + { + PDMCritSectLeave(&pThis->CritSect); /* hack around lock order issue. */ pThis->pDrv->pfnReset(pThis->pDrv); + PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED); + } /* Reset latched access mask. */ pThis->uMaskLatchAccess = 0x3ff; @@ -5568,12 +5563,7 @@ static DECLCALLBACK(void) vgaR3Reset(PPDMDEVINS pDevIns) /** - * Device relocation callback. - * - * @param pDevIns Pointer to the device instance. - * @param offDelta The relocation delta relative to the old location. - * - * @see FNPDMDEVRELOCATE for details. + * @interface_method_impl{PDMDEVREG,pfnRelocate} */ static DECLCALLBACK(void) vgaR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) { @@ -5582,7 +5572,6 @@ static DECLCALLBACK(void) vgaR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); LogFlow(("vgaRelocate: offDelta = %08X\n", offDelta)); - pThis->RCPtrLFBHandler += offDelta; pThis->vram_ptrRC += offDelta; pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); } @@ -5590,18 +5579,9 @@ static DECLCALLBACK(void) vgaR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) /** - * Attach command. - * - * This is called to let the device attach to a driver for a specified LUN - * during runtime. This is not called during VM construction, the device - * constructor have to attach to all the available drivers. + * @interface_method_impl{PDMDEVREG,pfnAttach} * * This is like plugging in the monitor after turning on the PC. - * - * @returns VBox status code. - * @param pDevIns The device instance. - * @param iLUN The logical unit which is being detached. - * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines. */ static DECLCALLBACK(int) vgaAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags) { @@ -5670,16 +5650,9 @@ static DECLCALLBACK(int) vgaAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t /** - * Detach notification. - * - * This is called when a driver is detaching itself from a LUN of the device. - * The device should adjust it's state to reflect this. + * @interface_method_impl{PDMDEVREG,pfnDetach} * * This is like unplugging the monitor while the PC is still running. - * - * @param pDevIns The device instance. - * @param iLUN The logical unit which is being detached. - * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines. */ static DECLCALLBACK(void) vgaDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags) { @@ -5707,12 +5680,7 @@ static DECLCALLBACK(void) vgaDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t /** - * Destruct a device instance. - * - * Most VM resources are freed by the VM. This callback is provided so that any non-VM - * resources can be freed correctly. - * - * @param pDevIns The device instance data. + * @interface_method_impl{PDMDEVREG,pfnDestruct} */ static DECLCALLBACK(int) vgaR3Destruct(PPDMDEVINS pDevIns) { @@ -5722,8 +5690,13 @@ static DECLCALLBACK(int) vgaR3Destruct(PPDMDEVINS pDevIns) PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); LogFlow(("vgaR3Destruct:\n")); -#ifdef VBOX_WITH_VDMA +# ifdef VBOX_WITH_VDMA vboxVDMADestruct(pThis->pVdma); +# endif + +#ifdef VBOX_WITH_VMSVGA + if (pThis->fVMSVGAEnabled) + vmsvgaDestruct(pDevIns); #endif /* @@ -5734,7 +5707,7 @@ static DECLCALLBACK(int) vgaR3Destruct(PPDMDEVINS pDevIns) MMR3HeapFree(pThis->pu8VBEExtraData); pThis->pu8VBEExtraData = NULL; } -#endif +#endif /* VBE_NEW_DYN_LIST */ if (pThis->pu8VgaBios) { MMR3HeapFree(pThis->pu8VgaBios); @@ -5753,10 +5726,11 @@ static DECLCALLBACK(int) vgaR3Destruct(PPDMDEVINS pDevIns) pThis->pszLogoFile = NULL; } - PDMR3CritSectDelete(&pThis->lock); + PDMR3CritSectDelete(&pThis->CritSect); return VINF_SUCCESS; } + /** * Adjust VBE mode information * @@ -5783,6 +5757,7 @@ static void vgaAdjustModeInfo(PVGASTATE pThis, ModeInfoListItem *pMode) pMode->info.LinNumberOfPages = maxPage; } + /** * @interface_method_impl{PDMDEVREG,pfnConstruct} */ @@ -5849,7 +5824,15 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF "CustomVideoMode15\0" "CustomVideoMode16\0" "MaxBiosXRes\0" - "MaxBiosYRes\0")) + "MaxBiosYRes\0" +#ifdef VBOX_WITH_VMSVGA + "VMSVGAEnabled\0" +#endif +#ifdef VBOX_WITH_VMSVGA3D + "VMSVGA3dEnabled\0" + "HostWindowId\0" +#endif + )) return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, N_("Invalid configuration for vga device")); @@ -5878,6 +5861,20 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF AssertLogRelRCReturn(rc, rc); Log(("VGA: VRamSize=%#x fGCenabled=%RTbool fR0Enabled=%RTbool\n", pThis->vram_size, pThis->fGCEnabled, pThis->fR0Enabled)); +#ifdef VBOX_WITH_VMSVGA + rc = CFGMR3QueryBoolDef(pCfg, "VMSVGAEnabled", &pThis->fVMSVGAEnabled, false); + AssertLogRelRCReturn(rc, rc); + Log(("VMSVGA: VMSVGAEnabled = %d\n", pThis->fVMSVGAEnabled)); +#endif +#ifdef VBOX_WITH_VMSVGA3D + rc = CFGMR3QueryBoolDef(pCfg, "VMSVGA3dEnabled", &pThis->svga.f3DEnabled, false); + AssertLogRelRCReturn(rc, rc); + rc = CFGMR3QueryU64Def(pCfg, "HostWindowId", &pThis->svga.u64HostWindowId, 0); + AssertLogRelRCReturn(rc, rc); + Log(("VMSVGA: VMSVGA3dEnabled = %d\n", pThis->svga.f3DEnabled)); + Log(("VMSVGA: HostWindowId = 0x%x\n", pThis->svga.u64HostWindowId)); +#endif + pThis->pDevInsR3 = pDevIns; pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); @@ -5885,8 +5882,23 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF vgaR3Reset(pDevIns); /* The PCI devices configuration. */ +#ifdef VBOX_WITH_VMSVGA + if (pThis->fVMSVGAEnabled) + { + /* Extend our VGA device with VMWare SVGA functionality. */ + PCIDevSetVendorId(&pThis->Dev, PCI_VENDOR_ID_VMWARE); + PCIDevSetDeviceId(&pThis->Dev, PCI_DEVICE_ID_VMWARE_SVGA2); + PCIDevSetSubSystemVendorId(&pThis->Dev, PCI_VENDOR_ID_VMWARE); + PCIDevSetSubSystemId(&pThis->Dev, PCI_DEVICE_ID_VMWARE_SVGA2); + } + else + { +#endif /* VBOX_WITH_VMSVGA */ PCIDevSetVendorId( &pThis->Dev, 0x80ee); /* PCI vendor, just a free bogus value */ PCIDevSetDeviceId( &pThis->Dev, 0xbeef); +#ifdef VBOX_WITH_VMSVGA + } +#endif PCIDevSetClassSub( &pThis->Dev, 0x00); /* VGA controller */ PCIDevSetClassBase( &pThis->Dev, 0x03); PCIDevSetHeaderType(&pThis->Dev, 0x00); @@ -5894,14 +5906,6 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF PCIDevSetInterruptPin(&pThis->Dev, 1); #endif - /* The LBF access handler - error handling is better here than in the map function. */ - rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, NULL, "vgaGCLFBAccessHandler", &pThis->RCPtrLFBHandler); - if (RT_FAILURE(rc)) - { - AssertReleaseMsgFailed(("PDMR3LdrGetSymbolRC(, %s, \"vgaGCLFBAccessHandler\",) -> %Rrc\n", pDevIns->pReg->szRCMod, rc)); - return rc; - } - /* the interfaces. */ pThis->IBase.pfnQueryInterface = vgaPortQueryInterface; @@ -5925,34 +5929,74 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF pThis->IVBVACallbacks.pfnCrHgsmiControlCompleteAsync = vboxVDMACrHgsmiControlCompleteAsync; # endif #endif + pThis->IVBVACallbacks.pfnCrCtlSubmit = vboxCmdVBVACmdHostCtl; + + /* + * We use our own critical section to avoid unncessary pointer indirections + * in interface methods (as we all as for historical reasons). + */ + rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, RT_SRC_POS, "VGA#%u", iInstance); + AssertRCReturn(rc, rc); + rc = PDMDevHlpSetDeviceCritSect(pDevIns, &pThis->CritSect); + AssertRCReturn(rc, rc); /* * Allocate the VRAM and map the first 512KB of it into GC so we can speed up VGA support. */ - rc = PDMDevHlpMMIO2Register(pDevIns, 0 /* iRegion */, pThis->vram_size, 0, (void **)&pThis->vram_ptrR3, "VRam"); +#ifdef VBOX_WITH_VMSVGA + int iPCIRegionVRAM = (pThis->fVMSVGAEnabled) ? 1 : 0; + + if (pThis->fVMSVGAEnabled) + { + /* + * Allocate and initialize the FIFO MMIO2 memory. + */ + rc = PDMDevHlpMMIO2Register(pDevIns, 2 /*iRegion*/, VMSVGA_FIFO_SIZE, 0 /*fFlags*/, (void **)&pThis->svga.pFIFOR3, "VMSVGA-FIFO"); + if (RT_FAILURE(rc)) + return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, + N_("Failed to allocate %u bytes of memory for the VMSVGA device"), VMSVGA_FIFO_SIZE); + pThis->svga.pFIFOR0 = (RTR0PTR)pThis->svga.pFIFOR3; + pThis->svga.cbFIFO = VMSVGA_FIFO_SIZE; + } +#else + int iPCIRegionVRAM = 0; +#endif + rc = PDMDevHlpMMIO2Register(pDevIns, iPCIRegionVRAM, pThis->vram_size, 0, (void **)&pThis->vram_ptrR3, "VRam"); AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", pThis->vram_size, rc), rc); pThis->vram_ptrR0 = (RTR0PTR)pThis->vram_ptrR3; /** @todo @bugref{1865} Map parts into R0 or just use PGM access (Mac only). */ if (pThis->fGCEnabled) { RTRCPTR pRCMapping = 0; - rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pRCMapping); + rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, iPCIRegionVRAM, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pRCMapping); AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMHyperMapMMIO2(%#x,) -> %Rrc\n", VGA_MAPPING_SIZE, rc), rc); pThis->vram_ptrRC = pRCMapping; +# ifdef VBOX_WITH_VMSVGA + /* Don't need a mapping in RC */ +# endif } #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) if (pThis->fR0Enabled) { RTR0PTR pR0Mapping = 0; - rc = PDMDevHlpMMIO2MapKernel(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pR0Mapping); + rc = PDMDevHlpMMIO2MapKernel(pDevIns, iPCIRegionVRAM, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pR0Mapping); AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMapMMIO2IntoR0(%#x,) -> %Rrc\n", VGA_MAPPING_SIZE, rc), rc); pThis->vram_ptrR0 = pR0Mapping; +# ifdef VBOX_WITH_VMSVGA + if (pThis->fVMSVGAEnabled) + { + RTR0PTR pR0Mapping = 0; + rc = PDMDevHlpMMIO2MapKernel(pDevIns, 2 /* iRegion */, 0 /* off */, VMSVGA_FIFO_SIZE, "VMSVGA-FIFO", &pR0Mapping); + AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMapMMIO2IntoR0(%#x,) -> %Rrc\n", VMSVGA_FIFO_SIZE, rc), rc); + pThis->svga.pFIFOR0 = pR0Mapping; + } +# endif } #endif /* - * Register I/O ports, ROM and save state. + * Register I/O ports. */ rc = PDMDevHlpIOPortRegister(pDevIns, 0x3c0, 16, NULL, vgaIOPortWrite, vgaIOPortRead, NULL, NULL, "VGA - 3c0"); if (RT_FAILURE(rc)) @@ -6094,8 +6138,6 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF pThis->pszVgaBiosFile = NULL; } - const uint8_t *pu8VgaBiosBinary = NULL; - uint64_t cbVgaBiosBinary; /* * Determine the VGA BIOS ROM size, open specified ROM file in the process. */ @@ -6160,7 +6202,9 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF /* If we were unable to get the data from file for whatever reason, fall back to the built-in ROM image. */ - uint32_t fFlags = 0; + const uint8_t *pu8VgaBiosBinary; + uint64_t cbVgaBiosBinary; + uint32_t fFlags = 0; if (pThis->pu8VgaBios == NULL) { pu8VgaBiosBinary = g_abVgaBiosBinary; @@ -6181,7 +6225,9 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF if (RT_FAILURE(rc)) return rc; - /* save */ + /* + * Saved state. + */ rc = PDMDevHlpSSMRegisterEx(pDevIns, VGA_SAVEDSTATE_VERSION, sizeof(*pThis), NULL, NULL, vgaR3LiveExec, NULL, vgaR3SavePrep, vgaR3SaveExec, vgaR3SaveDone, @@ -6189,7 +6235,9 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF if (RT_FAILURE(rc)) return rc; - /* PCI */ + /* + * PCI device registration. + */ rc = PDMDevHlpPCIRegister(pDevIns, &pThis->Dev); if (RT_FAILURE(rc)) return rc; @@ -6197,17 +6245,26 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF if (pThis->Dev.devfn != 16 && iInstance == 0) Log(("!!WARNING!!: pThis->dev.devfn=%d (ignore if testcase or not started by Main)\n", pThis->Dev.devfn)); - rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0 /* iRegion */, pThis->vram_size, PCI_ADDRESS_SPACE_MEM_PREFETCH, vgaR3IORegionMap); - if (RT_FAILURE(rc)) - return rc; - - /* Initialize the PDM lock. */ - rc = PDMDevHlpCritSectInit(pDevIns, &pThis->lock, RT_SRC_POS, "VGA#u", iInstance); - if (RT_FAILURE(rc)) +#ifdef VBOX_WITH_VMSVGA + if (pThis->fVMSVGAEnabled) { - Log(("%s: Failed to create critical section.\n", __FUNCTION__)); - return rc; + /* Register the io command ports. */ + rc = PDMDevHlpPCIIORegionRegister (pDevIns, 0 /* iRegion */, 0x10, PCI_ADDRESS_SPACE_IO, vmsvgaR3IORegionMap); + if (RT_FAILURE (rc)) + return rc; + /* VMware's MetalKit doesn't like PCI_ADDRESS_SPACE_MEM_PREFETCH */ + rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1 /* iRegion */, pThis->vram_size, PCI_ADDRESS_SPACE_MEM /* PCI_ADDRESS_SPACE_MEM_PREFETCH */, vgaR3IORegionMap); + if (RT_FAILURE(rc)) + return rc; + rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2 /* iRegion */, VMSVGA_FIFO_SIZE, PCI_ADDRESS_SPACE_MEM /* PCI_ADDRESS_SPACE_MEM_PREFETCH */, vmsvgaR3IORegionMap); + if (RT_FAILURE(rc)) + return rc; } + else +#endif /* VBOX_WITH_VMSVGA */ + rc = PDMDevHlpPCIIORegionRegister(pDevIns, iPCIRegionVRAM, pThis->vram_size, PCI_ADDRESS_SPACE_MEM_PREFETCH, vgaR3IORegionMap); + if (RT_FAILURE(rc)) + return rc; /* * Create the refresh timer. @@ -6573,28 +6630,24 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF if (pThis->pszLogoFile) { rc = RTFileRead(FileLogo, pLogoHdr + 1, LogoHdr.cbLogo, NULL); + if (RT_SUCCESS(rc)) + rc = vbeParseBitmap(pThis); if (RT_FAILURE(rc)) { - AssertMsgFailed(("RTFileRead(,,%d,NULL) -> %Rrc\n", LogoHdr.cbLogo, rc)); + LogRel(("Error %Rrc reading logo file '%s', using internal logo\n", + rc, pThis->pszLogoFile)); pLogoHdr->cbLogo = LogoHdr.cbLogo = g_cbVgaDefBiosLogo; - memcpy(pLogoHdr + 1, g_abVgaDefBiosLogo, LogoHdr.cbLogo); } } - else - memcpy(pLogoHdr + 1, g_abVgaDefBiosLogo, LogoHdr.cbLogo); - - rc = vbeParseBitmap(pThis); - if (RT_FAILURE(rc)) + if ( !pThis->pszLogoFile + || RT_FAILURE(rc)) { - AssertMsgFailed(("vbeParseBitmap() -> %Rrc\n", rc)); - pLogoHdr->cbLogo = LogoHdr.cbLogo = g_cbVgaDefBiosLogo; memcpy(pLogoHdr + 1, g_abVgaDefBiosLogo, LogoHdr.cbLogo); + rc = vbeParseBitmap(pThis); + if (RT_FAILURE(rc)) + AssertReleaseMsgFailed(("Parsing of internal bitmap failed! vbeParseBitmap() -> %Rrc\n", rc)); } - rc = vbeParseBitmap(pThis); - if (RT_FAILURE(rc)) - AssertReleaseMsgFailed(("Internal bitmap failed! vbeParseBitmap() -> %Rrc\n", rc)); - rc = VINF_SUCCESS; } else @@ -6617,6 +6670,15 @@ static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCF AssertRC(rc); } #endif + +#ifdef VBOX_WITH_VMSVGA + if ( rc == VINF_SUCCESS + && pThis->fVMSVGAEnabled) + { + rc = vmsvgaInit(pDevIns); + } +#endif + /* * Statistics. */ @@ -6662,10 +6724,14 @@ const PDMDEVREG g_DeviceVga = vgaR3Destruct, /* pfnRelocate */ vgaR3Relocate, - /* pfnIOCtl */ + /* pfnMemSetup */ NULL, /* pfnPowerOn */ +#ifdef VBOX_WITH_VMSVGA + vmsvgaR3PowerOn, +#else NULL, +#endif /* pfnReset */ vgaR3Reset, /* pfnSuspend */ diff --git a/src/VBox/Devices/Graphics/DevVGA.h b/src/VBox/Devices/Graphics/DevVGA.h index f576fda9..aad2b43c 100644 --- a/src/VBox/Devices/Graphics/DevVGA.h +++ b/src/VBox/Devices/Graphics/DevVGA.h @@ -4,7 +4,7 @@ */ /* - * Copyright (C) 2006-2007 Oracle Corporation + * Copyright (C) 2006-2013 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; @@ -64,6 +64,12 @@ #endif /* VBOX_WITH_HGSMI */ #include "DevVGASavedState.h" +#ifdef VBOX_WITH_VMSVGA +# include "DevVGA-SVGA.h" +#endif + +# include <iprt/list.h> + #define MSR_COLOR_EMULATION 0x01 #define MSR_PAGE_SELECT 0x20 @@ -195,6 +201,16 @@ typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y); typedef struct VBOXVDMAHOST *PVBOXVDMAHOST; #endif +#ifdef VBOX_WITH_VIDEOHWACCEL +#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000 + +typedef struct _VBOX_VHWA_PENDINGCMD +{ + RTLISTNODE Node; + PVBOXVHWACMD pCommand; +} VBOX_VHWA_PENDINGCMD; +#endif + typedef struct VGAState { #ifndef VBOX VGA_STATE_COMMON @@ -259,8 +275,7 @@ typedef struct VGAState { PPDMDEVINSRC pDevInsRC; /** Pointer to the GC vram mapping. */ RCPTRTYPE(uint8_t *) vram_ptrRC; - /** Pointer to vgaGCLFBAccessHandler(). */ - RTRCPTR RCPtrLFBHandler; + uint32_t PaddingMinus1; /** Pointer to the device instance - R3 Ptr. */ PPDMDEVINSR3 pDevInsR3; @@ -278,6 +293,9 @@ typedef struct VGAState { /** LUN\#0: VBVA callbacks interface */ PDMIDISPLAYVBVACALLBACKS IVBVACallbacks; # endif +# if HC_ARCH_BITS == 32 + uint32_t Padding0; +# endif /** Pointer to base interface of the driver. */ R3PTRTYPE(PPDMIBASE) pDrvBase; /** Pointer to display connector interface of the driver. */ @@ -291,6 +309,81 @@ typedef struct VGAState { /** The R0 vram pointer... */ R0PTRTYPE(uint8_t *) vram_ptrR0; +#ifdef VBOX_WITH_VMSVGA + struct + { + /** The host window handle */ + uint64_t u64HostWindowId; + /** The R3 FIFO pointer. */ + R3PTRTYPE(uint32_t *) pFIFOR3; + /** The R0 FIFO pointer. */ + R0PTRTYPE(uint32_t *) pFIFOR0; + /** R3 Opaque pointer to svga state. */ + R3PTRTYPE(void *) pSVGAState; + /** R3 Opaque pointer to 3d state. */ + R3PTRTYPE(void *) p3dState; + /** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */ + R3PTRTYPE(void *) pFrameBufferBackup; +#if HC_ARCH_BITS == 32 + uint32_t Padding3; +#endif + /** Guest physical address of the FIFO memory range. */ + RTGCPHYS GCPhysFIFO; + /** Size in bytes of the FIFO memory range. */ + uint32_t cbFIFO; + /** SVGA id. */ + uint32_t u32SVGAId; + /** SVGA extensions enabled or not. */ + uint32_t fEnabled; + /** SVGA memory area configured status. */ + uint32_t fConfigured; + /** Device is busy handling FIFO requests. */ + uint32_t fBusy; + /** Traces (dirty page detection) enabled or not. */ + uint32_t fTraces; + /** Guest OS identifier. */ + uint32_t u32GuestId; + /** Scratch region size. */ + uint32_t cScratchRegion; + /** Scratch array. */ + uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE]; + /** Irq status. */ + uint32_t u32IrqStatus; + /** Irq mask. */ + uint32_t u32IrqMask; + /** Pitch lock. */ + uint32_t u32PitchLock; + /** Current GMR id. (SVGA_REG_GMR_ID) */ + uint32_t u32CurrentGMRId; + /** Register caps. */ + uint32_t u32RegCaps; + /** Physical address of command mmio range. */ + uint32_t Padding2; + RTIOPORT BasePort; + /** Port io index register. */ + uint32_t u32IndexReg; + /** FIFO request semaphore. */ + RTSEMEVENT FIFORequestSem; + /** FIFO IO Thread. */ + R3PTRTYPE(PPDMTHREAD) pFIFOIOThread; + int32_t iWidth; + int32_t iHeight; + uint32_t iBpp; + uint32_t cbScanline; + /** Maximum width supported. */ + uint32_t u32MaxWidth; + /** Maximum height supported. */ + uint32_t u32MaxHeight; + /** Action flags */ + uint32_t u32ActionFlags; + /** SVGA 3d extensions enabled or not. */ + bool f3DEnabled; + /** VRAM page monitoring enabled or not. */ + bool fVRAMTracking; + bool Padding6[2]; + } svga; +#endif + /** The number of monitors. */ uint32_t cMonitors; /** Current refresh timer interval. */ @@ -310,12 +403,18 @@ typedef struct VGAState { bool fRemappedVGA; /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */ bool fRenderVRAM; +#ifdef VBOX_WITH_VMSVGA + /* Whether the SVGA emulation is enabled or not. */ + bool fVMSVGAEnabled; + bool Padding1[1]; +#else bool Padding1[2]; +#endif /** The physical address the VRAM was assigned. */ RTGCPHYS GCPhysVRAM; - /** The critical section. */ - PDMCRITSECT lock; + /** The critical section protect the instance data. */ + PDMCRITSECT CritSect; /** The PCI device. */ PCIDEVICE Dev; @@ -418,6 +517,21 @@ typedef struct VGAState { uint8_t Padding10[14]; # endif # endif /* VBOX_WITH_HGSMI */ + + struct { + volatile uint32_t cPending; + uint32_t Padding1; + union + { + RTLISTNODE PendingList; + /* make sure the structure sized cross different contexts correctly */ + struct + { + R3PTRTYPE(void *) dummy1; + R3PTRTYPE(void *) dummy2; + } dummy; + }; + } pendingVhwaCommands; #endif /* VBOX */ } VGAState; #ifdef VBOX @@ -479,10 +593,13 @@ int VBVAInit (PVGASTATE pVGAState); void VBVADestroy (PVGASTATE pVGAState); int VBVAUpdateDisplay (PVGASTATE pVGAState); void VBVAReset (PVGASTATE pVGAState); +void VBVAPause (PVGASTATE pVGAState, bool fPause); +int VBVAGetScreenInfo(PVGASTATE pVGAState, unsigned uScreenId, struct VBVAINFOSCREEN *pScreen, void **ppvVram); bool VBVAIsEnabled(PVGASTATE pVGAState); void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags); +void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags); /* @return host-guest flags that were set on reset * this allows the caller to make further cleaning when needed, @@ -494,6 +611,8 @@ int vbvaVHWACommandCompleteAsynch(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHW int vbvaVHWAConstruct (PVGASTATE pVGAState); int vbvaVHWAReset (PVGASTATE pVGAState); +void vbvaTimerCb(PVGASTATE pVGAState); + int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM); int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM); # endif @@ -506,6 +625,10 @@ int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM); int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc); int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc); # endif +int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface, + struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd, + PFNCRCTLCOMPLETION pfnCompletion, + void *pvCompletion); int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM); int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version); @@ -515,14 +638,26 @@ int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM); typedef struct VBOXVDMAHOST *PVBOXVDMAHOST; int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements); int vboxVDMADestruct(PVBOXVDMAHOST pVdma); +int vboxVDMAReset(PVBOXVDMAHOST pVdma); void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd); void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd); int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM); int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM); # endif /* VBOX_WITH_VDMA */ +int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState); +int vboxCmdVBVACmdFlush(PVGASTATE pVGAState); +void vboxCmdVBVACmdTimer(PVGASTATE pVGAState); +int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl); + #endif /* VBOX_WITH_HGSMI */ +# ifdef VBOX_WITH_VMSVGA +int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer); +int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState); +int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height); +# endif + #ifndef VBOX void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, unsigned long vga_ram_offset, int vga_ram_size); diff --git a/src/VBox/Devices/Graphics/DevVGAModes.h b/src/VBox/Devices/Graphics/DevVGAModes.h index f03f7e7e..5edcbb8d 100644 --- a/src/VBox/Devices/Graphics/DevVGAModes.h +++ b/src/VBox/Devices/Graphics/DevVGAModes.h @@ -7,7 +7,7 @@ */ /* - * Copyright (C) 2006-2007 Oracle Corporation + * Copyright (C) 2006-2010 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; diff --git a/src/VBox/Devices/Graphics/DevVGASavedState.h b/src/VBox/Devices/Graphics/DevVGASavedState.h index 6c4067d1..1ee861a1 100644 --- a/src/VBox/Devices/Graphics/DevVGASavedState.h +++ b/src/VBox/Devices/Graphics/DevVGASavedState.h @@ -7,7 +7,7 @@ */ /* - * Copyright (C) 2006-2009 Oracle Corporation + * Copyright (C) 2006-2013 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; @@ -22,7 +22,15 @@ #ifndef Graphics_DevVGASavedState_h #define Graphics_DevVGASavedState_h -#define VGA_SAVEDSTATE_VERSION 8 +#ifdef VBOX_WITH_VMSVGA +#define VGA_SAVEDSTATE_VERSION_VMSVGA_2D 10 /* <- internal build with 2d state only */ +#define VGA_SAVEDSTATE_VERSION_VMSVGA 11 +#define VGA_SAVEDSTATE_VERSION 11 +#else +#define VGA_SAVEDSTATE_VERSION 10 +#endif +#define VGA_SAVEDSTATE_VERSION_WITH_PENDVHWA 10 +#define VGA_SAVEDSTATE_VERSION_INV_GCMDFIFO 8 /* <- states upto and including this version may contain invalid completed Guest Commands fifo entries */ #define VGA_SAVEDSTATE_VERSION_INV_VHEIGHT 8 /* <- states upto and including this version may contain invalid vbe_regs[VBE_DISPI_INDEX_VIRT_HEIGHT] value */ #define VGA_SAVEDSTATE_VERSION_WDDM 7 #define VGA_SAVEDSTATE_VERSION_PRE_WDDM 6 diff --git a/src/VBox/Devices/Graphics/DevVGATmpl.h b/src/VBox/Devices/Graphics/DevVGATmpl.h index bd65c65e..6c9efb5a 100644 --- a/src/VBox/Devices/Graphics/DevVGATmpl.h +++ b/src/VBox/Devices/Graphics/DevVGATmpl.h @@ -4,7 +4,7 @@ */ /* - * Copyright (C) 2006-2007 Oracle Corporation + * Copyright (C) 2006-2011 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; diff --git a/src/VBox/Devices/Graphics/DevVGA_VBVA.cpp b/src/VBox/Devices/Graphics/DevVGA_VBVA.cpp index 01269b17..ed727b13 100644 --- a/src/VBox/Devices/Graphics/DevVGA_VBVA.cpp +++ b/src/VBox/Devices/Graphics/DevVGA_VBVA.cpp @@ -1,9 +1,10 @@ +/* $Id: DevVGA_VBVA.cpp $ */ /** @file * VirtualBox Video Acceleration (VBVA). */ /* - * Copyright (C) 2006-2009 Oracle Corporation + * Copyright (C) 2006-2013 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; @@ -14,6 +15,9 @@ * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. */ +/******************************************************************************* +* Header Files * +*******************************************************************************/ #define LOG_GROUP LOG_GROUP_DEV_VGA #include <VBox/vmm/pdmifs.h> #include <VBox/vmm/pdmdev.h> @@ -36,9 +40,12 @@ #if 0 // def DEBUG_sunlover #define LOGVBVABUFFER(a) LogFlow(a) #else -#define LOGVBVABUFFER(a) do {} while(0) +#define LOGVBVABUFFER(a) do {} while (0) #endif +/******************************************************************************* +* Structures and Typedefs * +*******************************************************************************/ typedef struct VBVAPARTIALRECORD { uint8_t *pu8; @@ -68,20 +75,23 @@ typedef struct VBVAMOUSESHAPEINFO uint8_t *pu8Shape; } VBVAMOUSESHAPEINFO; -/* @todo saved state: save and restore VBVACONTEXT */ +/** @todo saved state: save and restore VBVACONTEXT */ typedef struct VBVACONTEXT { uint32_t cViews; VBVAVIEW aViews[64 /* @todo SchemaDefs::MaxGuestMonitors*/]; VBVAMOUSESHAPEINFO mouseShapeInfo; + bool fPaused; } VBVACONTEXT; -/* Copies 'cb' bytes from the VBVA ring buffer to the 'pu8Dst'. + + +/** Copies @a cb bytes from the VBVA ring buffer to the @a pu8Dst. * Used for partial records or for records which cross the ring boundary. */ static void vbvaFetchBytes (VBVABUFFER *pVBVA, uint8_t *pu8Dst, uint32_t cb) { - /* @todo replace the 'if' with an assert. The caller must ensure this condition. */ + /** @todo replace the 'if' with an assert. The caller must ensure this condition. */ if (cb >= pVBVA->cbData) { AssertMsgFailed (("cb = 0x%08X, ring buffer size 0x%08X", cb, pVBVA->cbData)); @@ -620,6 +630,13 @@ static int vbvaMousePointerShape (PVGASTATE pVGAState, VBVACONTEXT *pCtx, const if (fShape) { + if (pShape->u32Width > 8192 || pShape->u32Height > 8192) + { + Log(("vbvaMousePointerShape: unsupported size %ux%u\n", + pShape->u32Width, pShape->u32Height)); + return VERR_INVALID_PARAMETER; + } + cbPointerData = ((((pShape->u32Width + 7) / 8) * pShape->u32Height + 3) & ~3) + pShape->u32Width * 4 * pShape->u32Height; } @@ -757,7 +774,7 @@ static void vbvaVHWAHHCommandReinit(VBOXVHWACMD* pHdr, VBOXVHWACMD_TYPE enmCmd, static VBOXVHWACMD* vbvaVHWAHHCommandCreate (PVGASTATE pVGAState, VBOXVHWACMD_TYPE enmCmd, int32_t iDisplay, VBOXVHWACMD_LENGTH cbCmd) { - VBOXVHWACMD* pHdr = (VBOXVHWACMD*)RTMemAlloc(cbCmd + VBOXVHWACMD_HEADSIZE()); + VBOXVHWACMD* pHdr = (VBOXVHWACMD*)RTMemAllocZ(cbCmd + VBOXVHWACMD_HEADSIZE()); Assert(pHdr); if (pHdr) vbvaVHWAHHCommandReinit(pHdr, enmCmd, iDisplay); @@ -779,15 +796,237 @@ DECLINLINE(void) vbvaVHWAHHCommandRetain (VBOXVHWACMD* pCmd) ASMAtomicIncU32(&pCmd->cRefs); } -static unsigned vbvaVHWAHandleCommand (PVGASTATE pVGAState, VBVACONTEXT *pCtx, PVBOXVHWACMD pCmd) +static void vbvaVHWACommandComplete(PVGASTATE pVGAState, PVBOXVHWACMD pCommand, bool fAsyncCommand) +{ + if (fAsyncCommand) + { + Assert(pCommand->Flags & VBOXVHWACMD_FLAG_HG_ASYNCH); + vbvaVHWACommandCompleteAsynch(&pVGAState->IVBVACallbacks, pCommand); + } + else + { + Log(("VGA Command <<< Sync rc %d %#p, %d\n", pCommand->rc, pCommand, pCommand->enmCmd)); + pCommand->Flags &= (~VBOXVHWACMD_FLAG_HG_ASYNCH); + } + +} + +static void vbvaVHWACommandCompleteAllPending(PVGASTATE pVGAState, int rc) +{ + if (!ASMAtomicUoReadU32(&pVGAState->pendingVhwaCommands.cPending)) + return; + + VBOX_VHWA_PENDINGCMD *pIter, *pNext; + + PDMCritSectEnter(&pVGAState->CritSect, VERR_SEM_BUSY); + + RTListForEachSafe(&pVGAState->pendingVhwaCommands.PendingList, pIter, pNext, VBOX_VHWA_PENDINGCMD, Node) + { + pIter->pCommand->rc = rc; + vbvaVHWACommandComplete(pVGAState, pIter->pCommand, true); + + /* the command is submitted/processed, remove from the pend list */ + RTListNodeRemove(&pIter->Node); + ASMAtomicDecU32(&pVGAState->pendingVhwaCommands.cPending); + RTMemFree(pIter); + } + + PDMCritSectLeave(&pVGAState->CritSect); +} + +static void vbvaVHWACommandClearAllPending(PVGASTATE pVGAState) +{ + if (!ASMAtomicUoReadU32(&pVGAState->pendingVhwaCommands.cPending)) + return; + + VBOX_VHWA_PENDINGCMD *pIter, *pNext; + + PDMCritSectEnter(&pVGAState->CritSect, VERR_SEM_BUSY); + + RTListForEachSafe(&pVGAState->pendingVhwaCommands.PendingList, pIter, pNext, VBOX_VHWA_PENDINGCMD, Node) + { + RTListNodeRemove(&pIter->Node); + ASMAtomicDecU32(&pVGAState->pendingVhwaCommands.cPending); + RTMemFree(pIter); + } + + PDMCritSectLeave(&pVGAState->CritSect); +} + +static void vbvaVHWACommandPend(PVGASTATE pVGAState, PVBOXVHWACMD pCommand) +{ + int rc = VERR_BUFFER_OVERFLOW; + + if (ASMAtomicUoReadU32(&pVGAState->pendingVhwaCommands.cPending) < VBOX_VHWA_MAX_PENDING_COMMANDS) + { + VBOX_VHWA_PENDINGCMD *pPend = (VBOX_VHWA_PENDINGCMD*)RTMemAlloc(sizeof (*pPend)); + if (pPend) + { + pCommand->Flags |= VBOXVHWACMD_FLAG_HG_ASYNCH; + pPend->pCommand = pCommand; + PDMCritSectEnter(&pVGAState->CritSect, VERR_SEM_BUSY); + if (ASMAtomicUoReadU32(&pVGAState->pendingVhwaCommands.cPending) < VBOX_VHWA_MAX_PENDING_COMMANDS) + { + RTListAppend(&pVGAState->pendingVhwaCommands.PendingList, &pPend->Node); + ASMAtomicIncU32(&pVGAState->pendingVhwaCommands.cPending); + PDMCritSectLeave(&pVGAState->CritSect); + return; + } + PDMCritSectLeave(&pVGAState->CritSect); + LogRel(("Pending command count has reached its threshold.. completing them all..")); + RTMemFree(pPend); + } + else + rc = VERR_NO_MEMORY; + } + else + LogRel(("Pending command count has reached its threshold, completing them all..")); + + vbvaVHWACommandCompleteAllPending(pVGAState, rc); + + pCommand->rc = rc; + + vbvaVHWACommandComplete(pVGAState, pCommand, false); +} + +static bool vbvaVHWACommandCanPend(PVBOXVHWACMD pCommand) +{ + switch (pCommand->enmCmd) + { + case VBOXVHWACMD_TYPE_HH_CONSTRUCT: + case VBOXVHWACMD_TYPE_HH_SAVESTATE_SAVEBEGIN: + case VBOXVHWACMD_TYPE_HH_SAVESTATE_SAVEEND: + case VBOXVHWACMD_TYPE_HH_SAVESTATE_SAVEPERFORM: + case VBOXVHWACMD_TYPE_HH_SAVESTATE_LOADPERFORM: + return false; + default: + return true; + } +} + +static int vbvaVHWACommandSavePending(PVGASTATE pVGAState, PSSMHANDLE pSSM) +{ + int rc = SSMR3PutU32(pSSM, pVGAState->pendingVhwaCommands.cPending); + AssertRCReturn(rc, rc); + VBOX_VHWA_PENDINGCMD *pIter; + RTListForEach(&pVGAState->pendingVhwaCommands.PendingList, pIter, VBOX_VHWA_PENDINGCMD, Node) + { + rc = SSMR3PutU32(pSSM, (uint32_t)(((uint8_t*)pIter->pCommand) - ((uint8_t*)pVGAState->vram_ptrR3))); + AssertRCReturn(rc, rc); + } + return rc; +} + +static int vbvaVHWACommandLoadPending(PVGASTATE pVGAState, PSSMHANDLE pSSM, uint32_t u32Version) { + if (u32Version < VGA_SAVEDSTATE_VERSION_WITH_PENDVHWA) + return VINF_SUCCESS; + + int rc; + uint32_t u32; + rc = SSMR3GetU32(pSSM, &u32); + AssertRCReturn(rc, rc); + for (uint32_t i = 0; i < u32; ++i) + { + uint32_t off32; + rc = SSMR3GetU32(pSSM, &off32); + AssertRCReturn(rc, rc); + PVBOXVHWACMD pCommand = (PVBOXVHWACMD)(((uint8_t*)pVGAState->vram_ptrR3) + off32); + vbvaVHWACommandPend(pVGAState, pCommand); + } + return rc; +} + + +static bool vbvaVHWACommandSubmit(PVGASTATE pVGAState, PVBOXVHWACMD pCommand, bool fAsyncCommand) +{ + unsigned id = (unsigned)pCommand->iDisplay; + bool fPend = false; + if (pVGAState->pDrv->pfnVHWACommandProcess) - pVGAState->pDrv->pfnVHWACommandProcess(pVGAState->pDrv, pCmd); -#ifdef DEBUG_misha + { + Log(("VGA Command >>> %#p, %d\n", pCommand, pCommand->enmCmd)); + int rc = pVGAState->pDrv->pfnVHWACommandProcess(pVGAState->pDrv, pCommand); + if (rc == VINF_CALLBACK_RETURN) + { + Log(("VGA Command --- Going Async %#p, %d\n", pCommand, pCommand->enmCmd)); + return true; /* command will be completed asynchronously, return right away */ + } + else if (rc == VERR_INVALID_STATE) + { + Log(("VGA Command --- Trying Pend %#p, %d\n", pCommand, pCommand->enmCmd)); + fPend = vbvaVHWACommandCanPend(pCommand); + if (!fPend) + { + Log(("VGA Command --- Can NOT Pend %#p, %d\n", pCommand, pCommand->enmCmd)); + pCommand->rc = rc; + } + else + Log(("VGA Command --- Can Pend %#p, %d\n", pCommand, pCommand->enmCmd)); + } + else + { + Log(("VGA Command --- Going Complete Sync rc %d %#p, %d\n", rc, pCommand, pCommand->enmCmd)); + pCommand->rc = rc; + } + + /* the command was completed, take a special care about it (seee below) */ + } else + { AssertFailed(); -#endif - return 0; + pCommand->rc = VERR_INVALID_STATE; + } + + if (fPend) + return false; + + vbvaVHWACommandComplete(pVGAState, pCommand, fAsyncCommand); + + return true; +} + +static bool vbvaVHWACheckPendingCommands(PVGASTATE pVGAState) +{ + if (!ASMAtomicUoReadU32(&pVGAState->pendingVhwaCommands.cPending)) + return true; + + VBOX_VHWA_PENDINGCMD *pIter, *pNext; + + PDMCritSectEnter(&pVGAState->CritSect, VERR_SEM_BUSY); + + RTListForEachSafe(&pVGAState->pendingVhwaCommands.PendingList, pIter, pNext, VBOX_VHWA_PENDINGCMD, Node) + { + if (!vbvaVHWACommandSubmit(pVGAState, pIter->pCommand, true)) + { + PDMCritSectLeave(&pVGAState->CritSect); + return false; /* the command should be pended still */ + } + + /* the command is submitted/processed, remove from the pend list */ + RTListNodeRemove(&pIter->Node); + ASMAtomicDecU32(&pVGAState->pendingVhwaCommands.cPending); + RTMemFree(pIter); + } + + PDMCritSectLeave(&pVGAState->CritSect); + + return true; +} + +void vbvaTimerCb(PVGASTATE pVGAState) +{ + vbvaVHWACheckPendingCommands(pVGAState); +} +static void vbvaVHWAHandleCommand(PVGASTATE pVGAState, PVBOXVHWACMD pCmd) +{ + if (vbvaVHWACheckPendingCommands(pVGAState)) + { + if (vbvaVHWACommandSubmit(pVGAState, pCmd, false)) + return; + } + + vbvaVHWACommandPend(pVGAState, pCmd); } static DECLCALLBACK(void) vbvaVHWAHHCommandSetEventCallback(void * pContext) @@ -805,7 +1044,7 @@ static int vbvaVHWAHHCommandPost(PVGASTATE pVGAState, VBOXVHWACMD* pCmd) /* ensure the cmd is not deleted until we process it */ vbvaVHWAHHCommandRetain (pCmd); VBOXVHWA_HH_CALLBACK_SET(pCmd, vbvaVHWAHHCommandSetEventCallback, (void*)hComplEvent); - vbvaVHWAHandleCommand(pVGAState, NULL, pCmd); + vbvaVHWAHandleCommand(pVGAState, pCmd); if((ASMAtomicReadU32((volatile uint32_t *)&pCmd->Flags) & VBOXVHWACMD_FLAG_HG_ASYNCH) != 0) { rc = RTSemEventWaitNoResume(hComplEvent, RT_INDEFINITE_WAIT); @@ -827,6 +1066,9 @@ static int vbvaVHWAHHCommandPost(PVGASTATE pVGAState, VBOXVHWACMD* pCmd) int vbvaVHWAConstruct (PVGASTATE pVGAState) { + pVGAState->pendingVhwaCommands.cPending = 0; + RTListInit(&pVGAState->pendingVhwaCommands.PendingList); + VBOXVHWACMD *pCmd = vbvaVHWAHHCommandCreate(pVGAState, VBOXVHWACMD_TYPE_HH_CONSTRUCT, 0, sizeof(VBOXVHWACMD_HH_CONSTRUCT)); Assert(pCmd); if(pCmd) @@ -880,6 +1122,8 @@ int vbvaVHWAConstruct (PVGASTATE pVGAState) int vbvaVHWAReset (PVGASTATE pVGAState) { + vbvaVHWACommandClearAllPending(pVGAState); + /* ensure we have all pending cmds processed and h->g cmds disabled */ VBOXVHWACMD *pCmd = vbvaVHWAHHCommandCreate(pVGAState, VBOXVHWACMD_TYPE_HH_RESET, 0, 0); Assert(pCmd); @@ -999,6 +1243,8 @@ int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM) int vbvaVHWACommandCompleteAsynch(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd) { int rc; + Log(("VGA Command <<< Async rc %d %#p, %d\n", pCmd->rc, pCmd, pCmd->enmCmd)); + if((pCmd->Flags & VBOXVHWACMD_FLAG_HH_CMD) == 0) { PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface); @@ -1384,6 +1630,9 @@ int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM) AssertRC(rc); if (RT_SUCCESS(rc)) { + rc = vbvaVHWACommandSavePending(pVGAState, pSSM); + AssertRCReturn(rc, rc); + vbvaVHWAHHCommandReinit(pCmd, VBOXVHWACMD_TYPE_HH_SAVESTATE_SAVEEND, 0); vbvaVHWAHHPost (pVGAState, pCmd, vboxVBVASaveStateEndPreCb, NULL, &VhwaData); rc = VhwaData.rc; @@ -1497,8 +1746,7 @@ int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Vers AssertRCReturn(rc, rc); } - if ( pView->u32VBVAOffset == HGSMIOFFSET_VOID - || pView->screen.u32LineSize == 0) /* Earlier broken saved states. */ + if (pView->u32VBVAOffset == HGSMIOFFSET_VOID) { pView->pVBVA = NULL; } @@ -1579,8 +1827,11 @@ int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Vers pLoad->pSSM = pSSM; vbvaVHWAHHPost (pVGAState, pCmd, vboxVBVALoadStatePerformPreCb, vboxVBVALoadStatePerformPostCb, &VhwaData); rc = VhwaData.rc; - AssertRC(rc); vbvaVHWAHHCommandRelease(pCmd); + AssertRCReturn(rc, rc); + + rc = vbvaVHWACommandLoadPending(pVGAState, pSSM, u32Version); + AssertRCReturn(rc, rc); } else { @@ -1632,12 +1883,26 @@ int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM) void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags) { PPDMDEVINS pDevIns = pVGAState->pDevInsR3; - PDMCritSectEnter(&pVGAState->lock, VERR_SEM_BUSY); + PDMCritSectEnter(&pVGAState->CritSect, VERR_SEM_BUSY); + HGSMISetHostGuestFlags(pVGAState->pHGSMI, HGSMIHOSTFLAGS_IRQ | fFlags); PDMDevHlpPCISetIrq(pDevIns, 0, PDM_IRQ_LEVEL_HIGH); - PDMCritSectLeave(&pVGAState->lock); + + PDMCritSectLeave(&pVGAState->CritSect); } +void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags) +{ + PPDMDEVINS pDevIns = pVGAState->pDevInsR3; + PDMCritSectEnter(&pVGAState->CritSect, VERR_SEM_BUSY); + + HGSMISetHostGuestFlags(pVGAState->pHGSMI, HGSMIHOSTFLAGS_IRQ | fFlags); + PDMDevHlpPCISetIrqNoWait(pDevIns, 0, PDM_IRQ_LEVEL_HIGH); + + PDMCritSectLeave(&pVGAState->CritSect); +} + + /* * * New VBVA uses a new interface id: #define VBE_DISPI_ID_VBOX_VIDEO 0xBE01 @@ -1653,7 +1918,7 @@ static DECLCALLBACK(void) vbvaNotifyGuest (void *pvCallback) { #if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_VDMA) || defined(VBOX_WITH_WDDM)) PVGASTATE pVGAState = (PVGASTATE)pvCallback; - VBVARaiseIrq (pVGAState, 0); + VBVARaiseIrqNoWait (pVGAState, 0); #else NOREF(pvCallback); /* Do nothing. Later the VMMDev/VGA IRQ can be used for the notification. */ @@ -1674,6 +1939,32 @@ static DECLCALLBACK(int) vbvaChannelHandler (void *pvHandler, uint16_t u16Channe switch (u16ChannelInfo) { + case VBVA_CMDVBVA_SUBMIT: + { + rc = vboxCmdVBVACmdSubmit(pVGAState); + break; + } + case VBVA_CMDVBVA_FLUSH: + { + rc =vboxCmdVBVACmdFlush(pVGAState); + break; + } + case VBVA_CMDVBVA_CTL: + { + if (cbBuffer < VBoxSHGSMIBufferHeaderSize() + sizeof (VBOXCMDVBVA_CTL)) + { + Log(("buffer too small\n")); +#ifdef DEBUG_misha + AssertMsgFailed(("buffer too small\n")); +#endif + rc = VERR_INVALID_PARAMETER; + break; + } + + VBOXCMDVBVA_CTL *pCtl = (VBOXCMDVBVA_CTL*)VBoxSHGSMIBufferData((PVBOXSHGSMIHEADER)pvBuffer); + rc = vboxCmdVBVACmdCtl(pVGAState, pCtl, cbBuffer - VBoxSHGSMIBufferHeaderSize()); + break; + } #ifdef VBOX_WITH_VDMA case VBVA_VDMA_CMD: { @@ -1833,7 +2124,7 @@ static DECLCALLBACK(int) vbvaChannelHandler (void *pvHandler, uint16_t u16Channe * implemented. */ int64_t offEnd = (int64_t)pScreen->u32Height * pScreen->u32LineSize + pScreen->u32Width + pScreen->u32StartOffset; - LogRelFlowFunc(("VBVA_INFO_SCREEN: [%d] @%d,%d %dx%d, line 0x%x, BPP %d, flags 0x%x\n", + LogRel(("VBVA_INFO_SCREEN: [%d] @%d,%d %dx%d, line 0x%x, BPP %d, flags 0x%x\n", pScreen->u32ViewIndex, pScreen->i32OriginX, pScreen->i32OriginY, pScreen->u32Width, pScreen->u32Height, pScreen->u32LineSize, pScreen->u16BitsPerPixel, pScreen->u16Flags)); @@ -1962,7 +2253,14 @@ static DECLCALLBACK(int) vbvaChannelHandler (void *pvHandler, uint16_t u16Channe #ifdef VBOX_WITH_VIDEOHWACCEL case VBVA_VHWA_CMD: { - rc = vbvaVHWAHandleCommand (pVGAState, pCtx, (PVBOXVHWACMD)pvBuffer); + if (cbBuffer < sizeof (VBOXVHWACMD)) + { + rc = VERR_INVALID_PARAMETER; + break; + } + vbvaVHWAHandleCommand(pVGAState, (PVBOXVHWACMD)pvBuffer); + rc = VINF_SUCCESS; + break; } break; #endif @@ -2001,6 +2299,24 @@ static DECLCALLBACK(int) vbvaChannelHandler (void *pvHandler, uint16_t u16Channe return rc; } +/* When VBVA is paused, then VGA device is allowed to work but + * no HGSMI etc state is changed. + */ +void VBVAPause(PVGASTATE pVGAState, bool fPause) +{ + if (!pVGAState || !pVGAState->pHGSMI) + { + return; + } + + VBVACONTEXT *pCtx = (VBVACONTEXT *)HGSMIContext(pVGAState->pHGSMI); + + if (pCtx) + { + pCtx->fPaused = fPause; + } +} + void VBVAReset (PVGASTATE pVGAState) { if (!pVGAState || !pVGAState->pHGSMI) @@ -2049,14 +2365,17 @@ int VBVAUpdateDisplay (PVGASTATE pVGAState) if (pCtx) { - rc = vbvaFlush (pVGAState, pCtx); - - if (RT_SUCCESS (rc)) + if (!pCtx->fPaused) { - if (!pCtx->aViews[0].pVBVA) + rc = vbvaFlush (pVGAState, pCtx); + + if (RT_SUCCESS (rc)) { - /* VBVA is not enabled for the first view, so VGA device must do updates. */ - rc = VERR_NOT_SUPPORTED; + if (!pCtx->aViews[0].pVBVA) + { + /* VBVA is not enabled for the first view, so VGA device must do updates. */ + rc = VERR_NOT_SUPPORTED; + } } } } @@ -2093,6 +2412,7 @@ int VBVAInit (PVGASTATE pVGAState) { VBVACONTEXT *pCtx = (VBVACONTEXT *)HGSMIContext (pVGAState->pHGSMI); pCtx->cViews = pVGAState->cMonitors; + pCtx->fPaused = true; } } @@ -2116,3 +2436,39 @@ void VBVADestroy (PVGASTATE pVGAState) HGSMIDestroy (pVGAState->pHGSMI); pVGAState->pHGSMI = NULL; } + +int VBVAGetScreenInfo(PVGASTATE pVGAState, unsigned uScreenId, struct VBVAINFOSCREEN *pScreen, void **ppvVram) +{ + PPDMDEVINS pDevIns = pVGAState->pDevInsR3; + PHGSMIINSTANCE pIns = pVGAState->pHGSMI; + VBVACONTEXT *pCtx = (VBVACONTEXT *)HGSMIContext (pIns); + int rc = PDMCritSectEnter(&pVGAState->CritSect, VERR_SEM_BUSY); + if (RT_SUCCESS(rc)) + { + if (uScreenId < pCtx->cViews) + { + VBVAVIEW *pView = &pCtx->aViews[uScreenId]; + if (pView->pVBVA) + { + uint8_t *pu8VRAM = pVGAState->vram_ptrR3 + pView->view.u32ViewOffset; + *pScreen = pView->screen; + *ppvVram = (void*)pu8VRAM; + rc = VINF_SUCCESS; + } + else + { + /* pretend disabled */ + memset(pScreen, 0, sizeof (*pScreen)); + pScreen->u16Flags = VBVA_SCREEN_F_DISABLED; + pScreen->u32ViewIndex = uScreenId; + *ppvVram = NULL; + rc = VINF_SUCCESS; + } + } + else + rc = VERR_INVALID_PARAMETER; + + PDMCritSectLeave(&pVGAState->CritSect); + } + return rc; +} diff --git a/src/VBox/Devices/Graphics/DevVGA_VDMA.cpp b/src/VBox/Devices/Graphics/DevVGA_VDMA.cpp index 0d95c530..0e35fe5a 100644 --- a/src/VBox/Devices/Graphics/DevVGA_VDMA.cpp +++ b/src/VBox/Devices/Graphics/DevVGA_VDMA.cpp @@ -3,7 +3,7 @@ */ /* - * Copyright (C) 2006-2009 Oracle Corporation + * Copyright (C) 2006-2012 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; @@ -20,79 +20,760 @@ #include <iprt/thread.h> #include <iprt/mem.h> #include <iprt/asm.h> +#include <iprt/list.h> #include "DevVGA.h" #include "HGSMI/SHGSMIHost.h" #include "HGSMI/HGSMIHostHlp.h" -#ifdef VBOX_VDMA_WITH_WORKERTHREAD -typedef enum -{ - VBOXVDMAPIPE_STATE_CLOSED = 0, - VBOXVDMAPIPE_STATE_CREATED = 1, - VBOXVDMAPIPE_STATE_OPENNED = 2, - VBOXVDMAPIPE_STATE_CLOSING = 3 -} VBOXVDMAPIPE_STATE; +#include <VBox/VBoxVideo3D.h> +#include <VBox/VBoxVideoHost3D.h> + +#ifdef DEBUG_misha +# define VBOXVDBG_MEMCACHE_DISABLE +#endif + +#ifndef VBOXVDBG_MEMCACHE_DISABLE +# include <iprt/memcache.h> +#endif -typedef struct VBOXVDMAPIPE +#ifdef DEBUG_misha +#define WARN_BP() do { AssertFailed(); } while (0) +#else +#define WARN_BP() do { } while (0) +#endif +#define WARN(_msg) do { \ + LogRel(_msg); \ + WARN_BP(); \ + } while (0) + +#define VBOXVDMATHREAD_STATE_TERMINATED 0 +#define VBOXVDMATHREAD_STATE_CREATED 1 +#define VBOXVDMATHREAD_STATE_TERMINATING 2 + +typedef struct VBOXVDMATHREAD { + RTTHREAD hWorkerThread; RTSEMEVENT hEvent; - /* critical section for accessing pipe properties */ - RTCRITSECT hCritSect; - VBOXVDMAPIPE_STATE enmState; - /* true iff the other end needs Event notification */ - bool bNeedNotify; -} VBOXVDMAPIPE, *PVBOXVDMAPIPE; + RTSEMEVENT hClientEvent; + volatile uint32_t u32State; +} VBOXVDMATHREAD, *PVBOXVDMATHREAD; -typedef enum + +/* state transformations: + * + * submitter | processor + * + * LISTENING ---> PROCESSING + * + * */ +#define VBVAEXHOSTCONTEXT_STATE_LISTENING 0 +#define VBVAEXHOSTCONTEXT_STATE_PROCESSING 1 + +#define VBVAEXHOSTCONTEXT_ESTATE_DISABLED -1 +#define VBVAEXHOSTCONTEXT_ESTATE_PAUSED 0 +#define VBVAEXHOSTCONTEXT_ESTATE_ENABLED 1 + +typedef struct VBVAEXHOSTCONTEXT { - VBOXVDMAPIPE_CMD_TYPE_UNDEFINED = 0, - VBOXVDMAPIPE_CMD_TYPE_DMACMD = 1, - VBOXVDMAPIPE_CMD_TYPE_DMACTL = 2 -} VBOXVDMAPIPE_CMD_TYPE; + VBVABUFFER *pVBVA; + volatile int32_t i32State; + volatile int32_t i32EnableState; + volatile uint32_t u32cCtls; + /* critical section for accessing ctl lists */ + RTCRITSECT CltCritSect; + RTLISTANCHOR GuestCtlList; + RTLISTANCHOR HostCtlList; +#ifndef VBOXVDBG_MEMCACHE_DISABLE + RTMEMCACHE CtlCache; +#endif +} VBVAEXHOSTCONTEXT; -typedef struct VBOXVDMAPIPE_CMD_BODY +typedef enum +{ + VBVAEXHOSTCTL_TYPE_UNDEFINED = 0, + VBVAEXHOSTCTL_TYPE_HH_INTERNAL_PAUSE, + VBVAEXHOSTCTL_TYPE_HH_INTERNAL_RESUME, + VBVAEXHOSTCTL_TYPE_HH_ENABLE, + VBVAEXHOSTCTL_TYPE_HH_TERM, + VBVAEXHOSTCTL_TYPE_HH_RESET, + VBVAEXHOSTCTL_TYPE_HH_SAVESTATE, + VBVAEXHOSTCTL_TYPE_HH_LOADSTATE, + VBVAEXHOSTCTL_TYPE_HH_BE_OPAQUE, + VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE, + VBVAEXHOSTCTL_TYPE_GH_ENABLE_DISABLE +} VBVAEXHOSTCTL_TYPE; + +struct VBVAEXHOSTCTL; + +typedef DECLCALLBACKPTR(void, PFNVBVAEXHOSTCTL_COMPLETE)(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl, int rc, void *pvComplete); + +typedef struct VBVAEXHOSTCTL { - VBOXVDMAPIPE_CMD_TYPE enmType; + RTLISTNODE Node; + VBVAEXHOSTCTL_TYPE enmType; union { - PVBOXVDMACBUF_DR pDr; - PVBOXVDMA_CTL pCtl; - void *pvCmd; + struct + { + uint8_t * pu8Cmd; + uint32_t cbCmd; + } cmd; + + struct + { + PSSMHANDLE pSSM; + uint32_t u32Version; + } state; } u; -}VBOXVDMAPIPE_CMD_BODY, *PVBOXVDMAPIPE_CMD_BODY; + PFNVBVAEXHOSTCTL_COMPLETE pfnComplete; + void *pvComplete; +} VBVAEXHOSTCTL; + +/* VBoxVBVAExHP**, i.e. processor functions, can NOT be called concurrently with each other, + * but can be called with other VBoxVBVAExS** (submitter) functions except Init/Start/Term aparently. + * Can only be called be the processor, i.e. the entity that acquired the processor state by direct or indirect call to the VBoxVBVAExHSCheckCommands + * see mor edetailed comments in headers for function definitions */ +typedef enum +{ + VBVAEXHOST_DATA_TYPE_NO_DATA = 0, + VBVAEXHOST_DATA_TYPE_CMD, + VBVAEXHOST_DATA_TYPE_HOSTCTL, + VBVAEXHOST_DATA_TYPE_GUESTCTL +} VBVAEXHOST_DATA_TYPE; +static VBVAEXHOST_DATA_TYPE VBoxVBVAExHPDataGet(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t **ppCmd, uint32_t *pcbCmd); + +static void VBoxVBVAExHPDataCompleteCmd(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint32_t cbCmd); +static void VBoxVBVAExHPDataCompleteCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL *pCtl, int rc); + +/* VBoxVBVAExHP**, i.e. processor functions, can NOT be called concurrently with each other, + * can be called concurrently with istelf as well as with other VBoxVBVAEx** functions except Init/Start/Term aparently */ +static int VBoxVBVAExHSCheckCommands(struct VBVAEXHOSTCONTEXT *pCmdVbva); + +static int VBoxVBVAExHSInit(struct VBVAEXHOSTCONTEXT *pCmdVbva); +static int VBoxVBVAExHSEnable(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVABUFFER *pVBVA); +static int VBoxVBVAExHSDisable(struct VBVAEXHOSTCONTEXT *pCmdVbva); +static void VBoxVBVAExHSTerm(struct VBVAEXHOSTCONTEXT *pCmdVbva); +static int VBoxVBVAExHSSaveState(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM); +static int VBoxVBVAExHSLoadState(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM, uint32_t u32Version); + +static VBVAEXHOSTCTL* VBoxVBVAExHCtlAlloc(VBVAEXHOSTCONTEXT *pCmdVbva) +{ +#ifndef VBOXVDBG_MEMCACHE_DISABLE + return (VBVAEXHOSTCTL*)RTMemCacheAlloc(pCmdVbva->CtlCache); +#else + return (VBVAEXHOSTCTL*)RTMemAlloc(sizeof (VBVAEXHOSTCTL)); +#endif +} + +static void VBoxVBVAExHCtlFree(VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL *pCtl) +{ +#ifndef VBOXVDBG_MEMCACHE_DISABLE + RTMemCacheFree(pCmdVbva->CtlCache, pCtl); +#else + RTMemFree(pCtl); +#endif +} -typedef struct VBOXVDMAPIPE_CMD +static VBVAEXHOSTCTL* VBoxVBVAExHCtlCreate(VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL_TYPE enmType) { - HGSMILISTENTRY Entry; - VBOXVDMAPIPE_CMD_BODY Cmd; -} VBOXVDMAPIPE_CMD, *PVBOXVDMAPIPE_CMD; + VBVAEXHOSTCTL* pCtl = VBoxVBVAExHCtlAlloc(pCmdVbva); + if (!pCtl) + { + WARN(("VBoxVBVAExHCtlAlloc failed\n")); + return NULL; + } -#define VBOXVDMAPIPE_CMD_FROM_ENTRY(_pE) ( (PVBOXVDMAPIPE_CMD)((uint8_t *)(_pE) - RT_OFFSETOF(VBOXVDMAPIPE_CMD, Entry)) ) + pCtl->enmType = enmType; + return pCtl; +} -typedef struct VBOXVDMAPIPE_CMD_POOL +static int vboxVBVAExHSProcessorAcquire(struct VBVAEXHOSTCONTEXT *pCmdVbva) { - HGSMILIST List; - uint32_t cCmds; - VBOXVDMAPIPE_CMD aCmds[1]; -} VBOXVDMAPIPE_CMD_POOL, *PVBOXVDMAPIPE_CMD_POOL; + Assert(pCmdVbva->i32State >= VBVAEXHOSTCONTEXT_STATE_LISTENING); + + if (ASMAtomicCmpXchgS32(&pCmdVbva->i32State, VBVAEXHOSTCONTEXT_STATE_PROCESSING, VBVAEXHOSTCONTEXT_STATE_LISTENING)) + return VINF_SUCCESS; + return VERR_SEM_BUSY; +} + +static VBVAEXHOSTCTL* vboxVBVAExHPCheckCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, bool *pfHostCtl, bool fHostOnlyMode) +{ + Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING); + + if(!fHostOnlyMode && !ASMAtomicUoReadU32(&pCmdVbva->u32cCtls)) + return NULL; + + int rc = RTCritSectEnter(&pCmdVbva->CltCritSect); + if (RT_SUCCESS(rc)) + { + VBVAEXHOSTCTL* pCtl = RTListGetFirst(&pCmdVbva->HostCtlList, VBVAEXHOSTCTL, Node); + if (pCtl) + *pfHostCtl = true; + else if (!fHostOnlyMode) + { + if (ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) > VBVAEXHOSTCONTEXT_ESTATE_PAUSED) + { + pCtl = RTListGetFirst(&pCmdVbva->GuestCtlList, VBVAEXHOSTCTL, Node); + /* pCtl can not be null here since pCmdVbva->u32cCtls is not null, + * and there are no HostCtl commands*/ + Assert(pCtl); + *pfHostCtl = false; + } + } + + if (pCtl) + { + RTListNodeRemove(&pCtl->Node); + ASMAtomicDecU32(&pCmdVbva->u32cCtls); + } + + RTCritSectLeave(&pCmdVbva->CltCritSect); + + return pCtl; + } + else + WARN(("RTCritSectEnter failed %d\n", rc)); + + return NULL; +} + +static VBVAEXHOSTCTL* VBoxVBVAExHPCheckHostCtlOnDisable(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + bool fHostCtl; + return vboxVBVAExHPCheckCtl(pCmdVbva, &fHostCtl, true); +} + + +static bool vboxVBVAExHPCheckProcessCtlInternal(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL* pCtl) +{ + switch (pCtl->enmType) + { + case VBVAEXHOSTCTL_TYPE_HH_INTERNAL_PAUSE: + if (pCmdVbva->i32EnableState > VBVAEXHOSTCONTEXT_ESTATE_PAUSED) + ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_PAUSED); + return true; + case VBVAEXHOSTCTL_TYPE_HH_INTERNAL_RESUME: + if (pCmdVbva->i32EnableState == VBVAEXHOSTCONTEXT_ESTATE_PAUSED) + ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_ENABLED); + return true; + default: + return false; + } +} + +static void vboxVBVAExHPProcessorRelease(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING); + + ASMAtomicWriteS32(&pCmdVbva->i32State, VBVAEXHOSTCONTEXT_STATE_LISTENING); +} + +static void vboxVBVAExHPHgEventSet(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING); + if (pCmdVbva->pVBVA) + ASMAtomicOrU32(&pCmdVbva->pVBVA->hostFlags.u32HostEvents, VBVA_F_STATE_PROCESSING); +} + +static void vboxVBVAExHPHgEventClear(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING); + if (pCmdVbva->pVBVA) + ASMAtomicAndU32(&pCmdVbva->pVBVA->hostFlags.u32HostEvents, ~VBVA_F_STATE_PROCESSING); +} + +static int vboxVBVAExHPCmdGet(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t **ppCmd, uint32_t *pcbCmd) +{ + Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING); + Assert(pCmdVbva->i32EnableState > VBVAEXHOSTCONTEXT_ESTATE_PAUSED); + + VBVABUFFER *pVBVA = pCmdVbva->pVBVA; + + uint32_t indexRecordFirst = pVBVA->indexRecordFirst; + uint32_t indexRecordFree = pVBVA->indexRecordFree; + + Log(("first = %d, free = %d\n", + indexRecordFirst, indexRecordFree)); + + if (indexRecordFirst == indexRecordFree) + { + /* No records to process. Return without assigning output variables. */ + return VINF_EOF; + } + + uint32_t cbRecordCurrent = ASMAtomicReadU32(&pVBVA->aRecords[indexRecordFirst].cbRecord); + + /* A new record need to be processed. */ + if (cbRecordCurrent & VBVA_F_RECORD_PARTIAL) + { + /* the record is being recorded, try again */ + return VINF_TRY_AGAIN; + } + + uint32_t cbRecord = cbRecordCurrent & ~VBVA_F_RECORD_PARTIAL; + + if (!cbRecord) + { + /* the record is being recorded, try again */ + return VINF_TRY_AGAIN; + } + + /* we should not get partial commands here actually */ + Assert(cbRecord); + + /* The size of largest contiguous chunk in the ring biffer. */ + uint32_t u32BytesTillBoundary = pVBVA->cbData - pVBVA->off32Data; + + /* The pointer to data in the ring buffer. */ + uint8_t *pSrc = &pVBVA->au8Data[pVBVA->off32Data]; + + /* Fetch or point the data. */ + if (u32BytesTillBoundary >= cbRecord) + { + /* The command does not cross buffer boundary. Return address in the buffer. */ + *ppCmd = pSrc; + *pcbCmd = cbRecord; + return VINF_SUCCESS; + } + + LogRel(("CmdVbva: cross-bound writes unsupported\n")); + return VERR_INVALID_STATE; +} + +static void VBoxVBVAExHPDataCompleteCmd(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint32_t cbCmd) +{ + VBVABUFFER *pVBVA = pCmdVbva->pVBVA; + pVBVA->off32Data = (pVBVA->off32Data + cbCmd) % pVBVA->cbData; + + pVBVA->indexRecordFirst = (pVBVA->indexRecordFirst + 1) % RT_ELEMENTS(pVBVA->aRecords); +} + +static void VBoxVBVAExHPDataCompleteCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL *pCtl, int rc) +{ + if (pCtl->pfnComplete) + pCtl->pfnComplete(pCmdVbva, pCtl, rc, pCtl->pvComplete); + else + VBoxVBVAExHCtlFree(pCmdVbva, pCtl); +} + +static VBVAEXHOST_DATA_TYPE vboxVBVAExHPDataGet(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t **ppCmd, uint32_t *pcbCmd) +{ + Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING); + VBVAEXHOSTCTL*pCtl; + bool fHostClt; + + for(;;) + { + pCtl = vboxVBVAExHPCheckCtl(pCmdVbva, &fHostClt, false); + if (pCtl) + { + if (fHostClt) + { + if (!vboxVBVAExHPCheckProcessCtlInternal(pCmdVbva, pCtl)) + { + *ppCmd = (uint8_t*)pCtl; + *pcbCmd = sizeof (*pCtl); + return VBVAEXHOST_DATA_TYPE_HOSTCTL; + } + } + else + { + *ppCmd = (uint8_t*)pCtl; + *pcbCmd = sizeof (*pCtl); + return VBVAEXHOST_DATA_TYPE_GUESTCTL; + } + } + + if (ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) <= VBVAEXHOSTCONTEXT_ESTATE_PAUSED) + return VBVAEXHOST_DATA_TYPE_NO_DATA; + + int rc = vboxVBVAExHPCmdGet(pCmdVbva, ppCmd, pcbCmd); + switch (rc) + { + case VINF_SUCCESS: + return VBVAEXHOST_DATA_TYPE_CMD; + case VINF_EOF: + return VBVAEXHOST_DATA_TYPE_NO_DATA; + case VINF_TRY_AGAIN: + RTThreadSleep(1); + continue; + default: + /* this is something really unexpected, i.e. most likely guest has written something incorrect to the VBVA buffer */ + WARN(("Warning: vboxVBVAExHCmdGet returned unexpected status %d\n", rc)); + return VBVAEXHOST_DATA_TYPE_NO_DATA; + } + } + + WARN(("Warning: VBoxVBVAExHCmdGet unexpected state\n")); + return VBVAEXHOST_DATA_TYPE_NO_DATA; +} + +static VBVAEXHOST_DATA_TYPE VBoxVBVAExHPDataGet(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t **ppCmd, uint32_t *pcbCmd) +{ + VBVAEXHOST_DATA_TYPE enmType = vboxVBVAExHPDataGet(pCmdVbva, ppCmd, pcbCmd); + if (enmType == VBVAEXHOST_DATA_TYPE_NO_DATA) + { + vboxVBVAExHPHgEventClear(pCmdVbva); + vboxVBVAExHPProcessorRelease(pCmdVbva); + /* we need to prevent racing between us clearing the flag and command check/submission thread, i.e. + * 1. we check the queue -> and it is empty + * 2. submitter adds command to the queue + * 3. submitter checks the "processing" -> and it is true , thus it does not submit a notification + * 4. we clear the "processing" state + * 5. ->here we need to re-check the queue state to ensure we do not leak the notification of the above command + * 6. if the queue appears to be not-empty set the "processing" state back to "true" + **/ + int rc = vboxVBVAExHSProcessorAcquire(pCmdVbva); + if (RT_SUCCESS(rc)) + { + /* we are the processor now */ + enmType = vboxVBVAExHPDataGet(pCmdVbva, ppCmd, pcbCmd); + if (enmType == VBVAEXHOST_DATA_TYPE_NO_DATA) + { + vboxVBVAExHPProcessorRelease(pCmdVbva); + return VBVAEXHOST_DATA_TYPE_NO_DATA; + } + + vboxVBVAExHPHgEventSet(pCmdVbva); + } + } + + return enmType; +} + +DECLINLINE(bool) vboxVBVAExHSHasCommands(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + VBVABUFFER *pVBVA = pCmdVbva->pVBVA; + + if (pVBVA) + { + uint32_t indexRecordFirst = pVBVA->indexRecordFirst; + uint32_t indexRecordFree = pVBVA->indexRecordFree; + + if (indexRecordFirst != indexRecordFree) + return true; + } + + return !!ASMAtomicReadU32(&pCmdVbva->u32cCtls); +} + +/* Checks whether the new commands are ready for processing + * @returns + * VINF_SUCCESS - there are commands are in a queue, and the given thread is now the processor (i.e. typically it would delegate processing to a worker thread) + * VINF_EOF - no commands in a queue + * VINF_ALREADY_INITIALIZED - another thread already processing the commands + * VERR_INVALID_STATE - the VBVA is paused or pausing */ +static int VBoxVBVAExHSCheckCommands(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + int rc = vboxVBVAExHSProcessorAcquire(pCmdVbva); + if (RT_SUCCESS(rc)) + { + /* we are the processor now */ + if (vboxVBVAExHSHasCommands(pCmdVbva)) + { + vboxVBVAExHPHgEventSet(pCmdVbva); + return VINF_SUCCESS; + } + + vboxVBVAExHPProcessorRelease(pCmdVbva); + return VINF_EOF; + } + if (rc == VERR_SEM_BUSY) + return VINF_ALREADY_INITIALIZED; + return VERR_INVALID_STATE; +} + +static int VBoxVBVAExHSInit(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + memset(pCmdVbva, 0, sizeof (*pCmdVbva)); + int rc = RTCritSectInit(&pCmdVbva->CltCritSect); + if (RT_SUCCESS(rc)) + { +#ifndef VBOXVDBG_MEMCACHE_DISABLE + rc = RTMemCacheCreate(&pCmdVbva->CtlCache, sizeof (VBVAEXHOSTCTL), + 0, /* size_t cbAlignment */ + UINT32_MAX, /* uint32_t cMaxObjects */ + NULL, /* PFNMEMCACHECTOR pfnCtor*/ + NULL, /* PFNMEMCACHEDTOR pfnDtor*/ + NULL, /* void *pvUser*/ + 0 /* uint32_t fFlags*/ + ); + if (RT_SUCCESS(rc)) #endif + { + RTListInit(&pCmdVbva->GuestCtlList); + RTListInit(&pCmdVbva->HostCtlList); + pCmdVbva->i32State = VBVAEXHOSTCONTEXT_STATE_PROCESSING; + pCmdVbva->i32EnableState = VBVAEXHOSTCONTEXT_ESTATE_DISABLED; + return VINF_SUCCESS; + } +#ifndef VBOXVDBG_MEMCACHE_DISABLE + else + WARN(("RTMemCacheCreate failed %d\n", rc)); +#endif + } + else + WARN(("RTCritSectInit failed %d\n", rc)); + + return rc; +} + +DECLINLINE(bool) VBoxVBVAExHSIsEnabled(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + return (ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) >= VBVAEXHOSTCONTEXT_ESTATE_PAUSED); +} + +static int VBoxVBVAExHSEnable(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVABUFFER *pVBVA) +{ + if (VBoxVBVAExHSIsEnabled(pCmdVbva)) + return VINF_ALREADY_INITIALIZED; + + pCmdVbva->pVBVA = pVBVA; + pCmdVbva->pVBVA->hostFlags.u32HostEvents = 0; + ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_ENABLED); + return VINF_SUCCESS; +} + +static int VBoxVBVAExHSDisable(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + if (!VBoxVBVAExHSIsEnabled(pCmdVbva)) + return VINF_SUCCESS; + + ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_DISABLED); + return VINF_SUCCESS; +} + +static void VBoxVBVAExHSTerm(struct VBVAEXHOSTCONTEXT *pCmdVbva) +{ + /* ensure the processor is stopped */ + Assert(pCmdVbva->i32State >= VBVAEXHOSTCONTEXT_STATE_LISTENING); + + /* ensure no one tries to submit the command */ + if (pCmdVbva->pVBVA) + pCmdVbva->pVBVA->hostFlags.u32HostEvents = 0; + + Assert(RTListIsEmpty(&pCmdVbva->GuestCtlList)); + Assert(RTListIsEmpty(&pCmdVbva->HostCtlList)); + + RTCritSectDelete(&pCmdVbva->CltCritSect); + +#ifndef VBOXVDBG_MEMCACHE_DISABLE + RTMemCacheDestroy(pCmdVbva->CtlCache); +#endif + + memset(pCmdVbva, 0, sizeof (*pCmdVbva)); +} + +/* Saves state + * @returns - same as VBoxVBVAExHSCheckCommands, or failure on load state fail + */ +static int VBoxVBVAExHSSaveState(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM) +{ + int rc; + + int32_t i32EnableState = ASMAtomicUoReadS32(&pCmdVbva->i32EnableState); + if (i32EnableState >= VBVAEXHOSTCONTEXT_ESTATE_PAUSED) + { + if (i32EnableState != VBVAEXHOSTCONTEXT_ESTATE_PAUSED) + { + WARN(("vbva not paused\n")); + return VERR_INVALID_STATE; + } + + rc = SSMR3PutU32(pSSM, (uint32_t)(((uint8_t*)pCmdVbva->pVBVA) - pu8VramBase)); + AssertRCReturn(rc, rc); + return VINF_SUCCESS; + } + + rc = SSMR3PutU32(pSSM, 0xffffffff); + AssertRCReturn(rc, rc); + + return VINF_SUCCESS; +} + +typedef enum +{ + VBVAEXHOSTCTL_SOURCE_GUEST = 0, + VBVAEXHOSTCTL_SOURCE_HOST_ANY, + VBVAEXHOSTCTL_SOURCE_HOST_ENABLED +} VBVAEXHOSTCTL_SOURCE; + + +static int VBoxVBVAExHCtlSubmit(VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete) +{ + if ((enmSource == VBVAEXHOSTCTL_SOURCE_HOST_ENABLED) && !VBoxVBVAExHSIsEnabled(pCmdVbva)) + { + WARN(("cmd vbva not enabled\n")); + return VERR_INVALID_STATE; + } + + pCtl->pfnComplete = pfnComplete; + pCtl->pvComplete = pvComplete; + + int rc = RTCritSectEnter(&pCmdVbva->CltCritSect); + if (RT_SUCCESS(rc)) + { + if (enmSource > VBVAEXHOSTCTL_SOURCE_GUEST) + { + if ((enmSource == VBVAEXHOSTCTL_SOURCE_HOST_ENABLED) && !VBoxVBVAExHSIsEnabled(pCmdVbva)) + { + WARN(("cmd vbva not enabled\n")); + RTCritSectLeave(&pCmdVbva->CltCritSect); + return VERR_INVALID_STATE; + } + RTListAppend(&pCmdVbva->HostCtlList, &pCtl->Node); + } + else + RTListAppend(&pCmdVbva->GuestCtlList, &pCtl->Node); + + ASMAtomicIncU32(&pCmdVbva->u32cCtls); + + RTCritSectLeave(&pCmdVbva->CltCritSect); + + rc = VBoxVBVAExHSCheckCommands(pCmdVbva); + } + else + WARN(("RTCritSectEnter failed %d\n", rc)); + + return rc; +} + + +/* Loads state + * @returns - same as VBoxVBVAExHSCheckCommands, or failure on load state fail + */ +static int VBoxVBVAExHSLoadState(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM, uint32_t u32Version) +{ + AssertMsgFailed(("implement!\n")); + uint32_t u32; + int rc = SSMR3GetU32(pSSM, &u32); + AssertRCReturn(rc, rc); + if (u32 != 0xffffffff) + { + VBVABUFFER *pVBVA = (VBVABUFFER*)pu8VramBase + u32; + rc = VBoxVBVAExHSEnable(pCmdVbva, pVBVA); + AssertRCReturn(rc, rc); + return VBoxVBVAExHSCheckCommands(pCmdVbva); + } + + return VINF_SUCCESS; +} typedef struct VBOXVDMAHOST { PHGSMIINSTANCE pHgsmi; PVGASTATE pVGAState; + VBVAEXHOSTCONTEXT CmdVbva; + VBOXVDMATHREAD Thread; + VBOXCRCMD_SVRINFO CrSrvInfo; + VBVAEXHOSTCTL* pCurRemainingHostCtl; #ifdef VBOX_VDMA_WITH_WATCHDOG PTMTIMERR3 WatchDogTimer; #endif -#ifdef VBOX_VDMA_WITH_WORKERTHREAD - VBOXVDMAPIPE Pipe; - HGSMILIST PendingList; - RTTHREAD hWorkerThread; - VBOXVDMAPIPE_CMD_POOL CmdPool; -#endif } VBOXVDMAHOST, *PVBOXVDMAHOST; +int VBoxVDMAThreadNotifyConstructSucceeded(PVBOXVDMATHREAD pThread) +{ + Assert(pThread->u32State == VBOXVDMATHREAD_STATE_TERMINATED); + pThread->u32State = VBOXVDMATHREAD_STATE_CREATED; + int rc = RTSemEventSignal(pThread->hClientEvent); + AssertRC(rc); + return VINF_SUCCESS; +} + +int VBoxVDMAThreadNotifyConstructFailed(PVBOXVDMATHREAD pThread) +{ + Assert(pThread->u32State == VBOXVDMATHREAD_STATE_TERMINATED); + int rc = RTSemEventSignal(pThread->hClientEvent); + AssertRC(rc); + if (RT_SUCCESS(rc)) + return VINF_SUCCESS; + return rc; +} + +DECLINLINE(bool) VBoxVDMAThreadIsTerminating(PVBOXVDMATHREAD pThread) +{ + return ASMAtomicUoReadU32(&pThread->u32State) == VBOXVDMATHREAD_STATE_TERMINATING; +} + +int VBoxVDMAThreadCreate(PVBOXVDMATHREAD pThread, PFNRTTHREAD pfnThread, void *pvThread) +{ + int rc = RTSemEventCreate(&pThread->hEvent); + if (RT_SUCCESS(rc)) + { + rc = RTSemEventCreate(&pThread->hClientEvent); + if (RT_SUCCESS(rc)) + { + pThread->u32State = VBOXVDMATHREAD_STATE_TERMINATED; + rc = RTThreadCreate(&pThread->hWorkerThread, pfnThread, pvThread, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "VDMA"); + if (RT_SUCCESS(rc)) + { + rc = RTSemEventWait(pThread->hClientEvent, RT_INDEFINITE_WAIT); + if (RT_SUCCESS(rc)) + { + if (pThread->u32State == VBOXVDMATHREAD_STATE_CREATED) + return VINF_SUCCESS; + WARN(("thread routine failed the initialization\n")); + rc = VERR_INVALID_STATE; + } + else + WARN(("RTSemEventWait failed %d\n", rc)); + + RTThreadWait(pThread->hWorkerThread, RT_INDEFINITE_WAIT, NULL); + } + else + WARN(("RTThreadCreate failed %d\n", rc)); + + RTSemEventDestroy(pThread->hClientEvent); + } + else + WARN(("RTSemEventCreate failed %d\n", rc)); + + RTSemEventDestroy(pThread->hEvent); + } + else + WARN(("RTSemEventCreate failed %d\n", rc)); + + return rc; +} + +DECLINLINE(int) VBoxVDMAThreadEventNotify(PVBOXVDMATHREAD pThread) +{ + int rc = RTSemEventSignal(pThread->hEvent); + AssertRC(rc); + return rc; +} + +DECLINLINE(int) VBoxVDMAThreadEventWait(PVBOXVDMATHREAD pThread, RTMSINTERVAL cMillies) +{ + int rc = RTSemEventWait(pThread->hEvent, cMillies); + AssertRC(rc); + return rc; +} + +void VBoxVDMAThreadMarkTerminating(PVBOXVDMATHREAD pThread) +{ + Assert(pThread->u32State == VBOXVDMATHREAD_STATE_CREATED); + ASMAtomicWriteU32(&pThread->u32State, VBOXVDMATHREAD_STATE_TERMINATING); +} + +void VBoxVDMAThreadTerm(PVBOXVDMATHREAD pThread) +{ + int rc; + if (ASMAtomicReadU32(&pThread->u32State) != VBOXVDMATHREAD_STATE_TERMINATING) + { + VBoxVDMAThreadMarkTerminating(pThread); + rc = VBoxVDMAThreadEventNotify(pThread); + AssertRC(rc); + } + rc = RTThreadWait(pThread->hWorkerThread, RT_INDEFINITE_WAIT, NULL); + AssertRC(rc); + RTSemEventDestroy(pThread->hClientEvent); + RTSemEventDestroy(pThread->hEvent); +} + +static int vdmaVBVACtlSubmitSync(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource); #ifdef VBOX_WITH_CRHGSMI @@ -183,7 +864,7 @@ static int vboxVDMACrCtlPost(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd AssertRC(rc); if(RT_SUCCESS(rc)) { - rc = vboxVDMACrCtlPostAsync (pVGAState, pCmd, cbCmd, vboxVDMACrCtlCbSetEvent, (void*)hComplEvent); + rc = vboxVDMACrCtlPostAsync(pVGAState, pCmd, cbCmd, vboxVDMACrCtlCbSetEvent, (void*)hComplEvent); #ifdef DEBUG_misha AssertRC(rc); #endif @@ -205,26 +886,364 @@ static int vboxVDMACrCtlPost(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd return rc; } +typedef struct VDMA_VBVA_CTL_CYNC_COMPLETION +{ + int rc; + RTSEMEVENT hEvent; +} VDMA_VBVA_CTL_CYNC_COMPLETION; + +static DECLCALLBACK(void) vboxVDMACrHgcmSubmitSyncCompletion(struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd, int rc, void *pvCompletion) +{ + VDMA_VBVA_CTL_CYNC_COMPLETION *pData = (VDMA_VBVA_CTL_CYNC_COMPLETION*)pvCompletion; + pData->rc = rc; + rc = RTSemEventSignal(pData->hEvent); + if (!RT_SUCCESS(rc)) + WARN(("RTSemEventSignal failed %d\n", rc)); +} + +static int vboxVDMACrHgcmSubmitSync(struct VBOXVDMAHOST *pVdma, VBOXCRCMDCTL* pCtl, uint32_t cbCtl) +{ + VDMA_VBVA_CTL_CYNC_COMPLETION Data; + Data.rc = VERR_NOT_IMPLEMENTED; + int rc = RTSemEventCreate(&Data.hEvent); + if (!RT_SUCCESS(rc)) + { + WARN(("RTSemEventCreate failed %d\n", rc)); + return rc; + } + + PVGASTATE pVGAState = pVdma->pVGAState; + rc = pVGAState->pDrv->pfnCrHgcmCtlSubmit(pVGAState->pDrv, pCtl, cbCtl, vboxVDMACrHgcmSubmitSyncCompletion, &Data); + if (RT_SUCCESS(rc)) + { + rc = RTSemEventWait(Data.hEvent, RT_INDEFINITE_WAIT); + if (RT_SUCCESS(rc)) + { + rc = Data.rc; + if (!RT_SUCCESS(rc)) + { + WARN(("pfnCrHgcmCtlSubmit command failed %d\n", rc)); + } + + } + else + WARN(("RTSemEventWait failed %d\n", rc)); + } + else + WARN(("pfnCrHgcmCtlSubmit failed %d\n", rc)); + + + RTSemEventDestroy(Data.hEvent); + + return rc; +} + +static DECLCALLBACK(uint8_t*) vboxVDMACrHgcmHandleEnableRemainingHostCommand(HVBOXCRCMDCTL_REMAINING_HOST_COMMAND hClient, uint32_t *pcbCtl, int prevCmdRc) +{ + struct VBOXVDMAHOST *pVdma = hClient; + if (!pVdma->pCurRemainingHostCtl) + { + /* disable VBVA, all subsequent host commands will go HGCM way */ + VBoxVBVAExHSDisable(&pVdma->CmdVbva); + } + else + { + VBoxVBVAExHPDataCompleteCtl(&pVdma->CmdVbva, pVdma->pCurRemainingHostCtl, prevCmdRc); + } + + pVdma->pCurRemainingHostCtl = VBoxVBVAExHPCheckHostCtlOnDisable(&pVdma->CmdVbva); + if (pVdma->pCurRemainingHostCtl) + { + *pcbCtl = pVdma->pCurRemainingHostCtl->u.cmd.cbCmd; + return pVdma->pCurRemainingHostCtl->u.cmd.pu8Cmd; + } + + *pcbCtl = 0; + return NULL; +} + +static int vboxVDMACrHgcmHandleEnable(struct VBOXVDMAHOST *pVdma) +{ + VBOXCRCMDCTL_ENABLE Enable; + Enable.Hdr.enmType = VBOXCRCMDCTL_TYPE_ENABLE; + Enable.hRHCmd = pVdma; + Enable.pfnRHCmd = vboxVDMACrHgcmHandleEnableRemainingHostCommand; + + int rc = vboxVDMACrHgcmSubmitSync(pVdma, &Enable.Hdr, sizeof (Enable)); + Assert(!pVdma->pCurRemainingHostCtl); + if (RT_SUCCESS(rc)) + { + Assert(!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)); + return VINF_SUCCESS; + } + + Assert(VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)); + WARN(("vboxVDMACrHgcmSubmitSync failed %d\n", rc)); + + return rc; +} + +static int vdmaVBVAEnableProcess(struct VBOXVDMAHOST *pVdma, uint32_t u32Offset) +{ + if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)) + { + WARN(("vdma VBVA is already enabled\n")); + return VERR_INVALID_STATE; + } + + VBVABUFFER *pVBVA = (VBVABUFFER *)HGSMIOffsetToPointerHost(pVdma->pHgsmi, u32Offset); + if (!pVBVA) + { + WARN(("invalid offset %d\n", u32Offset)); + return VERR_INVALID_PARAMETER; + } + + if (!pVdma->CrSrvInfo.pfnEnable) + { +#ifdef DEBUG_misha + WARN(("pfnEnable is NULL\n")); + return VERR_NOT_SUPPORTED; +#endif + } + + int rc = VBoxVBVAExHSEnable(&pVdma->CmdVbva, pVBVA); + if (RT_SUCCESS(rc)) + { + VBOXCRCMDCTL Ctl; + Ctl.enmType = VBOXCRCMDCTL_TYPE_DISABLE; + rc = vboxVDMACrHgcmSubmitSync(pVdma, &Ctl, sizeof (Ctl)); + if (RT_SUCCESS(rc)) + { + PVGASTATE pVGAState = pVdma->pVGAState; + VBOXCRCMD_SVRENABLE_INFO Info; + Info.hCltScr = pVGAState->pDrv; + Info.pfnCltScrUpdateBegin = pVGAState->pDrv->pfnVBVAUpdateBegin; + Info.pfnCltScrUpdateProcess = pVGAState->pDrv->pfnVBVAUpdateProcess; + Info.pfnCltScrUpdateEnd = pVGAState->pDrv->pfnVBVAUpdateEnd; + rc = pVdma->CrSrvInfo.pfnEnable(pVdma->CrSrvInfo.hSvr, &Info); + if (RT_SUCCESS(rc)) + return VINF_SUCCESS; + else + WARN(("pfnEnable failed %d\n", rc)); + + vboxVDMACrHgcmHandleEnable(pVdma); + } + else + WARN(("vboxVDMACrHgcmSubmitSync failed %d\n", rc)); + + VBoxVBVAExHSDisable(&pVdma->CmdVbva); + } + else + WARN(("VBoxVBVAExHSEnable failed %d\n", rc)); + + return rc; +} + +static int vdmaVBVADisableProcess(struct VBOXVDMAHOST *pVdma) +{ + if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)) + { + Log(("vdma VBVA is already disabled\n")); + return VINF_SUCCESS; + } + + int rc = pVdma->CrSrvInfo.pfnDisable(pVdma->CrSrvInfo.hSvr); + if (RT_SUCCESS(rc)) + { + /* disable is a bit tricky + * we need to ensure the host ctl commands do not come out of order + * and do not come over HGCM channel until after it is enabled */ + rc = vboxVDMACrHgcmHandleEnable(pVdma); + if (RT_SUCCESS(rc)) + return rc; + + PVGASTATE pVGAState = pVdma->pVGAState; + VBOXCRCMD_SVRENABLE_INFO Info; + Info.hCltScr = pVGAState->pDrv; + Info.pfnCltScrUpdateBegin = pVGAState->pDrv->pfnVBVAUpdateBegin; + Info.pfnCltScrUpdateProcess = pVGAState->pDrv->pfnVBVAUpdateProcess; + Info.pfnCltScrUpdateEnd = pVGAState->pDrv->pfnVBVAUpdateEnd; + pVdma->CrSrvInfo.pfnEnable(pVdma->CrSrvInfo.hSvr, &Info); + } + else + WARN(("pfnDisable failed %d\n", rc)); + + return rc; +} + +static int vboxVDMACrHostCtlProcess(struct VBOXVDMAHOST *pVdma, VBVAEXHOSTCTL *pCmd) +{ + switch (pCmd->enmType) + { + case VBVAEXHOSTCTL_TYPE_HH_SAVESTATE: + if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)) + { + WARN(("VBVAEXHOSTCTL_TYPE_HH_SAVESTATE for disabled vdma VBVA\n")); + return VERR_INVALID_STATE; + } + return pVdma->CrSrvInfo.pfnSaveState(pVdma->CrSrvInfo.hSvr, pCmd->u.state.pSSM); + case VBVAEXHOSTCTL_TYPE_HH_LOADSTATE: + if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)) + { + WARN(("VBVAEXHOSTCTL_TYPE_HH_LOADSTATE for disabled vdma VBVA\n")); + return VERR_INVALID_STATE; + } + return pVdma->CrSrvInfo.pfnLoadState(pVdma->CrSrvInfo.hSvr, pCmd->u.state.pSSM, pCmd->u.state.u32Version); + case VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE: + if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)) + { + WARN(("VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE for disabled vdma VBVA\n")); + return VERR_INVALID_STATE; + } + return pVdma->CrSrvInfo.pfnHostCtl(pVdma->CrSrvInfo.hSvr, pCmd->u.cmd.pu8Cmd, pCmd->u.cmd.cbCmd); + case VBVAEXHOSTCTL_TYPE_HH_TERM: + { + int rc = vdmaVBVADisableProcess(pVdma); + if (!RT_SUCCESS(rc)) + { + WARN(("vdmaVBVADisableProcess failed %d\n", rc)); + return rc; + } + + VBoxVDMAThreadMarkTerminating(&pVdma->Thread); + return VINF_SUCCESS; + } + case VBVAEXHOSTCTL_TYPE_HH_RESET: + { + int rc = vdmaVBVADisableProcess(pVdma); + if (!RT_SUCCESS(rc)) + { + WARN(("vdmaVBVADisableProcess failed %d\n", rc)); + return rc; + } + return VINF_SUCCESS; + } + default: + WARN(("unexpected host ctl type %d\n", pCmd->enmType)); + return VERR_INVALID_PARAMETER; + } +} + +static int vboxVDMACrGuestCtlProcess(struct VBOXVDMAHOST *pVdma, VBVAEXHOSTCTL *pCmd) +{ + switch (pCmd->enmType) + { + case VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE: + if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva)) + { + WARN(("VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE for disabled vdma VBVA\n")); + return VERR_INVALID_STATE; + } + return pVdma->CrSrvInfo.pfnGuestCtl(pVdma->CrSrvInfo.hSvr, pCmd->u.cmd.pu8Cmd, pCmd->u.cmd.cbCmd); + case VBVAEXHOSTCTL_TYPE_GH_ENABLE_DISABLE: + { + VBVAENABLE *pEnable = (VBVAENABLE *)pCmd->u.cmd.pu8Cmd; + Assert(pCmd->u.cmd.cbCmd == sizeof (VBVAENABLE)); + if ((pEnable->u32Flags & (VBVA_F_ENABLE | VBVA_F_DISABLE)) == VBVA_F_ENABLE) + { + uint32_t u32Offset = pEnable->u32Offset; + return vdmaVBVAEnableProcess(pVdma, u32Offset); + } + + return vdmaVBVADisableProcess(pVdma); + } + default: + WARN(("unexpected ctl type %d\n", pCmd->enmType)); + return VERR_INVALID_PARAMETER; + } +} + + +/* + * @returns + * + */ +static int vboxVDMACrCmdProcess(struct VBOXVDMAHOST *pVdma, uint8_t* pu8Cmd, uint32_t cbCmd) +{ + if (*pu8Cmd == VBOXCMDVBVA_OPTYPE_NOP) + return VINF_EOF; + + PVBOXCMDVBVA_HDR pCmd = (PVBOXCMDVBVA_HDR)pu8Cmd; + + /* check if the command is cancelled */ + if (!ASMAtomicCmpXchgU8(&pCmd->u8State, VBOXCMDVBVA_STATE_IN_PROGRESS, VBOXCMDVBVA_STATE_SUBMITTED)) + { + Assert(pCmd->u8State == VBOXCMDVBVA_STATE_CANCELLED); + return VINF_EOF; + } + + /* come commands can be handled right away? */ + switch (pCmd->u8OpCode) + { + case VBOXCMDVBVA_OPTYPE_NOPCMD: + pCmd->u.i8Result = 0; + return VINF_EOF; + default: + return VINF_SUCCESS; + } +} + +static DECLCALLBACK(int) vboxVDMACrCmdEnable(HVBOXCRCMDSVR hSvr, VBOXCRCMD_SVRENABLE_INFO *pInfo) +{ + return VINF_SUCCESS; +} + +static DECLCALLBACK(void) vboxVDMACrCmdDisable(HVBOXCRCMDSVR hSvr) +{ +} + +static DECLCALLBACK(int) vboxVDMACrCmdCtl(HVBOXCRCMDSVR hSvr, uint8_t* pCmd, uint32_t cbCmd) +{ + return VERR_NOT_SUPPORTED; +} + +static DECLCALLBACK(int) vboxVDMACrCmdCmd(HVBOXCRCMDSVR hSvr, PVBOXCMDVBVA_HDR pCmd, uint32_t cbCmd) +{ + switch (pCmd->u8OpCode) + { +#if 0 + case VBOXCMDVBVA_OPTYPE_BLT_OFFPRIMSZFMT_OR_ID: + { + crVBoxServerCrCmdBltProcess(pCmd, cbCmd); + break; + } +#endif + default: + WARN(("unsupported command\n")); + pCmd->u.i8Result = -1; + } + return VINF_SUCCESS; +} + static int vboxVDMACrCtlHgsmiSetup(struct VBOXVDMAHOST *pVdma) { - PVBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP pCmd; - pCmd = (PVBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP) vboxVDMACrCtlCreate (VBOXVDMACMD_CHROMIUM_CTL_TYPE_CRHGSMI_SETUP, - sizeof (*pCmd)); + PVBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP pCmd = (PVBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP) + vboxVDMACrCtlCreate (VBOXVDMACMD_CHROMIUM_CTL_TYPE_CRHGSMI_SETUP, sizeof (*pCmd)); + int rc = VERR_NO_MEMORY; if (pCmd) { PVGASTATE pVGAState = pVdma->pVGAState; pCmd->pvVRamBase = pVGAState->vram_ptrR3; pCmd->cbVRam = pVGAState->vram_size; - int rc = vboxVDMACrCtlPost(pVGAState, &pCmd->Hdr, sizeof (*pCmd)); - Assert(RT_SUCCESS(rc) || rc == VERR_NOT_SUPPORTED); + rc = vboxVDMACrCtlPost(pVGAState, &pCmd->Hdr, sizeof (*pCmd)); if (RT_SUCCESS(rc)) { rc = vboxVDMACrCtlGetRc(&pCmd->Hdr); + if (RT_SUCCESS(rc)) + pVdma->CrSrvInfo = pCmd->CrCmdServerInfo; + else if (rc != VERR_NOT_SUPPORTED) + WARN(("vboxVDMACrCtlGetRc returned %d\n", rc)); } + else + WARN(("vboxVDMACrCtlPost failed %d\n", rc)); + vboxVDMACrCtlRelease(&pCmd->Hdr); - return rc; } - return VERR_NO_MEMORY; + + if (!RT_SUCCESS(rc)) + memset(&pVdma->CrSrvInfo, 0, sizeof (pVdma->CrSrvInfo)); + + return rc; } static int vboxVDMACmdExecBpbTransfer(PVBOXVDMAHOST pVdma, const PVBOXVDMACMD_DMA_BPB_TRANSFER pTransfer, uint32_t cbBuffer); @@ -237,6 +1256,8 @@ static int vboxVDMACmdCheckCrCmd(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pC uint8_t * pvRam = pVdma->pVGAState->vram_ptrR3; int rc = VINF_NOT_SUPPORTED; + cbDmaCmd = pCmdDr->cbBuf; + if (pCmdDr->fFlags & VBOXVDMACBUF_FLAG_BUF_FOLLOWS_DR) { if (cbCmdDr < sizeof (*pCmdDr) + VBOXVDMACMD_HEADER_SIZE()) @@ -245,7 +1266,6 @@ static int vboxVDMACmdCheckCrCmd(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pC return VERR_INVALID_PARAMETER; } - cbDmaCmd = pCmdDr->cbBuf; if (cbDmaCmd < cbCmdDr - sizeof (*pCmdDr) - VBOXVDMACMD_HEADER_SIZE()) { AssertMsgFailed(("invalid command buffer data!")); @@ -254,6 +1274,16 @@ static int vboxVDMACmdCheckCrCmd(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pC pDmaCmd = VBOXVDMACBUF_DR_TAIL(pCmdDr, VBOXVDMACMD); } + else if (pCmdDr->fFlags & VBOXVDMACBUF_FLAG_BUF_VRAM_OFFSET) + { + VBOXVIDEOOFFSET offBuf = pCmdDr->Location.offVramBuf; + if (offBuf + cbDmaCmd > pVdma->pVGAState->vram_size) + { + AssertMsgFailed(("invalid command buffer data from offset!")); + return VERR_INVALID_PARAMETER; + } + pDmaCmd = (VBOXVDMACMD*)(pvRam + offBuf); + } if (pDmaCmd) { @@ -709,236 +1739,52 @@ static int vboxVDMACmdExec(PVBOXVDMAHOST pVdma, const uint8_t *pvBuffer, uint32_ return VERR_INVALID_STATE; } -#ifdef VBOX_VDMA_WITH_WORKERTHREAD - -int vboxVDMAPipeConstruct(PVBOXVDMAPIPE pPipe) +static DECLCALLBACK(int) vboxVDMAWorkerThread(RTTHREAD ThreadSelf, void *pvUser) { - int rc = RTSemEventCreate(&pPipe->hEvent); - AssertRC(rc); - if (RT_SUCCESS(rc)) - { - rc = RTCritSectInit(&pPipe->hCritSect); - AssertRC(rc); - if (RT_SUCCESS(rc)) - { - pPipe->enmState = VBOXVDMAPIPE_STATE_CREATED; - pPipe->bNeedNotify = true; - return VINF_SUCCESS; -// RTCritSectDelete(pPipe->hCritSect); - } - RTSemEventDestroy(pPipe->hEvent); - } - return rc; -} + PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvUser; + PVGASTATE pVGAState = pVdma->pVGAState; + VBVAEXHOSTCONTEXT *pCmdVbva = &pVdma->CmdVbva; + PHGSMIINSTANCE pHgsmi = pVdma->pHgsmi; + uint8_t *pCmd; + uint32_t cbCmd; -int vboxVDMAPipeOpenServer(PVBOXVDMAPIPE pPipe) -{ - int rc = RTCritSectEnter(&pPipe->hCritSect); - AssertRC(rc); - if (RT_SUCCESS(rc)) + int rc = VBoxVDMAThreadNotifyConstructSucceeded(&pVdma->Thread); + if (!RT_SUCCESS(rc)) { - Assert(pPipe->enmState == VBOXVDMAPIPE_STATE_CREATED); - switch (pPipe->enmState) - { - case VBOXVDMAPIPE_STATE_CREATED: - pPipe->enmState = VBOXVDMAPIPE_STATE_OPENNED; - pPipe->bNeedNotify = false; - rc = VINF_SUCCESS; - break; - case VBOXVDMAPIPE_STATE_OPENNED: - pPipe->bNeedNotify = false; - rc = VINF_ALREADY_INITIALIZED; - break; - default: - AssertBreakpoint(); - rc = VERR_INVALID_STATE; - break; - } - - RTCritSectLeave(&pPipe->hCritSect); + WARN(("VBoxVDMAThreadNotifyConstructSucceeded failed %d\n", rc)); + return rc; } - return rc; -} -int vboxVDMAPipeCloseServer(PVBOXVDMAPIPE pPipe) -{ - int rc = RTCritSectEnter(&pPipe->hCritSect); - AssertRC(rc); - if (RT_SUCCESS(rc)) + while (!VBoxVDMAThreadIsTerminating(&pVdma->Thread)) { - Assert(pPipe->enmState == VBOXVDMAPIPE_STATE_CLOSED - || pPipe->enmState == VBOXVDMAPIPE_STATE_CLOSING); - switch (pPipe->enmState) + VBVAEXHOST_DATA_TYPE enmType = VBoxVBVAExHPDataGet(pCmdVbva, &pCmd, &cbCmd); + switch (enmType) { - case VBOXVDMAPIPE_STATE_CLOSING: - pPipe->enmState = VBOXVDMAPIPE_STATE_CLOSED; - rc = VINF_SUCCESS; + case VBVAEXHOST_DATA_TYPE_CMD: + vboxVDMACrCmdProcess(pVdma, pCmd, cbCmd); + VBoxVBVAExHPDataCompleteCmd(pCmdVbva, cbCmd); + VBVARaiseIrqNoWait(pVGAState, 0); break; - case VBOXVDMAPIPE_STATE_CLOSED: - rc = VINF_ALREADY_INITIALIZED; + case VBVAEXHOST_DATA_TYPE_HOSTCTL: + rc = vboxVDMACrHostCtlProcess(pVdma, (VBVAEXHOSTCTL*)pCmd); + VBoxVBVAExHPDataCompleteCtl(pCmdVbva, (VBVAEXHOSTCTL*)pCmd, rc); break; - default: - AssertBreakpoint(); - rc = VERR_INVALID_STATE; + case VBVAEXHOST_DATA_TYPE_GUESTCTL: + rc = vboxVDMACrGuestCtlProcess(pVdma, (VBVAEXHOSTCTL*)pCmd); + VBoxVBVAExHPDataCompleteCtl(pCmdVbva, (VBVAEXHOSTCTL*)pCmd, rc); break; - } - - RTCritSectLeave(&pPipe->hCritSect); - } - return rc; -} - -int vboxVDMAPipeCloseClient(PVBOXVDMAPIPE pPipe) -{ - int rc = RTCritSectEnter(&pPipe->hCritSect); - AssertRC(rc); - if (RT_SUCCESS(rc)) - { - bool bNeedNotify = false; - Assert(pPipe->enmState == VBOXVDMAPIPE_STATE_OPENNED - || pPipe->enmState == VBOXVDMAPIPE_STATE_CREATED - || pPipe->enmState == VBOXVDMAPIPE_STATE_CLOSED); - switch (pPipe->enmState) - { - case VBOXVDMAPIPE_STATE_OPENNED: - pPipe->enmState = VBOXVDMAPIPE_STATE_CLOSING; - bNeedNotify = pPipe->bNeedNotify; - pPipe->bNeedNotify = false; - break; - case VBOXVDMAPIPE_STATE_CREATED: - pPipe->enmState = VBOXVDMAPIPE_STATE_CLOSED; - pPipe->bNeedNotify = false; - break; - case VBOXVDMAPIPE_STATE_CLOSED: - rc = VINF_ALREADY_INITIALIZED; + case VBVAEXHOST_DATA_TYPE_NO_DATA: + rc = VBoxVDMAThreadEventWait(&pVdma->Thread, RT_INDEFINITE_WAIT); + AssertRC(rc); break; default: - AssertBreakpoint(); - rc = VERR_INVALID_STATE; - break; - } - - RTCritSectLeave(&pPipe->hCritSect); - - if (bNeedNotify) - { - rc = RTSemEventSignal(pPipe->hEvent); - AssertRC(rc); - } - } - return rc; -} - - -typedef DECLCALLBACK(bool) FNHVBOXVDMARWCB(PVBOXVDMAPIPE pPipe, void *pvCallback); -typedef FNHVBOXVDMARWCB *PFNHVBOXVDMARWCB; - -int vboxVDMAPipeModifyServer(PVBOXVDMAPIPE pPipe, PFNHVBOXVDMARWCB pfnCallback, void * pvCallback) -{ - int rc = RTCritSectEnter(&pPipe->hCritSect); - AssertRC(rc); - if (RT_SUCCESS(rc)) - { - do - { - Assert(pPipe->enmState == VBOXVDMAPIPE_STATE_OPENNED - || pPipe->enmState == VBOXVDMAPIPE_STATE_CLOSING); - - if (pPipe->enmState >= VBOXVDMAPIPE_STATE_OPENNED) - { - bool bProcessing = pfnCallback(pPipe, pvCallback); - pPipe->bNeedNotify = !bProcessing; - if (bProcessing) - { - RTCritSectLeave(&pPipe->hCritSect); - rc = VINF_SUCCESS; - break; - } - else if (pPipe->enmState == VBOXVDMAPIPE_STATE_CLOSING) - { - pPipe->enmState = VBOXVDMAPIPE_STATE_CLOSED; - RTCritSectLeave(&pPipe->hCritSect); - rc = VINF_EOF; - break; - } - } - else - { - AssertBreakpoint(); - rc = VERR_INVALID_STATE; - RTCritSectLeave(&pPipe->hCritSect); - break; - } - - RTCritSectLeave(&pPipe->hCritSect); - - rc = RTSemEventWait(pPipe->hEvent, RT_INDEFINITE_WAIT); - AssertRC(rc); - if (!RT_SUCCESS(rc)) + WARN(("unexpected type %d\n", enmType)); break; - - rc = RTCritSectEnter(&pPipe->hCritSect); - AssertRC(rc); - if (!RT_SUCCESS(rc)) - break; - } while (1); - } - - return rc; -} - -int vboxVDMAPipeModifyClient(PVBOXVDMAPIPE pPipe, PFNHVBOXVDMARWCB pfnCallback, void * pvCallback) -{ - int rc = RTCritSectEnter(&pPipe->hCritSect); - AssertRC(rc); - if (RT_SUCCESS(rc)) - { - bool bNeedNotify = false; - Assert(pPipe->enmState == VBOXVDMAPIPE_STATE_OPENNED); - if (pPipe->enmState == VBOXVDMAPIPE_STATE_OPENNED) - { - bool bModified = pfnCallback(pPipe, pvCallback); - if (bModified) - { - bNeedNotify = pPipe->bNeedNotify; - pPipe->bNeedNotify = false; - } - } - else - rc = VERR_INVALID_STATE; - - RTCritSectLeave(&pPipe->hCritSect); - - if (bNeedNotify) - { - rc = RTSemEventSignal(pPipe->hEvent); - AssertRC(rc); } } - return rc; -} - -int vboxVDMAPipeDestruct(PVBOXVDMAPIPE pPipe) -{ - Assert(pPipe->enmState == VBOXVDMAPIPE_STATE_CLOSED - || pPipe->enmState == VBOXVDMAPIPE_STATE_CREATED); - /* ensure the pipe is closed */ - vboxVDMAPipeCloseClient(pPipe); - - Assert(pPipe->enmState == VBOXVDMAPIPE_STATE_CLOSED); - - if (pPipe->enmState != VBOXVDMAPIPE_STATE_CLOSED) - return VERR_INVALID_STATE; - - int rc = RTCritSectDelete(&pPipe->hCritSect); - AssertRC(rc); - - rc = RTSemEventDestroy(pPipe->hEvent); - AssertRC(rc); return VINF_SUCCESS; } -#endif static void vboxVDMACommandProcess(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd) { @@ -1007,87 +1853,6 @@ static void vboxVDMAControlProcess(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd) AssertRC(rc); } -#ifdef VBOX_VDMA_WITH_WORKERTHREAD -typedef struct -{ - struct VBOXVDMAHOST *pVdma; - VBOXVDMAPIPE_CMD_BODY Cmd; - bool bHasCmd; -} VBOXVDMACMD_PROCESS_CONTEXT, *PVBOXVDMACMD_PROCESS_CONTEXT; - -static DECLCALLBACK(bool) vboxVDMACommandProcessCb(PVBOXVDMAPIPE pPipe, void *pvCallback) -{ - PVBOXVDMACMD_PROCESS_CONTEXT pContext = (PVBOXVDMACMD_PROCESS_CONTEXT)pvCallback; - struct VBOXVDMAHOST *pVdma = pContext->pVdma; - HGSMILISTENTRY *pEntry = hgsmiListRemoveHead(&pVdma->PendingList); - if (pEntry) - { - PVBOXVDMAPIPE_CMD pPipeCmd = VBOXVDMAPIPE_CMD_FROM_ENTRY(pEntry); - Assert(pPipeCmd); - pContext->Cmd = pPipeCmd->Cmd; - hgsmiListPrepend(&pVdma->CmdPool.List, pEntry); - pContext->bHasCmd = true; - return true; - } - - pContext->bHasCmd = false; - return false; -} - -static DECLCALLBACK(int) vboxVDMAWorkerThread(RTTHREAD ThreadSelf, void *pvUser) -{ - PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvUser; - PHGSMIINSTANCE pHgsmi = pVdma->pHgsmi; - VBOXVDMACMD_PROCESS_CONTEXT Context; - Context.pVdma = pVdma; - - int rc = vboxVDMAPipeOpenServer(&pVdma->Pipe); - AssertRC(rc); - if (RT_SUCCESS(rc)) - { - do - { - rc = vboxVDMAPipeModifyServer(&pVdma->Pipe, vboxVDMACommandProcessCb, &Context); - AssertRC(rc); - if (RT_SUCCESS(rc)) - { - switch (Context.Cmd.enmType) - { - case VBOXVDMAPIPE_CMD_TYPE_DMACMD: - { - PVBOXVDMACBUF_DR pDr = Context.Cmd.u.pDr; - vboxVDMACommandProcess(pVdma, pDr); - break; - } - case VBOXVDMAPIPE_CMD_TYPE_DMACTL: - { - PVBOXVDMA_CTL pCtl = Context.Cmd.u.pCtl; - vboxVDMAControlProcess(pVdma, pCtl); - break; - } - default: - AssertBreakpoint(); - break; - } - - if (rc == VINF_EOF) - { - rc = VINF_SUCCESS; - break; - } - } - else - break; - } while (1); - } - - /* always try to close the pipe to make sure the client side is notified */ - int tmpRc = vboxVDMAPipeCloseServer(&pVdma->Pipe); - AssertRC(tmpRc); - return rc; -} -#endif - #ifdef VBOX_VDMA_WITH_WATCHDOG static DECLCALLBACK(void) vboxVDMAWatchDogTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser) { @@ -1127,40 +1892,27 @@ int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements) "VDMA WatchDog Timer", &pVdma->WatchDogTimer); AssertRC(rc); #endif -#ifdef VBOX_VDMA_WITH_WORKERTHREAD - hgsmiListInit(&pVdma->PendingList); - rc = vboxVDMAPipeConstruct(&pVdma->Pipe); - AssertRC(rc); + rc = VBoxVBVAExHSInit(&pVdma->CmdVbva); if (RT_SUCCESS(rc)) { - rc = RTThreadCreate(&pVdma->hWorkerThread, vboxVDMAWorkerThread, pVdma, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "VDMA"); - AssertRC(rc); + rc = VBoxVDMAThreadCreate(&pVdma->Thread, vboxVDMAWorkerThread, pVdma); if (RT_SUCCESS(rc)) { - hgsmiListInit(&pVdma->CmdPool.List); - pVdma->CmdPool.cCmds = cPipeElements; - for (uint32_t i = 0; i < cPipeElements; ++i) - { - hgsmiListAppend(&pVdma->CmdPool.List, &pVdma->CmdPool.aCmds[i].Entry); - } -# if 0 //def VBOX_WITH_CRHGSMI - int tmpRc = vboxVDMACrCtlHgsmiSetup(pVdma); -# endif -#endif pVGAState->pVdma = pVdma; #ifdef VBOX_WITH_CRHGSMI int rcIgnored = vboxVDMACrCtlHgsmiSetup(pVdma); NOREF(rcIgnored); /** @todo is this ignoring intentional? */ #endif return VINF_SUCCESS; -#ifdef VBOX_VDMA_WITH_WORKERTHREAD } + else + WARN(("VBoxVDMAThreadCreate faile %d\n", rc)); - int tmpRc = vboxVDMAPipeDestruct(&pVdma->Pipe); - AssertRC(tmpRc); + VBoxVBVAExHSTerm(&pVdma->CmdVbva); } + else + WARN(("VBoxVBVAExHSInit faile %d\n", rc)); RTMemFree(pVdma); -#endif } else rc = VERR_OUT_OF_RESOURCES; @@ -1168,45 +1920,34 @@ int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements) return rc; } -int vboxVDMADestruct(struct VBOXVDMAHOST *pVdma) +int vboxVDMAReset(struct VBOXVDMAHOST *pVdma) { -#ifdef VBOX_VDMA_WITH_WORKERTHREAD - /* @todo: implement*/ - AssertBreakpoint(); -#endif - RTMemFree(pVdma); + VBVAEXHOSTCTL Ctl; + Ctl.enmType = VBVAEXHOSTCTL_TYPE_HH_RESET; + int rc = vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST_ANY); + if (!RT_SUCCESS(rc)) + { + WARN(("vdmaVBVACtlSubmitSync failed %d\n", rc)); + return rc; + } return VINF_SUCCESS; } -#ifdef VBOX_VDMA_WITH_WORKERTHREAD -typedef struct -{ - struct VBOXVDMAHOST *pVdma; - VBOXVDMAPIPE_CMD_BODY Cmd; - bool bQueued; -} VBOXVDMACMD_SUBMIT_CONTEXT, *PVBOXVDMACMD_SUBMIT_CONTEXT; - -DECLCALLBACK(bool) vboxVDMACommandSubmitCb(PVBOXVDMAPIPE pPipe, void *pvCallback) +int vboxVDMADestruct(struct VBOXVDMAHOST *pVdma) { - PVBOXVDMACMD_SUBMIT_CONTEXT pContext = (PVBOXVDMACMD_SUBMIT_CONTEXT)pvCallback; - struct VBOXVDMAHOST *pVdma = pContext->pVdma; - HGSMILISTENTRY *pEntry = hgsmiListRemoveHead(&pVdma->CmdPool.List); - Assert(pEntry); - if (pEntry) + VBVAEXHOSTCTL Ctl; + Ctl.enmType = VBVAEXHOSTCTL_TYPE_HH_TERM; + int rc = vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST_ANY); + if (!RT_SUCCESS(rc)) { - PVBOXVDMAPIPE_CMD pPipeCmd = VBOXVDMAPIPE_CMD_FROM_ENTRY(pEntry); - pPipeCmd->Cmd = pContext->Cmd; - VBoxSHGSMICommandMarkAsynchCompletion(pContext->Cmd.u.pvCmd); - pContext->bQueued = true; - hgsmiListAppend(&pVdma->PendingList, pEntry); - return true; + WARN(("vdmaVBVACtlSubmitSync failed %d\n", rc)); + return rc; } - - /* @todo: should we try to flush some commands here? */ - pContext->bQueued = false; - return false; + VBoxVDMAThreadTerm(&pVdma->Thread); + VBoxVBVAExHSTerm(&pVdma->CmdVbva); + RTMemFree(pVdma); + return VINF_SUCCESS; } -#endif int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM) { @@ -1367,3 +2108,277 @@ void vboxVDMACommand(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t AssertRC(tmpRc); #endif } + +/**/ + +static int vdmaVBVACtlSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete) +{ + int rc = VBoxVBVAExHCtlSubmit(&pVdma->CmdVbva, pCtl, enmSource, pfnComplete, pvComplete); + if (RT_SUCCESS(rc)) + { + if (rc == VINF_SUCCESS) + return VBoxVDMAThreadEventNotify(&pVdma->Thread); + else + Assert(rc == VINF_ALREADY_INITIALIZED); + } + else + WARN(("VBoxVBVAExHCtlSubmit failed %d\n", rc)); + + return rc; +} + +static DECLCALLBACK(void) vboxCmdVBVACmdCtlGuestCompletion(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl, int rc, void *pvContext) +{ + PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvContext; + VBOXCMDVBVA_CTL *pGCtl = (VBOXCMDVBVA_CTL*)(pCtl->u.cmd.pu8Cmd - sizeof (VBOXCMDVBVA_CTL)); + AssertRC(rc); + pGCtl->i32Result = rc; + + Assert(pVdma->pVGAState->fGuestCaps & VBVACAPS_COMPLETEGCMD_BY_IOREAD); + rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pGCtl); + AssertRC(rc); + + VBoxVBVAExHCtlFree(pVbva, pCtl); +} + +static int vdmaVBVACtlOpaqueSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL_SOURCE enmSource, uint8_t* pu8Cmd, uint32_t cbCmd, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete) +{ + VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE); + if (!pHCtl) + { + WARN(("VBoxVBVAExHCtlCreate failed\n")); + return VERR_NO_MEMORY; + } + + pHCtl->u.cmd.pu8Cmd = pu8Cmd; + pHCtl->u.cmd.cbCmd = cbCmd; + int rc = vdmaVBVACtlSubmit(pVdma, pHCtl, enmSource, pfnComplete, pvComplete); + if (!RT_SUCCESS(rc)) + { + WARN(("vdmaVBVACtlSubmit failed rc %d\n", rc)); + return rc;; + } + return VINF_SUCCESS; +} + +static int vdmaVBVACtlOpaqueGuestSubmit(PVBOXVDMAHOST pVdma, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl) +{ + Assert(cbCtl >= sizeof (VBOXCMDVBVA_CTL)); + VBoxSHGSMICommandMarkAsynchCompletion(pCtl); + int rc = vdmaVBVACtlOpaqueSubmit(pVdma, VBVAEXHOSTCTL_SOURCE_GUEST, (uint8_t*)(pCtl+1), cbCtl - sizeof (VBOXCMDVBVA_CTL), vboxCmdVBVACmdCtlGuestCompletion, pVdma); + if (RT_SUCCESS(rc)) + return VINF_SUCCESS; + + WARN(("vdmaVBVACtlOpaqueSubmit failed %d\n", rc)); + pCtl->i32Result = rc; + rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCtl); + AssertRC(rc); + return VINF_SUCCESS; +} + +static DECLCALLBACK(void) vboxCmdVBVACmdCtlHostCompletion(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl, int rc, void *pvCompletion) +{ + VBOXCRCMDCTL* pVboxCtl = (VBOXCRCMDCTL*)pCtl->u.cmd.pu8Cmd; + if (pVboxCtl->pfnInternal) + ((PFNCRCTLCOMPLETION)pVboxCtl->pfnInternal)(pVboxCtl, pCtl->u.cmd.cbCmd, rc, pvCompletion); + VBoxVBVAExHCtlFree(pVbva, pCtl); +} + +static int vdmaVBVACtlOpaqueHostSubmit(PVBOXVDMAHOST pVdma, struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd, + PFNCRCTLCOMPLETION pfnCompletion, + void *pvCompletion) +{ + pCmd->pfnInternal = (void(*)())pfnCompletion; + int rc = vdmaVBVACtlOpaqueSubmit(pVdma, VBVAEXHOSTCTL_SOURCE_HOST_ENABLED, (uint8_t*)pCmd, cbCmd, vboxCmdVBVACmdCtlHostCompletion, pvCompletion); + if (!RT_SUCCESS(rc)) + { + if (rc == VERR_INVALID_STATE) + { + pCmd->pfnInternal = NULL; + PVGASTATE pVGAState = pVdma->pVGAState; + rc = pVGAState->pDrv->pfnCrHgcmCtlSubmit(pVGAState->pDrv, pCmd, cbCmd, pfnCompletion, pvCompletion); + if (!RT_SUCCESS(rc)) + WARN(("pfnCrHgsmiControlProcess failed %d\n", rc)); + + return rc; + } + WARN(("vdmaVBVACtlOpaqueSubmit failed %d\n", rc)); + return rc; + } + + return VINF_SUCCESS; +} + +static int vdmaVBVACtlEnableDisableSubmitInternal(PVBOXVDMAHOST pVdma, VBVAENABLE *pEnable, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete) +{ + VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_GH_ENABLE_DISABLE); + if (!pHCtl) + { + WARN(("VBoxVBVAExHCtlCreate failed\n")); + return VERR_NO_MEMORY; + } + + pHCtl->u.cmd.pu8Cmd = (uint8_t*)pEnable; + pHCtl->u.cmd.cbCmd = sizeof (*pEnable); + int rc = vdmaVBVACtlSubmit(pVdma, pHCtl, VBVAEXHOSTCTL_SOURCE_GUEST, pfnComplete, pvComplete); + if (!RT_SUCCESS(rc)) + { + WARN(("vdmaVBVACtlSubmit failed rc %d\n", rc)); + return rc;; + } + return VINF_SUCCESS; +} + +static int vdmaVBVACtlEnableDisableSubmit(PVBOXVDMAHOST pVdma, VBOXCMDVBVA_CTL_ENABLE *pEnable) +{ + VBoxSHGSMICommandMarkAsynchCompletion(&pEnable->Hdr); + int rc = vdmaVBVACtlEnableDisableSubmitInternal(pVdma, &pEnable->Enable, vboxCmdVBVACmdCtlGuestCompletion, pVdma); + if (RT_SUCCESS(rc)) + return VINF_SUCCESS; + + WARN(("vdmaVBVACtlEnableDisableSubmitInternal failed %d\n", rc)); + pEnable->Hdr.i32Result = rc; + rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, &pEnable->Hdr); + AssertRC(rc); + return VINF_SUCCESS; +} + +static DECLCALLBACK(void) vdmaVBVACtlSubmitSyncCompletion(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl, int rc, void *pvContext) +{ + VDMA_VBVA_CTL_CYNC_COMPLETION *pData = (VDMA_VBVA_CTL_CYNC_COMPLETION*)pvContext; + pData->rc = rc; + rc = RTSemEventSignal(pData->hEvent); + if (!RT_SUCCESS(rc)) + WARN(("RTSemEventSignal failed %d\n", rc)); +} + +static int vdmaVBVACtlSubmitSync(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource) +{ + VDMA_VBVA_CTL_CYNC_COMPLETION Data; + Data.rc = VERR_NOT_IMPLEMENTED; + int rc = RTSemEventCreate(&Data.hEvent); + if (!RT_SUCCESS(rc)) + { + WARN(("RTSemEventCreate failed %d\n", rc)); + return rc; + } + + rc = vdmaVBVACtlSubmit(pVdma, pCtl, enmSource, vdmaVBVACtlSubmitSyncCompletion, &Data); + if (RT_SUCCESS(rc)) + { + rc = RTSemEventWait(Data.hEvent, RT_INDEFINITE_WAIT); + if (RT_SUCCESS(rc)) + { + rc = Data.rc; + if (!RT_SUCCESS(rc)) + WARN(("vdmaVBVACtlSubmitSyncCompletion returned %d\n", rc)); + } + else + WARN(("RTSemEventWait failed %d\n", rc)); + } + else + WARN(("vdmaVBVACtlSubmit failed %d\n", rc)); + + RTSemEventDestroy(Data.hEvent); + + return rc; +} + +static int vdmaVBVAPause(PVBOXVDMAHOST pVdma) +{ + VBVAEXHOSTCTL Ctl; + Ctl.enmType = VBVAEXHOSTCTL_TYPE_HH_INTERNAL_PAUSE; + return vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST_ANY); +} + +static int vdmaVBVAResume(PVBOXVDMAHOST pVdma) +{ + VBVAEXHOSTCTL Ctl; + Ctl.enmType = VBVAEXHOSTCTL_TYPE_HH_INTERNAL_RESUME; + return vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST_ANY); +} + +static int vboxVDMACmdSubmitPerform(struct VBOXVDMAHOST *pVdma) +{ + int rc = VBoxVBVAExHSCheckCommands(&pVdma->CmdVbva); + switch (rc) + { + case VINF_SUCCESS: + return VBoxVDMAThreadEventNotify(&pVdma->Thread); + case VINF_ALREADY_INITIALIZED: + case VINF_EOF: + case VERR_INVALID_STATE: + return VINF_SUCCESS; + default: + Assert(!RT_FAILURE(rc)); + return RT_FAILURE(rc) ? rc : VERR_INTERNAL_ERROR; + } +} + + +int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface, + struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd, + PFNCRCTLCOMPLETION pfnCompletion, + void *pvCompletion) +{ + PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface); + struct VBOXVDMAHOST *pVdma = pVGAState->pVdma; + return vdmaVBVACtlOpaqueHostSubmit(pVdma, pCmd, cbCmd, pfnCompletion, pvCompletion); +} + +int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl) +{ + struct VBOXVDMAHOST *pVdma = pVGAState->pVdma; + int rc = VINF_SUCCESS; + switch (pCtl->u32Type) + { + case VBOXCMDVBVACTL_TYPE_3DCTL: + return vdmaVBVACtlOpaqueGuestSubmit(pVdma, pCtl, cbCtl); + case VBOXCMDVBVACTL_TYPE_ENABLE: + if (cbCtl != sizeof (VBOXCMDVBVA_CTL_ENABLE)) + { + WARN(("incorrect enable size\n")); + rc = VERR_INVALID_PARAMETER; + break; + } + return vdmaVBVACtlEnableDisableSubmit(pVdma, (VBOXCMDVBVA_CTL_ENABLE*)pCtl); + default: + WARN(("unsupported type\n")); + rc = VERR_INVALID_PARAMETER; + break; + } + + pCtl->i32Result = rc; + rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCtl); + AssertRC(rc); + return VINF_SUCCESS; +} + +int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState) +{ + if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva)) + { + WARN(("vdma VBVA is disabled\n")); + return VERR_INVALID_STATE; + } + + return vboxVDMACmdSubmitPerform(pVGAState->pVdma); +} + +int vboxCmdVBVACmdFlush(PVGASTATE pVGAState) +{ + WARN(("flush\n")); + if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva)) + { + WARN(("vdma VBVA is disabled\n")); + return VERR_INVALID_STATE; + } + return vboxVDMACmdSubmitPerform(pVGAState->pVdma); +} + +void vboxCmdVBVACmdTimer(PVGASTATE pVGAState) +{ + if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva)) + return; + vboxVDMACmdSubmitPerform(pVGAState->pVdma); +} diff --git a/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.cpp b/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.cpp index 84fe7b2c..c0d2c0b8 100644 --- a/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.cpp +++ b/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.cpp @@ -8,7 +8,7 @@ */ /* - * Copyright (C) 2006-2008 Oracle Corporation + * Copyright (C) 2006-2012 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; @@ -1039,19 +1039,12 @@ int HGSMIHostCommandProcessAndFreeAsynch (PHGSMIINSTANCE pIns, { LogFlowFunc(("pIns = %p, pvMem = %p\n", pIns, pvMem)); - VM_ASSERT_OTHER_THREAD(pIns->pVM); - #if 0 void *pvContext = NULL; #endif HGSMIOFFSET offBuffer = HGSMIHeapBufferOffset (&pIns->hostHeap, pvMem); -// /* Have to forward to EMT because FIFO processing is there. */ -// int rc = VMR3ReqCallVoid (pIns->pVM, &pReq, RT_INDEFINITE_WAIT, -// (PFNRT) hgsmiHostCommandProcess, -// 3, pIns, offBuffer, &pvContext); - int rc = hgsmiHostCommandProcess (pIns, offBuffer, #if 0 hgsmiHostCommandFreeCallback, &pvContext, @@ -1192,6 +1185,32 @@ static int hgsmiHostSaveFifoLocked (HGSMILIST * pFifo, PSSMHANDLE pSSM) return rc; } +static int hgsmiHostSaveGuestCmdCompletedFifoEntryLocked (HGSMIGUESTCOMPLENTRY *pEntry, PSSMHANDLE pSSM) +{ + return SSMR3PutU32 (pSSM, pEntry->offBuffer); +} + +static int hgsmiHostSaveGuestCmdCompletedFifoLocked (HGSMILIST * pFifo, PSSMHANDLE pSSM) +{ + VBOXHGSMI_SAVE_FIFOSTART(pSSM); + uint32_t size = 0; + for(HGSMILISTENTRY * pEntry = pFifo->pHead; pEntry; pEntry = pEntry->pNext) + { + ++size; + } + int rc = SSMR3PutU32 (pSSM, size); + + for(HGSMILISTENTRY * pEntry = pFifo->pHead; pEntry && RT_SUCCESS(rc); pEntry = pEntry->pNext) + { + HGSMIGUESTCOMPLENTRY *pFifoEntry = HGSMILISTENTRY_2_HGSMIGUESTCOMPLENTRY(pEntry); + rc = hgsmiHostSaveGuestCmdCompletedFifoEntryLocked (pFifoEntry, pSSM); + } + + VBOXHGSMI_SAVE_FIFOSTOP(pSSM); + + return rc; +} + static int hgsmiHostLoadFifoEntryLocked (PHGSMIINSTANCE pIns, HGSMIHOSTFIFOENTRY **ppEntry, PSSMHANDLE pSSM) { HGSMIHOSTFIFOENTRY *pEntry; @@ -1234,13 +1253,65 @@ static int hgsmiHostLoadFifoLocked (PHGSMIINSTANCE pIns, HGSMILIST * pFifo, PSSM return rc; } +static int hgsmiHostLoadGuestCmdCompletedFifoEntryLocked (PHGSMIINSTANCE pIns, HGSMIGUESTCOMPLENTRY **ppEntry, PSSMHANDLE pSSM) +{ + HGSMIGUESTCOMPLENTRY *pEntry; + int rc = hgsmiGuestCompletionFIFOAlloc (pIns, &pEntry); AssertRC(rc); + if (RT_SUCCESS (rc)) + { + rc = SSMR3GetU32 (pSSM, &pEntry->offBuffer); AssertRC(rc); + if (RT_SUCCESS (rc)) + *ppEntry = pEntry; + else + hgsmiGuestCompletionFIFOFree (pIns, pEntry); + } + return rc; +} + +static int hgsmiHostLoadGuestCmdCompletedFifoLocked (PHGSMIINSTANCE pIns, HGSMILIST * pFifo, PSSMHANDLE pSSM, uint32_t u32Version) +{ + VBOXHGSMI_LOAD_FIFOSTART(pSSM); + + uint32_t size; + int rc = SSMR3GetU32 (pSSM, &size); AssertRC(rc); + if(RT_SUCCESS(rc) && size) + { + if (u32Version > VGA_SAVEDSTATE_VERSION_INV_GCMDFIFO) + { + for(uint32_t i = 0; i < size; ++i) + { + HGSMIGUESTCOMPLENTRY *pFifoEntry = NULL; /* initialized to shut up gcc */ + rc = hgsmiHostLoadGuestCmdCompletedFifoEntryLocked (pIns, &pFifoEntry, pSSM); + AssertRCBreak(rc); + hgsmiListAppend (pFifo, &pFifoEntry->entry); + } + } + else + { + LogRel(("WARNING: the current saved state version has some 3D support data missing, " + "which may lead to some guest applications function improperly")); + /* just read out all invalid data and discard it */ + for(uint32_t i = 0; i < size; ++i) + { + HGSMIHOSTFIFOENTRY *pFifoEntry = NULL; /* initialized to shut up gcc */ + rc = hgsmiHostLoadFifoEntryLocked (pIns, &pFifoEntry, pSSM); + AssertRCBreak(rc); + hgsmiHostFIFOFree (pIns, pFifoEntry); + } + } + } + + VBOXHGSMI_LOAD_FIFOSTOP(pSSM); + + return rc; +} + int HGSMIHostSaveStateExec (PHGSMIINSTANCE pIns, PSSMHANDLE pSSM) { VBOXHGSMI_SAVE_START(pSSM); int rc; - HGSMIOFFSET off = pIns->pHGFlags ? HGSMIPointerToOffset(&pIns->area, (const HGSMIBUFFERHEADER *)pIns->pHGFlags) : HGSMIOFFSET_VOID; SSMR3PutU32 (pSSM, off); @@ -1251,7 +1322,7 @@ int HGSMIHostSaveStateExec (PHGSMIINSTANCE pIns, PSSMHANDLE pSSM) SSMR3PutU32 (pSSM, HGSMIHeapOffset(&pIns->hostHeap)); SSMR3PutU32 (pSSM, HGSMIHeapSize(&pIns->hostHeap)); /* need save mem pointer to calculate offset on restore */ - SSMR3PutU64 (pSSM, (uint64_t)pIns->area.pu8Base); + SSMR3PutU64 (pSSM, (uint64_t)(uintptr_t)pIns->area.pu8Base); rc = hgsmiFIFOLock (pIns); if(RT_SUCCESS(rc)) { @@ -1259,7 +1330,7 @@ int HGSMIHostSaveStateExec (PHGSMIINSTANCE pIns, PSSMHANDLE pSSM) rc = hgsmiHostSaveFifoLocked (&pIns->hostFIFORead, pSSM); AssertRC(rc); rc = hgsmiHostSaveFifoLocked (&pIns->hostFIFOProcessed, pSSM); AssertRC(rc); #ifdef VBOX_WITH_WDDM - rc = hgsmiHostSaveFifoLocked (&pIns->guestCmdCompleted, pSSM); AssertRC(rc); + rc = hgsmiHostSaveGuestCmdCompletedFifoLocked (&pIns->guestCmdCompleted, pSSM); AssertRC(rc); #endif hgsmiFIFOUnlock (pIns); @@ -1326,7 +1397,7 @@ int HGSMIHostLoadStateExec (PHGSMIINSTANCE pIns, PSSMHANDLE pSSM, uint32_t u32Ve rc = hgsmiHostLoadFifoLocked (pIns, &pIns->hostFIFOProcessed, pSSM); #ifdef VBOX_WITH_WDDM if (RT_SUCCESS(rc) && u32Version > VGA_SAVEDSTATE_VERSION_PRE_WDDM) - rc = hgsmiHostLoadFifoLocked (pIns, &pIns->hostFIFOProcessed, pSSM); + rc = hgsmiHostLoadGuestCmdCompletedFifoLocked (pIns, &pIns->guestCmdCompleted, pSSM, u32Version); #endif hgsmiFIFOUnlock (pIns); @@ -1729,6 +1800,12 @@ int hgsmiCompleteGuestCommand(PHGSMIINSTANCE pIns, /* Now guest can read the FIFO, the notification is informational. */ hgsmiNotifyGuest (pIns); } +#ifdef DEBUG_misha + else + { + Assert(0); + } +#endif } return rc; } @@ -1740,7 +1817,10 @@ int HGSMICompleteGuestCommand(PHGSMIINSTANCE pIns, LogFlowFunc(("pIns = %p, pvMem = %p\n", pIns, pvMem)); int rc = VINF_SUCCESS; - HGSMIOFFSET offBuffer = HGSMIHeapBufferOffset (&pIns->hostHeap, pvMem); + + HGSMIBUFFERHEADER *pHeader = HGSMIBufferHeaderFromData(pvMem); + HGSMIOFFSET offBuffer = HGSMIPointerToOffset(&pIns->area, pHeader); + Assert(offBuffer != HGSMIOFFSET_VOID); if (offBuffer != HGSMIOFFSET_VOID) { diff --git a/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.h b/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.h index fb8eb127..febd8015 100644 --- a/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.h +++ b/src/VBox/Devices/Graphics/HGSMI/HGSMIHost.h @@ -5,7 +5,7 @@ */ /* - * Copyright (C) 2006-2008 Oracle Corporation + * Copyright (C) 2006-2010 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; diff --git a/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.cpp b/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.cpp index fc67e67f..3e0686a2 100644 --- a/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.cpp +++ b/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.cpp @@ -5,7 +5,7 @@ */ /* - * Copyright (C) 2006-2008 Oracle Corporation + * Copyright (C) 2006-2010 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; diff --git a/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.h b/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.h index e998390c..eb76aed9 100644 --- a/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.h +++ b/src/VBox/Devices/Graphics/HGSMI/HGSMIHostHlp.h @@ -5,7 +5,7 @@ */ /* - * Copyright (C) 2006-2008 Oracle Corporation + * Copyright (C) 2006-2010 Oracle Corporation * * This file is part of VirtualBox Open Source Edition (OSE), as * available from http://www.virtualbox.org. This file is free software; diff --git a/src/VBox/Devices/Graphics/vmsvga/svga3d_caps.h b/src/VBox/Devices/Graphics/vmsvga/svga3d_caps.h new file mode 100644 index 00000000..0f906994 --- /dev/null +++ b/src/VBox/Devices/Graphics/vmsvga/svga3d_caps.h @@ -0,0 +1,11 @@ +/* + * VMware SVGA II 3D capability definitions + */ + +#ifndef _SVGA3D_CAPS_H_ +#define _SVGA3D_CAPS_H_ + + + +#endif /* _SVGA3D_CAPS_H_ */ + diff --git a/src/VBox/Devices/Graphics/vmsvga/svga3d_reg.h b/src/VBox/Devices/Graphics/vmsvga/svga3d_reg.h new file mode 100644 index 00000000..3991d385 --- /dev/null +++ b/src/VBox/Devices/Graphics/vmsvga/svga3d_reg.h @@ -0,0 +1,56 @@ +/* + * VMware SVGA II 3D definitions + */ + +#ifndef _SVGA3D_REG_H_ +#define _SVGA3D_REG_H_ + +#define SVGA_3D_CMD_LEGACY_BASE 1000 +#define SVGA_3D_CMD_BASE 1040 + +#define SVGA_3D_CMD_SURFACE_DEFINE SVGA_3D_CMD_BASE + 0 +#define SVGA_3D_CMD_SURFACE_DESTROY SVGA_3D_CMD_BASE + 1 +#define SVGA_3D_CMD_SURFACE_COPY SVGA_3D_CMD_BASE + 2 +#define SVGA_3D_CMD_SURFACE_STRETCHBLT SVGA_3D_CMD_BASE + 3 +#define SVGA_3D_CMD_SURFACE_DMA SVGA_3D_CMD_BASE + 4 +#define SVGA_3D_CMD_CONTEXT_DEFINE SVGA_3D_CMD_BASE + 5 +#define SVGA_3D_CMD_CONTEXT_DESTROY SVGA_3D_CMD_BASE + 6 +#define SVGA_3D_CMD_SETTRANSFORM SVGA_3D_CMD_BASE + 7 +#define SVGA_3D_CMD_SETZRANGE SVGA_3D_CMD_BASE + 8 +#define SVGA_3D_CMD_SETRENDERSTATE SVGA_3D_CMD_BASE + 9 +#define SVGA_3D_CMD_SETRENDERTARGET SVGA_3D_CMD_BASE + 10 +#define SVGA_3D_CMD_SETTEXTURESTATE SVGA_3D_CMD_BASE + 11 +#define SVGA_3D_CMD_SETMATERIAL SVGA_3D_CMD_BASE + 12 +#define SVGA_3D_CMD_SETLIGHTDATA SVGA_3D_CMD_BASE + 13 +#define SVGA_3D_CMD_SETLIGHTENABLED SVGA_3D_CMD_BASE + 14 +#define SVGA_3D_CMD_SETVIEWPORT SVGA_3D_CMD_BASE + 15 +#define SVGA_3D_CMD_SETCLIPPLANE SVGA_3D_CMD_BASE + 16 +#define SVGA_3D_CMD_CLEAR SVGA_3D_CMD_BASE + 17 +#define SVGA_3D_CMD_PRESENT SVGA_3D_CMD_BASE + 18 +#define SVGA_3D_CMD_SHADER_DEFINE SVGA_3D_CMD_BASE + 19 +#define SVGA_3D_CMD_SHADER_DESTROY SVGA_3D_CMD_BASE + 20 +#define SVGA_3D_CMD_SET_SHADER SVGA_3D_CMD_BASE + 21 +#define SVGA_3D_CMD_SET_SHADER_CONST SVGA_3D_CMD_BASE + 22 +#define SVGA_3D_CMD_DRAW_PRIMITIVES SVGA_3D_CMD_BASE + 23 +#define SVGA_3D_CMD_SETSCISSORRECT SVGA_3D_CMD_BASE + 24 +#define SVGA_3D_CMD_BEGIN_QUERY SVGA_3D_CMD_BASE + 25 +#define SVGA_3D_CMD_END_QUERY SVGA_3D_CMD_BASE + 26 +#define SVGA_3D_CMD_WAIT_FOR_QUERY SVGA_3D_CMD_BASE + 27 +#define SVGA_3D_CMD_PRESENT_READBACK SVGA_3D_CMD_BASE + 28 +#define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29 +#define SVGA_3D_CMD_SURFACE_DEFINE_V2 SVGA_3D_CMD_BASE + 30 +#define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31 +#define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40 +#define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41 +#define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 42 + +#define SVGA_3D_CMD_FUTURE_MAX 2000 + +typedef enum +{ + SVGA3D_WRITE_HOST_VRAM = 1, + SVGA3D_READ_HOST_VRAM = 2 +} SVGA3dTransferType; + +#endif /* _SVGA3D_REG_H_ */ + diff --git a/src/VBox/Devices/Graphics/vmsvga/svga_escape.h b/src/VBox/Devices/Graphics/vmsvga/svga_escape.h new file mode 100644 index 00000000..b96705c8 --- /dev/null +++ b/src/VBox/Devices/Graphics/vmsvga/svga_escape.h @@ -0,0 +1,11 @@ +/* + * SVGA escape commands + */ + +#ifndef _SVGA_ESCAPE_H_ +#define _SVGA_ESCAPE_H_ + +#define SVGA_ESCAPE_NSID_VMWARE 0x00000000 + + +#endif /* _SVGA_ESCAPE_H_ */ diff --git a/src/VBox/Devices/Graphics/vmsvga/svga_overlay.h b/src/VBox/Devices/Graphics/vmsvga/svga_overlay.h new file mode 100644 index 00000000..08aae92d --- /dev/null +++ b/src/VBox/Devices/Graphics/vmsvga/svga_overlay.h @@ -0,0 +1,32 @@ +/* + * VMware SVGA video overlay definitions + */ + +#ifndef _SVGA_OVERLAY_H_ +#define _SVGA_OVERLAY_H_ + +#define SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS 0x00020001 +#define SVGA_ESCAPE_VMWARE_VIDEO_FLUSH 0x00020002 + +typedef struct SVGAEscapeVideoSetRegs +{ + struct + { + uint32_t cmdType; + uint32_t streamId; + } header; + + struct + { + uint32_t registerId; + uint32_t value; + } items[1]; +} SVGAEscapeVideoSetRegs; + +typedef struct SVGAEscapeVideoFlush +{ + uint32_t cmdType; + uint32_t streamId; +} SVGAEscapeVideoFlush; + +#endif /* _SVGA_OVERLAY_H_ */ diff --git a/src/VBox/Devices/Graphics/vmsvga/svga_reg.h b/src/VBox/Devices/Graphics/vmsvga/svga_reg.h new file mode 100644 index 00000000..6a1c69b4 --- /dev/null +++ b/src/VBox/Devices/Graphics/vmsvga/svga_reg.h @@ -0,0 +1,318 @@ +/* + * VMware SVGA II hardware definitions + */ + +#ifndef _SVGA_REG_H_ +#define _SVGA_REG_H_ + +#define PCI_VENDOR_ID_VMWARE 0x15AD +#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 + +#define SVGA_IRQFLAG_ANY_FENCE 0x1 +#define SVGA_IRQFLAG_FIFO_PROGRESS 0x2 +#define SVGA_IRQFLAG_FENCE_GOAL 0x4 + +#define SVGA_MAX_PSEUDOCOLOR_DEPTH 8 +#define SVGA_MAX_PSEUDOCOLORS (1 << SVGA_MAX_PSEUDOCOLOR_DEPTH) +#define SVGA_NUM_PALETTE_REGS (3 * SVGA_MAX_PSEUDOCOLORS) + +#define SVGA_MAGIC 0x900000UL +#define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver)) + +#define SVGA_VERSION_2 2 +#define SVGA_ID_2 SVGA_MAKE_ID(SVGA_VERSION_2) + +#define SVGA_VERSION_1 1 +#define SVGA_ID_1 SVGA_MAKE_ID(SVGA_VERSION_1) + +#define SVGA_VERSION_0 0 +#define SVGA_ID_0 SVGA_MAKE_ID(SVGA_VERSION_0) + +#define SVGA_ID_INVALID 0xFFFFFFFF + +#define SVGA_INDEX_PORT 0x0 +#define SVGA_VALUE_PORT 0x1 +#define SVGA_BIOS_PORT 0x2 +#define SVGA_IRQSTATUS_PORT 0x8 + +#define SVGA_IRQFLAG_ANY_FENCE 0x1 +#define SVGA_IRQFLAG_FIFO_PROGRESS 0x2 +#define SVGA_IRQFLAG_FENCE_GOAL 0x4 + +enum +{ + SVGA_REG_ID = 0, + SVGA_REG_ENABLE = 1, + SVGA_REG_WIDTH = 2, + SVGA_REG_HEIGHT = 3, + SVGA_REG_MAX_WIDTH = 4, + SVGA_REG_MAX_HEIGHT = 5, + SVGA_REG_DEPTH = 6, + SVGA_REG_BITS_PER_PIXEL = 7, + SVGA_REG_PSEUDOCOLOR = 8, + SVGA_REG_RED_MASK = 9, + SVGA_REG_GREEN_MASK = 10, + SVGA_REG_BLUE_MASK = 11, + SVGA_REG_BYTES_PER_LINE = 12, + SVGA_REG_FB_START = 13, + SVGA_REG_FB_OFFSET = 14, + SVGA_REG_VRAM_SIZE = 15, + SVGA_REG_FB_SIZE = 16, + SVGA_REG_CAPABILITIES = 17, + SVGA_REG_MEM_START = 18, + SVGA_REG_MEM_SIZE = 19, + SVGA_REG_CONFIG_DONE = 20, + SVGA_REG_SYNC = 21, + SVGA_REG_BUSY = 22, + SVGA_REG_GUEST_ID = 23, + SVGA_REG_CURSOR_ID = 24, + SVGA_REG_CURSOR_X = 25, + SVGA_REG_CURSOR_Y = 26, + SVGA_REG_CURSOR_ON = 27, + SVGA_REG_HOST_BITS_PER_PIXEL = 28, + SVGA_REG_SCRATCH_SIZE = 29, + SVGA_REG_MEM_REGS = 30, + SVGA_REG_NUM_DISPLAYS = 31, + SVGA_REG_PITCHLOCK = 32, + SVGA_REG_IRQMASK = 33, + SVGA_REG_NUM_GUEST_DISPLAYS = 34, + SVGA_REG_DISPLAY_ID = 35, + SVGA_REG_DISPLAY_IS_PRIMARY = 36, + SVGA_REG_DISPLAY_POSITION_X = 37, + SVGA_REG_DISPLAY_POSITION_Y = 38, + SVGA_REG_DISPLAY_WIDTH = 39, + SVGA_REG_DISPLAY_HEIGHT = 40, + SVGA_REG_GMR_ID = 41, + SVGA_REG_GMR_DESCRIPTOR = 42, + SVGA_REG_GMR_MAX_IDS = 43, + SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH = 44, + SVGA_REG_TRACES = 45, + SVGA_REG_GMRS_MAX_PAGES = 46, + SVGA_REG_MEMORY_SIZE = 47, + SVGA_REG_TOP = 48, + SVGA_PALETTE_BASE = 1024, + SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + SVGA_NUM_PALETTE_REGS +}; + +enum +{ + SVGA_FIFO_MIN = 0, + SVGA_FIFO_MAX, + SVGA_FIFO_NEXT_CMD, + SVGA_FIFO_STOP, + SVGA_FIFO_CAPABILITIES = 4, + SVGA_FIFO_FLAGS, + SVGA_FIFO_FENCE, + SVGA_FIFO_3D_HWVERSION, + SVGA_FIFO_PITCHLOCK, + SVGA_FIFO_CURSOR_ON, + SVGA_FIFO_CURSOR_X, + SVGA_FIFO_CURSOR_Y, + SVGA_FIFO_CURSOR_COUNT, + SVGA_FIFO_CURSOR_LAST_UPDATED, + SVGA_FIFO_RESERVED, + SVGA_FIFO_CURSOR_SCREEN_ID, + SVGA_FIFO_DEAD, + SVGA_FIFO_3D_HWVERSION_REVISED, + SVGA_FIFO_3D_CAPS = 32, + SVGA_FIFO_3D_CAPS_LAST = 32 + 255, + SVGA_FIFO_GUEST_3D_HWVERSION, + SVGA_FIFO_FENCE_GOAL, + SVGA_FIFO_BUSY, + SVGA_FIFO_NUM_REGS +}; + +typedef enum +{ + SVGA_CMD_INVALID_CMD = 0, + SVGA_CMD_UPDATE = 1, + SVGA_CMD_RECT_COPY = 3, + SVGA_CMD_DEFINE_CURSOR = 19, + SVGA_CMD_DEFINE_ALPHA_CURSOR = 22, + SVGA_CMD_UPDATE_VERBOSE = 25, + SVGA_CMD_FRONT_ROP_FILL = 29, + SVGA_CMD_FENCE = 30, + SVGA_CMD_ESCAPE = 33, + SVGA_CMD_DEFINE_SCREEN = 34, + SVGA_CMD_DESTROY_SCREEN = 35, + SVGA_CMD_DEFINE_GMRFB = 36, + SVGA_CMD_BLIT_GMRFB_TO_SCREEN = 37, + SVGA_CMD_BLIT_SCREEN_TO_GMRFB = 38, + SVGA_CMD_ANNOTATION_FILL = 39, + SVGA_CMD_ANNOTATION_COPY = 40, + SVGA_CMD_DEFINE_GMR2 = 41, + SVGA_CMD_REMAP_GMR2 = 42, + SVGA_CMD_MAX +} SVGAFifoCmdId; + +typedef struct SVGAColorBGRX +{ + union + { + struct + { + uint32_t b : 8; + uint32_t g : 8; + uint32_t r : 8; + uint32_t x : 8; + } s; + + uint32_t value; + }; +} SVGAColorBGRX; + +typedef struct SVGASignedPoint +{ + int32_t x; + int32_t y; +} SVGASignedPoint; + +#define SVGA_CAP_NONE 0x00000000 +#define SVGA_CAP_RECT_COPY 0x00000002 +#define SVGA_CAP_CURSOR 0x00000020 +#define SVGA_CAP_CURSOR_BYPASS 0x00000040 +#define SVGA_CAP_CURSOR_BYPASS_2 0x00000080 +#define SVGA_CAP_8BIT_EMULATION 0x00000100 +#define SVGA_CAP_ALPHA_CURSOR 0x00000200 +#define SVGA_CAP_3D 0x00004000 +#define SVGA_CAP_EXTENDED_FIFO 0x00008000 +#define SVGA_CAP_MULTIMON 0x00010000 +#define SVGA_CAP_PITCHLOCK 0x00020000 +#define SVGA_CAP_IRQMASK 0x00040000 +#define SVGA_CAP_DISPLAY_TOPOLOGY 0x00080000 +#define SVGA_CAP_GMR 0x00100000 +#define SVGA_CAP_TRACES 0x00200000 +#define SVGA_CAP_GMR2 0x00400000 +#define SVGA_CAP_SCREEN_OBJECT_2 0x00800000 + +#define SVGA_GMR_NULL ((uint32_t) -1) +#define SVGA_GMR_FRAMEBUFFER ((uint32_t) -2) + +typedef struct SVGAGuestPtr +{ + uint32_t gmrId; + uint32_t offset; +} SVGAGuestPtr; + +typedef struct SVGAGMRImageFormat +{ + union + { + struct + { + uint32_t bitsPerPixel : 8; + uint32_t colorDepth : 8; + uint32_t reserved : 16; + } s; + + uint32_t value; + }; +} SVGAGMRImageFormat; + +typedef struct SVGAGuestImage +{ + SVGAGuestPtr ptr; + uint32_t pitch; +} SVGAGuestImage; + +#define SVGA_SCREEN_MUST_BE_SET (1 << 0) +#define SVGA_SCREEN_HAS_ROOT SVGA_SCREEN_MUST_BE_SET +#define SVGA_SCREEN_IS_PRIMARY (1 << 1) +#define SVGA_SCREEN_FULLSCREEN_HINT (1 << 2) +#define SVGA_SCREEN_DEACTIVATE (1 << 3) +#define SVGA_SCREEN_BLANKING (1 << 4) + +typedef struct SVGAScreenObject +{ + uint32_t structSize; + uint32_t id; + uint32_t flags; + struct + { + uint32_t width; + uint32_t height; + } size; + struct + { + int32_t x; + int32_t y; + } root; + SVGAGuestImage backingStore; + uint32_t cloneCount; +} SVGAScreenObject; + +typedef struct +{ + uint32_t screenId; +} SVGAFifoCmdDestroyScreen; + +typedef struct +{ + uint32_t x; + uint32_t y; + uint32_t width; + uint32_t height; +} SVGAFifoCmdUpdate; + +typedef struct +{ + uint32_t fence; +} SVGAFifoCmdFence; + +typedef struct +{ + uint32_t nsid; + uint32_t size; +} SVGAFifoCmdEscape; + +typedef struct +{ + uint32_t id; + uint32_t hotspotX; + uint32_t hotspotY; + uint32_t width; + uint32_t height; + uint32_t andMaskDepth; + uint32_t xorMaskDepth; +} SVGAFifoCmdDefineCursor; + +typedef struct +{ + uint32_t id; + uint32_t hotspotX; + uint32_t hotspotY; + uint32_t width; + uint32_t height; +} SVGAFifoCmdDefineAlphaCursor; + +typedef struct +{ + SVGAScreenObject screen; +} SVGAFifoCmdDefineScreen; + +typedef struct +{ + SVGAColorBGRX color; +} SVGAFifoCmdAnnotationFill; + +typedef struct +{ + SVGASignedPoint srcOrigin; + uint32_t srcScreenId; +} SVGAFifoCmdAnnotationCopy; + +#define SVGA_FIFO_CAP_NONE 0 +#define SVGA_FIFO_CAP_FENCE (1<<0) +#define SVGA_FIFO_CAP_ACCELFRONT (1<<1) +#define SVGA_FIFO_CAP_PITCHLOCK (1<<2) +#define SVGA_FIFO_CAP_VIDEO (1<<3) +#define SVGA_FIFO_CAP_CURSOR_BYPASS_3 (1<<4) +#define SVGA_FIFO_CAP_ESCAPE (1<<5) +#define SVGA_FIFO_CAP_RESERVE (1<<6) +#define SVGA_FIFO_CAP_SCREEN_OBJECT (1<<7) +#define SVGA_FIFO_CAP_GMR2 (1<<8) +#define SVGA_FIFO_CAP_3D_HWVERSION_REVISED SVGA_FIFO_CAP_GMR2 +#define SVGA_FIFO_CAP_SCREEN_OBJECT_2 (1<<9) +#define SVGA_FIFO_CAP_DEAD (1<<10) + +#endif /* _SVGA_REG_H_ */ |