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| author | squidcc <adunstan@corecodec.com> | 2023-05-13 14:16:26 +1000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-05-12 21:16:26 -0700 |
| commit | 3bbfd9d8f94e3a0a083b6cd18da6de87f586a7a3 (patch) | |
| tree | 65f4f7b34f86bd53301b477ef10e491195f6fb53 | |
| parent | 0799f381d513e18f404654047fa1b412084968c8 (diff) | |
| download | yasm-3bbfd9d8f94e3a0a083b6cd18da6de87f586a7a3.tar.gz | |
Fix 128-bit variant of VPBLENDVB incorrectly marked as AVX2 instead of AVX (#112)
| -rwxr-xr-x | modules/arch/x86/gen_x86_insn.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/modules/arch/x86/gen_x86_insn.py b/modules/arch/x86/gen_x86_insn.py index b21c74a2..09d64c7f 100755 --- a/modules/arch/x86/gen_x86_insn.py +++ b/modules/arch/x86/gen_x86_insn.py @@ -5976,7 +5976,7 @@ add_insn("vblendvps", "avx_sse4xmm0", modifiers=[0x4A]) # vpblendvb didn't have a 256-bit form until AVX2 add_group("avx2_sse4xmm0", - cpu=["AVX2"], + cpu=["AVX"], modifiers=["Op2Add"], vex=128, prefix=0x66, |