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path: root/drivers/mmc/zynq_sdhci.c
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* mmc: zynq_sdhci: Add xilinx_pm_request weak functionT Karthik Reddy2021-10-211-0/+6
* mmc: zynq_sdhci: Use set_control_reg from sdhci.cAshok Reddy Soma2021-08-261-20/+1
* mmc: zynq_sdhci: Wait till sd card detect state is stableT Karthik Reddy2021-08-261-0/+19
* mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma2021-08-261-1/+107
* mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma2021-08-261-14/+59
* mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelayAshok Reddy Soma2021-08-061-5/+18
* mmc: zynq_sdhci: Make variables/structure staticMichal Simek2021-07-261-6/+10
* mmc: zynq_sdhci: Fix kernel doc warningsMichal Simek2021-07-261-12/+12
* mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma2021-07-261-2/+8
* mmc: zynq_sdhci: Use Mask writes for Tap delaysAshok Reddy Soma2021-07-261-27/+31
* mmc: zynq_sdhci: Allow configuring zero Tap valuesAshok Reddy Soma2021-07-261-12/+4
* mmc: zynq_sdhci: Resolve uninitialized return valueAshok Reddy Soma2021-07-261-12/+8
* clk: zynq: Add dummy clock enable functionMichal Simek2021-02-231-1/+1
* dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-131-2/+2
* dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-131-2/+2
* dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-131-1/+1
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-2/+2
* mmc: zynq_sdhci: Extend UHS timings till hs200Ashok Reddy Soma2020-10-291-1/+1
* mmc: zynq_sdhci: Add clock phase delays for VersalAshok Reddy Soma2020-10-271-4/+156
* mmc: zynq_sdhci: Set tapdelays based on clk phase delaysAshok Reddy Soma2020-10-271-5/+123
* mmc: zynq_sdhci: Read clock phase delays from dtMichal Simek2020-10-271-0/+85
* mmc: zynq_sdhci: Move macro to the topMichal Simek2020-10-271-2/+2
* mmc: Define timing macro'sAshok Reddy Soma2020-10-271-13/+11
* Revert "mmc: zynq: parse dt when probing"Ashok Reddy Soma2020-10-271-0/+5
* mmc: zynq: Fix incorrect indentationMichal Simek2020-09-231-1/+1
* mmc: zynq: Fix default value for xlnx,mio-bankMichal Simek2020-08-201-1/+1
* xilinx: Fix xlnx,mio_bank propertyMichal Simek2020-08-201-1/+1
* mmc: zynq_sdhci: Remove global pointerMichal Simek2020-06-241-2/+0
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
* mmc: zynq: parse dt when probingBenedikt Grassl2020-04-271-9/+6
* mmc: Merge SD_LEGACY and MMC_LEGACY bus modesFaiz Abbas2020-03-091-1/+0
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-051-0/+1
* dm: core: Require users of devres to include the headerSimon Glass2020-02-051-0/+1
* mmc: zynq_sdhci: Remove check for DM_MMC configSiva Durga Prasad Paladugu2019-10-081-2/+2
* mmc: zynq_sdhci: fix uninitialized pointer deref on probeMatwey V. Kornilov2019-08-091-3/+4
* mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timingsFaiz Abbas2019-07-171-36/+9
* mmc: zynq: Remove unused pwrseq variableMichal Simek2019-01-241-1/+0
* mmc: zynq: Fix tuning_loop_counter type in arasan_sdhci_execute_tuning()Michal Simek2018-06-151-1/+1
* mmc: zynqmp: Add HS200 modes support for ZynqMPSiva Durga Prasad Paladugu2018-05-311-8/+17
* mmc: zynq: Use live-tree functionsMichal Simek2018-05-311-13/+9
* mmc: zynq_sdhci: Add support for SD3.0Siva Durga Prasad Paladugu2018-05-111-5/+226
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is definedHannes Schmelzer2018-05-021-1/+1
* libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada2018-03-051-1/+1
* mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQVipul Kumar2018-03-011-4/+0
* dm: core: Replace of_offset with accessor (part 2)Simon Glass2017-06-011-1/+1
* dm: Rename dev_addr..() functionsSimon Glass2017-06-011-1/+1
* mmc: zynq: Add fdt max-frequency supportStefan Herbrechtsmeier2017-02-171-1/+8
* mmc: zynq: Determine base clock frequency via clock frameworkStefan Herbrechtsmeier2017-02-171-2/+24
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